drivers/staging/et131x/et1310_rx.h

   1 /*
   2  * Agere Systems Inc.
   3  * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
   4  *
   5  * Copyright © 2005 Agere Systems Inc.
   6  * All rights reserved.
   7  *   http://www.agere.com
   8  *
   9  *------------------------------------------------------------------------------
  10  *
  11  * et1310_rx.h - Defines, structs, enums, prototypes, etc. pertaining to data
  12  *               reception.
  13  *
  14  *------------------------------------------------------------------------------
  15  *
  16  * SOFTWARE LICENSE
  17  *
  18  * This software is provided subject to the following terms and conditions,
  19  * which you should read carefully before using the software.  Using this
  20  * software indicates your acceptance of these terms and conditions.  If you do
  21  * not agree with these terms and conditions, do not use the software.
  22  *
  23  * Copyright © 2005 Agere Systems Inc.
  24  * All rights reserved.
  25  *
  26  * Redistribution and use in source or binary forms, with or without
  27  * modifications, are permitted provided that the following conditions are met:
  28  *
  29  * . Redistributions of source code must retain the above copyright notice, this
  30  *    list of conditions and the following Disclaimer as comments in the code as
  31  *    well as in the documentation and/or other materials provided with the
  32  *    distribution.
  33  *
  34  * . Redistributions in binary form must reproduce the above copyright notice,
  35  *    this list of conditions and the following Disclaimer in the documentation
  36  *    and/or other materials provided with the distribution.
  37  *
  38  * . Neither the name of Agere Systems Inc. nor the names of the contributors
  39  *    may be used to endorse or promote products derived from this software
  40  *    without specific prior written permission.
  41  *
  42  * Disclaimer
  43  *
  44  * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
  45  * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
  46  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  ANY
  47  * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
  48  * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
  49  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  50  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  51  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  52  * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
  53  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  54  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
  55  * DAMAGE.
  56  *
  57  */
  58
  59 #ifndef __ET1310_RX_H__
  60 #define __ET1310_RX_H__
  61
  62 #include "et1310_address_map.h"
  63
  64 #define USE_FBR0 true
  65
  66 #ifdef USE_FBR0
  67 /* #define FBR0_BUFFER_SIZE 256 */
  68 #endif
  69
  70 /* #define FBR1_BUFFER_SIZE 2048 */
  71
  72 #define FBR_CHUNKS 32
  73
  74 #define MAX_DESC_PER_RING_RX         1024
  75
  76 /* number of RFDs - default and min */
  77 #ifdef USE_FBR0
  78 #define RFD_LOW_WATER_MARK      40
  79 #define NIC_MIN_NUM_RFD         64
  80 #define NIC_DEFAULT_NUM_RFD     1024
  81 #else
  82 #define RFD_LOW_WATER_MARK      20
  83 #define NIC_MIN_NUM_RFD         64
  84 #define NIC_DEFAULT_NUM_RFD     256
  85 #endif
  86
  87 #define NUM_PACKETS_HANDLED     256
  88
  89 #define ALCATEL_BAD_STATUS      0xe47f0000
  90 #define ALCATEL_MULTICAST_PKT   0x01000000
  91 #define ALCATEL_BROADCAST_PKT   0x02000000
  92
  93 /* typedefs for Free Buffer Descriptors */
  94 struct fbr_desc
  95 {
  96         u32 addr_lo;
  97         u32 addr_hi;
  98         u32 word2;              /* Bits 10-31 reserved, 0-9 descriptor */
  99 };
 100
 101 /* Packet Status Ring Descriptors
 102  *
 103  * Word 0:
 104  *
 105  * top 16 bits are from the Alcatel Status Word as enumerated in
 106  * PE-MCXMAC Data Sheet IPD DS54 0210-1 (also IPD-DS80 0205-2)
 107  *
 108  * 0: hp                        hash pass
 109  * 1: ipa                       IP checksum assist
 110  * 2: ipp                       IP checksum pass
 111  * 3: tcpa                      TCP checksum assist
 112  * 4: tcpp                      TCP checksum pass
 113  * 5: wol                       WOL Event
 114  * 6: rxmac_error               RXMAC Error Indicator
 115  * 7: drop                      Drop packet
 116  * 8: ft                        Frame Truncated
 117  * 9: jp                        Jumbo Packet
 118  * 10: vp                       VLAN Packet
 119  * 11-15: unused
 120  * 16: asw_prev_pkt_dropped     e.g. IFG too small on previous
 121  * 17: asw_RX_DV_event          short receive event detected
 122  * 18: asw_false_carrier_event  bad carrier since last good packet
 123  * 19: asw_code_err             one or more nibbles signalled as errors
 124  * 20: asw_CRC_err              CRC error
 125  * 21: asw_len_chk_err          frame length field incorrect
 126  * 22: asw_too_long             frame length > 1518 bytes
 127  * 23: asw_OK                   valid CRC + no code error
 128  * 24: asw_multicast            has a multicast address
 129  * 25: asw_broadcast            has a broadcast address
 130  * 26: asw_dribble_nibble       spurious bits after EOP
 131  * 27: asw_control_frame        is a control frame
 132  * 28: asw_pause_frame          is a pause frame
 133  * 29: asw_unsupported_op       unsupported OP code
 134  * 30: asw_VLAN_tag             VLAN tag detected
 135  * 31: asw_long_evt             Rx long event
 136  *
 137  * Word 1:
 138  * 0-15: length                 length in bytes
 139  * 16-25: bi                    Buffer Index
 140  * 26-27: ri                    Ring Index
 141  * 28-31: reserved
 142  */
 143
 144 struct pkt_stat_desc {
 145         u32 word0;
 146         u32 word1;
 147 };
 148
 149 /* Typedefs for the RX DMA status word */
 150
 151 /*
 152  * rx status word 0 holds part of the status bits of the Rx DMA engine
 153  * that get copied out to memory by the ET-1310.  Word 0 is a 32 bit word
 154  * which contains the Free Buffer ring 0 and 1 available offset.
 155  *
 156  * bit 0-9 FBR1 offset
 157  * bit 10 Wrap flag for FBR1
 158  * bit 16-25 FBR0 offset
 159  * bit 26 Wrap flag for FBR0
 160  */
 161
 162 /*
 163  * RXSTAT_WORD1_t structure holds part of the status bits of the Rx DMA engine
 164  * that get copied out to memory by the ET-1310.  Word 3 is a 32 bit word
 165  * which contains the Packet Status Ring available offset.
 166  *
 167  * bit 0-15 reserved
 168  * bit 16-27 PSRoffset
 169  * bit 28 PSRwrap
 170  * bit 29-31 unused
 171  */
 172
 173 /*
 174  * struct rx_status_block is a structure representing the status of the Rx
 175  * DMA engine it sits in free memory, and is pointed to by 0x101c / 0x1020
 176  */
 177 struct rx_status_block {
 178         u32 Word0;
 179         u32 Word1;
 180 };
 181
 182 /*
 183  * Structure for look-up table holding free buffer ring pointers
 184  */
 185 struct fbr_lookup {
 186         void *virt[MAX_DESC_PER_RING_RX];
 187         void *buffer1[MAX_DESC_PER_RING_RX];
 188         void *buffer2[MAX_DESC_PER_RING_RX];
 189         u32 bus_high[MAX_DESC_PER_RING_RX];
 190         u32 bus_low[MAX_DESC_PER_RING_RX];
 191 };
 192
 193 /*
 194  * RX_RING_t is sructure representing the adaptor's local reference(s) to the
 195  * rings
 196  */
 197 typedef struct _rx_ring_t {
 198 #ifdef USE_FBR0
 199         void *pFbr0RingVa;
 200         dma_addr_t pFbr0RingPa;
 201         void *Fbr0MemVa[MAX_DESC_PER_RING_RX / FBR_CHUNKS];
 202         dma_addr_t Fbr0MemPa[MAX_DESC_PER_RING_RX / FBR_CHUNKS];
 203         uint64_t Fbr0Realpa;
 204         uint64_t Fbr0offset;
 205         u32 local_Fbr0_full;
 206         u32 Fbr0NumEntries;
 207         u32 Fbr0BufferSize;
 208 #endif
 209         void *pFbr1RingVa;
 210         dma_addr_t pFbr1RingPa;
 211         void *Fbr1MemVa[MAX_DESC_PER_RING_RX / FBR_CHUNKS];
 212         dma_addr_t Fbr1MemPa[MAX_DESC_PER_RING_RX / FBR_CHUNKS];
 213         uint64_t Fbr1Realpa;
 214         uint64_t Fbr1offset;
 215         struct fbr_lookup *fbr[2];      /* One per ring */
 216         u32 local_Fbr1_full;
 217         u32 Fbr1NumEntries;
 218         u32 Fbr1BufferSize;
 219
 220         void *pPSRingVa;
 221         dma_addr_t pPSRingPa;
 222         u32 local_psr_full;
 223         u32 PsrNumEntries;
 224
 225         struct rx_status_block *rx_status_block;
 226         dma_addr_t rx_status_bus;
 227
 228         struct list_head RecvBufferPool;
 229
 230         /* RECV */
 231         struct list_head RecvList;
 232         u32 nReadyRecv;
 233
 234         u32 NumRfd;
 235
 236         bool UnfinishedReceives;
 237
 238         struct list_head RecvPacketPool;
 239
 240         /* lookaside lists */
 241         struct kmem_cache *RecvLookaside;
 242 } RX_RING_t, *PRX_RING_t;
 243
 244 /* Forward reference of RFD */
 245 struct _MP_RFD;
 246
 247 /* Forward declaration of the private adapter structure */
 248 struct et131x_adapter;
 249
 250 /* PROTOTYPES for Initialization */
 251 int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter);
 252 void et131x_rx_dma_memory_free(struct et131x_adapter *adapter);
 253 int et131x_rfd_resources_alloc(struct et131x_adapter *adapter,
 254                                struct _MP_RFD *pMpRfd);
 255 void et131x_rfd_resources_free(struct et131x_adapter *adapter,
 256                                struct _MP_RFD *pMpRfd);
 257 int et131x_init_recv(struct et131x_adapter *adapter);
 258
 259 void ConfigRxDmaRegs(struct et131x_adapter *adapter);
 260 void SetRxDmaTimer(struct et131x_adapter *adapter);
 261 void et131x_rx_dma_disable(struct et131x_adapter *adapter);
 262 void et131x_rx_dma_enable(struct et131x_adapter *adapter);
 263
 264 void et131x_reset_recv(struct et131x_adapter *adapter);
 265
 266 void et131x_handle_recv_interrupt(struct et131x_adapter *adapter);
 267
 268 #endif /* __ET1310_RX_H__ */