arch/powerpc/platforms/83xx/mpc832x_mds.c

   1 /*
   2  * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
   3  *
   4  * Description:
   5  * MPC832xE MDS board specific routines.
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  */
  12
  13 #include <linux/stddef.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/errno.h>
  17 #include <linux/reboot.h>
  18 #include <linux/pci.h>
  19 #include <linux/kdev_t.h>
  20 #include <linux/major.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/seq_file.h>
  24 #include <linux/root_dev.h>
  25 #include <linux/initrd.h>
  26
  27 #include <asm/of_device.h>
  28 #include <asm/of_platform.h>
  29 #include <asm/system.h>
  30 #include <asm/atomic.h>
  31 #include <asm/time.h>
  32 #include <asm/io.h>
  33 #include <asm/machdep.h>
  34 #include <asm/ipic.h>
  35 #include <asm/bootinfo.h>
  36 #include <asm/irq.h>
  37 #include <asm/prom.h>
  38 #include <asm/udbg.h>
  39 #include <sysdev/fsl_soc.h>
  40 #include <asm/qe.h>
  41 #include <asm/qe_ic.h>
  42
  43 #include "mpc83xx.h"
  44 #include "mpc832x_mds.h"
  45
  46 #undef DEBUG
  47 #ifdef DEBUG
  48 #define DBG(fmt...) udbg_printf(fmt)
  49 #else
  50 #define DBG(fmt...)
  51 #endif
  52
  53 #ifndef CONFIG_PCI
  54 unsigned long isa_io_base = 0;
  55 unsigned long isa_mem_base = 0;
  56 #endif
  57
  58 static u8 *bcsr_regs = NULL;
  59
  60 u8 *get_bcsr(void)
  61 {
  62         return bcsr_regs;
  63 }
  64
  65 /* ************************************************************************
  66  *
  67  * Setup the architecture
  68  *
  69  */
  70 static void __init mpc832x_sys_setup_arch(void)
  71 {
  72         struct device_node *np;
  73
  74         if (ppc_md.progress)
  75                 ppc_md.progress("mpc832x_sys_setup_arch()", 0);
  76
  77         np = of_find_node_by_type(NULL, "cpu");
  78         if (np != 0) {
  79                 unsigned int *fp =
  80                     (int *)get_property(np, "clock-frequency", NULL);
  81                 if (fp != 0)
  82                         loops_per_jiffy = *fp / HZ;
  83                 else
  84                         loops_per_jiffy = 50000000 / HZ;
  85                 of_node_put(np);
  86         }
  87
  88         /* Map BCSR area */
  89         np = of_find_node_by_name(NULL, "bcsr");
  90         if (np != 0) {
  91                 struct resource res;
  92
  93                 of_address_to_resource(np, 0, &res);
  94                 bcsr_regs = ioremap(res.start, res.end - res.start +1);
  95                 of_node_put(np);
  96         }
  97
  98 #ifdef CONFIG_PCI
  99         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
 100                 add_bridge(np);
 101         ppc_md.pci_exclude_device = mpc83xx_exclude_device;
 102 #endif
 103
 104 #ifdef CONFIG_QUICC_ENGINE
 105         qe_reset();
 106
 107         if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
 108                 par_io_init(np);
 109                 of_node_put(np);
 110
 111                 for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
 112                         par_io_of_config(np);
 113         }
 114
 115         if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
 116                         != NULL){
 117                 /* Reset the Ethernet PHY */
 118                 bcsr_regs[9] &= ~0x20;
 119                 udelay(1000);
 120                 bcsr_regs[9] |= 0x20;
 121                 iounmap(bcsr_regs);
 122                 of_node_put(np);
 123         }
 124
 125 #endif                          /* CONFIG_QUICC_ENGINE */
 126
 127 #ifdef CONFIG_BLK_DEV_INITRD
 128         if (initrd_start)
 129                 ROOT_DEV = Root_RAM0;
 130         else
 131 #endif
 132 #ifdef  CONFIG_ROOT_NFS
 133                 ROOT_DEV = Root_NFS;
 134 #else
 135                 ROOT_DEV = Root_HDA1;
 136 #endif
 137 }
 138
 139 static int __init mpc832x_declare_of_platform_devices(void)
 140 {
 141         struct device_node *np;
 142
 143         for (np = NULL; (np = of_find_compatible_node(np, "network",
 144                                         "ucc_geth")) != NULL;) {
 145                 int ucc_num;
 146                 char bus_id[BUS_ID_SIZE];
 147
 148                 ucc_num = *((uint *) get_property(np, "device-id", NULL)) - 1;
 149                 snprintf(bus_id, BUS_ID_SIZE, "ucc_geth.%u", ucc_num);
 150                 of_platform_device_create(np, bus_id, NULL);
 151         }
 152
 153         return 0;
 154 }
 155 device_initcall(mpc832x_declare_of_platform_devices);
 156
 157 static void __init mpc832x_sys_init_IRQ(void)
 158 {
 159
 160         struct device_node *np;
 161
 162         np = of_find_node_by_type(NULL, "ipic");
 163         if (!np)
 164                 return;
 165
 166         ipic_init(np, 0);
 167
 168         /* Initialize the default interrupt mapping priorities,
 169          * in case the boot rom changed something on us.
 170          */
 171         ipic_set_default_priority();
 172         of_node_put(np);
 173
 174 #ifdef CONFIG_QUICC_ENGINE
 175         np = of_find_node_by_type(NULL, "qeic");
 176         if (!np)
 177                 return;
 178
 179         qe_ic_init(np, 0);
 180         of_node_put(np);
 181 #endif                          /* CONFIG_QUICC_ENGINE */
 182 }
 183
 184 #if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
 185 extern ulong ds1374_get_rtc_time(void);
 186 extern int ds1374_set_rtc_time(ulong);
 187
 188 static int __init mpc832x_rtc_hookup(void)
 189 {
 190         struct timespec tv;
 191
 192         ppc_md.get_rtc_time = ds1374_get_rtc_time;
 193         ppc_md.set_rtc_time = ds1374_set_rtc_time;
 194
 195         tv.tv_nsec = 0;
 196         tv.tv_sec = (ppc_md.get_rtc_time) ();
 197         do_settimeofday(&tv);
 198
 199         return 0;
 200 }
 201
 202 late_initcall(mpc832x_rtc_hookup);
 203 #endif
 204
 205 /*
 206  * Called very early, MMU is off, device-tree isn't unflattened
 207  */
 208 static int __init mpc832x_sys_probe(void)
 209 {
 210         char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
 211                                           "model", NULL);
 212
 213         if (model == NULL)
 214                 return 0;
 215         if (strcmp(model, "MPC8323EMDS"))
 216                 return 0;
 217
 218         DBG("%s found\n", model);
 219
 220         return 1;
 221 }
 222
 223 define_machine(mpc832x_mds) {
 224         .name           = "MPC832x MDS",
 225         .probe          = mpc832x_sys_probe,
 226         .setup_arch     = mpc832x_sys_setup_arch,
 227         .init_IRQ       = mpc832x_sys_init_IRQ,
 228         .get_irq        = ipic_get_irq,
 229         .restart        = mpc83xx_restart,
 230         .time_init      = mpc83xx_time_init,
 231         .calibrate_decr = generic_calibrate_decr,
 232         .progress       = udbg_progress,
 233 };