MN10300: And Panasonic AM34 subarch and implement SMP
[linux-2.6/x86.git] / arch / mn10300 / kernel / time.c
blob0cb9bdb3b6bdd62f297f6f8f1bf0f9e20757bd52
1 /* MN10300 Low level time management
3 * Copyright (C) 2007-2008 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from arch/i386/kernel/time.c
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
12 #include <linux/sched.h>
13 #include <linux/kernel.h>
14 #include <linux/interrupt.h>
15 #include <linux/time.h>
16 #include <linux/init.h>
17 #include <linux/smp.h>
18 #include <linux/profile.h>
19 #include <linux/cnt32_to_63.h>
20 #include <asm/irq.h>
21 #include <asm/div64.h>
22 #include <asm/processor.h>
23 #include <asm/intctl-regs.h>
24 #include <asm/rtc.h>
25 #include "internal.h"
27 static unsigned long mn10300_last_tsc; /* time-stamp counter at last time
28 * interrupt occurred */
30 static irqreturn_t timer_interrupt(int irq, void *dev_id);
32 static struct irqaction timer_irq = {
33 .handler = timer_interrupt,
34 .flags = IRQF_DISABLED | IRQF_SHARED | IRQF_TIMER,
35 .name = "timer",
38 static unsigned long sched_clock_multiplier;
41 * scheduler clock - returns current time in nanosec units.
43 unsigned long long sched_clock(void)
45 union {
46 unsigned long long ll;
47 unsigned l[2];
48 } tsc64, result;
49 unsigned long tsc, tmp;
50 unsigned product[3]; /* 96-bit intermediate value */
52 /* cnt32_to_63() is not safe with preemption */
53 preempt_disable();
55 /* read the TSC value
57 tsc = 0 - get_cycles(); /* get_cycles() counts down */
59 /* expand to 64-bits.
60 * - sched_clock() must be called once a minute or better or the
61 * following will go horribly wrong - see cnt32_to_63()
63 tsc64.ll = cnt32_to_63(tsc) & 0x7fffffffffffffffULL;
65 preempt_enable();
67 /* scale the 64-bit TSC value to a nanosecond value via a 96-bit
68 * intermediate
70 asm("mulu %2,%0,%3,%0 \n" /* LSW * mult -> 0:%3:%0 */
71 "mulu %2,%1,%2,%1 \n" /* MSW * mult -> %2:%1:0 */
72 "add %3,%1 \n"
73 "addc 0,%2 \n" /* result in %2:%1:%0 */
74 : "=r"(product[0]), "=r"(product[1]), "=r"(product[2]), "=r"(tmp)
75 : "0"(tsc64.l[0]), "1"(tsc64.l[1]), "2"(sched_clock_multiplier)
76 : "cc");
78 result.l[0] = product[1] << 16 | product[0] >> 16;
79 result.l[1] = product[2] << 16 | product[1] >> 16;
81 return result.ll;
85 * initialise the scheduler clock
87 static void __init mn10300_sched_clock_init(void)
89 sched_clock_multiplier =
90 __muldiv64u(NSEC_PER_SEC, 1 << 16, MN10300_TSCCLK);
93 /**
94 * local_timer_interrupt - Local timer interrupt handler
96 * Handle local timer interrupts for this CPU. They may have been propagated
97 * to this CPU from the CPU that actually gets them by way of an IPI.
99 irqreturn_t local_timer_interrupt(void)
101 profile_tick(CPU_PROFILING);
102 update_process_times(user_mode(get_irq_regs()));
103 return IRQ_HANDLED;
107 * advance the kernel's time keeping clocks (xtime and jiffies)
108 * - we use Timer 0 & 1 cascaded as a clock to nudge us the next time
109 * there's a need to update
111 static irqreturn_t timer_interrupt(int irq, void *dev_id)
113 unsigned tsc, elapse;
114 irqreturn_t ret;
116 write_seqlock(&xtime_lock);
118 while (tsc = get_cycles(),
119 elapse = mn10300_last_tsc - tsc, /* time elapsed since last
120 * tick */
121 elapse > MN10300_TSC_PER_HZ
123 mn10300_last_tsc -= MN10300_TSC_PER_HZ;
125 /* advance the kernel's time tracking system */
126 do_timer(1);
129 write_sequnlock(&xtime_lock);
131 ret = local_timer_interrupt();
132 #ifdef CONFIG_SMP
133 send_IPI_allbutself(LOCAL_TIMER_IPI);
134 #endif
135 return ret;
139 * initialise the various timers used by the main part of the kernel
141 void __init time_init(void)
143 /* we need the prescalar running to be able to use IOCLK/8
144 * - IOCLK runs at 1/4 (ST5 open) or 1/8 (ST5 closed) internal CPU clock
145 * - IOCLK runs at Fosc rate (crystal speed)
147 TMPSCNT |= TMPSCNT_ENABLE;
149 startup_timestamp_counter();
151 printk(KERN_INFO
152 "timestamp counter I/O clock running at %lu.%02lu"
153 " (calibrated against RTC)\n",
154 MN10300_TSCCLK / 1000000, (MN10300_TSCCLK / 10000) % 100);
156 mn10300_last_tsc = TMTSCBC;
158 /* use timer 0 & 1 cascaded to tick at as close to HZ as possible */
159 setup_irq(TMJCIRQ, &timer_irq);
161 set_intr_level(TMJCIRQ, NUM2GxICR_LEVEL(CONFIG_TIMER_IRQ_LEVEL));
163 startup_jiffies_counter();
165 #ifdef CONFIG_MN10300_WD_TIMER
166 /* start the watchdog timer */
167 watchdog_go();
168 #endif
170 mn10300_sched_clock_init();