drivers/video/pxafb.h

   1 #ifndef __PXAFB_H__
   2 #define __PXAFB_H__
   3
   4 /*
   5  * linux/drivers/video/pxafb.h
   6  *    -- Intel PXA250/210 LCD Controller Frame Buffer Device
   7  *
   8  *  Copyright (C) 1999 Eric A. Thomas.
   9  *  Copyright (C) 2004 Jean-Frederic Clere.
  10  *  Copyright (C) 2004 Ian Campbell.
  11  *  Copyright (C) 2004 Jeff Lackey.
  12  *   Based on sa1100fb.c Copyright (C) 1999 Eric A. Thomas
  13  *  which in turn is
  14  *   Based on acornfb.c Copyright (C) Russell King.
  15  *
  16  *  2001-08-03: Cliff Brake <cbrake@acclent.com>
  17  *       - ported SA1100 code to PXA
  18  *
  19  * This file is subject to the terms and conditions of the GNU General Public
  20  * License.  See the file COPYING in the main directory of this archive
  21  * for more details.
  22  */
  23
  24 /* Shadows for LCD controller registers */
  25 struct pxafb_lcd_reg {
  26         unsigned int lccr0;
  27         unsigned int lccr1;
  28         unsigned int lccr2;
  29         unsigned int lccr3;
  30 };
  31
  32 /* PXA LCD DMA descriptor */
  33 struct pxafb_dma_descriptor {
  34         unsigned int fdadr;
  35         unsigned int fsadr;
  36         unsigned int fidr;
  37         unsigned int ldcmd;
  38 };
  39
  40 enum {
  41         PAL_NONE        = -1,
  42         PAL_BASE        = 0,
  43         PAL_OV1         = 1,
  44         PAL_OV2         = 2,
  45         PAL_MAX,
  46 };
  47
  48 enum {
  49         DMA_BASE        = 0,
  50         DMA_UPPER       = 0,
  51         DMA_LOWER       = 1,
  52         DMA_OV1         = 1,
  53         DMA_OV2_Y       = 2,
  54         DMA_OV2_Cb      = 3,
  55         DMA_OV2_Cr      = 4,
  56         DMA_CURSOR      = 5,
  57         DMA_CMD         = 6,
  58         DMA_MAX,
  59 };
  60
  61 /* maximum palette size - 256 entries, each 4 bytes long */
  62 #define PALETTE_SIZE    (256 * 4)
  63
  64 struct pxafb_dma_buff {
  65         unsigned char palette[PAL_MAX * PALETTE_SIZE];
  66         struct pxafb_dma_descriptor pal_desc[PAL_MAX];
  67         struct pxafb_dma_descriptor dma_desc[DMA_MAX];
  68 };
  69
  70 struct pxafb_info {
  71         struct fb_info          fb;
  72         struct device           *dev;
  73         struct clk              *clk;
  74
  75         void __iomem            *mmio_base;
  76
  77         struct pxafb_dma_buff   *dma_buff;
  78         dma_addr_t              dma_buff_phys;
  79         dma_addr_t              fdadr[DMA_MAX];
  80
  81         /*
  82          * These are the addresses we mapped
  83          * the framebuffer memory region to.
  84          */
  85         /* raw memory addresses */
  86         dma_addr_t              map_dma;        /* physical */
  87         u_char *                map_cpu;        /* virtual */
  88         u_int                   map_size;
  89
  90         /* addresses of pieces placed in raw buffer */
  91         u_char *                screen_cpu;     /* virtual address of frame buffer */
  92         dma_addr_t              screen_dma;     /* physical address of frame buffer */
  93         u16 *                   palette_cpu;    /* virtual address of palette memory */
  94         u_int                   palette_size;
  95
  96         u_int                   lccr0;
  97         u_int                   lccr3;
  98         u_int                   lccr4;
  99         u_int                   cmap_inverse:1,
 100                                 cmap_static:1,
 101                                 unused:30;
 102
 103         u_int                   reg_lccr0;
 104         u_int                   reg_lccr1;
 105         u_int                   reg_lccr2;
 106         u_int                   reg_lccr3;
 107         u_int                   reg_lccr4;
 108
 109         unsigned long   hsync_time;
 110
 111         volatile u_char         state;
 112         volatile u_char         task_state;
 113         struct semaphore        ctrlr_sem;
 114         wait_queue_head_t       ctrlr_wait;
 115         struct work_struct      task;
 116
 117 #ifdef CONFIG_CPU_FREQ
 118         struct notifier_block   freq_transition;
 119         struct notifier_block   freq_policy;
 120 #endif
 121 };
 122
 123 #define TO_INF(ptr,member) container_of(ptr,struct pxafb_info,member)
 124
 125 /*
 126  * These are the actions for set_ctrlr_state
 127  */
 128 #define C_DISABLE               (0)
 129 #define C_ENABLE                (1)
 130 #define C_DISABLE_CLKCHANGE     (2)
 131 #define C_ENABLE_CLKCHANGE      (3)
 132 #define C_REENABLE              (4)
 133 #define C_DISABLE_PM            (5)
 134 #define C_ENABLE_PM             (6)
 135 #define C_STARTUP               (7)
 136
 137 #define PXA_NAME        "PXA"
 138
 139 /*
 140  * Minimum X and Y resolutions
 141  */
 142 #define MIN_XRES        64
 143 #define MIN_YRES        64
 144
 145 #endif /* __PXAFB_H__ */