1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
31 #include <linux/types.h>
32 #include <linux/delay.h>
35 #include "e1000_regs.h"
36 #include "e1000_defines.h"
40 #define E1000_DEV_ID_82576 0x10C9
41 #define E1000_DEV_ID_82576_FIBER 0x10E6
42 #define E1000_DEV_ID_82576_SERDES 0x10E7
43 #define E1000_DEV_ID_82576_QUAD_COPPER 0x10E8
44 #define E1000_DEV_ID_82576_NS 0x150A
45 #define E1000_DEV_ID_82575EB_COPPER 0x10A7
46 #define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
47 #define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
49 #define E1000_REVISION_2 2
50 #define E1000_REVISION_4 4
52 #define E1000_FUNC_1 1
58 e1000_num_macs
/* List is 1-based, so subtract 1 for true count. */
61 enum e1000_media_type
{
62 e1000_media_type_unknown
= 0,
63 e1000_media_type_copper
= 1,
64 e1000_media_type_internal_serdes
= 2,
69 e1000_nvm_unknown
= 0,
72 e1000_nvm_eeprom_microwire
,
77 enum e1000_nvm_override
{
78 e1000_nvm_override_none
= 0,
79 e1000_nvm_override_spi_small
,
80 e1000_nvm_override_spi_large
,
81 e1000_nvm_override_microwire_small
,
82 e1000_nvm_override_microwire_large
86 e1000_phy_unknown
= 0,
97 e1000_bus_type_unknown
= 0,
100 e1000_bus_type_pci_express
,
101 e1000_bus_type_reserved
104 enum e1000_bus_speed
{
105 e1000_bus_speed_unknown
= 0,
111 e1000_bus_speed_2500
,
112 e1000_bus_speed_5000
,
113 e1000_bus_speed_reserved
116 enum e1000_bus_width
{
117 e1000_bus_width_unknown
= 0,
118 e1000_bus_width_pcie_x1
,
119 e1000_bus_width_pcie_x2
,
120 e1000_bus_width_pcie_x4
= 4,
121 e1000_bus_width_pcie_x8
= 8,
124 e1000_bus_width_reserved
127 enum e1000_1000t_rx_status
{
128 e1000_1000t_rx_status_not_ok
= 0,
129 e1000_1000t_rx_status_ok
,
130 e1000_1000t_rx_status_undefined
= 0xFF
133 enum e1000_rev_polarity
{
134 e1000_rev_polarity_normal
= 0,
135 e1000_rev_polarity_reversed
,
136 e1000_rev_polarity_undefined
= 0xFF
144 e1000_fc_default
= 0xFF
147 /* Statistics counters collected by the MAC */
148 struct e1000_hw_stats
{
227 struct e1000_phy_stats
{
232 struct e1000_host_mng_dhcp_cookie
{
243 /* Host Interface "Rev 1" */
244 struct e1000_host_command_header
{
251 #define E1000_HI_MAX_DATA_LENGTH 252
252 struct e1000_host_command_info
{
253 struct e1000_host_command_header command_header
;
254 u8 command_data
[E1000_HI_MAX_DATA_LENGTH
];
257 /* Host Interface "Rev 2" */
258 struct e1000_host_mng_command_header
{
266 #define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
267 struct e1000_host_mng_command_info
{
268 struct e1000_host_mng_command_header command_header
;
269 u8 command_data
[E1000_HI_MAX_MNG_DATA_LENGTH
];
272 #include "e1000_mac.h"
273 #include "e1000_phy.h"
274 #include "e1000_nvm.h"
275 #include "e1000_mbx.h"
277 struct e1000_mac_operations
{
278 s32 (*check_for_link
)(struct e1000_hw
*);
279 s32 (*reset_hw
)(struct e1000_hw
*);
280 s32 (*init_hw
)(struct e1000_hw
*);
281 bool (*check_mng_mode
)(struct e1000_hw
*);
282 s32 (*setup_physical_interface
)(struct e1000_hw
*);
283 void (*rar_set
)(struct e1000_hw
*, u8
*, u32
);
284 s32 (*read_mac_addr
)(struct e1000_hw
*);
285 s32 (*get_speed_and_duplex
)(struct e1000_hw
*, u16
*, u16
*);
288 struct e1000_phy_operations
{
289 s32 (*acquire
)(struct e1000_hw
*);
290 s32 (*check_reset_block
)(struct e1000_hw
*);
291 s32 (*force_speed_duplex
)(struct e1000_hw
*);
292 s32 (*get_cfg_done
)(struct e1000_hw
*hw
);
293 s32 (*get_cable_length
)(struct e1000_hw
*);
294 s32 (*get_phy_info
)(struct e1000_hw
*);
295 s32 (*read_reg
)(struct e1000_hw
*, u32
, u16
*);
296 void (*release
)(struct e1000_hw
*);
297 s32 (*reset
)(struct e1000_hw
*);
298 s32 (*set_d0_lplu_state
)(struct e1000_hw
*, bool);
299 s32 (*set_d3_lplu_state
)(struct e1000_hw
*, bool);
300 s32 (*write_reg
)(struct e1000_hw
*, u32
, u16
);
303 struct e1000_nvm_operations
{
304 s32 (*acquire
)(struct e1000_hw
*);
305 s32 (*read
)(struct e1000_hw
*, u16
, u16
, u16
*);
306 void (*release
)(struct e1000_hw
*);
307 s32 (*write
)(struct e1000_hw
*, u16
, u16
, u16
*);
311 s32 (*get_invariants
)(struct e1000_hw
*);
312 struct e1000_mac_operations
*mac_ops
;
313 struct e1000_phy_operations
*phy_ops
;
314 struct e1000_nvm_operations
*nvm_ops
;
317 extern const struct e1000_info e1000_82575_info
;
319 struct e1000_mac_info
{
320 struct e1000_mac_operations ops
;
325 enum e1000_mac_type type
;
342 /* Maximum size of the MTA register table in all supported adapters */
343 #define MAX_MTA_REG 128
344 u32 mta_shadow
[MAX_MTA_REG
];
347 u8 forced_speed_duplex
;
350 bool arc_subsystem_valid
;
351 bool asf_firmware_present
;
354 bool disable_hw_init_bits
;
355 bool get_link_status
;
356 bool ifs_params_forced
;
358 bool report_tx_early
;
359 bool serdes_has_link
;
360 bool tx_pkt_filtering
;
363 struct e1000_phy_info
{
364 struct e1000_phy_operations ops
;
366 enum e1000_phy_type type
;
368 enum e1000_1000t_rx_status local_rx
;
369 enum e1000_1000t_rx_status remote_rx
;
370 enum e1000_ms_type ms_type
;
371 enum e1000_ms_type original_ms_type
;
372 enum e1000_rev_polarity cable_polarity
;
373 enum e1000_smart_speed smart_speed
;
377 u32 reset_delay_us
; /* in usec */
380 enum e1000_media_type media_type
;
382 u16 autoneg_advertised
;
385 u16 max_cable_length
;
386 u16 min_cable_length
;
390 bool disable_polarity_correction
;
392 bool polarity_correction
;
394 bool speed_downgraded
;
395 bool autoneg_wait_to_complete
;
398 struct e1000_nvm_info
{
399 struct e1000_nvm_operations ops
;
401 enum e1000_nvm_type type
;
402 enum e1000_nvm_override override
;
414 struct e1000_bus_info
{
415 enum e1000_bus_type type
;
416 enum e1000_bus_speed speed
;
417 enum e1000_bus_width width
;
425 struct e1000_fc_info
{
426 u32 high_water
; /* Flow control high-water mark */
427 u32 low_water
; /* Flow control low-water mark */
428 u16 pause_time
; /* Flow control pause timer */
429 bool send_xon
; /* Flow control send XON */
430 bool strict_ieee
; /* Strict IEEE mode */
431 enum e1000_fc_type type
; /* Type of flow control */
432 enum e1000_fc_type original_type
;
435 struct e1000_mbx_operations
{
436 s32 (*init_params
)(struct e1000_hw
*hw
);
437 s32 (*read
)(struct e1000_hw
*, u32
*, u16
, u16
);
438 s32 (*write
)(struct e1000_hw
*, u32
*, u16
, u16
);
439 s32 (*read_posted
)(struct e1000_hw
*, u32
*, u16
, u16
);
440 s32 (*write_posted
)(struct e1000_hw
*, u32
*, u16
, u16
);
441 s32 (*check_for_msg
)(struct e1000_hw
*, u16
);
442 s32 (*check_for_ack
)(struct e1000_hw
*, u16
);
443 s32 (*check_for_rst
)(struct e1000_hw
*, u16
);
446 struct e1000_mbx_stats
{
455 struct e1000_mbx_info
{
456 struct e1000_mbx_operations ops
;
457 struct e1000_mbx_stats stats
;
463 struct e1000_dev_spec_82575
{
471 u8 __iomem
*flash_address
;
472 unsigned long io_base
;
474 struct e1000_mac_info mac
;
475 struct e1000_fc_info fc
;
476 struct e1000_phy_info phy
;
477 struct e1000_nvm_info nvm
;
478 struct e1000_bus_info bus
;
479 struct e1000_mbx_info mbx
;
480 struct e1000_host_mng_dhcp_cookie mng_cookie
;
483 struct e1000_dev_spec_82575 _82575
;
487 u16 subsystem_vendor_id
;
488 u16 subsystem_device_id
;
495 extern char *igb_get_hw_dev_name(struct e1000_hw
*hw
);
496 #define hw_dbg(format, arg...) \
497 printk(KERN_DEBUG "%s: " format, igb_get_hw_dev_name(hw), ##arg)
499 #define hw_dbg(format, arg...)
502 /* These functions must be implemented by drivers */
503 s32
igb_read_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
);
504 s32
igb_write_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
);