[PATCH] powerpc: iseries: mf related cleanups
[linux-2.6/x86.git] / arch / powerpc / platforms / iseries / setup.c
blob190891ce9cb46a4b7fc5454367fc730921c6bf5f
1 /*
2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
5 * Description:
6 * Architecture- / platform-specific boot-time initialization code for
7 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
8 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9 * <dan@net4x.com>.
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
17 #undef DEBUG
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/threads.h>
22 #include <linux/smp.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/initrd.h>
26 #include <linux/seq_file.h>
27 #include <linux/kdev_t.h>
28 #include <linux/major.h>
29 #include <linux/root_dev.h>
30 #include <linux/kernel.h>
32 #include <asm/processor.h>
33 #include <asm/machdep.h>
34 #include <asm/page.h>
35 #include <asm/mmu.h>
36 #include <asm/pgtable.h>
37 #include <asm/mmu_context.h>
38 #include <asm/cputable.h>
39 #include <asm/sections.h>
40 #include <asm/iommu.h>
41 #include <asm/firmware.h>
42 #include <asm/system.h>
43 #include <asm/time.h>
44 #include <asm/paca.h>
45 #include <asm/cache.h>
46 #include <asm/sections.h>
47 #include <asm/abs_addr.h>
48 #include <asm/iseries/hv_lp_config.h>
49 #include <asm/iseries/hv_call_event.h>
50 #include <asm/iseries/hv_call_xm.h>
51 #include <asm/iseries/it_lp_queue.h>
52 #include <asm/iseries/mf.h>
53 #include <asm/iseries/hv_lp_event.h>
54 #include <asm/iseries/lpar_map.h>
55 #include <asm/udbg.h>
57 #include "naca.h"
58 #include "setup.h"
59 #include "irq.h"
60 #include "vpd_areas.h"
61 #include "processor_vpd.h"
62 #include "main_store.h"
63 #include "call_sm.h"
64 #include "call_hpt.h"
66 #ifdef DEBUG
67 #define DBG(fmt...) udbg_printf(fmt)
68 #else
69 #define DBG(fmt...)
70 #endif
72 /* Function Prototypes */
73 static unsigned long build_iSeries_Memory_Map(void);
74 static void iseries_shared_idle(void);
75 static void iseries_dedicated_idle(void);
76 #ifdef CONFIG_PCI
77 extern void iSeries_pci_final_fixup(void);
78 #else
79 static void iSeries_pci_final_fixup(void) { }
80 #endif
82 /* Global Variables */
83 int piranha_simulator;
85 extern int rd_size; /* Defined in drivers/block/rd.c */
86 extern unsigned long embedded_sysmap_start;
87 extern unsigned long embedded_sysmap_end;
89 extern unsigned long iSeries_recal_tb;
90 extern unsigned long iSeries_recal_titan;
92 static unsigned long cmd_mem_limit;
94 struct MemoryBlock {
95 unsigned long absStart;
96 unsigned long absEnd;
97 unsigned long logicalStart;
98 unsigned long logicalEnd;
102 * Process the main store vpd to determine where the holes in memory are
103 * and return the number of physical blocks and fill in the array of
104 * block data.
106 static unsigned long iSeries_process_Condor_mainstore_vpd(
107 struct MemoryBlock *mb_array, unsigned long max_entries)
109 unsigned long holeFirstChunk, holeSizeChunks;
110 unsigned long numMemoryBlocks = 1;
111 struct IoHriMainStoreSegment4 *msVpd =
112 (struct IoHriMainStoreSegment4 *)xMsVpd;
113 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
114 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
115 unsigned long holeSize = holeEnd - holeStart;
117 printk("Mainstore_VPD: Condor\n");
119 * Determine if absolute memory has any
120 * holes so that we can interpret the
121 * access map we get back from the hypervisor
122 * correctly.
124 mb_array[0].logicalStart = 0;
125 mb_array[0].logicalEnd = 0x100000000;
126 mb_array[0].absStart = 0;
127 mb_array[0].absEnd = 0x100000000;
129 if (holeSize) {
130 numMemoryBlocks = 2;
131 holeStart = holeStart & 0x000fffffffffffff;
132 holeStart = addr_to_chunk(holeStart);
133 holeFirstChunk = holeStart;
134 holeSize = addr_to_chunk(holeSize);
135 holeSizeChunks = holeSize;
136 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
137 holeFirstChunk, holeSizeChunks );
138 mb_array[0].logicalEnd = holeFirstChunk;
139 mb_array[0].absEnd = holeFirstChunk;
140 mb_array[1].logicalStart = holeFirstChunk;
141 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
142 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
143 mb_array[1].absEnd = 0x100000000;
145 return numMemoryBlocks;
148 #define MaxSegmentAreas 32
149 #define MaxSegmentAdrRangeBlocks 128
150 #define MaxAreaRangeBlocks 4
152 static unsigned long iSeries_process_Regatta_mainstore_vpd(
153 struct MemoryBlock *mb_array, unsigned long max_entries)
155 struct IoHriMainStoreSegment5 *msVpdP =
156 (struct IoHriMainStoreSegment5 *)xMsVpd;
157 unsigned long numSegmentBlocks = 0;
158 u32 existsBits = msVpdP->msAreaExists;
159 unsigned long area_num;
161 printk("Mainstore_VPD: Regatta\n");
163 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
164 unsigned long numAreaBlocks;
165 struct IoHriMainStoreArea4 *currentArea;
167 if (existsBits & 0x80000000) {
168 unsigned long block_num;
170 currentArea = &msVpdP->msAreaArray[area_num];
171 numAreaBlocks = currentArea->numAdrRangeBlocks;
172 printk("ms_vpd: processing area %2ld blocks=%ld",
173 area_num, numAreaBlocks);
174 for (block_num = 0; block_num < numAreaBlocks;
175 ++block_num ) {
176 /* Process an address range block */
177 struct MemoryBlock tempBlock;
178 unsigned long i;
180 tempBlock.absStart =
181 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
182 tempBlock.absEnd =
183 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
184 tempBlock.logicalStart = 0;
185 tempBlock.logicalEnd = 0;
186 printk("\n block %ld absStart=%016lx absEnd=%016lx",
187 block_num, tempBlock.absStart,
188 tempBlock.absEnd);
190 for (i = 0; i < numSegmentBlocks; ++i) {
191 if (mb_array[i].absStart ==
192 tempBlock.absStart)
193 break;
195 if (i == numSegmentBlocks) {
196 if (numSegmentBlocks == max_entries)
197 panic("iSeries_process_mainstore_vpd: too many memory blocks");
198 mb_array[numSegmentBlocks] = tempBlock;
199 ++numSegmentBlocks;
200 } else
201 printk(" (duplicate)");
203 printk("\n");
205 existsBits <<= 1;
207 /* Now sort the blocks found into ascending sequence */
208 if (numSegmentBlocks > 1) {
209 unsigned long m, n;
211 for (m = 0; m < numSegmentBlocks - 1; ++m) {
212 for (n = numSegmentBlocks - 1; m < n; --n) {
213 if (mb_array[n].absStart <
214 mb_array[n-1].absStart) {
215 struct MemoryBlock tempBlock;
217 tempBlock = mb_array[n];
218 mb_array[n] = mb_array[n-1];
219 mb_array[n-1] = tempBlock;
225 * Assign "logical" addresses to each block. These
226 * addresses correspond to the hypervisor "bitmap" space.
227 * Convert all addresses into units of 256K chunks.
230 unsigned long i, nextBitmapAddress;
232 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
233 nextBitmapAddress = 0;
234 for (i = 0; i < numSegmentBlocks; ++i) {
235 unsigned long length = mb_array[i].absEnd -
236 mb_array[i].absStart;
238 mb_array[i].logicalStart = nextBitmapAddress;
239 mb_array[i].logicalEnd = nextBitmapAddress + length;
240 nextBitmapAddress += length;
241 printk(" Bitmap range: %016lx - %016lx\n"
242 " Absolute range: %016lx - %016lx\n",
243 mb_array[i].logicalStart,
244 mb_array[i].logicalEnd,
245 mb_array[i].absStart, mb_array[i].absEnd);
246 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
247 0x000fffffffffffff);
248 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
249 0x000fffffffffffff);
250 mb_array[i].logicalStart =
251 addr_to_chunk(mb_array[i].logicalStart);
252 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
256 return numSegmentBlocks;
259 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
260 unsigned long max_entries)
262 unsigned long i;
263 unsigned long mem_blocks = 0;
265 if (cpu_has_feature(CPU_FTR_SLB))
266 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
267 max_entries);
268 else
269 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
270 max_entries);
272 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
273 for (i = 0; i < mem_blocks; ++i) {
274 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
275 " abs chunks %016lx - %016lx\n",
276 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
277 mb_array[i].absStart, mb_array[i].absEnd);
279 return mem_blocks;
282 static void __init iSeries_get_cmdline(void)
284 char *p, *q;
286 /* copy the command line parameter from the primary VSP */
287 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
288 HvLpDma_Direction_RemoteToLocal);
290 p = cmd_line;
291 q = cmd_line + 255;
292 while(p < q) {
293 if (!*p || *p == '\n')
294 break;
295 ++p;
297 *p = 0;
300 static void __init iSeries_init_early(void)
302 DBG(" -> iSeries_init_early()\n");
304 ppc64_interrupt_controller = IC_ISERIES;
306 #if defined(CONFIG_BLK_DEV_INITRD)
308 * If the init RAM disk has been configured and there is
309 * a non-zero starting address for it, set it up
311 if (naca.xRamDisk) {
312 initrd_start = (unsigned long)__va(naca.xRamDisk);
313 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
314 initrd_below_start_ok = 1; // ramdisk in kernel space
315 ROOT_DEV = Root_RAM0;
316 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
317 rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
318 } else
319 #endif /* CONFIG_BLK_DEV_INITRD */
321 /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
324 iSeries_recal_tb = get_tb();
325 iSeries_recal_titan = HvCallXm_loadTod();
328 * Initialize the hash table management pointers
330 hpte_init_iSeries();
333 * Initialize the DMA/TCE management
335 iommu_init_early_iSeries();
337 /* Initialize machine-dependency vectors */
338 #ifdef CONFIG_SMP
339 smp_init_iSeries();
340 #endif
341 if (itLpNaca.xPirEnvironMode == 0)
342 piranha_simulator = 1;
344 /* Associate Lp Event Queue 0 with processor 0 */
345 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
347 mf_init();
349 /* If we were passed an initrd, set the ROOT_DEV properly if the values
350 * look sensible. If not, clear initrd reference.
352 #ifdef CONFIG_BLK_DEV_INITRD
353 if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
354 initrd_end > initrd_start)
355 ROOT_DEV = Root_RAM0;
356 else
357 initrd_start = initrd_end = 0;
358 #endif /* CONFIG_BLK_DEV_INITRD */
360 DBG(" <- iSeries_init_early()\n");
363 struct mschunks_map mschunks_map = {
364 /* XXX We don't use these, but Piranha might need them. */
365 .chunk_size = MSCHUNKS_CHUNK_SIZE,
366 .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
367 .chunk_mask = MSCHUNKS_OFFSET_MASK,
369 EXPORT_SYMBOL(mschunks_map);
371 void mschunks_alloc(unsigned long num_chunks)
373 klimit = _ALIGN(klimit, sizeof(u32));
374 mschunks_map.mapping = (u32 *)klimit;
375 klimit += num_chunks * sizeof(u32);
376 mschunks_map.num_chunks = num_chunks;
380 * The iSeries may have very large memories ( > 128 GB ) and a partition
381 * may get memory in "chunks" that may be anywhere in the 2**52 real
382 * address space. The chunks are 256K in size. To map this to the
383 * memory model Linux expects, the AS/400 specific code builds a
384 * translation table to translate what Linux thinks are "physical"
385 * addresses to the actual real addresses. This allows us to make
386 * it appear to Linux that we have contiguous memory starting at
387 * physical address zero while in fact this could be far from the truth.
388 * To avoid confusion, I'll let the words physical and/or real address
389 * apply to the Linux addresses while I'll use "absolute address" to
390 * refer to the actual hardware real address.
392 * build_iSeries_Memory_Map gets information from the Hypervisor and
393 * looks at the Main Store VPD to determine the absolute addresses
394 * of the memory that has been assigned to our partition and builds
395 * a table used to translate Linux's physical addresses to these
396 * absolute addresses. Absolute addresses are needed when
397 * communicating with the hypervisor (e.g. to build HPT entries)
399 * Returns the physical memory size
402 static unsigned long __init build_iSeries_Memory_Map(void)
404 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
405 u32 nextPhysChunk;
406 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
407 u32 totalChunks,moreChunks;
408 u32 currChunk, thisChunk, absChunk;
409 u32 currDword;
410 u32 chunkBit;
411 u64 map;
412 struct MemoryBlock mb[32];
413 unsigned long numMemoryBlocks, curBlock;
415 /* Chunk size on iSeries is 256K bytes */
416 totalChunks = (u32)HvLpConfig_getMsChunks();
417 mschunks_alloc(totalChunks);
420 * Get absolute address of our load area
421 * and map it to physical address 0
422 * This guarantees that the loadarea ends up at physical 0
423 * otherwise, it might not be returned by PLIC as the first
424 * chunks
427 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
428 loadAreaSize = itLpNaca.xLoadAreaChunks;
431 * Only add the pages already mapped here.
432 * Otherwise we might add the hpt pages
433 * The rest of the pages of the load area
434 * aren't in the HPT yet and can still
435 * be assigned an arbitrary physical address
437 if ((loadAreaSize * 64) > HvPagesToMap)
438 loadAreaSize = HvPagesToMap / 64;
440 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
443 * TODO Do we need to do something if the HPT is in the 64MB load area?
444 * This would be required if the itLpNaca.xLoadAreaChunks includes
445 * the HPT size
448 printk("Mapping load area - physical addr = 0000000000000000\n"
449 " absolute addr = %016lx\n",
450 chunk_to_addr(loadAreaFirstChunk));
451 printk("Load area size %dK\n", loadAreaSize * 256);
453 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
454 mschunks_map.mapping[nextPhysChunk] =
455 loadAreaFirstChunk + nextPhysChunk;
458 * Get absolute address of our HPT and remember it so
459 * we won't map it to any physical address
461 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
462 hptSizePages = (u32)HvCallHpt_getHptPages();
463 hptSizeChunks = hptSizePages >>
464 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
465 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
467 printk("HPT absolute addr = %016lx, size = %dK\n",
468 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
471 * Determine if absolute memory has any
472 * holes so that we can interpret the
473 * access map we get back from the hypervisor
474 * correctly.
476 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
479 * Process the main store access map from the hypervisor
480 * to build up our physical -> absolute translation table
482 curBlock = 0;
483 currChunk = 0;
484 currDword = 0;
485 moreChunks = totalChunks;
487 while (moreChunks) {
488 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
489 currDword);
490 thisChunk = currChunk;
491 while (map) {
492 chunkBit = map >> 63;
493 map <<= 1;
494 if (chunkBit) {
495 --moreChunks;
496 while (thisChunk >= mb[curBlock].logicalEnd) {
497 ++curBlock;
498 if (curBlock >= numMemoryBlocks)
499 panic("out of memory blocks");
501 if (thisChunk < mb[curBlock].logicalStart)
502 panic("memory block error");
504 absChunk = mb[curBlock].absStart +
505 (thisChunk - mb[curBlock].logicalStart);
506 if (((absChunk < hptFirstChunk) ||
507 (absChunk > hptLastChunk)) &&
508 ((absChunk < loadAreaFirstChunk) ||
509 (absChunk > loadAreaLastChunk))) {
510 mschunks_map.mapping[nextPhysChunk] =
511 absChunk;
512 ++nextPhysChunk;
515 ++thisChunk;
517 ++currDword;
518 currChunk += 64;
522 * main store size (in chunks) is
523 * totalChunks - hptSizeChunks
524 * which should be equal to
525 * nextPhysChunk
527 return chunk_to_addr(nextPhysChunk);
531 * Document me.
533 static void __init iSeries_setup_arch(void)
535 if (get_lppaca()->shared_proc) {
536 ppc_md.idle_loop = iseries_shared_idle;
537 printk(KERN_INFO "Using shared processor idle loop\n");
538 } else {
539 ppc_md.idle_loop = iseries_dedicated_idle;
540 printk(KERN_INFO "Using dedicated idle loop\n");
543 /* Setup the Lp Event Queue */
544 setup_hvlpevent_queue();
546 printk("Max logical processors = %d\n",
547 itVpdAreas.xSlicMaxLogicalProcs);
548 printk("Max physical processors = %d\n",
549 itVpdAreas.xSlicMaxPhysicalProcs);
552 static void iSeries_show_cpuinfo(struct seq_file *m)
554 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
558 * Document me.
560 static void iSeries_restart(char *cmd)
562 mf_reboot();
566 * Document me.
568 static void iSeries_power_off(void)
570 mf_power_off();
574 * Document me.
576 static void iSeries_halt(void)
578 mf_power_off();
581 static void __init iSeries_progress(char * st, unsigned short code)
583 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
584 mf_display_progress(code);
587 static void __init iSeries_fixup_klimit(void)
590 * Change klimit to take into account any ram disk
591 * that may be included
593 if (naca.xRamDisk)
594 klimit = KERNELBASE + (u64)naca.xRamDisk +
595 (naca.xRamDiskSize * HW_PAGE_SIZE);
596 else {
598 * No ram disk was included - check and see if there
599 * was an embedded system map. Change klimit to take
600 * into account any embedded system map
602 if (embedded_sysmap_end)
603 klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
604 0xfffffffffffff000);
608 static int __init iSeries_src_init(void)
610 /* clear the progress line */
611 ppc_md.progress(" ", 0xffff);
612 return 0;
615 late_initcall(iSeries_src_init);
617 static inline void process_iSeries_events(void)
619 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
622 static void yield_shared_processor(void)
624 unsigned long tb;
626 HvCall_setEnabledInterrupts(HvCall_MaskIPI |
627 HvCall_MaskLpEvent |
628 HvCall_MaskLpProd |
629 HvCall_MaskTimeout);
631 tb = get_tb();
632 /* Compute future tb value when yield should expire */
633 HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
636 * The decrementer stops during the yield. Force a fake decrementer
637 * here and let the timer_interrupt code sort out the actual time.
639 get_lppaca()->int_dword.fields.decr_int = 1;
640 ppc64_runlatch_on();
641 process_iSeries_events();
644 static void iseries_shared_idle(void)
646 while (1) {
647 while (!need_resched() && !hvlpevent_is_pending()) {
648 local_irq_disable();
649 ppc64_runlatch_off();
651 /* Recheck with irqs off */
652 if (!need_resched() && !hvlpevent_is_pending())
653 yield_shared_processor();
655 HMT_medium();
656 local_irq_enable();
659 ppc64_runlatch_on();
661 if (hvlpevent_is_pending())
662 process_iSeries_events();
664 preempt_enable_no_resched();
665 schedule();
666 preempt_disable();
670 static void iseries_dedicated_idle(void)
672 set_thread_flag(TIF_POLLING_NRFLAG);
674 while (1) {
675 if (!need_resched()) {
676 while (!need_resched()) {
677 ppc64_runlatch_off();
678 HMT_low();
680 if (hvlpevent_is_pending()) {
681 HMT_medium();
682 ppc64_runlatch_on();
683 process_iSeries_events();
687 HMT_medium();
690 ppc64_runlatch_on();
691 preempt_enable_no_resched();
692 schedule();
693 preempt_disable();
697 #ifndef CONFIG_PCI
698 void __init iSeries_init_IRQ(void) { }
699 #endif
701 static int __init iseries_probe(int platform)
703 if (PLATFORM_ISERIES_LPAR != platform)
704 return 0;
706 ppc64_firmware_features |= FW_FEATURE_ISERIES;
707 ppc64_firmware_features |= FW_FEATURE_LPAR;
709 return 1;
712 struct machdep_calls __initdata iseries_md = {
713 .setup_arch = iSeries_setup_arch,
714 .show_cpuinfo = iSeries_show_cpuinfo,
715 .init_IRQ = iSeries_init_IRQ,
716 .get_irq = iSeries_get_irq,
717 .init_early = iSeries_init_early,
718 .pcibios_fixup = iSeries_pci_final_fixup,
719 .restart = iSeries_restart,
720 .power_off = iSeries_power_off,
721 .halt = iSeries_halt,
722 .get_boot_time = iSeries_get_boot_time,
723 .set_rtc_time = iSeries_set_rtc_time,
724 .get_rtc_time = iSeries_get_rtc_time,
725 .calibrate_decr = generic_calibrate_decr,
726 .progress = iSeries_progress,
727 .probe = iseries_probe,
728 /* XXX Implement enable_pmcs for iSeries */
731 struct blob {
732 unsigned char data[PAGE_SIZE];
733 unsigned long next;
736 struct iseries_flat_dt {
737 struct boot_param_header header;
738 u64 reserve_map[2];
739 struct blob dt;
740 struct blob strings;
743 struct iseries_flat_dt iseries_dt;
745 void dt_init(struct iseries_flat_dt *dt)
747 dt->header.off_mem_rsvmap =
748 offsetof(struct iseries_flat_dt, reserve_map);
749 dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
750 dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
751 dt->header.totalsize = sizeof(struct iseries_flat_dt);
752 dt->header.dt_strings_size = sizeof(struct blob);
754 /* There is no notion of hardware cpu id on iSeries */
755 dt->header.boot_cpuid_phys = smp_processor_id();
757 dt->dt.next = (unsigned long)&dt->dt.data;
758 dt->strings.next = (unsigned long)&dt->strings.data;
760 dt->header.magic = OF_DT_HEADER;
761 dt->header.version = 0x10;
762 dt->header.last_comp_version = 0x10;
764 dt->reserve_map[0] = 0;
765 dt->reserve_map[1] = 0;
768 void dt_check_blob(struct blob *b)
770 if (b->next >= (unsigned long)&b->next) {
771 DBG("Ran out of space in flat device tree blob!\n");
772 BUG();
776 void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
778 *((u32*)dt->dt.next) = value;
779 dt->dt.next += sizeof(u32);
781 dt_check_blob(&dt->dt);
784 void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
786 *((u64*)dt->dt.next) = value;
787 dt->dt.next += sizeof(u64);
789 dt_check_blob(&dt->dt);
792 unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
794 unsigned long start = blob->next - (unsigned long)blob->data;
796 memcpy((char *)blob->next, data, len);
797 blob->next = _ALIGN(blob->next + len, 4);
799 dt_check_blob(blob);
801 return start;
804 void dt_start_node(struct iseries_flat_dt *dt, char *name)
806 dt_push_u32(dt, OF_DT_BEGIN_NODE);
807 dt_push_bytes(&dt->dt, name, strlen(name) + 1);
810 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
812 void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
814 unsigned long offset;
816 dt_push_u32(dt, OF_DT_PROP);
818 /* Length of the data */
819 dt_push_u32(dt, len);
821 /* Put the property name in the string blob. */
822 offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
824 /* The offset of the properties name in the string blob. */
825 dt_push_u32(dt, (u32)offset);
827 /* The actual data. */
828 dt_push_bytes(&dt->dt, data, len);
831 void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
833 dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
836 void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
838 dt_prop(dt, name, (char *)&data, sizeof(u32));
841 void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
843 dt_prop(dt, name, (char *)&data, sizeof(u64));
846 void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
848 dt_prop(dt, name, (char *)data, sizeof(u64) * n);
851 void dt_prop_u32_list(struct iseries_flat_dt *dt, char *name, u32 *data, int n)
853 dt_prop(dt, name, (char *)data, sizeof(u32) * n);
856 void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
858 dt_prop(dt, name, NULL, 0);
861 void dt_cpus(struct iseries_flat_dt *dt)
863 unsigned char buf[32];
864 unsigned char *p;
865 unsigned int i, index;
866 struct IoHriProcessorVpd *d;
867 u32 pft_size[2];
869 /* yuck */
870 snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
871 p = strchr(buf, ' ');
872 if (!p) p = buf + strlen(buf);
874 dt_start_node(dt, "cpus");
875 dt_prop_u32(dt, "#address-cells", 1);
876 dt_prop_u32(dt, "#size-cells", 0);
878 pft_size[0] = 0; /* NUMA CEC cookie, 0 for non NUMA */
879 pft_size[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE);
881 for (i = 0; i < NR_CPUS; i++) {
882 if (lppaca[i].dyn_proc_status >= 2)
883 continue;
885 snprintf(p, 32 - (p - buf), "@%d", i);
886 dt_start_node(dt, buf);
888 dt_prop_str(dt, "device_type", "cpu");
890 index = lppaca[i].dyn_hv_phys_proc_index;
891 d = &xIoHriProcessorVpd[index];
893 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
894 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
896 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
897 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
899 /* magic conversions to Hz copied from old code */
900 dt_prop_u32(dt, "clock-frequency",
901 ((1UL << 34) * 1000000) / d->xProcFreq);
902 dt_prop_u32(dt, "timebase-frequency",
903 ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
905 dt_prop_u32(dt, "reg", i);
907 dt_prop_u32_list(dt, "ibm,pft-size", pft_size, 2);
909 dt_end_node(dt);
912 dt_end_node(dt);
915 void build_flat_dt(struct iseries_flat_dt *dt, unsigned long phys_mem_size)
917 u64 tmp[2];
919 dt_init(dt);
921 dt_start_node(dt, "");
923 dt_prop_u32(dt, "#address-cells", 2);
924 dt_prop_u32(dt, "#size-cells", 2);
926 /* /memory */
927 dt_start_node(dt, "memory@0");
928 dt_prop_str(dt, "name", "memory");
929 dt_prop_str(dt, "device_type", "memory");
930 tmp[0] = 0;
931 tmp[1] = phys_mem_size;
932 dt_prop_u64_list(dt, "reg", tmp, 2);
933 dt_end_node(dt);
935 /* /chosen */
936 dt_start_node(dt, "chosen");
937 dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
938 if (cmd_mem_limit)
939 dt_prop_u64(dt, "linux,memory-limit", cmd_mem_limit);
940 dt_end_node(dt);
942 dt_cpus(dt);
944 dt_end_node(dt);
946 dt_push_u32(dt, OF_DT_END);
949 void * __init iSeries_early_setup(void)
951 unsigned long phys_mem_size;
953 iSeries_fixup_klimit();
956 * Initialize the table which translate Linux physical addresses to
957 * AS/400 absolute addresses
959 phys_mem_size = build_iSeries_Memory_Map();
961 iSeries_get_cmdline();
963 /* Save unparsed command line copy for /proc/cmdline */
964 strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
966 /* Parse early parameters, in particular mem=x */
967 parse_early_param();
969 build_flat_dt(&iseries_dt, phys_mem_size);
971 return (void *) __pa(&iseries_dt);
975 * On iSeries we just parse the mem=X option from the command line.
976 * On pSeries it's a bit more complicated, see prom_init_mem()
978 static int __init early_parsemem(char *p)
980 if (p)
981 cmd_mem_limit = ALIGN(memparse(p, &p), PAGE_SIZE);
982 return 0;
984 early_param("mem", early_parsemem);
986 static void hvputc(char c)
988 if (c == '\n')
989 hvputc('\r');
991 HvCall_writeLogBuffer(&c, 1);
994 void __init udbg_init_iseries(void)
996 udbg_putc = hvputc;