2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2006 Paul Mundt
8 * based off of the old drivers/char/sh-sci.c by:
10 * Copyright (C) 1999, 2000 Niibe Yutaka
11 * Copyright (C) 2000 Sugioka Toshinobu
12 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
13 * Modified to support SecureEdge. David McCullough (2002)
14 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * This file is subject to the terms and conditions of the GNU General Public
17 * License. See the file "COPYING" in the main directory of this archive
23 #include <linux/config.h>
24 #include <linux/module.h>
25 #include <linux/errno.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/serial.h>
31 #include <linux/major.h>
32 #include <linux/string.h>
33 #include <linux/sysrq.h>
34 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/delay.h>
38 #include <linux/console.h>
39 #include <linux/platform_device.h>
41 #ifdef CONFIG_CPU_FREQ
42 #include <linux/notifier.h>
43 #include <linux/cpufreq.h>
46 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
47 #include <asm/clock.h>
48 #include <asm/sh_bios.h>
54 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
61 struct uart_port port
;
66 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
67 unsigned int irqs
[SCIx_NR_IRQS
];
69 /* Port pin configuration */
70 void (*init_pins
)(struct uart_port
*port
,
73 /* Port enable callback */
74 void (*enable
)(struct uart_port
*port
);
76 /* Port disable callback */
77 void (*disable
)(struct uart_port
*port
);
80 struct timer_list break_timer
;
85 static struct sci_port
*kgdb_sci_port
;
88 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
89 static struct sci_port
*serial_console_port
;
92 /* Function prototypes */
93 static void sci_stop_tx(struct uart_port
*port
);
95 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
97 static struct sci_port sci_ports
[SCI_NPORTS
];
98 static struct uart_driver sci_uart_driver
;
100 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
101 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
102 static inline void handle_error(struct uart_port
*port
)
104 /* Clear error flags */
105 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
108 static int get_char(struct uart_port
*port
)
111 unsigned short status
;
114 spin_lock_irqsave(&port
->lock
, flags
);
116 status
= sci_in(port
, SCxSR
);
117 if (status
& SCxSR_ERRORS(port
)) {
121 } while (!(status
& SCxSR_RDxF(port
)));
122 c
= sci_in(port
, SCxRDR
);
123 sci_in(port
, SCxSR
); /* Dummy read */
124 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
125 spin_unlock_irqrestore(&port
->lock
, flags
);
129 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
131 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
132 static void put_char(struct uart_port
*port
, char c
)
135 unsigned short status
;
137 spin_lock_irqsave(&port
->lock
, flags
);
140 status
= sci_in(port
, SCxSR
);
141 } while (!(status
& SCxSR_TDxE(port
)));
143 sci_out(port
, SCxTDR
, c
);
144 sci_in(port
, SCxSR
); /* Dummy read */
145 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
147 spin_unlock_irqrestore(&port
->lock
, flags
);
151 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
152 static void put_string(struct sci_port
*sci_port
, const char *buffer
, int count
)
154 struct uart_port
*port
= &sci_port
->port
;
155 const unsigned char *p
= buffer
;
158 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
162 #ifdef CONFIG_SH_STANDARD_BIOS
163 /* This call only does a trap the first time it is
164 * called, and so is safe to do here unconditionally
166 usegdb
|= sh_bios_in_gdb_mode();
168 #ifdef CONFIG_SH_KGDB
169 usegdb
|= (kgdb_in_gdb_mode
&& (port
== kgdb_sci_port
));
173 /* $<packet info>#<checksum>. */
177 put_char(port
, 'O'); /* 'O'utput to console */
180 for (i
=0; i
<count
; i
++) { /* Don't use run length encoding */
191 put_char(port
, highhex(checksum
));
192 put_char(port
, lowhex(checksum
));
193 } while (get_char(port
) != '+');
195 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
196 for (i
=0; i
<count
; i
++) {
198 put_char(port
, '\r');
199 put_char(port
, *p
++);
202 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
204 #ifdef CONFIG_SH_KGDB
205 static int kgdb_sci_getchar(void)
209 /* Keep trying to read a character, this could be neater */
210 while ((c
= get_char(kgdb_sci_port
)) < 0)
216 static inline void kgdb_sci_putchar(int c
)
218 put_char(kgdb_sci_port
, c
);
220 #endif /* CONFIG_SH_KGDB */
222 #if defined(__H8300S__)
223 enum { sci_disable
, sci_enable
};
225 static void h8300_sci_config(struct uart_port
* port
, unsigned int ctrl
)
227 volatile unsigned char *mstpcrl
=(volatile unsigned char *)MSTPCRL
;
228 int ch
= (port
->mapbase
- SMR0
) >> 3;
229 unsigned char mask
= 1 << (ch
+1);
231 if (ctrl
== sci_disable
) {
238 static inline void h8300_sci_enable(struct uart_port
*port
)
240 h8300_sci_config(port
, sci_enable
);
243 static inline void h8300_sci_disable(struct uart_port
*port
)
245 h8300_sci_config(port
, sci_disable
);
249 #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
250 defined(__H8300H__) || defined(__H8300S__)
251 static void sci_init_pins_sci(struct uart_port
* port
, unsigned int cflag
)
253 int ch
= (port
->mapbase
- SMR0
) >> 3;
256 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
257 h8300_sci_pins
[ch
].rx
,
259 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
260 h8300_sci_pins
[ch
].tx
,
264 H8300_SCI_DR(ch
) |= h8300_sci_pins
[ch
].tx
;
267 #define sci_init_pins_sci NULL
270 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
271 static void sci_init_pins_irda(struct uart_port
*port
, unsigned int cflag
)
273 unsigned int fcr_val
= 0;
276 fcr_val
|= SCFCR_MCE
;
278 sci_out(port
, SCFCR
, fcr_val
);
281 #define sci_init_pins_irda NULL
285 #define sci_init_pins_scif NULL
288 #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
289 #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
290 /* SH7300 doesn't use RTS/CTS */
291 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
293 sci_out(port
, SCFCR
, 0);
295 #elif defined(CONFIG_CPU_SH3)
296 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
297 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
299 unsigned int fcr_val
= 0;
302 /* We need to set SCPCR to enable RTS/CTS */
303 data
= ctrl_inw(SCPCR
);
304 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
305 ctrl_outw(data
& 0x0fcf, SCPCR
);
308 fcr_val
|= SCFCR_MCE
;
310 /* We need to set SCPCR to enable RTS/CTS */
311 data
= ctrl_inw(SCPCR
);
312 /* Clear out SCP7MD1,0, SCP4MD1,0,
313 Set SCP6MD1,0 = {01} (output) */
314 ctrl_outw((data
& 0x0fcf) | 0x1000, SCPCR
);
316 data
= ctrl_inb(SCPDR
);
317 /* Set /RTS2 (bit6) = 0 */
318 ctrl_outb(data
& 0xbf, SCPDR
);
321 sci_out(port
, SCFCR
, fcr_val
);
325 static void sci_init_pins_scif(struct uart_port
*port
, unsigned int cflag
)
327 unsigned int fcr_val
= 0;
329 if (cflag
& CRTSCTS
) {
330 fcr_val
|= SCFCR_MCE
;
332 #ifdef CONFIG_CPU_SUBTYPE_SH7343
334 #elif defined(CONFIG_CPU_SUBTYPE_SH7780)
335 ctrl_outw(0x0080, SCSPTR0
); /* Set RTS = 1 */
337 ctrl_outw(0x0080, SCSPTR2
); /* Set RTS = 1 */
340 sci_out(port
, SCFCR
, fcr_val
);
344 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
345 static inline int scif_txroom(struct uart_port
*port
)
347 return SCIF_TXROOM_MAX
- (sci_in(port
, SCTFDR
) & 0x7f);
350 static inline int scif_rxroom(struct uart_port
*port
)
352 return sci_in(port
, SCRFDR
) & 0x7f;
355 static inline int scif_txroom(struct uart_port
*port
)
357 return SCIF_TXROOM_MAX
- (sci_in(port
, SCFDR
) >> 8);
360 static inline int scif_rxroom(struct uart_port
*port
)
362 return sci_in(port
, SCFDR
) & SCIF_RFDC_MASK
;
365 #endif /* SCIF_ONLY || SCI_AND_SCIF */
367 static inline int sci_txroom(struct uart_port
*port
)
369 return ((sci_in(port
, SCxSR
) & SCI_TDRE
) != 0);
372 static inline int sci_rxroom(struct uart_port
*port
)
374 return ((sci_in(port
, SCxSR
) & SCxSR_RDxF(port
)) != 0);
377 /* ********************************************************************** *
378 * the interrupt related routines *
379 * ********************************************************************** */
381 static void sci_transmit_chars(struct uart_port
*port
)
383 struct circ_buf
*xmit
= &port
->info
->xmit
;
384 unsigned int stopped
= uart_tx_stopped(port
);
385 unsigned short status
;
389 status
= sci_in(port
, SCxSR
);
390 if (!(status
& SCxSR_TDxE(port
))) {
391 ctrl
= sci_in(port
, SCSCR
);
392 if (uart_circ_empty(xmit
)) {
393 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
395 ctrl
|= SCI_CTRL_FLAGS_TIE
;
397 sci_out(port
, SCSCR
, ctrl
);
402 if (port
->type
== PORT_SCIF
)
403 count
= scif_txroom(port
);
406 count
= sci_txroom(port
);
414 } else if (!uart_circ_empty(xmit
) && !stopped
) {
415 c
= xmit
->buf
[xmit
->tail
];
416 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
421 sci_out(port
, SCxTDR
, c
);
424 } while (--count
> 0);
426 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
428 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
429 uart_write_wakeup(port
);
430 if (uart_circ_empty(xmit
)) {
433 ctrl
= sci_in(port
, SCSCR
);
435 #if !defined(SCI_ONLY)
436 if (port
->type
== PORT_SCIF
) {
437 sci_in(port
, SCxSR
); /* Dummy read */
438 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
442 ctrl
|= SCI_CTRL_FLAGS_TIE
;
443 sci_out(port
, SCSCR
, ctrl
);
447 /* On SH3, SCIF may read end-of-break as a space->mark char */
448 #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
450 static inline void sci_receive_chars(struct uart_port
*port
,
451 struct pt_regs
*regs
)
453 struct sci_port
*sci_port
= (struct sci_port
*)port
;
454 struct tty_struct
*tty
= port
->info
->tty
;
455 int i
, count
, copied
= 0;
456 unsigned short status
;
459 status
= sci_in(port
, SCxSR
);
460 if (!(status
& SCxSR_RDxF(port
)))
464 #if !defined(SCI_ONLY)
465 if (port
->type
== PORT_SCIF
)
466 count
= scif_rxroom(port
);
469 count
= sci_rxroom(port
);
471 /* Don't copy more bytes than there is room for in the buffer */
472 count
= tty_buffer_request_room(tty
, count
);
474 /* If for any reason we can't copy more data, we're done! */
478 if (port
->type
== PORT_SCI
) {
479 char c
= sci_in(port
, SCxRDR
);
480 if (uart_handle_sysrq_char(port
, c
, regs
) || sci_port
->break_flag
)
483 tty_insert_flip_char(tty
, c
, TTY_NORMAL
);
486 for (i
=0; i
<count
; i
++) {
487 char c
= sci_in(port
, SCxRDR
);
488 status
= sci_in(port
, SCxSR
);
489 #if defined(CONFIG_CPU_SH3)
490 /* Skip "chars" during break */
491 if (sci_port
->break_flag
) {
493 (status
& SCxSR_FER(port
))) {
498 /* Nonzero => end-of-break */
499 pr_debug("scif: debounce<%02x>\n", c
);
500 sci_port
->break_flag
= 0;
507 #endif /* CONFIG_CPU_SH3 */
508 if (uart_handle_sysrq_char(port
, c
, regs
)) {
513 /* Store data and status */
514 if (status
&SCxSR_FER(port
)) {
516 pr_debug("sci: frame error\n");
517 } else if (status
&SCxSR_PER(port
)) {
519 pr_debug("sci: parity error\n");
522 tty_insert_flip_char(tty
, c
, flag
);
526 sci_in(port
, SCxSR
); /* dummy read */
527 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
530 port
->icount
.rx
+= count
;
534 /* Tell the rest of the system the news. New characters! */
535 tty_flip_buffer_push(tty
);
537 sci_in(port
, SCxSR
); /* dummy read */
538 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
542 #define SCI_BREAK_JIFFIES (HZ/20)
543 /* The sci generates interrupts during the break,
544 * 1 per millisecond or so during the break period, for 9600 baud.
545 * So dont bother disabling interrupts.
546 * But dont want more than 1 break event.
547 * Use a kernel timer to periodically poll the rx line until
548 * the break is finished.
550 static void sci_schedule_break_timer(struct sci_port
*port
)
552 port
->break_timer
.expires
= jiffies
+ SCI_BREAK_JIFFIES
;
553 add_timer(&port
->break_timer
);
555 /* Ensure that two consecutive samples find the break over. */
556 static void sci_break_timer(unsigned long data
)
558 struct sci_port
*port
= (struct sci_port
*)data
;
560 if (sci_rxd_in(&port
->port
) == 0) {
561 port
->break_flag
= 1;
562 sci_schedule_break_timer(port
);
563 } else if (port
->break_flag
== 1) {
565 port
->break_flag
= 2;
566 sci_schedule_break_timer(port
);
568 port
->break_flag
= 0;
571 static inline int sci_handle_errors(struct uart_port
*port
)
574 unsigned short status
= sci_in(port
, SCxSR
);
575 struct tty_struct
*tty
= port
->info
->tty
;
577 if (status
& SCxSR_ORER(port
)) {
579 if (tty_insert_flip_char(tty
, 0, TTY_OVERRUN
))
581 pr_debug("sci: overrun error\n");
584 if (status
& SCxSR_FER(port
)) {
585 if (sci_rxd_in(port
) == 0) {
586 /* Notify of BREAK */
587 struct sci_port
*sci_port
= (struct sci_port
*)port
;
589 if (!sci_port
->break_flag
) {
590 sci_port
->break_flag
= 1;
591 sci_schedule_break_timer(sci_port
);
593 /* Do sysrq handling. */
594 if (uart_handle_break(port
))
596 pr_debug("sci: BREAK detected\n");
597 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
602 if (tty_insert_flip_char(tty
, 0, TTY_FRAME
))
604 pr_debug("sci: frame error\n");
608 if (status
& SCxSR_PER(port
)) {
610 if (tty_insert_flip_char(tty
, 0, TTY_PARITY
))
612 pr_debug("sci: parity error\n");
616 tty_flip_buffer_push(tty
);
621 static inline int sci_handle_breaks(struct uart_port
*port
)
624 unsigned short status
= sci_in(port
, SCxSR
);
625 struct tty_struct
*tty
= port
->info
->tty
;
626 struct sci_port
*s
= &sci_ports
[port
->line
];
628 if (!s
->break_flag
&& status
& SCxSR_BRK(port
)) {
629 #if defined(CONFIG_CPU_SH3)
633 /* Notify of BREAK */
634 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
636 pr_debug("sci: BREAK detected\n");
639 #if defined(SCIF_ORER)
640 /* XXX: Handle SCIF overrun error */
641 if (port
->type
== PORT_SCIF
&& (sci_in(port
, SCLSR
) & SCIF_ORER
) != 0) {
642 sci_out(port
, SCLSR
, 0);
643 if (tty_insert_flip_char(tty
, 0, TTY_OVERRUN
)) {
645 pr_debug("sci: overrun error\n");
651 tty_flip_buffer_push(tty
);
656 static irqreturn_t
sci_rx_interrupt(int irq
, void *port
, struct pt_regs
*regs
)
658 /* I think sci_receive_chars has to be called irrespective
659 * of whether the I_IXOFF is set, otherwise, how is the interrupt
662 sci_receive_chars(port
, regs
);
667 static irqreturn_t
sci_tx_interrupt(int irq
, void *ptr
, struct pt_regs
*regs
)
669 struct uart_port
*port
= ptr
;
671 spin_lock_irq(&port
->lock
);
672 sci_transmit_chars(port
);
673 spin_unlock_irq(&port
->lock
);
678 static irqreturn_t
sci_er_interrupt(int irq
, void *ptr
, struct pt_regs
*regs
)
680 struct uart_port
*port
= ptr
;
683 if (port
->type
== PORT_SCI
) {
684 if (sci_handle_errors(port
)) {
685 /* discard character in rx buffer */
687 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
690 #if defined(SCIF_ORER)
691 if((sci_in(port
, SCLSR
) & SCIF_ORER
) != 0) {
692 struct tty_struct
*tty
= port
->info
->tty
;
694 sci_out(port
, SCLSR
, 0);
695 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
696 tty_flip_buffer_push(tty
);
697 pr_debug("scif: overrun error\n");
700 sci_rx_interrupt(irq
, ptr
, regs
);
703 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
705 /* Kick the transmission */
706 sci_tx_interrupt(irq
, ptr
, regs
);
711 static irqreturn_t
sci_br_interrupt(int irq
, void *ptr
, struct pt_regs
*regs
)
713 struct uart_port
*port
= ptr
;
716 sci_handle_breaks(port
);
718 #ifdef CONFIG_SH_KGDB
719 /* Break into the debugger if a break is detected */
723 sci_out(port
, SCxSR
, SCxSR_BREAK_CLEAR(port
));
728 static irqreturn_t
sci_mpxed_interrupt(int irq
, void *ptr
, struct pt_regs
*regs
)
730 unsigned short ssr_status
, scr_status
;
731 struct uart_port
*port
= ptr
;
733 ssr_status
= sci_in(port
,SCxSR
);
734 scr_status
= sci_in(port
,SCSCR
);
737 if ((ssr_status
& 0x0020) && (scr_status
& 0x0080))
738 sci_tx_interrupt(irq
, ptr
, regs
);
740 if ((ssr_status
& 0x0002) && (scr_status
& 0x0040))
741 sci_rx_interrupt(irq
, ptr
, regs
);
742 /* Error Interrupt */
743 if ((ssr_status
& 0x0080) && (scr_status
& 0x0400))
744 sci_er_interrupt(irq
, ptr
, regs
);
745 /* Break Interrupt */
746 if ((ssr_status
& 0x0010) && (scr_status
& 0x0200))
747 sci_br_interrupt(irq
, ptr
, regs
);
752 #ifdef CONFIG_CPU_FREQ
754 * Here we define a transistion notifier so that we can update all of our
755 * ports' baud rate when the peripheral clock changes.
757 static int sci_notifier(struct notifier_block
*self
,
758 unsigned long phase
, void *p
)
760 struct cpufreq_freqs
*freqs
= p
;
763 if ((phase
== CPUFREQ_POSTCHANGE
) ||
764 (phase
== CPUFREQ_RESUMECHANGE
)){
765 for (i
= 0; i
< SCI_NPORTS
; i
++) {
766 struct uart_port
*port
= &sci_ports
[i
].port
;
770 * Update the uartclk per-port if frequency has
771 * changed, since it will no longer necessarily be
772 * consistent with the old frequency.
774 * Really we want to be able to do something like
775 * uart_change_speed() or something along those lines
776 * here to implicitly reset the per-port baud rate..
778 * Clean this up later..
780 clk
= clk_get("module_clk");
781 port
->uartclk
= clk_get_rate(clk
) * 16;
785 printk(KERN_INFO
"%s: got a postchange notification "
786 "for cpu %d (old %d, new %d)\n",
787 __FUNCTION__
, freqs
->cpu
, freqs
->old
, freqs
->new);
793 static struct notifier_block sci_nb
= { &sci_notifier
, NULL
, 0 };
794 #endif /* CONFIG_CPU_FREQ */
796 static int sci_request_irq(struct sci_port
*port
)
799 irqreturn_t (*handlers
[4])(int irq
, void *ptr
, struct pt_regs
*regs
) = {
800 sci_er_interrupt
, sci_rx_interrupt
, sci_tx_interrupt
,
803 const char *desc
[] = { "SCI Receive Error", "SCI Receive Data Full",
804 "SCI Transmit Data Empty", "SCI Break" };
806 if (port
->irqs
[0] == port
->irqs
[1]) {
807 if (!port
->irqs
[0]) {
808 printk(KERN_ERR
"sci: Cannot allocate irq.(IRQ=0)\n");
812 if (request_irq(port
->irqs
[0], sci_mpxed_interrupt
,
813 SA_INTERRUPT
, "sci", port
)) {
814 printk(KERN_ERR
"sci: Cannot allocate irq.\n");
818 for (i
= 0; i
< ARRAY_SIZE(handlers
); i
++) {
821 if (request_irq(port
->irqs
[i
], handlers
[i
],
822 SA_INTERRUPT
, desc
[i
], port
)) {
823 printk(KERN_ERR
"sci: Cannot allocate irq.\n");
832 static void sci_free_irq(struct sci_port
*port
)
836 if (port
->irqs
[0] == port
->irqs
[1]) {
838 printk("sci: sci_free_irq error\n");
840 free_irq(port
->irqs
[0], port
);
842 for (i
= 0; i
< ARRAY_SIZE(port
->irqs
); i
++) {
846 free_irq(port
->irqs
[i
], port
);
851 static unsigned int sci_tx_empty(struct uart_port
*port
)
857 static void sci_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
859 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
860 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
861 /* If you have signals for DTR and DCD, please implement here. */
864 static unsigned int sci_get_mctrl(struct uart_port
*port
)
866 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
869 return TIOCM_DTR
| TIOCM_RTS
| TIOCM_DSR
;
872 static void sci_start_tx(struct uart_port
*port
)
876 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
877 ctrl
= sci_in(port
, SCSCR
);
878 ctrl
|= SCI_CTRL_FLAGS_TIE
;
879 sci_out(port
, SCSCR
, ctrl
);
882 static void sci_stop_tx(struct uart_port
*port
)
886 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
887 ctrl
= sci_in(port
, SCSCR
);
888 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
889 sci_out(port
, SCSCR
, ctrl
);
892 static void sci_start_rx(struct uart_port
*port
, unsigned int tty_start
)
896 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
897 ctrl
= sci_in(port
, SCSCR
);
898 ctrl
|= SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
;
899 sci_out(port
, SCSCR
, ctrl
);
902 static void sci_stop_rx(struct uart_port
*port
)
906 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
907 ctrl
= sci_in(port
, SCSCR
);
908 ctrl
&= ~(SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
);
909 sci_out(port
, SCSCR
, ctrl
);
912 static void sci_enable_ms(struct uart_port
*port
)
914 /* Nothing here yet .. */
917 static void sci_break_ctl(struct uart_port
*port
, int break_state
)
919 /* Nothing here yet .. */
922 static int sci_startup(struct uart_port
*port
)
924 struct sci_port
*s
= &sci_ports
[port
->line
];
931 sci_start_rx(port
, 1);
936 static void sci_shutdown(struct uart_port
*port
)
938 struct sci_port
*s
= &sci_ports
[port
->line
];
948 static void sci_set_termios(struct uart_port
*port
, struct termios
*termios
,
951 struct sci_port
*s
= &sci_ports
[port
->line
];
952 unsigned int status
, baud
, smr_val
;
956 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
964 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
965 struct clk
*clk
= clk_get("module_clk");
966 t
= SCBRR_VALUE(baud
, clk_get_rate(clk
));
969 t
= SCBRR_VALUE(baud
);
975 spin_lock_irqsave(&port
->lock
, flags
);
978 status
= sci_in(port
, SCxSR
);
979 } while (!(status
& SCxSR_TEND(port
)));
981 sci_out(port
, SCSCR
, 0x00); /* TE=0, RE=0, CKE1=0 */
983 #if !defined(SCI_ONLY)
984 if (port
->type
== PORT_SCIF
)
985 sci_out(port
, SCFCR
, SCFCR_RFRST
| SCFCR_TFRST
);
988 smr_val
= sci_in(port
, SCSMR
) & 3;
989 if ((termios
->c_cflag
& CSIZE
) == CS7
)
991 if (termios
->c_cflag
& PARENB
)
993 if (termios
->c_cflag
& PARODD
)
995 if (termios
->c_cflag
& CSTOPB
)
998 uart_update_timeout(port
, termios
->c_cflag
, baud
);
1000 sci_out(port
, SCSMR
, smr_val
);
1004 sci_out(port
, SCSMR
, (sci_in(port
, SCSMR
) & ~3) | 1);
1007 sci_out(port
, SCSMR
, sci_in(port
, SCSMR
) & ~3);
1009 sci_out(port
, SCBRR
, t
);
1010 udelay((1000000+(baud
-1)) / baud
); /* Wait one bit interval */
1013 if (likely(s
->init_pins
))
1014 s
->init_pins(port
, termios
->c_cflag
);
1016 sci_out(port
, SCSCR
, SCSCR_INIT(port
));
1018 if ((termios
->c_cflag
& CREAD
) != 0)
1019 sci_start_rx(port
,0);
1021 spin_unlock_irqrestore(&port
->lock
, flags
);
1024 static const char *sci_type(struct uart_port
*port
)
1026 switch (port
->type
) {
1027 case PORT_SCI
: return "sci";
1028 case PORT_SCIF
: return "scif";
1029 case PORT_IRDA
: return "irda";
1035 static void sci_release_port(struct uart_port
*port
)
1037 /* Nothing here yet .. */
1040 static int sci_request_port(struct uart_port
*port
)
1042 /* Nothing here yet .. */
1046 static void sci_config_port(struct uart_port
*port
, int flags
)
1048 struct sci_port
*s
= &sci_ports
[port
->line
];
1050 port
->type
= s
->type
;
1052 switch (port
->type
) {
1054 s
->init_pins
= sci_init_pins_sci
;
1057 s
->init_pins
= sci_init_pins_scif
;
1060 s
->init_pins
= sci_init_pins_irda
;
1064 #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1065 if (port
->mapbase
== 0)
1066 port
->mapbase
= onchip_remap(SCIF_ADDR_SH5
, 1024, "SCIF");
1068 port
->membase
= (void __iomem
*)port
->mapbase
;
1072 static int sci_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
1074 struct sci_port
*s
= &sci_ports
[port
->line
];
1076 if (ser
->irq
!= s
->irqs
[SCIx_TXI_IRQ
] || ser
->irq
> NR_IRQS
)
1078 if (ser
->baud_base
< 2400)
1079 /* No paper tape reader for Mitch.. */
1085 static struct uart_ops sci_uart_ops
= {
1086 .tx_empty
= sci_tx_empty
,
1087 .set_mctrl
= sci_set_mctrl
,
1088 .get_mctrl
= sci_get_mctrl
,
1089 .start_tx
= sci_start_tx
,
1090 .stop_tx
= sci_stop_tx
,
1091 .stop_rx
= sci_stop_rx
,
1092 .enable_ms
= sci_enable_ms
,
1093 .break_ctl
= sci_break_ctl
,
1094 .startup
= sci_startup
,
1095 .shutdown
= sci_shutdown
,
1096 .set_termios
= sci_set_termios
,
1098 .release_port
= sci_release_port
,
1099 .request_port
= sci_request_port
,
1100 .config_port
= sci_config_port
,
1101 .verify_port
= sci_verify_port
,
1104 static void __init
sci_init_ports(void)
1106 static int first
= 1;
1114 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1115 sci_ports
[i
].port
.ops
= &sci_uart_ops
;
1116 sci_ports
[i
].port
.iotype
= UPIO_MEM
;
1117 sci_ports
[i
].port
.line
= i
;
1118 sci_ports
[i
].port
.fifosize
= 1;
1120 #if defined(__H8300H__) || defined(__H8300S__)
1122 sci_ports
[i
].enable
= h8300_sci_enable
;
1123 sci_ports
[i
].disable
= h8300_sci_disable
;
1125 sci_ports
[i
].port
.uartclk
= CONFIG_CPU_CLOCK
;
1126 #elif defined(CONFIG_SUPERH64)
1127 sci_ports
[i
].port
.uartclk
= current_cpu_data
.module_clock
* 16;
1130 * XXX: We should use a proper SCI/SCIF clock
1133 struct clk
*clk
= clk_get("module_clk");
1134 sci_ports
[i
].port
.uartclk
= clk_get_rate(clk
) * 16;
1139 sci_ports
[i
].break_timer
.data
= (unsigned long)&sci_ports
[i
];
1140 sci_ports
[i
].break_timer
.function
= sci_break_timer
;
1142 init_timer(&sci_ports
[i
].break_timer
);
1146 int __init
early_sci_setup(struct uart_port
*port
)
1148 if (unlikely(port
->line
> SCI_NPORTS
))
1153 sci_ports
[port
->line
].port
.membase
= port
->membase
;
1154 sci_ports
[port
->line
].port
.mapbase
= port
->mapbase
;
1155 sci_ports
[port
->line
].port
.type
= port
->type
;
1160 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1162 * Print a string to the serial port trying not to disturb
1163 * any possible real use of the port...
1165 static void serial_console_write(struct console
*co
, const char *s
,
1168 put_string(serial_console_port
, s
, count
);
1171 static int __init
serial_console_setup(struct console
*co
, char *options
)
1173 struct uart_port
*port
;
1181 * Check whether an invalid uart number has been specified, and
1182 * if so, search for the first available port that does have
1185 if (co
->index
>= SCI_NPORTS
)
1188 serial_console_port
= &sci_ports
[co
->index
];
1189 port
= &serial_console_port
->port
;
1192 * Also need to check port->type, we don't actually have any
1193 * UPIO_PORT ports, but uart_report_port() handily misreports
1194 * it anyways if we don't have a port available by the time this is
1199 if (!port
->membase
|| !port
->mapbase
)
1202 spin_lock_init(&port
->lock
);
1204 port
->type
= serial_console_port
->type
;
1206 if (port
->flags
& UPF_IOREMAP
)
1207 sci_config_port(port
, 0);
1209 if (serial_console_port
->enable
)
1210 serial_console_port
->enable(port
);
1213 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1215 ret
= uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1216 #if defined(__H8300H__) || defined(__H8300S__)
1217 /* disable rx interrupt */
1224 static struct console serial_console
= {
1226 .device
= uart_console_device
,
1227 .write
= serial_console_write
,
1228 .setup
= serial_console_setup
,
1229 .flags
= CON_PRINTBUFFER
,
1231 .data
= &sci_uart_driver
,
1234 static int __init
sci_console_init(void)
1237 register_console(&serial_console
);
1240 console_initcall(sci_console_init
);
1241 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1243 #ifdef CONFIG_SH_KGDB
1245 * FIXME: Most of this can go away.. at the moment, we rely on
1246 * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1247 * most of that can easily be done here instead.
1249 * For the time being, just accept the values that were parsed earlier..
1251 static void __init
kgdb_console_get_options(struct uart_port
*port
, int *baud
,
1252 int *parity
, int *bits
)
1255 *parity
= tolower(kgdb_parity
);
1256 *bits
= kgdb_bits
- '0';
1260 * The naming here is somewhat misleading, since kgdb_console_setup() takes
1261 * care of the early-on initialization for kgdb, regardless of whether we
1262 * actually use kgdb as a console or not.
1264 * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1266 int __init
kgdb_console_setup(struct console
*co
, char *options
)
1268 struct uart_port
*port
= &sci_ports
[kgdb_portnum
].port
;
1274 spin_lock_init(&port
->lock
);
1276 if (co
->index
!= kgdb_portnum
)
1277 co
->index
= kgdb_portnum
;
1280 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1282 kgdb_console_get_options(port
, &baud
, &parity
, &bits
);
1284 kgdb_getchar
= kgdb_sci_getchar
;
1285 kgdb_putchar
= kgdb_sci_putchar
;
1287 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1289 #endif /* CONFIG_SH_KGDB */
1291 #ifdef CONFIG_SH_KGDB_CONSOLE
1292 static struct console kgdb_console
= {
1294 .write
= kgdb_console_write
,
1295 .setup
= kgdb_console_setup
,
1296 .flags
= CON_PRINTBUFFER
| CON_ENABLED
,
1298 .data
= &sci_uart_driver
,
1301 /* Register the KGDB console so we get messages (d'oh!) */
1302 static int __init
kgdb_console_init(void)
1305 register_console(&kgdb_console
);
1308 console_initcall(kgdb_console_init
);
1309 #endif /* CONFIG_SH_KGDB_CONSOLE */
1311 #if defined(CONFIG_SH_KGDB_CONSOLE)
1312 #define SCI_CONSOLE &kgdb_console
1313 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1314 #define SCI_CONSOLE &serial_console
1316 #define SCI_CONSOLE 0
1319 static char banner
[] __initdata
=
1320 KERN_INFO
"SuperH SCI(F) driver initialized\n";
1322 static struct uart_driver sci_uart_driver
= {
1323 .owner
= THIS_MODULE
,
1324 .driver_name
= "sci",
1325 .dev_name
= "ttySC",
1327 .minor
= SCI_MINOR_START
,
1329 .cons
= SCI_CONSOLE
,
1333 * Register a set of serial devices attached to a platform device. The
1334 * list is terminated with a zero flags entry, which means we expect
1335 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1336 * remapping (such as sh64) should also set UPF_IOREMAP.
1338 static int __devinit
sci_probe(struct platform_device
*dev
)
1340 struct plat_sci_port
*p
= dev
->dev
.platform_data
;
1343 for (i
= 0; p
&& p
->flags
!= 0 && i
< SCI_NPORTS
; p
++, i
++) {
1344 struct sci_port
*sciport
= &sci_ports
[i
];
1346 sciport
->port
.mapbase
= p
->mapbase
;
1349 * For the simple (and majority of) cases where we don't need
1350 * to do any remapping, just cast the cookie directly.
1352 if (p
->mapbase
&& !p
->membase
&& !(p
->flags
& UPF_IOREMAP
))
1353 p
->membase
= (void __iomem
*)p
->mapbase
;
1355 sciport
->port
.membase
= p
->membase
;
1357 sciport
->port
.irq
= p
->irqs
[SCIx_TXI_IRQ
];
1358 sciport
->port
.flags
= p
->flags
;
1359 sciport
->port
.dev
= &dev
->dev
;
1361 sciport
->type
= sciport
->port
.type
= p
->type
;
1363 memcpy(&sciport
->irqs
, &p
->irqs
, sizeof(p
->irqs
));
1365 uart_add_one_port(&sci_uart_driver
, &sciport
->port
);
1368 #ifdef CONFIG_CPU_FREQ
1369 cpufreq_register_notifier(&sci_nb
, CPUFREQ_TRANSITION_NOTIFIER
);
1370 dev_info(&dev
->dev
, "sci: CPU frequency notifier registered\n");
1373 #ifdef CONFIG_SH_STANDARD_BIOS
1374 sh_bios_gdb_detach();
1380 static int __devexit
sci_remove(struct platform_device
*dev
)
1384 for (i
= 0; i
< SCI_NPORTS
; i
++)
1385 uart_remove_one_port(&sci_uart_driver
, &sci_ports
[i
].port
);
1390 static int sci_suspend(struct platform_device
*dev
, pm_message_t state
)
1394 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1395 struct sci_port
*p
= &sci_ports
[i
];
1397 if (p
->type
!= PORT_UNKNOWN
&& p
->port
.dev
== &dev
->dev
)
1398 uart_suspend_port(&sci_uart_driver
, &p
->port
);
1404 static int sci_resume(struct platform_device
*dev
)
1408 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1409 struct sci_port
*p
= &sci_ports
[i
];
1411 if (p
->type
!= PORT_UNKNOWN
&& p
->port
.dev
== &dev
->dev
)
1412 uart_resume_port(&sci_uart_driver
, &p
->port
);
1418 static struct platform_driver sci_driver
= {
1420 .remove
= __devexit_p(sci_remove
),
1421 .suspend
= sci_suspend
,
1422 .resume
= sci_resume
,
1425 .owner
= THIS_MODULE
,
1429 static int __init
sci_init(void)
1437 ret
= uart_register_driver(&sci_uart_driver
);
1438 if (likely(ret
== 0)) {
1439 ret
= platform_driver_register(&sci_driver
);
1441 uart_unregister_driver(&sci_uart_driver
);
1447 static void __exit
sci_exit(void)
1449 platform_driver_unregister(&sci_driver
);
1450 uart_unregister_driver(&sci_uart_driver
);
1453 module_init(sci_init
);
1454 module_exit(sci_exit
);
1456 MODULE_LICENSE("GPL");