3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
10 #include <linux/irq.h>
11 #include <linux/interrupt.h>
12 #include <linux/init.h>
13 #include <linux/config.h>
14 #include <linux/ioport.h>
15 #include <linux/smp_lock.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
19 #include <asm/errno.h>
26 #define MSI_TARGET_CPU first_cpu(cpu_online_map)
28 static DEFINE_SPINLOCK(msi_lock
);
29 static struct msi_desc
* msi_desc
[NR_IRQS
] = { [0 ... NR_IRQS
-1] = NULL
};
30 static kmem_cache_t
* msi_cachep
;
32 static int pci_msi_enable
= 1;
33 static int last_alloc_vector
;
34 static int nr_released_vectors
;
35 static int nr_reserved_vectors
= NR_HP_RESERVED_VECTORS
;
36 static int nr_msix_devices
;
38 #ifndef CONFIG_X86_IO_APIC
39 int vector_irq
[NR_VECTORS
] = { [0 ... NR_VECTORS
- 1] = -1};
40 u8 irq_vector
[NR_IRQ_VECTORS
] = { FIRST_DEVICE_VECTOR
, 0 };
43 static void msi_cache_ctor(void *p
, kmem_cache_t
*cache
, unsigned long flags
)
45 memset(p
, 0, NR_IRQS
* sizeof(struct msi_desc
));
48 static int msi_cache_init(void)
50 msi_cachep
= kmem_cache_create("msi_cache",
51 NR_IRQS
* sizeof(struct msi_desc
),
52 0, SLAB_HWCACHE_ALIGN
, msi_cache_ctor
, NULL
);
59 static void msi_set_mask_bit(unsigned int vector
, int flag
)
61 struct msi_desc
*entry
;
63 entry
= (struct msi_desc
*)msi_desc
[vector
];
64 if (!entry
|| !entry
->dev
|| !entry
->mask_base
)
66 switch (entry
->msi_attrib
.type
) {
72 pos
= (long)entry
->mask_base
;
73 pci_read_config_dword(entry
->dev
, pos
, &mask_bits
);
76 pci_write_config_dword(entry
->dev
, pos
, mask_bits
);
81 int offset
= entry
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
+
82 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET
;
83 writel(flag
, entry
->mask_base
+ offset
);
92 static void set_msi_affinity(unsigned int vector
, cpumask_t cpu_mask
)
94 struct msi_desc
*entry
;
95 struct msg_address address
;
96 unsigned int irq
= vector
;
97 unsigned int dest_cpu
= first_cpu(cpu_mask
);
99 entry
= (struct msi_desc
*)msi_desc
[vector
];
100 if (!entry
|| !entry
->dev
)
103 switch (entry
->msi_attrib
.type
) {
108 if (!(pos
= pci_find_capability(entry
->dev
, PCI_CAP_ID_MSI
)))
111 pci_read_config_dword(entry
->dev
, msi_lower_address_reg(pos
),
112 &address
.lo_address
.value
);
113 address
.lo_address
.value
&= MSI_ADDRESS_DEST_ID_MASK
;
114 address
.lo_address
.value
|= (cpu_physical_id(dest_cpu
) <<
115 MSI_TARGET_CPU_SHIFT
);
116 entry
->msi_attrib
.current_cpu
= cpu_physical_id(dest_cpu
);
117 pci_write_config_dword(entry
->dev
, msi_lower_address_reg(pos
),
118 address
.lo_address
.value
);
119 set_native_irq_info(irq
, cpu_mask
);
122 case PCI_CAP_ID_MSIX
:
124 int offset
= entry
->msi_attrib
.entry_nr
* PCI_MSIX_ENTRY_SIZE
+
125 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
;
127 address
.lo_address
.value
= readl(entry
->mask_base
+ offset
);
128 address
.lo_address
.value
&= MSI_ADDRESS_DEST_ID_MASK
;
129 address
.lo_address
.value
|= (cpu_physical_id(dest_cpu
) <<
130 MSI_TARGET_CPU_SHIFT
);
131 entry
->msi_attrib
.current_cpu
= cpu_physical_id(dest_cpu
);
132 writel(address
.lo_address
.value
, entry
->mask_base
+ offset
);
133 set_native_irq_info(irq
, cpu_mask
);
141 #define set_msi_affinity NULL
142 #endif /* CONFIG_SMP */
144 static void mask_MSI_irq(unsigned int vector
)
146 msi_set_mask_bit(vector
, 1);
149 static void unmask_MSI_irq(unsigned int vector
)
151 msi_set_mask_bit(vector
, 0);
154 static unsigned int startup_msi_irq_wo_maskbit(unsigned int vector
)
156 struct msi_desc
*entry
;
159 spin_lock_irqsave(&msi_lock
, flags
);
160 entry
= msi_desc
[vector
];
161 if (!entry
|| !entry
->dev
) {
162 spin_unlock_irqrestore(&msi_lock
, flags
);
165 entry
->msi_attrib
.state
= 1; /* Mark it active */
166 spin_unlock_irqrestore(&msi_lock
, flags
);
168 return 0; /* never anything pending */
171 static unsigned int startup_msi_irq_w_maskbit(unsigned int vector
)
173 startup_msi_irq_wo_maskbit(vector
);
174 unmask_MSI_irq(vector
);
175 return 0; /* never anything pending */
178 static void shutdown_msi_irq(unsigned int vector
)
180 struct msi_desc
*entry
;
183 spin_lock_irqsave(&msi_lock
, flags
);
184 entry
= msi_desc
[vector
];
185 if (entry
&& entry
->dev
)
186 entry
->msi_attrib
.state
= 0; /* Mark it not active */
187 spin_unlock_irqrestore(&msi_lock
, flags
);
190 static void end_msi_irq_wo_maskbit(unsigned int vector
)
192 move_native_irq(vector
);
196 static void end_msi_irq_w_maskbit(unsigned int vector
)
198 move_native_irq(vector
);
199 unmask_MSI_irq(vector
);
203 static void do_nothing(unsigned int vector
)
208 * Interrupt Type for MSI-X PCI/PCI-X/PCI-Express Devices,
209 * which implement the MSI-X Capability Structure.
211 static struct hw_interrupt_type msix_irq_type
= {
212 .typename
= "PCI-MSI-X",
213 .startup
= startup_msi_irq_w_maskbit
,
214 .shutdown
= shutdown_msi_irq
,
215 .enable
= unmask_MSI_irq
,
216 .disable
= mask_MSI_irq
,
218 .end
= end_msi_irq_w_maskbit
,
219 .set_affinity
= set_msi_affinity
223 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
224 * which implement the MSI Capability Structure with
225 * Mask-and-Pending Bits.
227 static struct hw_interrupt_type msi_irq_w_maskbit_type
= {
228 .typename
= "PCI-MSI",
229 .startup
= startup_msi_irq_w_maskbit
,
230 .shutdown
= shutdown_msi_irq
,
231 .enable
= unmask_MSI_irq
,
232 .disable
= mask_MSI_irq
,
234 .end
= end_msi_irq_w_maskbit
,
235 .set_affinity
= set_msi_affinity
239 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
240 * which implement the MSI Capability Structure without
241 * Mask-and-Pending Bits.
243 static struct hw_interrupt_type msi_irq_wo_maskbit_type
= {
244 .typename
= "PCI-MSI",
245 .startup
= startup_msi_irq_wo_maskbit
,
246 .shutdown
= shutdown_msi_irq
,
247 .enable
= do_nothing
,
248 .disable
= do_nothing
,
250 .end
= end_msi_irq_wo_maskbit
,
251 .set_affinity
= set_msi_affinity
254 static void msi_data_init(struct msg_data
*msi_data
,
257 memset(msi_data
, 0, sizeof(struct msg_data
));
258 msi_data
->vector
= (u8
)vector
;
259 msi_data
->delivery_mode
= MSI_DELIVERY_MODE
;
260 msi_data
->level
= MSI_LEVEL_MODE
;
261 msi_data
->trigger
= MSI_TRIGGER_MODE
;
264 static void msi_address_init(struct msg_address
*msi_address
)
266 unsigned int dest_id
;
267 unsigned long dest_phys_id
= cpu_physical_id(MSI_TARGET_CPU
);
269 memset(msi_address
, 0, sizeof(struct msg_address
));
270 msi_address
->hi_address
= (u32
)0;
271 dest_id
= (MSI_ADDRESS_HEADER
<< MSI_ADDRESS_HEADER_SHIFT
);
272 msi_address
->lo_address
.u
.dest_mode
= MSI_PHYSICAL_MODE
;
273 msi_address
->lo_address
.u
.redirection_hint
= MSI_REDIRECTION_HINT_MODE
;
274 msi_address
->lo_address
.u
.dest_id
= dest_id
;
275 msi_address
->lo_address
.value
|= (dest_phys_id
<< MSI_TARGET_CPU_SHIFT
);
278 static int msi_free_vector(struct pci_dev
* dev
, int vector
, int reassign
);
279 static int assign_msi_vector(void)
281 static int new_vector_avail
= 1;
286 * msi_lock is provided to ensure that successful allocation of MSI
287 * vector is assigned unique among drivers.
289 spin_lock_irqsave(&msi_lock
, flags
);
291 if (!new_vector_avail
) {
295 * vector_irq[] = -1 indicates that this specific vector is:
296 * - assigned for MSI (since MSI have no associated IRQ) or
297 * - assigned for legacy if less than 16, or
298 * - having no corresponding 1:1 vector-to-IOxAPIC IRQ mapping
299 * vector_irq[] = 0 indicates that this vector, previously
300 * assigned for MSI, is freed by hotplug removed operations.
301 * This vector will be reused for any subsequent hotplug added
303 * vector_irq[] > 0 indicates that this vector is assigned for
304 * IOxAPIC IRQs. This vector and its value provides a 1-to-1
305 * vector-to-IOxAPIC IRQ mapping.
307 for (vector
= FIRST_DEVICE_VECTOR
; vector
< NR_IRQS
; vector
++) {
308 if (vector_irq
[vector
] != 0)
310 free_vector
= vector
;
311 if (!msi_desc
[vector
])
317 spin_unlock_irqrestore(&msi_lock
, flags
);
320 vector_irq
[free_vector
] = -1;
321 nr_released_vectors
--;
322 spin_unlock_irqrestore(&msi_lock
, flags
);
323 if (msi_desc
[free_vector
] != NULL
) {
327 /* free all linked vectors before re-assign */
329 spin_lock_irqsave(&msi_lock
, flags
);
330 dev
= msi_desc
[free_vector
]->dev
;
331 tail
= msi_desc
[free_vector
]->link
.tail
;
332 spin_unlock_irqrestore(&msi_lock
, flags
);
333 msi_free_vector(dev
, tail
, 1);
334 } while (free_vector
!= tail
);
339 vector
= assign_irq_vector(AUTO_ASSIGN
);
340 last_alloc_vector
= vector
;
341 if (vector
== LAST_DEVICE_VECTOR
)
342 new_vector_avail
= 0;
344 spin_unlock_irqrestore(&msi_lock
, flags
);
348 static int get_new_vector(void)
352 if ((vector
= assign_msi_vector()) > 0)
353 set_intr_gate(vector
, interrupt
[vector
]);
358 static int msi_init(void)
360 static int status
= -ENOMEM
;
367 printk(KERN_WARNING
"PCI: MSI quirk detected. MSI disabled.\n");
372 if ((status
= msi_cache_init()) < 0) {
374 printk(KERN_WARNING
"PCI: MSI cache init failed\n");
377 last_alloc_vector
= assign_irq_vector(AUTO_ASSIGN
);
378 if (last_alloc_vector
< 0) {
380 printk(KERN_WARNING
"PCI: No interrupt vectors available for MSI\n");
384 vector_irq
[last_alloc_vector
] = 0;
385 nr_released_vectors
++;
390 static int get_msi_vector(struct pci_dev
*dev
)
392 return get_new_vector();
395 static struct msi_desc
* alloc_msi_entry(void)
397 struct msi_desc
*entry
;
399 entry
= kmem_cache_alloc(msi_cachep
, SLAB_KERNEL
);
403 memset(entry
, 0, sizeof(struct msi_desc
));
404 entry
->link
.tail
= entry
->link
.head
= 0; /* single message */
410 static void attach_msi_entry(struct msi_desc
*entry
, int vector
)
414 spin_lock_irqsave(&msi_lock
, flags
);
415 msi_desc
[vector
] = entry
;
416 spin_unlock_irqrestore(&msi_lock
, flags
);
419 static void irq_handler_init(int cap_id
, int pos
, int mask
)
423 spin_lock_irqsave(&irq_desc
[pos
].lock
, flags
);
424 if (cap_id
== PCI_CAP_ID_MSIX
)
425 irq_desc
[pos
].handler
= &msix_irq_type
;
428 irq_desc
[pos
].handler
= &msi_irq_wo_maskbit_type
;
430 irq_desc
[pos
].handler
= &msi_irq_w_maskbit_type
;
432 spin_unlock_irqrestore(&irq_desc
[pos
].lock
, flags
);
435 static void enable_msi_mode(struct pci_dev
*dev
, int pos
, int type
)
439 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
440 if (type
== PCI_CAP_ID_MSI
) {
441 /* Set enabled bits to single MSI & enable MSI_enable bit */
442 msi_enable(control
, 1);
443 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
445 msix_enable(control
);
446 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
448 if (pci_find_capability(dev
, PCI_CAP_ID_EXP
)) {
449 /* PCI Express Endpoint device detected */
450 pci_intx(dev
, 0); /* disable intx */
454 void disable_msi_mode(struct pci_dev
*dev
, int pos
, int type
)
458 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
459 if (type
== PCI_CAP_ID_MSI
) {
460 /* Set enabled bits to single MSI & enable MSI_enable bit */
461 msi_disable(control
);
462 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
464 msix_disable(control
);
465 pci_write_config_word(dev
, msi_control_reg(pos
), control
);
467 if (pci_find_capability(dev
, PCI_CAP_ID_EXP
)) {
468 /* PCI Express Endpoint device detected */
469 pci_intx(dev
, 1); /* enable intx */
473 static int msi_lookup_vector(struct pci_dev
*dev
, int type
)
478 spin_lock_irqsave(&msi_lock
, flags
);
479 for (vector
= FIRST_DEVICE_VECTOR
; vector
< NR_IRQS
; vector
++) {
480 if (!msi_desc
[vector
] || msi_desc
[vector
]->dev
!= dev
||
481 msi_desc
[vector
]->msi_attrib
.type
!= type
||
482 msi_desc
[vector
]->msi_attrib
.default_vector
!= dev
->irq
)
484 spin_unlock_irqrestore(&msi_lock
, flags
);
485 /* This pre-assigned MSI vector for this device
486 already exits. Override dev->irq with this vector */
490 spin_unlock_irqrestore(&msi_lock
, flags
);
495 void pci_scan_msi_device(struct pci_dev
*dev
)
500 if (pci_find_capability(dev
, PCI_CAP_ID_MSIX
) > 0)
502 else if (pci_find_capability(dev
, PCI_CAP_ID_MSI
) > 0)
503 nr_reserved_vectors
++;
507 * msi_capability_init - configure device's MSI capability structure
508 * @dev: pointer to the pci_dev data structure of MSI device function
510 * Setup the MSI capability structure of device function with a single
511 * MSI vector, regardless of device function is capable of handling
512 * multiple messages. A return of zero indicates the successful setup
513 * of an entry zero with the new MSI vector or non-zero for otherwise.
515 static int msi_capability_init(struct pci_dev
*dev
)
517 struct msi_desc
*entry
;
518 struct msg_address address
;
519 struct msg_data data
;
523 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
);
524 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
525 /* MSI Entry Initialization */
526 if (!(entry
= alloc_msi_entry()))
529 if ((vector
= get_msi_vector(dev
)) < 0) {
530 kmem_cache_free(msi_cachep
, entry
);
533 entry
->link
.head
= vector
;
534 entry
->link
.tail
= vector
;
535 entry
->msi_attrib
.type
= PCI_CAP_ID_MSI
;
536 entry
->msi_attrib
.state
= 0; /* Mark it not active */
537 entry
->msi_attrib
.entry_nr
= 0;
538 entry
->msi_attrib
.maskbit
= is_mask_bit_support(control
);
539 entry
->msi_attrib
.default_vector
= dev
->irq
; /* Save IOAPIC IRQ */
542 if (is_mask_bit_support(control
)) {
543 entry
->mask_base
= (void __iomem
*)(long)msi_mask_bits_reg(pos
,
544 is_64bit_address(control
));
546 /* Replace with MSI handler */
547 irq_handler_init(PCI_CAP_ID_MSI
, vector
, entry
->msi_attrib
.maskbit
);
548 /* Configure MSI capability structure */
549 msi_address_init(&address
);
550 msi_data_init(&data
, vector
);
551 entry
->msi_attrib
.current_cpu
= ((address
.lo_address
.u
.dest_id
>>
552 MSI_TARGET_CPU_SHIFT
) & MSI_TARGET_CPU_MASK
);
553 pci_write_config_dword(dev
, msi_lower_address_reg(pos
),
554 address
.lo_address
.value
);
555 if (is_64bit_address(control
)) {
556 pci_write_config_dword(dev
,
557 msi_upper_address_reg(pos
), address
.hi_address
);
558 pci_write_config_word(dev
,
559 msi_data_reg(pos
, 1), *((u32
*)&data
));
561 pci_write_config_word(dev
,
562 msi_data_reg(pos
, 0), *((u32
*)&data
));
563 if (entry
->msi_attrib
.maskbit
) {
564 unsigned int maskbits
, temp
;
565 /* All MSIs are unmasked by default, Mask them all */
566 pci_read_config_dword(dev
,
567 msi_mask_bits_reg(pos
, is_64bit_address(control
)),
569 temp
= (1 << multi_msi_capable(control
));
570 temp
= ((temp
- 1) & ~temp
);
572 pci_write_config_dword(dev
,
573 msi_mask_bits_reg(pos
, is_64bit_address(control
)),
576 attach_msi_entry(entry
, vector
);
577 /* Set MSI enabled bits */
578 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSI
);
584 * msix_capability_init - configure device's MSI-X capability
585 * @dev: pointer to the pci_dev data structure of MSI-X device function
586 * @entries: pointer to an array of struct msix_entry entries
587 * @nvec: number of @entries
589 * Setup the MSI-X capability structure of device function with a
590 * single MSI-X vector. A return of zero indicates the successful setup of
591 * requested MSI-X entries with allocated vectors or non-zero for otherwise.
593 static int msix_capability_init(struct pci_dev
*dev
,
594 struct msix_entry
*entries
, int nvec
)
596 struct msi_desc
*head
= NULL
, *tail
= NULL
, *entry
= NULL
;
597 struct msg_address address
;
598 struct msg_data data
;
599 int vector
, pos
, i
, j
, nr_entries
, temp
= 0;
600 u32 phys_addr
, table_offset
;
605 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
606 /* Request & Map MSI-X table region */
607 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
608 nr_entries
= multi_msix_capable(control
);
609 pci_read_config_dword(dev
, msix_table_offset_reg(pos
),
611 bir
= (u8
)(table_offset
& PCI_MSIX_FLAGS_BIRMASK
);
612 phys_addr
= pci_resource_start (dev
, bir
);
613 phys_addr
+= (u32
)(table_offset
& ~PCI_MSIX_FLAGS_BIRMASK
);
614 base
= ioremap_nocache(phys_addr
, nr_entries
* PCI_MSIX_ENTRY_SIZE
);
618 /* MSI-X Table Initialization */
619 for (i
= 0; i
< nvec
; i
++) {
620 entry
= alloc_msi_entry();
623 if ((vector
= get_msi_vector(dev
)) < 0)
626 j
= entries
[i
].entry
;
627 entries
[i
].vector
= vector
;
628 entry
->msi_attrib
.type
= PCI_CAP_ID_MSIX
;
629 entry
->msi_attrib
.state
= 0; /* Mark it not active */
630 entry
->msi_attrib
.entry_nr
= j
;
631 entry
->msi_attrib
.maskbit
= 1;
632 entry
->msi_attrib
.default_vector
= dev
->irq
;
634 entry
->mask_base
= base
;
636 entry
->link
.head
= vector
;
637 entry
->link
.tail
= vector
;
640 entry
->link
.head
= temp
;
641 entry
->link
.tail
= tail
->link
.tail
;
642 tail
->link
.tail
= vector
;
643 head
->link
.head
= vector
;
647 /* Replace with MSI-X handler */
648 irq_handler_init(PCI_CAP_ID_MSIX
, vector
, 1);
649 /* Configure MSI-X capability structure */
650 msi_address_init(&address
);
651 msi_data_init(&data
, vector
);
652 entry
->msi_attrib
.current_cpu
=
653 ((address
.lo_address
.u
.dest_id
>>
654 MSI_TARGET_CPU_SHIFT
) & MSI_TARGET_CPU_MASK
);
655 writel(address
.lo_address
.value
,
656 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
657 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
);
658 writel(address
.hi_address
,
659 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
660 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
);
662 base
+ j
* PCI_MSIX_ENTRY_SIZE
+
663 PCI_MSIX_ENTRY_DATA_OFFSET
);
664 attach_msi_entry(entry
, vector
);
668 for (; i
>= 0; i
--) {
669 vector
= (entries
+ i
)->vector
;
670 msi_free_vector(dev
, vector
, 0);
671 (entries
+ i
)->vector
= 0;
675 /* Set MSI-X enabled bits */
676 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSIX
);
682 * pci_enable_msi - configure device's MSI capability structure
683 * @dev: pointer to the pci_dev data structure of MSI device function
685 * Setup the MSI capability structure of device function with
686 * a single MSI vector upon its software driver call to request for
687 * MSI mode enabled on its hardware device function. A return of zero
688 * indicates the successful setup of an entry zero with the new MSI
689 * vector or non-zero for otherwise.
691 int pci_enable_msi(struct pci_dev
* dev
)
693 int pos
, temp
, status
= -EINVAL
;
696 if (!pci_msi_enable
|| !dev
)
704 if ((status
= msi_init()) < 0)
707 if (!(pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
)))
710 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
711 if (control
& PCI_MSI_FLAGS_ENABLE
)
712 return 0; /* Already in MSI mode */
714 if (!msi_lookup_vector(dev
, PCI_CAP_ID_MSI
)) {
718 spin_lock_irqsave(&msi_lock
, flags
);
719 if (!vector_irq
[dev
->irq
]) {
720 msi_desc
[dev
->irq
]->msi_attrib
.state
= 0;
721 vector_irq
[dev
->irq
] = -1;
722 nr_released_vectors
--;
723 spin_unlock_irqrestore(&msi_lock
, flags
);
724 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSI
);
727 spin_unlock_irqrestore(&msi_lock
, flags
);
730 /* Check whether driver already requested for MSI-X vectors */
731 if ((pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
)) > 0 &&
732 !msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
733 printk(KERN_INFO
"PCI: %s: Can't enable MSI. "
734 "Device already has MSI-X vectors assigned\n",
739 status
= msi_capability_init(dev
);
742 nr_reserved_vectors
--; /* Only MSI capable */
743 else if (nr_msix_devices
> 0)
744 nr_msix_devices
--; /* Both MSI and MSI-X capable,
745 but choose enabling MSI */
751 void pci_disable_msi(struct pci_dev
* dev
)
753 struct msi_desc
*entry
;
754 int pos
, default_vector
;
758 if (!dev
|| !(pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
)))
761 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
762 if (!(control
& PCI_MSI_FLAGS_ENABLE
))
765 spin_lock_irqsave(&msi_lock
, flags
);
766 entry
= msi_desc
[dev
->irq
];
767 if (!entry
|| !entry
->dev
|| entry
->msi_attrib
.type
!= PCI_CAP_ID_MSI
) {
768 spin_unlock_irqrestore(&msi_lock
, flags
);
771 if (entry
->msi_attrib
.state
) {
772 spin_unlock_irqrestore(&msi_lock
, flags
);
773 printk(KERN_WARNING
"PCI: %s: pci_disable_msi() called without "
774 "free_irq() on MSI vector %d\n",
775 pci_name(dev
), dev
->irq
);
776 BUG_ON(entry
->msi_attrib
.state
> 0);
778 vector_irq
[dev
->irq
] = 0; /* free it */
779 nr_released_vectors
++;
780 default_vector
= entry
->msi_attrib
.default_vector
;
781 spin_unlock_irqrestore(&msi_lock
, flags
);
782 /* Restore dev->irq to its default pin-assertion vector */
783 dev
->irq
= default_vector
;
784 disable_msi_mode(dev
, pci_find_capability(dev
, PCI_CAP_ID_MSI
),
789 static int msi_free_vector(struct pci_dev
* dev
, int vector
, int reassign
)
791 struct msi_desc
*entry
;
792 int head
, entry_nr
, type
;
796 spin_lock_irqsave(&msi_lock
, flags
);
797 entry
= msi_desc
[vector
];
798 if (!entry
|| entry
->dev
!= dev
) {
799 spin_unlock_irqrestore(&msi_lock
, flags
);
802 type
= entry
->msi_attrib
.type
;
803 entry_nr
= entry
->msi_attrib
.entry_nr
;
804 head
= entry
->link
.head
;
805 base
= entry
->mask_base
;
806 msi_desc
[entry
->link
.head
]->link
.tail
= entry
->link
.tail
;
807 msi_desc
[entry
->link
.tail
]->link
.head
= entry
->link
.head
;
810 vector_irq
[vector
] = 0;
811 nr_released_vectors
++;
813 msi_desc
[vector
] = NULL
;
814 spin_unlock_irqrestore(&msi_lock
, flags
);
816 kmem_cache_free(msi_cachep
, entry
);
818 if (type
== PCI_CAP_ID_MSIX
) {
821 entry_nr
* PCI_MSIX_ENTRY_SIZE
+
822 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET
);
824 if (head
== vector
) {
826 * Detect last MSI-X vector to be released.
827 * Release the MSI-X memory-mapped table.
830 u32 phys_addr
, table_offset
;
834 pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
);
835 pci_read_config_word(dev
, msi_control_reg(pos
),
837 nr_entries
= multi_msix_capable(control
);
838 pci_read_config_dword(dev
, msix_table_offset_reg(pos
),
840 bir
= (u8
)(table_offset
& PCI_MSIX_FLAGS_BIRMASK
);
841 phys_addr
= pci_resource_start (dev
, bir
);
842 phys_addr
+= (u32
)(table_offset
&
843 ~PCI_MSIX_FLAGS_BIRMASK
);
851 static int reroute_msix_table(int head
, struct msix_entry
*entries
, int *nvec
)
853 int vector
= head
, tail
= 0;
854 int i
, j
= 0, nr_entries
= 0;
858 spin_lock_irqsave(&msi_lock
, flags
);
859 while (head
!= tail
) {
861 tail
= msi_desc
[vector
]->link
.tail
;
862 if (entries
[0].entry
== msi_desc
[vector
]->msi_attrib
.entry_nr
)
866 if (*nvec
> nr_entries
) {
867 spin_unlock_irqrestore(&msi_lock
, flags
);
871 vector
= ((j
> 0) ? j
: head
);
872 for (i
= 0; i
< *nvec
; i
++) {
873 j
= msi_desc
[vector
]->msi_attrib
.entry_nr
;
874 msi_desc
[vector
]->msi_attrib
.state
= 0; /* Mark it not active */
875 vector_irq
[vector
] = -1; /* Mark it busy */
876 nr_released_vectors
--;
877 entries
[i
].vector
= vector
;
878 if (j
!= (entries
+ i
)->entry
) {
879 base
= msi_desc
[vector
]->mask_base
;
880 msi_desc
[vector
]->msi_attrib
.entry_nr
=
881 (entries
+ i
)->entry
;
882 writel( readl(base
+ j
* PCI_MSIX_ENTRY_SIZE
+
883 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
), base
+
884 (entries
+ i
)->entry
* PCI_MSIX_ENTRY_SIZE
+
885 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET
);
886 writel( readl(base
+ j
* PCI_MSIX_ENTRY_SIZE
+
887 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
), base
+
888 (entries
+ i
)->entry
* PCI_MSIX_ENTRY_SIZE
+
889 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET
);
890 writel( (readl(base
+ j
* PCI_MSIX_ENTRY_SIZE
+
891 PCI_MSIX_ENTRY_DATA_OFFSET
) & 0xff00) | vector
,
892 base
+ (entries
+i
)->entry
*PCI_MSIX_ENTRY_SIZE
+
893 PCI_MSIX_ENTRY_DATA_OFFSET
);
895 vector
= msi_desc
[vector
]->link
.tail
;
897 spin_unlock_irqrestore(&msi_lock
, flags
);
903 * pci_enable_msix - configure device's MSI-X capability structure
904 * @dev: pointer to the pci_dev data structure of MSI-X device function
905 * @entries: pointer to an array of MSI-X entries
906 * @nvec: number of MSI-X vectors requested for allocation by device driver
908 * Setup the MSI-X capability structure of device function with the number
909 * of requested vectors upon its software driver call to request for
910 * MSI-X mode enabled on its hardware device function. A return of zero
911 * indicates the successful configuration of MSI-X capability structure
912 * with new allocated MSI-X vectors. A return of < 0 indicates a failure.
913 * Or a return of > 0 indicates that driver request is exceeding the number
914 * of vectors available. Driver should use the returned value to re-send
917 int pci_enable_msix(struct pci_dev
* dev
, struct msix_entry
*entries
, int nvec
)
919 int status
, pos
, nr_entries
, free_vectors
;
924 if (!pci_msi_enable
|| !dev
|| !entries
)
927 if ((status
= msi_init()) < 0)
930 if (!(pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
)))
933 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
934 if (control
& PCI_MSIX_FLAGS_ENABLE
)
935 return -EINVAL
; /* Already in MSI-X mode */
937 nr_entries
= multi_msix_capable(control
);
938 if (nvec
> nr_entries
)
941 /* Check for any invalid entries */
942 for (i
= 0; i
< nvec
; i
++) {
943 if (entries
[i
].entry
>= nr_entries
)
944 return -EINVAL
; /* invalid entry */
945 for (j
= i
+ 1; j
< nvec
; j
++) {
946 if (entries
[i
].entry
== entries
[j
].entry
)
947 return -EINVAL
; /* duplicate entry */
951 if (!msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
954 /* Reroute MSI-X table */
955 if (reroute_msix_table(dev
->irq
, entries
, &nr_entries
)) {
956 /* #requested > #previous-assigned */
961 enable_msi_mode(dev
, pos
, PCI_CAP_ID_MSIX
);
964 /* Check whether driver already requested for MSI vector */
965 if (pci_find_capability(dev
, PCI_CAP_ID_MSI
) > 0 &&
966 !msi_lookup_vector(dev
, PCI_CAP_ID_MSI
)) {
967 printk(KERN_INFO
"PCI: %s: Can't enable MSI-X. "
968 "Device already has an MSI vector assigned\n",
974 spin_lock_irqsave(&msi_lock
, flags
);
976 * msi_lock is provided to ensure that enough vectors resources are
977 * available before granting.
979 free_vectors
= pci_vector_resources(last_alloc_vector
,
980 nr_released_vectors
);
981 /* Ensure that each MSI/MSI-X device has one vector reserved by
982 default to avoid any MSI-X driver to take all available
984 free_vectors
-= nr_reserved_vectors
;
985 /* Find the average of free vectors among MSI-X devices */
986 if (nr_msix_devices
> 0)
987 free_vectors
/= nr_msix_devices
;
988 spin_unlock_irqrestore(&msi_lock
, flags
);
990 if (nvec
> free_vectors
) {
991 if (free_vectors
> 0)
997 status
= msix_capability_init(dev
, entries
, nvec
);
998 if (!status
&& nr_msix_devices
> 0)
1004 void pci_disable_msix(struct pci_dev
* dev
)
1009 if (!dev
|| !(pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
)))
1012 pci_read_config_word(dev
, msi_control_reg(pos
), &control
);
1013 if (!(control
& PCI_MSIX_FLAGS_ENABLE
))
1017 if (!msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
1018 int state
, vector
, head
, tail
= 0, warning
= 0;
1019 unsigned long flags
;
1021 vector
= head
= dev
->irq
;
1022 spin_lock_irqsave(&msi_lock
, flags
);
1023 while (head
!= tail
) {
1024 state
= msi_desc
[vector
]->msi_attrib
.state
;
1028 vector_irq
[vector
] = 0; /* free it */
1029 nr_released_vectors
++;
1031 tail
= msi_desc
[vector
]->link
.tail
;
1034 spin_unlock_irqrestore(&msi_lock
, flags
);
1037 printk(KERN_WARNING
"PCI: %s: pci_disable_msix() called without "
1038 "free_irq() on all MSI-X vectors\n",
1040 BUG_ON(warning
> 0);
1043 disable_msi_mode(dev
,
1044 pci_find_capability(dev
, PCI_CAP_ID_MSIX
),
1052 * msi_remove_pci_irq_vectors - reclaim MSI(X) vectors to unused state
1053 * @dev: pointer to the pci_dev data structure of MSI(X) device function
1055 * Being called during hotplug remove, from which the device function
1056 * is hot-removed. All previous assigned MSI/MSI-X vectors, if
1057 * allocated for this device function, are reclaimed to unused state,
1058 * which may be used later on.
1060 void msi_remove_pci_irq_vectors(struct pci_dev
* dev
)
1062 int state
, pos
, temp
;
1063 unsigned long flags
;
1065 if (!pci_msi_enable
|| !dev
)
1068 temp
= dev
->irq
; /* Save IOAPIC IRQ */
1069 if ((pos
= pci_find_capability(dev
, PCI_CAP_ID_MSI
)) > 0 &&
1070 !msi_lookup_vector(dev
, PCI_CAP_ID_MSI
)) {
1071 spin_lock_irqsave(&msi_lock
, flags
);
1072 state
= msi_desc
[dev
->irq
]->msi_attrib
.state
;
1073 spin_unlock_irqrestore(&msi_lock
, flags
);
1075 printk(KERN_WARNING
"PCI: %s: msi_remove_pci_irq_vectors() "
1076 "called without free_irq() on MSI vector %d\n",
1077 pci_name(dev
), dev
->irq
);
1079 } else /* Release MSI vector assigned to this device */
1080 msi_free_vector(dev
, dev
->irq
, 0);
1081 dev
->irq
= temp
; /* Restore IOAPIC IRQ */
1083 if ((pos
= pci_find_capability(dev
, PCI_CAP_ID_MSIX
)) > 0 &&
1084 !msi_lookup_vector(dev
, PCI_CAP_ID_MSIX
)) {
1085 int vector
, head
, tail
= 0, warning
= 0;
1086 void __iomem
*base
= NULL
;
1088 vector
= head
= dev
->irq
;
1089 while (head
!= tail
) {
1090 spin_lock_irqsave(&msi_lock
, flags
);
1091 state
= msi_desc
[vector
]->msi_attrib
.state
;
1092 tail
= msi_desc
[vector
]->link
.tail
;
1093 base
= msi_desc
[vector
]->mask_base
;
1094 spin_unlock_irqrestore(&msi_lock
, flags
);
1097 else if (vector
!= head
) /* Release MSI-X vector */
1098 msi_free_vector(dev
, vector
, 0);
1101 msi_free_vector(dev
, vector
, 0);
1103 /* Force to release the MSI-X memory-mapped table */
1104 u32 phys_addr
, table_offset
;
1108 pci_read_config_word(dev
, msi_control_reg(pos
),
1110 pci_read_config_dword(dev
, msix_table_offset_reg(pos
),
1112 bir
= (u8
)(table_offset
& PCI_MSIX_FLAGS_BIRMASK
);
1113 phys_addr
= pci_resource_start (dev
, bir
);
1114 phys_addr
+= (u32
)(table_offset
&
1115 ~PCI_MSIX_FLAGS_BIRMASK
);
1117 printk(KERN_WARNING
"PCI: %s: msi_remove_pci_irq_vectors() "
1118 "called without free_irq() on all MSI-X vectors\n",
1120 BUG_ON(warning
> 0);
1122 dev
->irq
= temp
; /* Restore IOAPIC IRQ */
1126 EXPORT_SYMBOL(pci_enable_msi
);
1127 EXPORT_SYMBOL(pci_disable_msi
);
1128 EXPORT_SYMBOL(pci_enable_msix
);
1129 EXPORT_SYMBOL(pci_disable_msix
);