Merge branch 'x86/mm'
[linux-2.6/x86.git] / arch / x86 / xen / mmu.c
blob4e37a7c0c114da6cda6087b98c6a54aa286efe84
1 /*
2 * Xen mmu operations
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
41 #include <linux/sched.h>
42 #include <linux/highmem.h>
43 #include <linux/debugfs.h>
44 #include <linux/bug.h>
45 #include <linux/vmalloc.h>
46 #include <linux/module.h>
47 #include <linux/gfp.h>
48 #include <linux/memblock.h>
49 #include <linux/seq_file.h>
51 #include <asm/pgtable.h>
52 #include <asm/tlbflush.h>
53 #include <asm/fixmap.h>
54 #include <asm/mmu_context.h>
55 #include <asm/setup.h>
56 #include <asm/paravirt.h>
57 #include <asm/e820.h>
58 #include <asm/linkage.h>
59 #include <asm/page.h>
60 #include <asm/init.h>
61 #include <asm/pat.h>
62 #include <asm/smp.h>
64 #include <asm/xen/hypercall.h>
65 #include <asm/xen/hypervisor.h>
67 #include <xen/xen.h>
68 #include <xen/page.h>
69 #include <xen/interface/xen.h>
70 #include <xen/interface/hvm/hvm_op.h>
71 #include <xen/interface/version.h>
72 #include <xen/interface/memory.h>
73 #include <xen/hvc-console.h>
75 #include "multicalls.h"
76 #include "mmu.h"
77 #include "debugfs.h"
80 * Protects atomic reservation decrease/increase against concurrent increases.
81 * Also protects non-atomic updates of current_pages and balloon lists.
83 DEFINE_SPINLOCK(xen_reservation_lock);
86 * Identity map, in addition to plain kernel map. This needs to be
87 * large enough to allocate page table pages to allocate the rest.
88 * Each page can map 2MB.
90 #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
91 static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
93 #ifdef CONFIG_X86_64
94 /* l3 pud for userspace vsyscall mapping */
95 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
96 #endif /* CONFIG_X86_64 */
99 * Note about cr3 (pagetable base) values:
101 * xen_cr3 contains the current logical cr3 value; it contains the
102 * last set cr3. This may not be the current effective cr3, because
103 * its update may be being lazily deferred. However, a vcpu looking
104 * at its own cr3 can use this value knowing that it everything will
105 * be self-consistent.
107 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
108 * hypercall to set the vcpu cr3 is complete (so it may be a little
109 * out of date, but it will never be set early). If one vcpu is
110 * looking at another vcpu's cr3 value, it should use this variable.
112 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
113 DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
117 * Just beyond the highest usermode address. STACK_TOP_MAX has a
118 * redzone above it, so round it up to a PGD boundary.
120 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
122 unsigned long arbitrary_virt_to_mfn(void *vaddr)
124 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
126 return PFN_DOWN(maddr.maddr);
129 xmaddr_t arbitrary_virt_to_machine(void *vaddr)
131 unsigned long address = (unsigned long)vaddr;
132 unsigned int level;
133 pte_t *pte;
134 unsigned offset;
137 * if the PFN is in the linear mapped vaddr range, we can just use
138 * the (quick) virt_to_machine() p2m lookup
140 if (virt_addr_valid(vaddr))
141 return virt_to_machine(vaddr);
143 /* otherwise we have to do a (slower) full page-table walk */
145 pte = lookup_address(address, &level);
146 BUG_ON(pte == NULL);
147 offset = address & ~PAGE_MASK;
148 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
150 EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine);
152 void make_lowmem_page_readonly(void *vaddr)
154 pte_t *pte, ptev;
155 unsigned long address = (unsigned long)vaddr;
156 unsigned int level;
158 pte = lookup_address(address, &level);
159 if (pte == NULL)
160 return; /* vaddr missing */
162 ptev = pte_wrprotect(*pte);
164 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
165 BUG();
168 void make_lowmem_page_readwrite(void *vaddr)
170 pte_t *pte, ptev;
171 unsigned long address = (unsigned long)vaddr;
172 unsigned int level;
174 pte = lookup_address(address, &level);
175 if (pte == NULL)
176 return; /* vaddr missing */
178 ptev = pte_mkwrite(*pte);
180 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
181 BUG();
185 static bool xen_page_pinned(void *ptr)
187 struct page *page = virt_to_page(ptr);
189 return PagePinned(page);
192 void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid)
194 struct multicall_space mcs;
195 struct mmu_update *u;
197 mcs = xen_mc_entry(sizeof(*u));
198 u = mcs.args;
200 /* ptep might be kmapped when using 32-bit HIGHPTE */
201 u->ptr = virt_to_machine(ptep).maddr;
202 u->val = pte_val_ma(pteval);
204 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid);
206 xen_mc_issue(PARAVIRT_LAZY_MMU);
208 EXPORT_SYMBOL_GPL(xen_set_domain_pte);
210 static void xen_extend_mmu_update(const struct mmu_update *update)
212 struct multicall_space mcs;
213 struct mmu_update *u;
215 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
217 if (mcs.mc != NULL) {
218 mcs.mc->args[1]++;
219 } else {
220 mcs = __xen_mc_entry(sizeof(*u));
221 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
224 u = mcs.args;
225 *u = *update;
228 static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
230 struct mmu_update u;
232 preempt_disable();
234 xen_mc_batch();
236 /* ptr may be ioremapped for 64-bit pagetable setup */
237 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
238 u.val = pmd_val_ma(val);
239 xen_extend_mmu_update(&u);
241 xen_mc_issue(PARAVIRT_LAZY_MMU);
243 preempt_enable();
246 static void xen_set_pmd(pmd_t *ptr, pmd_t val)
248 /* If page is not pinned, we can just update the entry
249 directly */
250 if (!xen_page_pinned(ptr)) {
251 *ptr = val;
252 return;
255 xen_set_pmd_hyper(ptr, val);
259 * Associate a virtual page frame with a given physical page frame
260 * and protection flags for that frame.
262 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
264 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
267 static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
269 struct mmu_update u;
271 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
272 return false;
274 xen_mc_batch();
276 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
277 u.val = pte_val_ma(pteval);
278 xen_extend_mmu_update(&u);
280 xen_mc_issue(PARAVIRT_LAZY_MMU);
282 return true;
285 static void xen_set_pte(pte_t *ptep, pte_t pteval)
287 if (!xen_batched_set_pte(ptep, pteval))
288 native_set_pte(ptep, pteval);
291 static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
292 pte_t *ptep, pte_t pteval)
294 xen_set_pte(ptep, pteval);
297 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
298 unsigned long addr, pte_t *ptep)
300 /* Just return the pte as-is. We preserve the bits on commit */
301 return *ptep;
304 void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
305 pte_t *ptep, pte_t pte)
307 struct mmu_update u;
309 xen_mc_batch();
311 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
312 u.val = pte_val_ma(pte);
313 xen_extend_mmu_update(&u);
315 xen_mc_issue(PARAVIRT_LAZY_MMU);
318 /* Assume pteval_t is equivalent to all the other *val_t types. */
319 static pteval_t pte_mfn_to_pfn(pteval_t val)
321 if (val & _PAGE_PRESENT) {
322 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
323 pteval_t flags = val & PTE_FLAGS_MASK;
324 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
327 return val;
330 static pteval_t pte_pfn_to_mfn(pteval_t val)
332 if (val & _PAGE_PRESENT) {
333 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
334 pteval_t flags = val & PTE_FLAGS_MASK;
335 unsigned long mfn;
337 if (!xen_feature(XENFEAT_auto_translated_physmap))
338 mfn = get_phys_to_machine(pfn);
339 else
340 mfn = pfn;
342 * If there's no mfn for the pfn, then just create an
343 * empty non-present pte. Unfortunately this loses
344 * information about the original pfn, so
345 * pte_mfn_to_pfn is asymmetric.
347 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
348 mfn = 0;
349 flags = 0;
350 } else {
352 * Paramount to do this test _after_ the
353 * INVALID_P2M_ENTRY as INVALID_P2M_ENTRY &
354 * IDENTITY_FRAME_BIT resolves to true.
356 mfn &= ~FOREIGN_FRAME_BIT;
357 if (mfn & IDENTITY_FRAME_BIT) {
358 mfn &= ~IDENTITY_FRAME_BIT;
359 flags |= _PAGE_IOMAP;
362 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
365 return val;
368 static pteval_t iomap_pte(pteval_t val)
370 if (val & _PAGE_PRESENT) {
371 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
372 pteval_t flags = val & PTE_FLAGS_MASK;
374 /* We assume the pte frame number is a MFN, so
375 just use it as-is. */
376 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
379 return val;
382 static pteval_t xen_pte_val(pte_t pte)
384 pteval_t pteval = pte.pte;
386 /* If this is a WC pte, convert back from Xen WC to Linux WC */
387 if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) {
388 WARN_ON(!pat_enabled);
389 pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT;
392 if (xen_initial_domain() && (pteval & _PAGE_IOMAP))
393 return pteval;
395 return pte_mfn_to_pfn(pteval);
397 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
399 static pgdval_t xen_pgd_val(pgd_t pgd)
401 return pte_mfn_to_pfn(pgd.pgd);
403 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
406 * Xen's PAT setup is part of its ABI, though I assume entries 6 & 7
407 * are reserved for now, to correspond to the Intel-reserved PAT
408 * types.
410 * We expect Linux's PAT set as follows:
412 * Idx PTE flags Linux Xen Default
413 * 0 WB WB WB
414 * 1 PWT WC WT WT
415 * 2 PCD UC- UC- UC-
416 * 3 PCD PWT UC UC UC
417 * 4 PAT WB WC WB
418 * 5 PAT PWT WC WP WT
419 * 6 PAT PCD UC- UC UC-
420 * 7 PAT PCD PWT UC UC UC
423 void xen_set_pat(u64 pat)
425 /* We expect Linux to use a PAT setting of
426 * UC UC- WC WB (ignoring the PAT flag) */
427 WARN_ON(pat != 0x0007010600070106ull);
430 static pte_t xen_make_pte(pteval_t pte)
432 phys_addr_t addr = (pte & PTE_PFN_MASK);
434 /* If Linux is trying to set a WC pte, then map to the Xen WC.
435 * If _PAGE_PAT is set, then it probably means it is really
436 * _PAGE_PSE, so avoid fiddling with the PAT mapping and hope
437 * things work out OK...
439 * (We should never see kernel mappings with _PAGE_PSE set,
440 * but we could see hugetlbfs mappings, I think.).
442 if (pat_enabled && !WARN_ON(pte & _PAGE_PAT)) {
443 if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT)
444 pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT;
448 * Unprivileged domains are allowed to do IOMAPpings for
449 * PCI passthrough, but not map ISA space. The ISA
450 * mappings are just dummy local mappings to keep other
451 * parts of the kernel happy.
453 if (unlikely(pte & _PAGE_IOMAP) &&
454 (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
455 pte = iomap_pte(pte);
456 } else {
457 pte &= ~_PAGE_IOMAP;
458 pte = pte_pfn_to_mfn(pte);
461 return native_make_pte(pte);
463 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
465 #ifdef CONFIG_XEN_DEBUG
466 pte_t xen_make_pte_debug(pteval_t pte)
468 phys_addr_t addr = (pte & PTE_PFN_MASK);
469 phys_addr_t other_addr;
470 bool io_page = false;
471 pte_t _pte;
473 if (pte & _PAGE_IOMAP)
474 io_page = true;
476 _pte = xen_make_pte(pte);
478 if (!addr)
479 return _pte;
481 if (io_page &&
482 (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
483 other_addr = pfn_to_mfn(addr >> PAGE_SHIFT) << PAGE_SHIFT;
484 WARN_ONCE(addr != other_addr,
485 "0x%lx is using VM_IO, but it is 0x%lx!\n",
486 (unsigned long)addr, (unsigned long)other_addr);
487 } else {
488 pteval_t iomap_set = (_pte.pte & PTE_FLAGS_MASK) & _PAGE_IOMAP;
489 other_addr = (_pte.pte & PTE_PFN_MASK);
490 WARN_ONCE((addr == other_addr) && (!io_page) && (!iomap_set),
491 "0x%lx is missing VM_IO (and wasn't fixed)!\n",
492 (unsigned long)addr);
495 return _pte;
497 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_debug);
498 #endif
500 static pgd_t xen_make_pgd(pgdval_t pgd)
502 pgd = pte_pfn_to_mfn(pgd);
503 return native_make_pgd(pgd);
505 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
507 static pmdval_t xen_pmd_val(pmd_t pmd)
509 return pte_mfn_to_pfn(pmd.pmd);
511 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
513 static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
515 struct mmu_update u;
517 preempt_disable();
519 xen_mc_batch();
521 /* ptr may be ioremapped for 64-bit pagetable setup */
522 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
523 u.val = pud_val_ma(val);
524 xen_extend_mmu_update(&u);
526 xen_mc_issue(PARAVIRT_LAZY_MMU);
528 preempt_enable();
531 static void xen_set_pud(pud_t *ptr, pud_t val)
533 /* If page is not pinned, we can just update the entry
534 directly */
535 if (!xen_page_pinned(ptr)) {
536 *ptr = val;
537 return;
540 xen_set_pud_hyper(ptr, val);
543 #ifdef CONFIG_X86_PAE
544 static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
546 set_64bit((u64 *)ptep, native_pte_val(pte));
549 static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
551 if (!xen_batched_set_pte(ptep, native_make_pte(0)))
552 native_pte_clear(mm, addr, ptep);
555 static void xen_pmd_clear(pmd_t *pmdp)
557 set_pmd(pmdp, __pmd(0));
559 #endif /* CONFIG_X86_PAE */
561 static pmd_t xen_make_pmd(pmdval_t pmd)
563 pmd = pte_pfn_to_mfn(pmd);
564 return native_make_pmd(pmd);
566 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
568 #if PAGETABLE_LEVELS == 4
569 static pudval_t xen_pud_val(pud_t pud)
571 return pte_mfn_to_pfn(pud.pud);
573 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
575 static pud_t xen_make_pud(pudval_t pud)
577 pud = pte_pfn_to_mfn(pud);
579 return native_make_pud(pud);
581 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
583 static pgd_t *xen_get_user_pgd(pgd_t *pgd)
585 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
586 unsigned offset = pgd - pgd_page;
587 pgd_t *user_ptr = NULL;
589 if (offset < pgd_index(USER_LIMIT)) {
590 struct page *page = virt_to_page(pgd_page);
591 user_ptr = (pgd_t *)page->private;
592 if (user_ptr)
593 user_ptr += offset;
596 return user_ptr;
599 static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
601 struct mmu_update u;
603 u.ptr = virt_to_machine(ptr).maddr;
604 u.val = pgd_val_ma(val);
605 xen_extend_mmu_update(&u);
609 * Raw hypercall-based set_pgd, intended for in early boot before
610 * there's a page structure. This implies:
611 * 1. The only existing pagetable is the kernel's
612 * 2. It is always pinned
613 * 3. It has no user pagetable attached to it
615 static void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
617 preempt_disable();
619 xen_mc_batch();
621 __xen_set_pgd_hyper(ptr, val);
623 xen_mc_issue(PARAVIRT_LAZY_MMU);
625 preempt_enable();
628 static void xen_set_pgd(pgd_t *ptr, pgd_t val)
630 pgd_t *user_ptr = xen_get_user_pgd(ptr);
632 /* If page is not pinned, we can just update the entry
633 directly */
634 if (!xen_page_pinned(ptr)) {
635 *ptr = val;
636 if (user_ptr) {
637 WARN_ON(xen_page_pinned(user_ptr));
638 *user_ptr = val;
640 return;
643 /* If it's pinned, then we can at least batch the kernel and
644 user updates together. */
645 xen_mc_batch();
647 __xen_set_pgd_hyper(ptr, val);
648 if (user_ptr)
649 __xen_set_pgd_hyper(user_ptr, val);
651 xen_mc_issue(PARAVIRT_LAZY_MMU);
653 #endif /* PAGETABLE_LEVELS == 4 */
656 * (Yet another) pagetable walker. This one is intended for pinning a
657 * pagetable. This means that it walks a pagetable and calls the
658 * callback function on each page it finds making up the page table,
659 * at every level. It walks the entire pagetable, but it only bothers
660 * pinning pte pages which are below limit. In the normal case this
661 * will be STACK_TOP_MAX, but at boot we need to pin up to
662 * FIXADDR_TOP.
664 * For 32-bit the important bit is that we don't pin beyond there,
665 * because then we start getting into Xen's ptes.
667 * For 64-bit, we must skip the Xen hole in the middle of the address
668 * space, just after the big x86-64 virtual hole.
670 static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
671 int (*func)(struct mm_struct *mm, struct page *,
672 enum pt_level),
673 unsigned long limit)
675 int flush = 0;
676 unsigned hole_low, hole_high;
677 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
678 unsigned pgdidx, pudidx, pmdidx;
680 /* The limit is the last byte to be touched */
681 limit--;
682 BUG_ON(limit >= FIXADDR_TOP);
684 if (xen_feature(XENFEAT_auto_translated_physmap))
685 return 0;
688 * 64-bit has a great big hole in the middle of the address
689 * space, which contains the Xen mappings. On 32-bit these
690 * will end up making a zero-sized hole and so is a no-op.
692 hole_low = pgd_index(USER_LIMIT);
693 hole_high = pgd_index(PAGE_OFFSET);
695 pgdidx_limit = pgd_index(limit);
696 #if PTRS_PER_PUD > 1
697 pudidx_limit = pud_index(limit);
698 #else
699 pudidx_limit = 0;
700 #endif
701 #if PTRS_PER_PMD > 1
702 pmdidx_limit = pmd_index(limit);
703 #else
704 pmdidx_limit = 0;
705 #endif
707 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
708 pud_t *pud;
710 if (pgdidx >= hole_low && pgdidx < hole_high)
711 continue;
713 if (!pgd_val(pgd[pgdidx]))
714 continue;
716 pud = pud_offset(&pgd[pgdidx], 0);
718 if (PTRS_PER_PUD > 1) /* not folded */
719 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
721 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
722 pmd_t *pmd;
724 if (pgdidx == pgdidx_limit &&
725 pudidx > pudidx_limit)
726 goto out;
728 if (pud_none(pud[pudidx]))
729 continue;
731 pmd = pmd_offset(&pud[pudidx], 0);
733 if (PTRS_PER_PMD > 1) /* not folded */
734 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
736 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
737 struct page *pte;
739 if (pgdidx == pgdidx_limit &&
740 pudidx == pudidx_limit &&
741 pmdidx > pmdidx_limit)
742 goto out;
744 if (pmd_none(pmd[pmdidx]))
745 continue;
747 pte = pmd_page(pmd[pmdidx]);
748 flush |= (*func)(mm, pte, PT_PTE);
753 out:
754 /* Do the top level last, so that the callbacks can use it as
755 a cue to do final things like tlb flushes. */
756 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
758 return flush;
761 static int xen_pgd_walk(struct mm_struct *mm,
762 int (*func)(struct mm_struct *mm, struct page *,
763 enum pt_level),
764 unsigned long limit)
766 return __xen_pgd_walk(mm, mm->pgd, func, limit);
769 /* If we're using split pte locks, then take the page's lock and
770 return a pointer to it. Otherwise return NULL. */
771 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
773 spinlock_t *ptl = NULL;
775 #if USE_SPLIT_PTLOCKS
776 ptl = __pte_lockptr(page);
777 spin_lock_nest_lock(ptl, &mm->page_table_lock);
778 #endif
780 return ptl;
783 static void xen_pte_unlock(void *v)
785 spinlock_t *ptl = v;
786 spin_unlock(ptl);
789 static void xen_do_pin(unsigned level, unsigned long pfn)
791 struct mmuext_op *op;
792 struct multicall_space mcs;
794 mcs = __xen_mc_entry(sizeof(*op));
795 op = mcs.args;
796 op->cmd = level;
797 op->arg1.mfn = pfn_to_mfn(pfn);
798 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
801 static int xen_pin_page(struct mm_struct *mm, struct page *page,
802 enum pt_level level)
804 unsigned pgfl = TestSetPagePinned(page);
805 int flush;
807 if (pgfl)
808 flush = 0; /* already pinned */
809 else if (PageHighMem(page))
810 /* kmaps need flushing if we found an unpinned
811 highpage */
812 flush = 1;
813 else {
814 void *pt = lowmem_page_address(page);
815 unsigned long pfn = page_to_pfn(page);
816 struct multicall_space mcs = __xen_mc_entry(0);
817 spinlock_t *ptl;
819 flush = 0;
822 * We need to hold the pagetable lock between the time
823 * we make the pagetable RO and when we actually pin
824 * it. If we don't, then other users may come in and
825 * attempt to update the pagetable by writing it,
826 * which will fail because the memory is RO but not
827 * pinned, so Xen won't do the trap'n'emulate.
829 * If we're using split pte locks, we can't hold the
830 * entire pagetable's worth of locks during the
831 * traverse, because we may wrap the preempt count (8
832 * bits). The solution is to mark RO and pin each PTE
833 * page while holding the lock. This means the number
834 * of locks we end up holding is never more than a
835 * batch size (~32 entries, at present).
837 * If we're not using split pte locks, we needn't pin
838 * the PTE pages independently, because we're
839 * protected by the overall pagetable lock.
841 ptl = NULL;
842 if (level == PT_PTE)
843 ptl = xen_pte_lock(page, mm);
845 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
846 pfn_pte(pfn, PAGE_KERNEL_RO),
847 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
849 if (ptl) {
850 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
852 /* Queue a deferred unlock for when this batch
853 is completed. */
854 xen_mc_callback(xen_pte_unlock, ptl);
858 return flush;
861 /* This is called just after a mm has been created, but it has not
862 been used yet. We need to make sure that its pagetable is all
863 read-only, and can be pinned. */
864 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
866 xen_mc_batch();
868 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
869 /* re-enable interrupts for flushing */
870 xen_mc_issue(0);
872 kmap_flush_unused();
874 xen_mc_batch();
877 #ifdef CONFIG_X86_64
879 pgd_t *user_pgd = xen_get_user_pgd(pgd);
881 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
883 if (user_pgd) {
884 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
885 xen_do_pin(MMUEXT_PIN_L4_TABLE,
886 PFN_DOWN(__pa(user_pgd)));
889 #else /* CONFIG_X86_32 */
890 #ifdef CONFIG_X86_PAE
891 /* Need to make sure unshared kernel PMD is pinnable */
892 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
893 PT_PMD);
894 #endif
895 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
896 #endif /* CONFIG_X86_64 */
897 xen_mc_issue(0);
900 static void xen_pgd_pin(struct mm_struct *mm)
902 __xen_pgd_pin(mm, mm->pgd);
906 * On save, we need to pin all pagetables to make sure they get their
907 * mfns turned into pfns. Search the list for any unpinned pgds and pin
908 * them (unpinned pgds are not currently in use, probably because the
909 * process is under construction or destruction).
911 * Expected to be called in stop_machine() ("equivalent to taking
912 * every spinlock in the system"), so the locking doesn't really
913 * matter all that much.
915 void xen_mm_pin_all(void)
917 struct page *page;
919 spin_lock(&pgd_lock);
921 list_for_each_entry(page, &pgd_list, lru) {
922 if (!PagePinned(page)) {
923 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
924 SetPageSavePinned(page);
928 spin_unlock(&pgd_lock);
932 * The init_mm pagetable is really pinned as soon as its created, but
933 * that's before we have page structures to store the bits. So do all
934 * the book-keeping now.
936 static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
937 enum pt_level level)
939 SetPagePinned(page);
940 return 0;
943 static void __init xen_mark_init_mm_pinned(void)
945 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
948 static int xen_unpin_page(struct mm_struct *mm, struct page *page,
949 enum pt_level level)
951 unsigned pgfl = TestClearPagePinned(page);
953 if (pgfl && !PageHighMem(page)) {
954 void *pt = lowmem_page_address(page);
955 unsigned long pfn = page_to_pfn(page);
956 spinlock_t *ptl = NULL;
957 struct multicall_space mcs;
960 * Do the converse to pin_page. If we're using split
961 * pte locks, we must be holding the lock for while
962 * the pte page is unpinned but still RO to prevent
963 * concurrent updates from seeing it in this
964 * partially-pinned state.
966 if (level == PT_PTE) {
967 ptl = xen_pte_lock(page, mm);
969 if (ptl)
970 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
973 mcs = __xen_mc_entry(0);
975 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
976 pfn_pte(pfn, PAGE_KERNEL),
977 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
979 if (ptl) {
980 /* unlock when batch completed */
981 xen_mc_callback(xen_pte_unlock, ptl);
985 return 0; /* never need to flush on unpin */
988 /* Release a pagetables pages back as normal RW */
989 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
991 xen_mc_batch();
993 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
995 #ifdef CONFIG_X86_64
997 pgd_t *user_pgd = xen_get_user_pgd(pgd);
999 if (user_pgd) {
1000 xen_do_pin(MMUEXT_UNPIN_TABLE,
1001 PFN_DOWN(__pa(user_pgd)));
1002 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
1005 #endif
1007 #ifdef CONFIG_X86_PAE
1008 /* Need to make sure unshared kernel PMD is unpinned */
1009 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
1010 PT_PMD);
1011 #endif
1013 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
1015 xen_mc_issue(0);
1018 static void xen_pgd_unpin(struct mm_struct *mm)
1020 __xen_pgd_unpin(mm, mm->pgd);
1024 * On resume, undo any pinning done at save, so that the rest of the
1025 * kernel doesn't see any unexpected pinned pagetables.
1027 void xen_mm_unpin_all(void)
1029 struct page *page;
1031 spin_lock(&pgd_lock);
1033 list_for_each_entry(page, &pgd_list, lru) {
1034 if (PageSavePinned(page)) {
1035 BUG_ON(!PagePinned(page));
1036 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
1037 ClearPageSavePinned(page);
1041 spin_unlock(&pgd_lock);
1044 static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
1046 spin_lock(&next->page_table_lock);
1047 xen_pgd_pin(next);
1048 spin_unlock(&next->page_table_lock);
1051 static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
1053 spin_lock(&mm->page_table_lock);
1054 xen_pgd_pin(mm);
1055 spin_unlock(&mm->page_table_lock);
1059 #ifdef CONFIG_SMP
1060 /* Another cpu may still have their %cr3 pointing at the pagetable, so
1061 we need to repoint it somewhere else before we can unpin it. */
1062 static void drop_other_mm_ref(void *info)
1064 struct mm_struct *mm = info;
1065 struct mm_struct *active_mm;
1067 active_mm = percpu_read(cpu_tlbstate.active_mm);
1069 if (active_mm == mm && percpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
1070 leave_mm(smp_processor_id());
1072 /* If this cpu still has a stale cr3 reference, then make sure
1073 it has been flushed. */
1074 if (percpu_read(xen_current_cr3) == __pa(mm->pgd))
1075 load_cr3(swapper_pg_dir);
1078 static void xen_drop_mm_ref(struct mm_struct *mm)
1080 cpumask_var_t mask;
1081 unsigned cpu;
1083 if (current->active_mm == mm) {
1084 if (current->mm == mm)
1085 load_cr3(swapper_pg_dir);
1086 else
1087 leave_mm(smp_processor_id());
1090 /* Get the "official" set of cpus referring to our pagetable. */
1091 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1092 for_each_online_cpu(cpu) {
1093 if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
1094 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1095 continue;
1096 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1098 return;
1100 cpumask_copy(mask, mm_cpumask(mm));
1102 /* It's possible that a vcpu may have a stale reference to our
1103 cr3, because its in lazy mode, and it hasn't yet flushed
1104 its set of pending hypercalls yet. In this case, we can
1105 look at its actual current cr3 value, and force it to flush
1106 if needed. */
1107 for_each_online_cpu(cpu) {
1108 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1109 cpumask_set_cpu(cpu, mask);
1112 if (!cpumask_empty(mask))
1113 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1114 free_cpumask_var(mask);
1116 #else
1117 static void xen_drop_mm_ref(struct mm_struct *mm)
1119 if (current->active_mm == mm)
1120 load_cr3(swapper_pg_dir);
1122 #endif
1125 * While a process runs, Xen pins its pagetables, which means that the
1126 * hypervisor forces it to be read-only, and it controls all updates
1127 * to it. This means that all pagetable updates have to go via the
1128 * hypervisor, which is moderately expensive.
1130 * Since we're pulling the pagetable down, we switch to use init_mm,
1131 * unpin old process pagetable and mark it all read-write, which
1132 * allows further operations on it to be simple memory accesses.
1134 * The only subtle point is that another CPU may be still using the
1135 * pagetable because of lazy tlb flushing. This means we need need to
1136 * switch all CPUs off this pagetable before we can unpin it.
1138 static void xen_exit_mmap(struct mm_struct *mm)
1140 get_cpu(); /* make sure we don't move around */
1141 xen_drop_mm_ref(mm);
1142 put_cpu();
1144 spin_lock(&mm->page_table_lock);
1146 /* pgd may not be pinned in the error exit path of execve */
1147 if (xen_page_pinned(mm->pgd))
1148 xen_pgd_unpin(mm);
1150 spin_unlock(&mm->page_table_lock);
1153 static void __init xen_pagetable_setup_start(pgd_t *base)
1157 static void xen_post_allocator_init(void);
1159 static void __init xen_pagetable_setup_done(pgd_t *base)
1161 xen_setup_shared_info();
1162 xen_post_allocator_init();
1165 static void xen_write_cr2(unsigned long cr2)
1167 percpu_read(xen_vcpu)->arch.cr2 = cr2;
1170 static unsigned long xen_read_cr2(void)
1172 return percpu_read(xen_vcpu)->arch.cr2;
1175 unsigned long xen_read_cr2_direct(void)
1177 return percpu_read(xen_vcpu_info.arch.cr2);
1180 static void xen_flush_tlb(void)
1182 struct mmuext_op *op;
1183 struct multicall_space mcs;
1185 preempt_disable();
1187 mcs = xen_mc_entry(sizeof(*op));
1189 op = mcs.args;
1190 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1191 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1193 xen_mc_issue(PARAVIRT_LAZY_MMU);
1195 preempt_enable();
1198 static void xen_flush_tlb_single(unsigned long addr)
1200 struct mmuext_op *op;
1201 struct multicall_space mcs;
1203 preempt_disable();
1205 mcs = xen_mc_entry(sizeof(*op));
1206 op = mcs.args;
1207 op->cmd = MMUEXT_INVLPG_LOCAL;
1208 op->arg1.linear_addr = addr & PAGE_MASK;
1209 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1211 xen_mc_issue(PARAVIRT_LAZY_MMU);
1213 preempt_enable();
1216 static void xen_flush_tlb_others(const struct cpumask *cpus,
1217 struct mm_struct *mm, unsigned long va)
1219 struct {
1220 struct mmuext_op op;
1221 #ifdef CONFIG_SMP
1222 DECLARE_BITMAP(mask, num_processors);
1223 #else
1224 DECLARE_BITMAP(mask, NR_CPUS);
1225 #endif
1226 } *args;
1227 struct multicall_space mcs;
1229 if (cpumask_empty(cpus))
1230 return; /* nothing to do */
1232 mcs = xen_mc_entry(sizeof(*args));
1233 args = mcs.args;
1234 args->op.arg2.vcpumask = to_cpumask(args->mask);
1236 /* Remove us, and any offline CPUS. */
1237 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1238 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1240 if (va == TLB_FLUSH_ALL) {
1241 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1242 } else {
1243 args->op.cmd = MMUEXT_INVLPG_MULTI;
1244 args->op.arg1.linear_addr = va;
1247 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1249 xen_mc_issue(PARAVIRT_LAZY_MMU);
1252 static unsigned long xen_read_cr3(void)
1254 return percpu_read(xen_cr3);
1257 static void set_current_cr3(void *v)
1259 percpu_write(xen_current_cr3, (unsigned long)v);
1262 static void __xen_write_cr3(bool kernel, unsigned long cr3)
1264 struct mmuext_op *op;
1265 struct multicall_space mcs;
1266 unsigned long mfn;
1268 if (cr3)
1269 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1270 else
1271 mfn = 0;
1273 WARN_ON(mfn == 0 && kernel);
1275 mcs = __xen_mc_entry(sizeof(*op));
1277 op = mcs.args;
1278 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1279 op->arg1.mfn = mfn;
1281 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1283 if (kernel) {
1284 percpu_write(xen_cr3, cr3);
1286 /* Update xen_current_cr3 once the batch has actually
1287 been submitted. */
1288 xen_mc_callback(set_current_cr3, (void *)cr3);
1292 static void xen_write_cr3(unsigned long cr3)
1294 BUG_ON(preemptible());
1296 xen_mc_batch(); /* disables interrupts */
1298 /* Update while interrupts are disabled, so its atomic with
1299 respect to ipis */
1300 percpu_write(xen_cr3, cr3);
1302 __xen_write_cr3(true, cr3);
1304 #ifdef CONFIG_X86_64
1306 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1307 if (user_pgd)
1308 __xen_write_cr3(false, __pa(user_pgd));
1309 else
1310 __xen_write_cr3(false, 0);
1312 #endif
1314 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1317 static int xen_pgd_alloc(struct mm_struct *mm)
1319 pgd_t *pgd = mm->pgd;
1320 int ret = 0;
1322 BUG_ON(PagePinned(virt_to_page(pgd)));
1324 #ifdef CONFIG_X86_64
1326 struct page *page = virt_to_page(pgd);
1327 pgd_t *user_pgd;
1329 BUG_ON(page->private != 0);
1331 ret = -ENOMEM;
1333 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1334 page->private = (unsigned long)user_pgd;
1336 if (user_pgd != NULL) {
1337 user_pgd[pgd_index(VSYSCALL_START)] =
1338 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1339 ret = 0;
1342 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1344 #endif
1346 return ret;
1349 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1351 #ifdef CONFIG_X86_64
1352 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1354 if (user_pgd)
1355 free_page((unsigned long)user_pgd);
1356 #endif
1359 #ifdef CONFIG_X86_32
1360 static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1362 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1363 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1364 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1365 pte_val_ma(pte));
1367 return pte;
1369 #else /* CONFIG_X86_64 */
1370 static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1372 unsigned long pfn = pte_pfn(pte);
1375 * If the new pfn is within the range of the newly allocated
1376 * kernel pagetable, and it isn't being mapped into an
1377 * early_ioremap fixmap slot as a freshly allocated page, make sure
1378 * it is RO.
1380 if (((!is_early_ioremap_ptep(ptep) &&
1381 pfn >= pgt_buf_start && pfn < pgt_buf_top)) ||
1382 (is_early_ioremap_ptep(ptep) && pfn != (pgt_buf_end - 1)))
1383 pte = pte_wrprotect(pte);
1385 return pte;
1387 #endif /* CONFIG_X86_64 */
1389 /* Init-time set_pte while constructing initial pagetables, which
1390 doesn't allow RO pagetable pages to be remapped RW */
1391 static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1393 pte = mask_rw_pte(ptep, pte);
1395 xen_set_pte(ptep, pte);
1398 static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1400 struct mmuext_op op;
1401 op.cmd = cmd;
1402 op.arg1.mfn = pfn_to_mfn(pfn);
1403 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1404 BUG();
1407 /* Early in boot, while setting up the initial pagetable, assume
1408 everything is pinned. */
1409 static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1411 #ifdef CONFIG_FLATMEM
1412 BUG_ON(mem_map); /* should only be used early */
1413 #endif
1414 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1415 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1418 /* Used for pmd and pud */
1419 static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1421 #ifdef CONFIG_FLATMEM
1422 BUG_ON(mem_map); /* should only be used early */
1423 #endif
1424 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1427 /* Early release_pte assumes that all pts are pinned, since there's
1428 only init_mm and anything attached to that is pinned. */
1429 static void __init xen_release_pte_init(unsigned long pfn)
1431 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1432 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1435 static void __init xen_release_pmd_init(unsigned long pfn)
1437 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1440 /* This needs to make sure the new pte page is pinned iff its being
1441 attached to a pinned pagetable. */
1442 static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
1444 struct page *page = pfn_to_page(pfn);
1446 if (PagePinned(virt_to_page(mm->pgd))) {
1447 SetPagePinned(page);
1449 if (!PageHighMem(page)) {
1450 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
1451 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1452 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1453 } else {
1454 /* make sure there are no stray mappings of
1455 this page */
1456 kmap_flush_unused();
1461 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1463 xen_alloc_ptpage(mm, pfn, PT_PTE);
1466 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1468 xen_alloc_ptpage(mm, pfn, PT_PMD);
1471 /* This should never happen until we're OK to use struct page */
1472 static void xen_release_ptpage(unsigned long pfn, unsigned level)
1474 struct page *page = pfn_to_page(pfn);
1476 if (PagePinned(page)) {
1477 if (!PageHighMem(page)) {
1478 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1479 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1480 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1482 ClearPagePinned(page);
1486 static void xen_release_pte(unsigned long pfn)
1488 xen_release_ptpage(pfn, PT_PTE);
1491 static void xen_release_pmd(unsigned long pfn)
1493 xen_release_ptpage(pfn, PT_PMD);
1496 #if PAGETABLE_LEVELS == 4
1497 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1499 xen_alloc_ptpage(mm, pfn, PT_PUD);
1502 static void xen_release_pud(unsigned long pfn)
1504 xen_release_ptpage(pfn, PT_PUD);
1506 #endif
1508 void __init xen_reserve_top(void)
1510 #ifdef CONFIG_X86_32
1511 unsigned long top = HYPERVISOR_VIRT_START;
1512 struct xen_platform_parameters pp;
1514 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1515 top = pp.virt_start;
1517 reserve_top_address(-top);
1518 #endif /* CONFIG_X86_32 */
1522 * Like __va(), but returns address in the kernel mapping (which is
1523 * all we have until the physical memory mapping has been set up.
1525 static void *__ka(phys_addr_t paddr)
1527 #ifdef CONFIG_X86_64
1528 return (void *)(paddr + __START_KERNEL_map);
1529 #else
1530 return __va(paddr);
1531 #endif
1534 /* Convert a machine address to physical address */
1535 static unsigned long m2p(phys_addr_t maddr)
1537 phys_addr_t paddr;
1539 maddr &= PTE_PFN_MASK;
1540 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1542 return paddr;
1545 /* Convert a machine address to kernel virtual */
1546 static void *m2v(phys_addr_t maddr)
1548 return __ka(m2p(maddr));
1551 /* Set the page permissions on an identity-mapped pages */
1552 static void set_page_prot(void *addr, pgprot_t prot)
1554 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1555 pte_t pte = pfn_pte(pfn, prot);
1557 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1558 BUG();
1561 static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1563 unsigned pmdidx, pteidx;
1564 unsigned ident_pte;
1565 unsigned long pfn;
1567 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1568 PAGE_SIZE);
1570 ident_pte = 0;
1571 pfn = 0;
1572 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1573 pte_t *pte_page;
1575 /* Reuse or allocate a page of ptes */
1576 if (pmd_present(pmd[pmdidx]))
1577 pte_page = m2v(pmd[pmdidx].pmd);
1578 else {
1579 /* Check for free pte pages */
1580 if (ident_pte == LEVEL1_IDENT_ENTRIES)
1581 break;
1583 pte_page = &level1_ident_pgt[ident_pte];
1584 ident_pte += PTRS_PER_PTE;
1586 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1589 /* Install mappings */
1590 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1591 pte_t pte;
1593 #ifdef CONFIG_X86_32
1594 if (pfn > max_pfn_mapped)
1595 max_pfn_mapped = pfn;
1596 #endif
1598 if (!pte_none(pte_page[pteidx]))
1599 continue;
1601 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1602 pte_page[pteidx] = pte;
1606 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1607 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1609 set_page_prot(pmd, PAGE_KERNEL_RO);
1612 void __init xen_setup_machphys_mapping(void)
1614 struct xen_machphys_mapping mapping;
1615 unsigned long machine_to_phys_nr_ents;
1617 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1618 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1619 machine_to_phys_nr_ents = mapping.max_mfn + 1;
1620 } else {
1621 machine_to_phys_nr_ents = MACH2PHYS_NR_ENTRIES;
1623 machine_to_phys_order = fls(machine_to_phys_nr_ents - 1);
1626 #ifdef CONFIG_X86_64
1627 static void convert_pfn_mfn(void *v)
1629 pte_t *pte = v;
1630 int i;
1632 /* All levels are converted the same way, so just treat them
1633 as ptes. */
1634 for (i = 0; i < PTRS_PER_PTE; i++)
1635 pte[i] = xen_make_pte(pte[i].pte);
1639 * Set up the initial kernel pagetable.
1641 * We can construct this by grafting the Xen provided pagetable into
1642 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1643 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1644 * means that only the kernel has a physical mapping to start with -
1645 * but that's enough to get __va working. We need to fill in the rest
1646 * of the physical mapping once some sort of allocator has been set
1647 * up.
1649 pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
1650 unsigned long max_pfn)
1652 pud_t *l3;
1653 pmd_t *l2;
1655 /* max_pfn_mapped is the last pfn mapped in the initial memory
1656 * mappings. Considering that on Xen after the kernel mappings we
1657 * have the mappings of some pages that don't exist in pfn space, we
1658 * set max_pfn_mapped to the last real pfn mapped. */
1659 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1661 /* Zap identity mapping */
1662 init_level4_pgt[0] = __pgd(0);
1664 /* Pre-constructed entries are in pfn, so convert to mfn */
1665 convert_pfn_mfn(init_level4_pgt);
1666 convert_pfn_mfn(level3_ident_pgt);
1667 convert_pfn_mfn(level3_kernel_pgt);
1669 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1670 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1672 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1673 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1675 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1676 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1677 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1679 /* Set up identity map */
1680 xen_map_identity_early(level2_ident_pgt, max_pfn);
1682 /* Make pagetable pieces RO */
1683 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1684 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1685 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1686 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1687 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1688 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1690 /* Pin down new L4 */
1691 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1692 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1694 /* Unpin Xen-provided one */
1695 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1697 /* Switch over */
1698 pgd = init_level4_pgt;
1701 * At this stage there can be no user pgd, and no page
1702 * structure to attach it to, so make sure we just set kernel
1703 * pgd.
1705 xen_mc_batch();
1706 __xen_write_cr3(true, __pa(pgd));
1707 xen_mc_issue(PARAVIRT_LAZY_CPU);
1709 memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
1710 __pa(xen_start_info->pt_base +
1711 xen_start_info->nr_pt_frames * PAGE_SIZE),
1712 "XEN PAGETABLES");
1714 return pgd;
1716 #else /* !CONFIG_X86_64 */
1717 static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
1718 static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
1720 static void __init xen_write_cr3_init(unsigned long cr3)
1722 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
1724 BUG_ON(read_cr3() != __pa(initial_page_table));
1725 BUG_ON(cr3 != __pa(swapper_pg_dir));
1728 * We are switching to swapper_pg_dir for the first time (from
1729 * initial_page_table) and therefore need to mark that page
1730 * read-only and then pin it.
1732 * Xen disallows sharing of kernel PMDs for PAE
1733 * guests. Therefore we must copy the kernel PMD from
1734 * initial_page_table into a new kernel PMD to be used in
1735 * swapper_pg_dir.
1737 swapper_kernel_pmd =
1738 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1739 memcpy(swapper_kernel_pmd, initial_kernel_pmd,
1740 sizeof(pmd_t) * PTRS_PER_PMD);
1741 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
1742 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
1743 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
1745 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1746 xen_write_cr3(cr3);
1747 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
1749 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
1750 PFN_DOWN(__pa(initial_page_table)));
1751 set_page_prot(initial_page_table, PAGE_KERNEL);
1752 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
1754 pv_mmu_ops.write_cr3 = &xen_write_cr3;
1757 pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
1758 unsigned long max_pfn)
1760 pmd_t *kernel_pmd;
1762 initial_kernel_pmd =
1763 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1765 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
1766 xen_start_info->nr_pt_frames * PAGE_SIZE +
1767 512*1024);
1769 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1770 memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
1772 xen_map_identity_early(initial_kernel_pmd, max_pfn);
1774 memcpy(initial_page_table, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1775 initial_page_table[KERNEL_PGD_BOUNDARY] =
1776 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
1778 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
1779 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
1780 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1782 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1784 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
1785 PFN_DOWN(__pa(initial_page_table)));
1786 xen_write_cr3(__pa(initial_page_table));
1788 memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
1789 __pa(xen_start_info->pt_base +
1790 xen_start_info->nr_pt_frames * PAGE_SIZE),
1791 "XEN PAGETABLES");
1793 return initial_page_table;
1795 #endif /* CONFIG_X86_64 */
1797 static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
1799 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
1801 pte_t pte;
1803 phys >>= PAGE_SHIFT;
1805 switch (idx) {
1806 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1807 #ifdef CONFIG_X86_F00F_BUG
1808 case FIX_F00F_IDT:
1809 #endif
1810 #ifdef CONFIG_X86_32
1811 case FIX_WP_TEST:
1812 case FIX_VDSO:
1813 # ifdef CONFIG_HIGHMEM
1814 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1815 # endif
1816 #else
1817 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1818 #endif
1819 case FIX_TEXT_POKE0:
1820 case FIX_TEXT_POKE1:
1821 /* All local page mappings */
1822 pte = pfn_pte(phys, prot);
1823 break;
1825 #ifdef CONFIG_X86_LOCAL_APIC
1826 case FIX_APIC_BASE: /* maps dummy local APIC */
1827 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1828 break;
1829 #endif
1831 #ifdef CONFIG_X86_IO_APIC
1832 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
1834 * We just don't map the IO APIC - all access is via
1835 * hypercalls. Keep the address in the pte for reference.
1837 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1838 break;
1839 #endif
1841 case FIX_PARAVIRT_BOOTMAP:
1842 /* This is an MFN, but it isn't an IO mapping from the
1843 IO domain */
1844 pte = mfn_pte(phys, prot);
1845 break;
1847 default:
1848 /* By default, set_fixmap is used for hardware mappings */
1849 pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP));
1850 break;
1853 __native_set_fixmap(idx, pte);
1855 #ifdef CONFIG_X86_64
1856 /* Replicate changes to map the vsyscall page into the user
1857 pagetable vsyscall mapping. */
1858 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1859 unsigned long vaddr = __fix_to_virt(idx);
1860 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1862 #endif
1865 void __init xen_ident_map_ISA(void)
1867 unsigned long pa;
1870 * If we're dom0, then linear map the ISA machine addresses into
1871 * the kernel's address space.
1873 if (!xen_initial_domain())
1874 return;
1876 xen_raw_printk("Xen: setup ISA identity maps\n");
1878 for (pa = ISA_START_ADDRESS; pa < ISA_END_ADDRESS; pa += PAGE_SIZE) {
1879 pte_t pte = mfn_pte(PFN_DOWN(pa), PAGE_KERNEL_IO);
1881 if (HYPERVISOR_update_va_mapping(PAGE_OFFSET + pa, pte, 0))
1882 BUG();
1885 xen_flush_tlb();
1888 static void __init xen_post_allocator_init(void)
1890 #ifdef CONFIG_XEN_DEBUG
1891 pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte_debug);
1892 #endif
1893 pv_mmu_ops.set_pte = xen_set_pte;
1894 pv_mmu_ops.set_pmd = xen_set_pmd;
1895 pv_mmu_ops.set_pud = xen_set_pud;
1896 #if PAGETABLE_LEVELS == 4
1897 pv_mmu_ops.set_pgd = xen_set_pgd;
1898 #endif
1900 /* This will work as long as patching hasn't happened yet
1901 (which it hasn't) */
1902 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1903 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1904 pv_mmu_ops.release_pte = xen_release_pte;
1905 pv_mmu_ops.release_pmd = xen_release_pmd;
1906 #if PAGETABLE_LEVELS == 4
1907 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1908 pv_mmu_ops.release_pud = xen_release_pud;
1909 #endif
1911 #ifdef CONFIG_X86_64
1912 SetPagePinned(virt_to_page(level3_user_vsyscall));
1913 #endif
1914 xen_mark_init_mm_pinned();
1917 static void xen_leave_lazy_mmu(void)
1919 preempt_disable();
1920 xen_mc_flush();
1921 paravirt_leave_lazy_mmu();
1922 preempt_enable();
1925 static const struct pv_mmu_ops xen_mmu_ops __initconst = {
1926 .read_cr2 = xen_read_cr2,
1927 .write_cr2 = xen_write_cr2,
1929 .read_cr3 = xen_read_cr3,
1930 #ifdef CONFIG_X86_32
1931 .write_cr3 = xen_write_cr3_init,
1932 #else
1933 .write_cr3 = xen_write_cr3,
1934 #endif
1936 .flush_tlb_user = xen_flush_tlb,
1937 .flush_tlb_kernel = xen_flush_tlb,
1938 .flush_tlb_single = xen_flush_tlb_single,
1939 .flush_tlb_others = xen_flush_tlb_others,
1941 .pte_update = paravirt_nop,
1942 .pte_update_defer = paravirt_nop,
1944 .pgd_alloc = xen_pgd_alloc,
1945 .pgd_free = xen_pgd_free,
1947 .alloc_pte = xen_alloc_pte_init,
1948 .release_pte = xen_release_pte_init,
1949 .alloc_pmd = xen_alloc_pmd_init,
1950 .release_pmd = xen_release_pmd_init,
1952 .set_pte = xen_set_pte_init,
1953 .set_pte_at = xen_set_pte_at,
1954 .set_pmd = xen_set_pmd_hyper,
1956 .ptep_modify_prot_start = __ptep_modify_prot_start,
1957 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1959 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
1960 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
1962 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
1963 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
1965 #ifdef CONFIG_X86_PAE
1966 .set_pte_atomic = xen_set_pte_atomic,
1967 .pte_clear = xen_pte_clear,
1968 .pmd_clear = xen_pmd_clear,
1969 #endif /* CONFIG_X86_PAE */
1970 .set_pud = xen_set_pud_hyper,
1972 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
1973 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
1975 #if PAGETABLE_LEVELS == 4
1976 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
1977 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
1978 .set_pgd = xen_set_pgd_hyper,
1980 .alloc_pud = xen_alloc_pmd_init,
1981 .release_pud = xen_release_pmd_init,
1982 #endif /* PAGETABLE_LEVELS == 4 */
1984 .activate_mm = xen_activate_mm,
1985 .dup_mmap = xen_dup_mmap,
1986 .exit_mmap = xen_exit_mmap,
1988 .lazy_mode = {
1989 .enter = paravirt_enter_lazy_mmu,
1990 .leave = xen_leave_lazy_mmu,
1993 .set_fixmap = xen_set_fixmap,
1996 void __init xen_init_mmu_ops(void)
1998 x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
1999 x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
2000 pv_mmu_ops = xen_mmu_ops;
2002 memset(dummy_mapping, 0xff, PAGE_SIZE);
2005 /* Protected by xen_reservation_lock. */
2006 #define MAX_CONTIG_ORDER 9 /* 2MB */
2007 static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2009 #define VOID_PTE (mfn_pte(0, __pgprot(0)))
2010 static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2011 unsigned long *in_frames,
2012 unsigned long *out_frames)
2014 int i;
2015 struct multicall_space mcs;
2017 xen_mc_batch();
2018 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2019 mcs = __xen_mc_entry(0);
2021 if (in_frames)
2022 in_frames[i] = virt_to_mfn(vaddr);
2024 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2025 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
2027 if (out_frames)
2028 out_frames[i] = virt_to_pfn(vaddr);
2030 xen_mc_issue(0);
2034 * Update the pfn-to-mfn mappings for a virtual address range, either to
2035 * point to an array of mfns, or contiguously from a single starting
2036 * mfn.
2038 static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2039 unsigned long *mfns,
2040 unsigned long first_mfn)
2042 unsigned i, limit;
2043 unsigned long mfn;
2045 xen_mc_batch();
2047 limit = 1u << order;
2048 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2049 struct multicall_space mcs;
2050 unsigned flags;
2052 mcs = __xen_mc_entry(0);
2053 if (mfns)
2054 mfn = mfns[i];
2055 else
2056 mfn = first_mfn + i;
2058 if (i < (limit - 1))
2059 flags = 0;
2060 else {
2061 if (order == 0)
2062 flags = UVMF_INVLPG | UVMF_ALL;
2063 else
2064 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2067 MULTI_update_va_mapping(mcs.mc, vaddr,
2068 mfn_pte(mfn, PAGE_KERNEL), flags);
2070 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2073 xen_mc_issue(0);
2077 * Perform the hypercall to exchange a region of our pfns to point to
2078 * memory with the required contiguous alignment. Takes the pfns as
2079 * input, and populates mfns as output.
2081 * Returns a success code indicating whether the hypervisor was able to
2082 * satisfy the request or not.
2084 static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2085 unsigned long *pfns_in,
2086 unsigned long extents_out,
2087 unsigned int order_out,
2088 unsigned long *mfns_out,
2089 unsigned int address_bits)
2091 long rc;
2092 int success;
2094 struct xen_memory_exchange exchange = {
2095 .in = {
2096 .nr_extents = extents_in,
2097 .extent_order = order_in,
2098 .extent_start = pfns_in,
2099 .domid = DOMID_SELF
2101 .out = {
2102 .nr_extents = extents_out,
2103 .extent_order = order_out,
2104 .extent_start = mfns_out,
2105 .address_bits = address_bits,
2106 .domid = DOMID_SELF
2110 BUG_ON(extents_in << order_in != extents_out << order_out);
2112 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2113 success = (exchange.nr_exchanged == extents_in);
2115 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2116 BUG_ON(success && (rc != 0));
2118 return success;
2121 int xen_create_contiguous_region(unsigned long vstart, unsigned int order,
2122 unsigned int address_bits)
2124 unsigned long *in_frames = discontig_frames, out_frame;
2125 unsigned long flags;
2126 int success;
2129 * Currently an auto-translated guest will not perform I/O, nor will
2130 * it require PAE page directories below 4GB. Therefore any calls to
2131 * this function are redundant and can be ignored.
2134 if (xen_feature(XENFEAT_auto_translated_physmap))
2135 return 0;
2137 if (unlikely(order > MAX_CONTIG_ORDER))
2138 return -ENOMEM;
2140 memset((void *) vstart, 0, PAGE_SIZE << order);
2142 spin_lock_irqsave(&xen_reservation_lock, flags);
2144 /* 1. Zap current PTEs, remembering MFNs. */
2145 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2147 /* 2. Get a new contiguous memory extent. */
2148 out_frame = virt_to_pfn(vstart);
2149 success = xen_exchange_memory(1UL << order, 0, in_frames,
2150 1, order, &out_frame,
2151 address_bits);
2153 /* 3. Map the new extent in place of old pages. */
2154 if (success)
2155 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2156 else
2157 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2159 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2161 return success ? 0 : -ENOMEM;
2163 EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2165 void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order)
2167 unsigned long *out_frames = discontig_frames, in_frame;
2168 unsigned long flags;
2169 int success;
2171 if (xen_feature(XENFEAT_auto_translated_physmap))
2172 return;
2174 if (unlikely(order > MAX_CONTIG_ORDER))
2175 return;
2177 memset((void *) vstart, 0, PAGE_SIZE << order);
2179 spin_lock_irqsave(&xen_reservation_lock, flags);
2181 /* 1. Find start MFN of contiguous extent. */
2182 in_frame = virt_to_mfn(vstart);
2184 /* 2. Zap current PTEs. */
2185 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2187 /* 3. Do the exchange for non-contiguous MFNs. */
2188 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2189 0, out_frames, 0);
2191 /* 4. Map new pages in place of old pages. */
2192 if (success)
2193 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2194 else
2195 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2197 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2199 EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
2201 #ifdef CONFIG_XEN_PVHVM
2202 static void xen_hvm_exit_mmap(struct mm_struct *mm)
2204 struct xen_hvm_pagetable_dying a;
2205 int rc;
2207 a.domid = DOMID_SELF;
2208 a.gpa = __pa(mm->pgd);
2209 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2210 WARN_ON_ONCE(rc < 0);
2213 static int is_pagetable_dying_supported(void)
2215 struct xen_hvm_pagetable_dying a;
2216 int rc = 0;
2218 a.domid = DOMID_SELF;
2219 a.gpa = 0x00;
2220 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2221 if (rc < 0) {
2222 printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n");
2223 return 0;
2225 return 1;
2228 void __init xen_hvm_init_mmu_ops(void)
2230 if (is_pagetable_dying_supported())
2231 pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
2233 #endif
2235 #define REMAP_BATCH_SIZE 16
2237 struct remap_data {
2238 unsigned long mfn;
2239 pgprot_t prot;
2240 struct mmu_update *mmu_update;
2243 static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token,
2244 unsigned long addr, void *data)
2246 struct remap_data *rmd = data;
2247 pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot));
2249 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
2250 rmd->mmu_update->val = pte_val_ma(pte);
2251 rmd->mmu_update++;
2253 return 0;
2256 int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
2257 unsigned long addr,
2258 unsigned long mfn, int nr,
2259 pgprot_t prot, unsigned domid)
2261 struct remap_data rmd;
2262 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2263 int batch;
2264 unsigned long range;
2265 int err = 0;
2267 prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP);
2269 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) ==
2270 (VM_PFNMAP | VM_RESERVED | VM_IO)));
2272 rmd.mfn = mfn;
2273 rmd.prot = prot;
2275 while (nr) {
2276 batch = min(REMAP_BATCH_SIZE, nr);
2277 range = (unsigned long)batch << PAGE_SHIFT;
2279 rmd.mmu_update = mmu_update;
2280 err = apply_to_page_range(vma->vm_mm, addr, range,
2281 remap_area_mfn_pte_fn, &rmd);
2282 if (err)
2283 goto out;
2285 err = -EFAULT;
2286 if (HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid) < 0)
2287 goto out;
2289 nr -= batch;
2290 addr += range;
2293 err = 0;
2294 out:
2296 flush_tlb_all();
2298 return err;
2300 EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range);
2302 #ifdef CONFIG_XEN_DEBUG_FS
2303 static int p2m_dump_open(struct inode *inode, struct file *filp)
2305 return single_open(filp, p2m_dump_show, NULL);
2308 static const struct file_operations p2m_dump_fops = {
2309 .open = p2m_dump_open,
2310 .read = seq_read,
2311 .llseek = seq_lseek,
2312 .release = single_release,
2314 #endif /* CONFIG_XEN_DEBUG_FS */