[PATCH] 3c59x: cleanup of mdio_read routines to use MII_* macros
[linux-2.6/x86.git] / include / asm-ppc64 / pgtable.h
blobfde93ec36abc5550e91724357ef1137debd4cbe6
1 #ifndef _PPC64_PGTABLE_H
2 #define _PPC64_PGTABLE_H
4 /*
5 * This file contains the functions and defines necessary to modify and use
6 * the ppc64 hashed page table.
7 */
9 #ifndef __ASSEMBLY__
10 #include <linux/config.h>
11 #include <linux/stddef.h>
12 #include <asm/processor.h> /* For TASK_SIZE */
13 #include <asm/mmu.h>
14 #include <asm/page.h>
15 #include <asm/tlbflush.h>
16 #endif /* __ASSEMBLY__ */
18 #ifdef CONFIG_PPC_64K_PAGES
19 #include <asm/pgtable-64k.h>
20 #else
21 #include <asm/pgtable-4k.h>
22 #endif
24 #define FIRST_USER_ADDRESS 0
27 * Size of EA range mapped by our pagetables.
29 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
30 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
31 #define PGTABLE_RANGE (1UL << PGTABLE_EADDR_SIZE)
33 #if TASK_SIZE_USER64 > PGTABLE_RANGE
34 #error TASK_SIZE_USER64 exceeds pagetable range
35 #endif
37 #if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT))
38 #error TASK_SIZE_USER64 exceeds user VSID range
39 #endif
42 * Define the address range of the vmalloc VM area.
44 #define VMALLOC_START (0xD000000000000000ul)
45 #define VMALLOC_SIZE (0x80000000000UL)
46 #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
49 * Common bits in a linux-style PTE. These match the bits in the
50 * (hardware-defined) PowerPC PTE as closely as possible. Additional
51 * bits may be defined in pgtable-*.h
53 #define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
54 #define _PAGE_USER 0x0002 /* matches one of the PP bits */
55 #define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
56 #define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */
57 #define _PAGE_GUARDED 0x0008
58 #define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
59 #define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
60 #define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
61 #define _PAGE_DIRTY 0x0080 /* C: page changed */
62 #define _PAGE_ACCESSED 0x0100 /* R: page referenced */
63 #define _PAGE_RW 0x0200 /* software: user write access allowed */
64 #define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */
65 #define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
67 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
69 #define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
71 /* __pgprot defined in asm-ppc64/page.h */
72 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
74 #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
75 #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC)
76 #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
77 #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
78 #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
79 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
80 #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_WRENABLE)
81 #define PAGE_KERNEL_CI __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
82 _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED)
83 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_EXEC)
85 #define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
86 #define HAVE_PAGE_AGP
88 /* PTEIDX nibble */
89 #define _PTEIDX_SECONDARY 0x8
90 #define _PTEIDX_GROUP_IX 0x7
94 * POWER4 and newer have per page execute protection, older chips can only
95 * do this on a segment (256MB) basis.
97 * Also, write permissions imply read permissions.
98 * This is the closest we can get..
100 * Note due to the way vm flags are laid out, the bits are XWR
102 #define __P000 PAGE_NONE
103 #define __P001 PAGE_READONLY
104 #define __P010 PAGE_COPY
105 #define __P011 PAGE_COPY
106 #define __P100 PAGE_READONLY_X
107 #define __P101 PAGE_READONLY_X
108 #define __P110 PAGE_COPY_X
109 #define __P111 PAGE_COPY_X
111 #define __S000 PAGE_NONE
112 #define __S001 PAGE_READONLY
113 #define __S010 PAGE_SHARED
114 #define __S011 PAGE_SHARED
115 #define __S100 PAGE_READONLY_X
116 #define __S101 PAGE_READONLY_X
117 #define __S110 PAGE_SHARED_X
118 #define __S111 PAGE_SHARED_X
120 #ifndef __ASSEMBLY__
123 * ZERO_PAGE is a global shared page that is always zero: used
124 * for zero-mapped memory areas etc..
126 extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
127 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
128 #endif /* __ASSEMBLY__ */
130 #ifdef CONFIG_HUGETLB_PAGE
132 #define HAVE_ARCH_UNMAPPED_AREA
133 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
135 #endif
137 #ifndef __ASSEMBLY__
140 * Conversion functions: convert a page and protection to a page entry,
141 * and a page entry and page directory to the page they refer to.
143 * mk_pte takes a (struct page *) as input
145 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
147 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
149 pte_t pte;
152 pte_val(pte) = (pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot);
153 return pte;
156 #define pte_modify(_pte, newprot) \
157 (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
159 #define pte_none(pte) ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0)
160 #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
162 /* pte_clear moved to later in this file */
164 #define pte_pfn(x) ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT)))
165 #define pte_page(x) pfn_to_page(pte_pfn(x))
167 #define pmd_set(pmdp, pmdval) (pmd_val(*(pmdp)) = (pmdval))
168 #define pmd_none(pmd) (!pmd_val(pmd))
169 #define pmd_bad(pmd) (pmd_val(pmd) == 0)
170 #define pmd_present(pmd) (pmd_val(pmd) != 0)
171 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0)
172 #define pmd_page_kernel(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS)
173 #define pmd_page(pmd) virt_to_page(pmd_page_kernel(pmd))
175 #define pud_set(pudp, pudval) (pud_val(*(pudp)) = (pudval))
176 #define pud_none(pud) (!pud_val(pud))
177 #define pud_bad(pud) ((pud_val(pud)) == 0)
178 #define pud_present(pud) (pud_val(pud) != 0)
179 #define pud_clear(pudp) (pud_val(*(pudp)) = 0)
180 #define pud_page(pud) (pud_val(pud) & ~PUD_MASKED_BITS)
182 #define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);})
185 * Find an entry in a page-table-directory. We combine the address region
186 * (the high order N bits) and the pgd portion of the address.
188 /* to avoid overflow in free_pgtables we don't use PTRS_PER_PGD here */
189 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & 0x1ff)
191 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
193 #define pmd_offset(pudp,addr) \
194 (((pmd_t *) pud_page(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
196 #define pte_offset_kernel(dir,addr) \
197 (((pte_t *) pmd_page_kernel(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
199 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
200 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
201 #define pte_unmap(pte) do { } while(0)
202 #define pte_unmap_nested(pte) do { } while(0)
204 /* to find an entry in a kernel page-table-directory */
205 /* This now only contains the vmalloc pages */
206 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
209 * The following only work if pte_present() is true.
210 * Undefined behaviour if not..
212 static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER;}
213 static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;}
214 static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC;}
215 static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;}
216 static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
217 static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
219 static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
220 static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }
222 static inline pte_t pte_rdprotect(pte_t pte) {
223 pte_val(pte) &= ~_PAGE_USER; return pte; }
224 static inline pte_t pte_exprotect(pte_t pte) {
225 pte_val(pte) &= ~_PAGE_EXEC; return pte; }
226 static inline pte_t pte_wrprotect(pte_t pte) {
227 pte_val(pte) &= ~(_PAGE_RW); return pte; }
228 static inline pte_t pte_mkclean(pte_t pte) {
229 pte_val(pte) &= ~(_PAGE_DIRTY); return pte; }
230 static inline pte_t pte_mkold(pte_t pte) {
231 pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
232 static inline pte_t pte_mkread(pte_t pte) {
233 pte_val(pte) |= _PAGE_USER; return pte; }
234 static inline pte_t pte_mkexec(pte_t pte) {
235 pte_val(pte) |= _PAGE_USER | _PAGE_EXEC; return pte; }
236 static inline pte_t pte_mkwrite(pte_t pte) {
237 pte_val(pte) |= _PAGE_RW; return pte; }
238 static inline pte_t pte_mkdirty(pte_t pte) {
239 pte_val(pte) |= _PAGE_DIRTY; return pte; }
240 static inline pte_t pte_mkyoung(pte_t pte) {
241 pte_val(pte) |= _PAGE_ACCESSED; return pte; }
242 static inline pte_t pte_mkhuge(pte_t pte) {
243 return pte; }
245 /* Atomic PTE updates */
246 static inline unsigned long pte_update(pte_t *p, unsigned long clr)
248 unsigned long old, tmp;
250 __asm__ __volatile__(
251 "1: ldarx %0,0,%3 # pte_update\n\
252 andi. %1,%0,%6\n\
253 bne- 1b \n\
254 andc %1,%0,%4 \n\
255 stdcx. %1,0,%3 \n\
256 bne- 1b"
257 : "=&r" (old), "=&r" (tmp), "=m" (*p)
258 : "r" (p), "r" (clr), "m" (*p), "i" (_PAGE_BUSY)
259 : "cc" );
260 return old;
263 /* PTE updating functions, this function puts the PTE in the
264 * batch, doesn't actually triggers the hash flush immediately,
265 * you need to call flush_tlb_pending() to do that.
266 * Pass -1 for "normal" size (4K or 64K)
268 extern void hpte_update(struct mm_struct *mm, unsigned long addr,
269 pte_t *ptep, unsigned long pte, int huge);
271 static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
272 unsigned long addr, pte_t *ptep)
274 unsigned long old;
276 if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
277 return 0;
278 old = pte_update(ptep, _PAGE_ACCESSED);
279 if (old & _PAGE_HASHPTE) {
280 hpte_update(mm, addr, ptep, old, 0);
281 flush_tlb_pending();
283 return (old & _PAGE_ACCESSED) != 0;
285 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
286 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \
287 ({ \
288 int __r; \
289 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
290 __r; \
294 * On RW/DIRTY bit transitions we can avoid flushing the hpte. For the
295 * moment we always flush but we need to fix hpte_update and test if the
296 * optimisation is worth it.
298 static inline int __ptep_test_and_clear_dirty(struct mm_struct *mm,
299 unsigned long addr, pte_t *ptep)
301 unsigned long old;
303 if ((pte_val(*ptep) & _PAGE_DIRTY) == 0)
304 return 0;
305 old = pte_update(ptep, _PAGE_DIRTY);
306 if (old & _PAGE_HASHPTE)
307 hpte_update(mm, addr, ptep, old, 0);
308 return (old & _PAGE_DIRTY) != 0;
310 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
311 #define ptep_test_and_clear_dirty(__vma, __addr, __ptep) \
312 ({ \
313 int __r; \
314 __r = __ptep_test_and_clear_dirty((__vma)->vm_mm, __addr, __ptep); \
315 __r; \
318 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
319 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
320 pte_t *ptep)
322 unsigned long old;
324 if ((pte_val(*ptep) & _PAGE_RW) == 0)
325 return;
326 old = pte_update(ptep, _PAGE_RW);
327 if (old & _PAGE_HASHPTE)
328 hpte_update(mm, addr, ptep, old, 0);
332 * We currently remove entries from the hashtable regardless of whether
333 * the entry was young or dirty. The generic routines only flush if the
334 * entry was young or dirty which is not good enough.
336 * We should be more intelligent about this but for the moment we override
337 * these functions and force a tlb flush unconditionally
339 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
340 #define ptep_clear_flush_young(__vma, __address, __ptep) \
341 ({ \
342 int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
343 __ptep); \
344 __young; \
347 #define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
348 #define ptep_clear_flush_dirty(__vma, __address, __ptep) \
349 ({ \
350 int __dirty = __ptep_test_and_clear_dirty((__vma)->vm_mm, __address, \
351 __ptep); \
352 flush_tlb_page(__vma, __address); \
353 __dirty; \
356 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
357 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
358 unsigned long addr, pte_t *ptep)
360 unsigned long old = pte_update(ptep, ~0UL);
362 if (old & _PAGE_HASHPTE)
363 hpte_update(mm, addr, ptep, old, 0);
364 return __pte(old);
367 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
368 pte_t * ptep)
370 unsigned long old = pte_update(ptep, ~0UL);
372 if (old & _PAGE_HASHPTE)
373 hpte_update(mm, addr, ptep, old, 0);
377 * set_pte stores a linux PTE into the linux page table.
379 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
380 pte_t *ptep, pte_t pte)
382 if (pte_present(*ptep)) {
383 pte_clear(mm, addr, ptep);
384 flush_tlb_pending();
386 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
388 #ifdef CONFIG_PPC_64K_PAGES
389 if (mmu_virtual_psize != MMU_PAGE_64K)
390 pte = __pte(pte_val(pte) | _PAGE_COMBO);
391 #endif /* CONFIG_PPC_64K_PAGES */
393 *ptep = pte;
396 /* Set the dirty and/or accessed bits atomically in a linux PTE, this
397 * function doesn't need to flush the hash entry
399 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
400 static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
402 unsigned long bits = pte_val(entry) &
403 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
404 unsigned long old, tmp;
406 __asm__ __volatile__(
407 "1: ldarx %0,0,%4\n\
408 andi. %1,%0,%6\n\
409 bne- 1b \n\
410 or %0,%3,%0\n\
411 stdcx. %0,0,%4\n\
412 bne- 1b"
413 :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
414 :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
415 :"cc");
417 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
418 do { \
419 __ptep_set_access_flags(__ptep, __entry, __dirty); \
420 flush_tlb_page_nohash(__vma, __address); \
421 } while(0)
424 * Macro to mark a page protection value as "uncacheable".
426 #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
428 struct file;
429 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
430 unsigned long size, pgprot_t vma_prot);
431 #define __HAVE_PHYS_MEM_ACCESS_PROT
433 #define __HAVE_ARCH_PTE_SAME
434 #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
436 #define pte_ERROR(e) \
437 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
438 #define pmd_ERROR(e) \
439 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
440 #define pgd_ERROR(e) \
441 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
443 extern pgd_t swapper_pg_dir[];
445 extern void paging_init(void);
447 #ifdef CONFIG_HUGETLB_PAGE
448 #define hugetlb_free_pgd_range(tlb, addr, end, floor, ceiling) \
449 free_pgd_range(tlb, addr, end, floor, ceiling)
450 #endif
453 * This gets called at the end of handling a page fault, when
454 * the kernel has put a new PTE into the page table for the process.
455 * We use it to put a corresponding HPTE into the hash table
456 * ahead of time, instead of waiting for the inevitable extra
457 * hash-table miss exception.
459 struct vm_area_struct;
460 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
462 /* Encode and de-code a swap entry */
463 #define __swp_type(entry) (((entry).val >> 1) & 0x3f)
464 #define __swp_offset(entry) ((entry).val >> 8)
465 #define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)})
466 #define __pte_to_swp_entry(pte) ((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT})
467 #define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_RPN_SHIFT })
468 #define pte_to_pgoff(pte) (pte_val(pte) >> PTE_RPN_SHIFT)
469 #define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
470 #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT)
473 * kern_addr_valid is intended to indicate whether an address is a valid
474 * kernel address. Most 32-bit archs define it as always true (like this)
475 * but most 64-bit archs actually perform a test. What should we do here?
476 * The only use is in fs/ncpfs/dir.c
478 #define kern_addr_valid(addr) (1)
480 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
481 remap_pfn_range(vma, vaddr, pfn, size, prot)
483 void pgtable_cache_init(void);
486 * find_linux_pte returns the address of a linux pte for a given
487 * effective address and directory. If not found, it returns zero.
488 */static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea)
490 pgd_t *pg;
491 pud_t *pu;
492 pmd_t *pm;
493 pte_t *pt = NULL;
495 pg = pgdir + pgd_index(ea);
496 if (!pgd_none(*pg)) {
497 pu = pud_offset(pg, ea);
498 if (!pud_none(*pu)) {
499 pm = pmd_offset(pu, ea);
500 if (pmd_present(*pm))
501 pt = pte_offset_kernel(pm, ea);
504 return pt;
507 #include <asm-generic/pgtable.h>
509 #endif /* __ASSEMBLY__ */
511 #endif /* _PPC64_PGTABLE_H */