2 * Copyright (c) 2006 QLogic, Inc. All rights reserved.
3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/spinlock.h>
35 #include <linux/idr.h>
36 #include <linux/pci.h>
37 #include <linux/delay.h>
38 #include <linux/netdevice.h>
39 #include <linux/vmalloc.h>
41 #include "ipath_kernel.h"
42 #include "ipath_verbs.h"
43 #include "ipath_common.h"
45 static void ipath_update_pio_bufs(struct ipath_devdata
*);
47 const char *ipath_get_unit_name(int unit
)
49 static char iname
[16];
50 snprintf(iname
, sizeof iname
, "infinipath%u", unit
);
54 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
55 #define PFX IPATH_DRV_NAME ": "
58 * The size has to be longer than this string, so we can append
59 * board/chip information to it in the init code.
61 const char ib_ipath_version
[] = IPATH_IDSTR
"\n";
63 static struct idr unit_table
;
64 DEFINE_SPINLOCK(ipath_devs_lock
);
65 LIST_HEAD(ipath_dev_list
);
67 wait_queue_head_t ipath_state_wait
;
69 unsigned ipath_debug
= __IPATH_INFO
;
71 module_param_named(debug
, ipath_debug
, uint
, S_IWUSR
| S_IRUGO
);
72 MODULE_PARM_DESC(debug
, "mask for debug prints");
73 EXPORT_SYMBOL_GPL(ipath_debug
);
75 MODULE_LICENSE("GPL");
76 MODULE_AUTHOR("QLogic <support@pathscale.com>");
77 MODULE_DESCRIPTION("QLogic InfiniPath driver");
79 const char *ipath_ibcstatus_str
[] = {
86 "LState6", /* unused */
87 "LState7", /* unused */
93 "LState0xD", /* unused */
99 * These variables are initialized in the chip-specific files
100 * but are defined here.
102 u16 ipath_gpio_sda_num
, ipath_gpio_scl_num
;
103 u64 ipath_gpio_sda
, ipath_gpio_scl
;
104 u64 infinipath_i_bitsextant
;
105 ipath_err_t infinipath_e_bitsextant
, infinipath_hwe_bitsextant
;
106 u32 infinipath_i_rcvavail_mask
, infinipath_i_rcvurg_mask
;
108 static void __devexit
ipath_remove_one(struct pci_dev
*);
109 static int __devinit
ipath_init_one(struct pci_dev
*,
110 const struct pci_device_id
*);
112 /* Only needed for registration, nothing else needs this info */
113 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
114 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
115 #define PCI_DEVICE_ID_INFINIPATH_PE800 0x10
117 static const struct pci_device_id ipath_pci_tbl
[] = {
118 { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE
, PCI_DEVICE_ID_INFINIPATH_HT
) },
119 { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE
, PCI_DEVICE_ID_INFINIPATH_PE800
) },
123 MODULE_DEVICE_TABLE(pci
, ipath_pci_tbl
);
125 static struct pci_driver ipath_driver
= {
126 .name
= IPATH_DRV_NAME
,
127 .probe
= ipath_init_one
,
128 .remove
= __devexit_p(ipath_remove_one
),
129 .id_table
= ipath_pci_tbl
,
133 static inline void read_bars(struct ipath_devdata
*dd
, struct pci_dev
*dev
,
134 u32
*bar0
, u32
*bar1
)
138 ret
= pci_read_config_dword(dev
, PCI_BASE_ADDRESS_0
, bar0
);
140 ipath_dev_err(dd
, "failed to read bar0 before enable: "
143 ret
= pci_read_config_dword(dev
, PCI_BASE_ADDRESS_1
, bar1
);
145 ipath_dev_err(dd
, "failed to read bar1 before enable: "
148 ipath_dbg("Read bar0 %x bar1 %x\n", *bar0
, *bar1
);
151 static void ipath_free_devdata(struct pci_dev
*pdev
,
152 struct ipath_devdata
*dd
)
156 pci_set_drvdata(pdev
, NULL
);
158 if (dd
->ipath_unit
!= -1) {
159 spin_lock_irqsave(&ipath_devs_lock
, flags
);
160 idr_remove(&unit_table
, dd
->ipath_unit
);
161 list_del(&dd
->ipath_list
);
162 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
167 static struct ipath_devdata
*ipath_alloc_devdata(struct pci_dev
*pdev
)
170 struct ipath_devdata
*dd
;
173 if (!idr_pre_get(&unit_table
, GFP_KERNEL
)) {
174 dd
= ERR_PTR(-ENOMEM
);
178 dd
= vmalloc(sizeof(*dd
));
180 dd
= ERR_PTR(-ENOMEM
);
183 memset(dd
, 0, sizeof(*dd
));
186 spin_lock_irqsave(&ipath_devs_lock
, flags
);
188 ret
= idr_get_new(&unit_table
, dd
, &dd
->ipath_unit
);
190 printk(KERN_ERR IPATH_DRV_NAME
191 ": Could not allocate unit ID: error %d\n", -ret
);
192 ipath_free_devdata(pdev
, dd
);
198 pci_set_drvdata(pdev
, dd
);
200 list_add(&dd
->ipath_list
, &ipath_dev_list
);
203 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
209 static inline struct ipath_devdata
*__ipath_lookup(int unit
)
211 return idr_find(&unit_table
, unit
);
214 struct ipath_devdata
*ipath_lookup(int unit
)
216 struct ipath_devdata
*dd
;
219 spin_lock_irqsave(&ipath_devs_lock
, flags
);
220 dd
= __ipath_lookup(unit
);
221 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
226 int ipath_count_units(int *npresentp
, int *nupp
, u32
*maxportsp
)
228 int nunits
, npresent
, nup
;
229 struct ipath_devdata
*dd
;
233 nunits
= npresent
= nup
= maxports
= 0;
235 spin_lock_irqsave(&ipath_devs_lock
, flags
);
237 list_for_each_entry(dd
, &ipath_dev_list
, ipath_list
) {
239 if ((dd
->ipath_flags
& IPATH_PRESENT
) && dd
->ipath_kregbase
)
242 !(dd
->ipath_flags
& (IPATH_DISABLED
| IPATH_LINKDOWN
245 if (dd
->ipath_cfgports
> maxports
)
246 maxports
= dd
->ipath_cfgports
;
249 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
252 *npresentp
= npresent
;
256 *maxportsp
= maxports
;
262 * These next two routines are placeholders in case we don't have per-arch
263 * code for controlling write combining. If explicit control of write
264 * combining is not available, performance will probably be awful.
267 int __attribute__((weak
)) ipath_enable_wc(struct ipath_devdata
*dd
)
272 void __attribute__((weak
)) ipath_disable_wc(struct ipath_devdata
*dd
)
276 static int __devinit
ipath_init_one(struct pci_dev
*pdev
,
277 const struct pci_device_id
*ent
)
280 struct ipath_devdata
*dd
;
281 unsigned long long addr
;
282 u32 bar0
= 0, bar1
= 0;
285 dd
= ipath_alloc_devdata(pdev
);
288 printk(KERN_ERR IPATH_DRV_NAME
289 ": Could not allocate devdata: error %d\n", -ret
);
293 ipath_cdbg(VERBOSE
, "initializing unit #%u\n", dd
->ipath_unit
);
295 read_bars(dd
, pdev
, &bar0
, &bar1
);
297 ret
= pci_enable_device(pdev
);
299 /* This can happen iff:
301 * We did a chip reset, and then failed to reprogram the
302 * BAR, or the chip reset due to an internal error. We then
303 * unloaded the driver and reloaded it.
305 * Both reset cases set the BAR back to initial state. For
306 * the latter case, the AER sticky error bit at offset 0x718
307 * should be set, but the Linux kernel doesn't yet know
308 * about that, it appears. If the original BAR was retained
309 * in the kernel data structures, this may be OK.
311 ipath_dev_err(dd
, "enable unit %d failed: error %d\n",
312 dd
->ipath_unit
, -ret
);
315 addr
= pci_resource_start(pdev
, 0);
316 len
= pci_resource_len(pdev
, 0);
317 ipath_cdbg(VERBOSE
, "regbase (0) %llx len %d irq %x, vend %x/%x "
318 "driver_data %lx\n", addr
, len
, pdev
->irq
, ent
->vendor
,
319 ent
->device
, ent
->driver_data
);
321 read_bars(dd
, pdev
, &bar0
, &bar1
);
323 if (!bar1
&& !(bar0
& ~0xf)) {
325 dev_info(&pdev
->dev
, "BAR is 0 (probable RESET), "
326 "rewriting as %llx\n", addr
);
327 ret
= pci_write_config_dword(
328 pdev
, PCI_BASE_ADDRESS_0
, addr
);
330 ipath_dev_err(dd
, "rewrite of BAR0 "
331 "failed: err %d\n", -ret
);
334 ret
= pci_write_config_dword(
335 pdev
, PCI_BASE_ADDRESS_1
, addr
>> 32);
337 ipath_dev_err(dd
, "rewrite of BAR1 "
338 "failed: err %d\n", -ret
);
342 ipath_dev_err(dd
, "BAR is 0 (probable RESET), "
343 "not usable until reboot\n");
349 ret
= pci_request_regions(pdev
, IPATH_DRV_NAME
);
351 dev_info(&pdev
->dev
, "pci_request_regions unit %u fails: "
352 "err %d\n", dd
->ipath_unit
, -ret
);
356 ret
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
359 * if the 64 bit setup fails, try 32 bit. Some systems
360 * do not setup 64 bit maps on systems with 2GB or less
363 ret
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
366 "Unable to set DMA mask for unit %u: %d\n",
367 dd
->ipath_unit
, ret
);
371 ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
372 ret
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
375 "Unable to set DMA consistent mask "
377 dd
->ipath_unit
, ret
);
382 ret
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
385 "Unable to set DMA consistent mask "
387 dd
->ipath_unit
, ret
);
390 pci_set_master(pdev
);
393 * Save BARs to rewrite after device reset. Save all 64 bits of
396 dd
->ipath_pcibar0
= addr
;
397 dd
->ipath_pcibar1
= addr
>> 32;
398 dd
->ipath_deviceid
= ent
->device
; /* save for later use */
399 dd
->ipath_vendorid
= ent
->vendor
;
401 /* setup the chip-specific functions, as early as possible. */
402 switch (ent
->device
) {
403 case PCI_DEVICE_ID_INFINIPATH_HT
:
404 ipath_init_ht400_funcs(dd
);
406 case PCI_DEVICE_ID_INFINIPATH_PE800
:
407 ipath_init_pe800_funcs(dd
);
410 ipath_dev_err(dd
, "Found unknown QLogic deviceid 0x%x, "
411 "failing\n", ent
->device
);
415 for (j
= 0; j
< 6; j
++) {
416 if (!pdev
->resource
[j
].start
)
418 ipath_cdbg(VERBOSE
, "BAR %d start %llx, end %llx, len %llx\n",
419 j
, (unsigned long long)pdev
->resource
[j
].start
,
420 (unsigned long long)pdev
->resource
[j
].end
,
421 (unsigned long long)pci_resource_len(pdev
, j
));
425 ipath_dev_err(dd
, "No valid address in BAR 0!\n");
430 dd
->ipath_deviceid
= ent
->device
; /* save for later use */
431 dd
->ipath_vendorid
= ent
->vendor
;
433 ret
= pci_read_config_byte(pdev
, PCI_REVISION_ID
, &rev
);
435 ipath_dev_err(dd
, "Failed to read PCI revision ID unit "
436 "%u: err %d\n", dd
->ipath_unit
, -ret
);
437 goto bail_regions
; /* shouldn't ever happen */
439 dd
->ipath_pcirev
= rev
;
441 #if defined(__powerpc__)
442 /* There isn't a generic way to specify writethrough mappings */
443 dd
->ipath_kregbase
= __ioremap(addr
, len
,
444 (_PAGE_NO_CACHE
|_PAGE_WRITETHRU
));
446 dd
->ipath_kregbase
= ioremap_nocache(addr
, len
);
449 if (!dd
->ipath_kregbase
) {
450 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
455 dd
->ipath_kregend
= (u64 __iomem
*)
456 ((void __iomem
*)dd
->ipath_kregbase
+ len
);
457 dd
->ipath_physaddr
= addr
; /* used for io_remap, etc. */
459 ipath_cdbg(VERBOSE
, "mapped io addr %llx to kregbase %p\n",
460 addr
, dd
->ipath_kregbase
);
463 * clear ipath_flags here instead of in ipath_init_chip as it is set
464 * by ipath_setup_htconfig.
467 dd
->ipath_lli_counter
= 0;
468 dd
->ipath_lli_errors
= 0;
470 if (dd
->ipath_f_bus(dd
, pdev
))
471 ipath_dev_err(dd
, "Failed to setup config space; "
472 "continuing anyway\n");
475 * set up our interrupt handler; IRQF_SHARED probably not needed,
476 * since MSI interrupts shouldn't be shared but won't hurt for now.
477 * check 0 irq after we return from chip-specific bus setup, since
478 * that can affect this due to setup
481 ipath_dev_err(dd
, "irq is 0, BIOS error? Interrupts won't "
484 ret
= request_irq(pdev
->irq
, ipath_intr
, IRQF_SHARED
,
487 ipath_dev_err(dd
, "Couldn't setup irq handler, "
488 "irq=%u: %d\n", pdev
->irq
, ret
);
493 ret
= ipath_init_chip(dd
, 0); /* do the chip-specific init */
497 ret
= ipath_enable_wc(dd
);
500 ipath_dev_err(dd
, "Write combining not enabled "
501 "(err %d): performance may be poor\n",
506 ipath_device_create_group(&pdev
->dev
, dd
);
507 ipathfs_add_device(dd
);
510 ipath_register_ib_device(dd
);
515 iounmap((volatile void __iomem
*) dd
->ipath_kregbase
);
518 pci_release_regions(pdev
);
521 pci_disable_device(pdev
);
524 ipath_free_devdata(pdev
, dd
);
530 static void __devexit
ipath_remove_one(struct pci_dev
*pdev
)
532 struct ipath_devdata
*dd
;
534 ipath_cdbg(VERBOSE
, "removing, pdev=%p\n", pdev
);
538 dd
= pci_get_drvdata(pdev
);
539 ipath_unregister_ib_device(dd
->verbs_dev
);
540 ipath_diag_remove(dd
);
541 ipath_user_remove(dd
);
542 ipathfs_remove_device(dd
);
543 ipath_device_remove_group(&pdev
->dev
, dd
);
544 ipath_cdbg(VERBOSE
, "Releasing pci memory regions, dd %p, "
545 "unit %u\n", dd
, (u32
) dd
->ipath_unit
);
546 if (dd
->ipath_kregbase
) {
547 ipath_cdbg(VERBOSE
, "Unmapping kregbase %p\n",
549 iounmap((volatile void __iomem
*) dd
->ipath_kregbase
);
550 dd
->ipath_kregbase
= NULL
;
552 pci_release_regions(pdev
);
553 ipath_cdbg(VERBOSE
, "calling pci_disable_device\n");
554 pci_disable_device(pdev
);
556 ipath_free_devdata(pdev
, dd
);
559 /* general driver use */
560 DEFINE_MUTEX(ipath_mutex
);
562 static DEFINE_SPINLOCK(ipath_pioavail_lock
);
565 * ipath_disarm_piobufs - cancel a range of PIO buffers
566 * @dd: the infinipath device
567 * @first: the first PIO buffer to cancel
568 * @cnt: the number of PIO buffers to cancel
570 * cancel a range of PIO buffers, used when they might be armed, but
571 * not triggered. Used at init to ensure buffer state, and also user
572 * process close, in case it died while writing to a PIO buffer
575 void ipath_disarm_piobufs(struct ipath_devdata
*dd
, unsigned first
,
578 unsigned i
, last
= first
+ cnt
;
579 u64 sendctrl
, sendorig
;
581 ipath_cdbg(PKT
, "disarm %u PIObufs first=%u\n", cnt
, first
);
582 sendorig
= dd
->ipath_sendctrl
| INFINIPATH_S_DISARM
;
583 for (i
= first
; i
< last
; i
++) {
584 sendctrl
= sendorig
|
585 (i
<< INFINIPATH_S_DISARMPIOBUF_SHIFT
);
586 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
591 * Write it again with current value, in case ipath_sendctrl changed
592 * while we were looping; no critical bits that would require
595 * Write a 0, and then the original value, reading scratch in
596 * between. This seems to avoid a chip timing race that causes
597 * pioavail updates to memory to stop.
599 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
601 sendorig
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
602 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
607 * ipath_wait_linkstate - wait for an IB link state change to occur
608 * @dd: the infinipath device
609 * @state: the state to wait for
610 * @msecs: the number of milliseconds to wait
612 * wait up to msecs milliseconds for IB link state change to occur for
613 * now, take the easy polling route. Currently used only by
614 * ipath_set_linkstate. Returns 0 if state reached, otherwise
615 * -ETIMEDOUT state can have multiple states set, for any of several
618 static int ipath_wait_linkstate(struct ipath_devdata
*dd
, u32 state
,
621 dd
->ipath_state_wanted
= state
;
622 wait_event_interruptible_timeout(ipath_state_wait
,
623 (dd
->ipath_flags
& state
),
624 msecs_to_jiffies(msecs
));
625 dd
->ipath_state_wanted
= 0;
627 if (!(dd
->ipath_flags
& state
)) {
629 ipath_cdbg(VERBOSE
, "Didn't reach linkstate %s within %u"
631 /* test INIT ahead of DOWN, both can be set */
632 (state
& IPATH_LINKINIT
) ? "INIT" :
633 ((state
& IPATH_LINKDOWN
) ? "DOWN" :
634 ((state
& IPATH_LINKARMED
) ? "ARM" : "ACTIVE")),
636 val
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_ibcstatus
);
637 ipath_cdbg(VERBOSE
, "ibcc=%llx ibcstatus=%llx (%s)\n",
638 (unsigned long long) ipath_read_kreg64(
639 dd
, dd
->ipath_kregs
->kr_ibcctrl
),
640 (unsigned long long) val
,
641 ipath_ibcstatus_str
[val
& 0xf]);
643 return (dd
->ipath_flags
& state
) ? 0 : -ETIMEDOUT
;
646 void ipath_decode_err(char *buf
, size_t blen
, ipath_err_t err
)
649 if (err
& INFINIPATH_E_RHDRLEN
)
650 strlcat(buf
, "rhdrlen ", blen
);
651 if (err
& INFINIPATH_E_RBADTID
)
652 strlcat(buf
, "rbadtid ", blen
);
653 if (err
& INFINIPATH_E_RBADVERSION
)
654 strlcat(buf
, "rbadversion ", blen
);
655 if (err
& INFINIPATH_E_RHDR
)
656 strlcat(buf
, "rhdr ", blen
);
657 if (err
& INFINIPATH_E_RLONGPKTLEN
)
658 strlcat(buf
, "rlongpktlen ", blen
);
659 if (err
& INFINIPATH_E_RSHORTPKTLEN
)
660 strlcat(buf
, "rshortpktlen ", blen
);
661 if (err
& INFINIPATH_E_RMAXPKTLEN
)
662 strlcat(buf
, "rmaxpktlen ", blen
);
663 if (err
& INFINIPATH_E_RMINPKTLEN
)
664 strlcat(buf
, "rminpktlen ", blen
);
665 if (err
& INFINIPATH_E_RFORMATERR
)
666 strlcat(buf
, "rformaterr ", blen
);
667 if (err
& INFINIPATH_E_RUNSUPVL
)
668 strlcat(buf
, "runsupvl ", blen
);
669 if (err
& INFINIPATH_E_RUNEXPCHAR
)
670 strlcat(buf
, "runexpchar ", blen
);
671 if (err
& INFINIPATH_E_RIBFLOW
)
672 strlcat(buf
, "ribflow ", blen
);
673 if (err
& INFINIPATH_E_REBP
)
674 strlcat(buf
, "EBP ", blen
);
675 if (err
& INFINIPATH_E_SUNDERRUN
)
676 strlcat(buf
, "sunderrun ", blen
);
677 if (err
& INFINIPATH_E_SPIOARMLAUNCH
)
678 strlcat(buf
, "spioarmlaunch ", blen
);
679 if (err
& INFINIPATH_E_SUNEXPERRPKTNUM
)
680 strlcat(buf
, "sunexperrpktnum ", blen
);
681 if (err
& INFINIPATH_E_SDROPPEDDATAPKT
)
682 strlcat(buf
, "sdroppeddatapkt ", blen
);
683 if (err
& INFINIPATH_E_SDROPPEDSMPPKT
)
684 strlcat(buf
, "sdroppedsmppkt ", blen
);
685 if (err
& INFINIPATH_E_SMAXPKTLEN
)
686 strlcat(buf
, "smaxpktlen ", blen
);
687 if (err
& INFINIPATH_E_SMINPKTLEN
)
688 strlcat(buf
, "sminpktlen ", blen
);
689 if (err
& INFINIPATH_E_SUNSUPVL
)
690 strlcat(buf
, "sunsupVL ", blen
);
691 if (err
& INFINIPATH_E_SPKTLEN
)
692 strlcat(buf
, "spktlen ", blen
);
693 if (err
& INFINIPATH_E_INVALIDADDR
)
694 strlcat(buf
, "invalidaddr ", blen
);
695 if (err
& INFINIPATH_E_RICRC
)
696 strlcat(buf
, "CRC ", blen
);
697 if (err
& INFINIPATH_E_RVCRC
)
698 strlcat(buf
, "VCRC ", blen
);
699 if (err
& INFINIPATH_E_RRCVEGRFULL
)
700 strlcat(buf
, "rcvegrfull ", blen
);
701 if (err
& INFINIPATH_E_RRCVHDRFULL
)
702 strlcat(buf
, "rcvhdrfull ", blen
);
703 if (err
& INFINIPATH_E_IBSTATUSCHANGED
)
704 strlcat(buf
, "ibcstatuschg ", blen
);
705 if (err
& INFINIPATH_E_RIBLOSTLINK
)
706 strlcat(buf
, "riblostlink ", blen
);
707 if (err
& INFINIPATH_E_HARDWARE
)
708 strlcat(buf
, "hardware ", blen
);
709 if (err
& INFINIPATH_E_RESET
)
710 strlcat(buf
, "reset ", blen
);
714 * get_rhf_errstring - decode RHF errors
715 * @err: the err number
716 * @msg: the output buffer
717 * @len: the length of the output buffer
719 * only used one place now, may want more later
721 static void get_rhf_errstring(u32 err
, char *msg
, size_t len
)
723 /* if no errors, and so don't need to check what's first */
726 if (err
& INFINIPATH_RHF_H_ICRCERR
)
727 strlcat(msg
, "icrcerr ", len
);
728 if (err
& INFINIPATH_RHF_H_VCRCERR
)
729 strlcat(msg
, "vcrcerr ", len
);
730 if (err
& INFINIPATH_RHF_H_PARITYERR
)
731 strlcat(msg
, "parityerr ", len
);
732 if (err
& INFINIPATH_RHF_H_LENERR
)
733 strlcat(msg
, "lenerr ", len
);
734 if (err
& INFINIPATH_RHF_H_MTUERR
)
735 strlcat(msg
, "mtuerr ", len
);
736 if (err
& INFINIPATH_RHF_H_IHDRERR
)
737 /* infinipath hdr checksum error */
738 strlcat(msg
, "ipathhdrerr ", len
);
739 if (err
& INFINIPATH_RHF_H_TIDERR
)
740 strlcat(msg
, "tiderr ", len
);
741 if (err
& INFINIPATH_RHF_H_MKERR
)
742 /* bad port, offset, etc. */
743 strlcat(msg
, "invalid ipathhdr ", len
);
744 if (err
& INFINIPATH_RHF_H_IBERR
)
745 strlcat(msg
, "iberr ", len
);
746 if (err
& INFINIPATH_RHF_L_SWA
)
747 strlcat(msg
, "swA ", len
);
748 if (err
& INFINIPATH_RHF_L_SWB
)
749 strlcat(msg
, "swB ", len
);
753 * ipath_get_egrbuf - get an eager buffer
754 * @dd: the infinipath device
755 * @bufnum: the eager buffer to get
758 * must only be called if ipath_pd[port] is known to be allocated
760 static inline void *ipath_get_egrbuf(struct ipath_devdata
*dd
, u32 bufnum
,
763 return dd
->ipath_port0_skbs
?
764 (void *)dd
->ipath_port0_skbs
[bufnum
]->data
: NULL
;
768 * ipath_alloc_skb - allocate an skb and buffer with possible constraints
769 * @dd: the infinipath device
770 * @gfp_mask: the sk_buff SFP mask
772 struct sk_buff
*ipath_alloc_skb(struct ipath_devdata
*dd
,
779 * Only fully supported way to handle this is to allocate lots
780 * extra, align as needed, and then do skb_reserve(). That wastes
781 * a lot of memory... I'll have to hack this into infinipath_copy
786 * We need 4 extra bytes for unaligned transfer copying
788 if (dd
->ipath_flags
& IPATH_4BYTE_TID
) {
789 /* we need a 4KB multiple alignment, and there is no way
790 * to do it except to allocate extra and then skb_reserve
791 * enough to bring it up to the right alignment.
793 len
= dd
->ipath_ibmaxlen
+ 4 + (1 << 11) - 1;
796 len
= dd
->ipath_ibmaxlen
+ 4;
797 skb
= __dev_alloc_skb(len
, gfp_mask
);
799 ipath_dev_err(dd
, "Failed to allocate skbuff, length %u\n",
803 if (dd
->ipath_flags
& IPATH_4BYTE_TID
) {
804 u32 una
= ((1 << 11) - 1) & (unsigned long)(skb
->data
+ 4);
806 skb_reserve(skb
, 4 + (1 << 11) - una
);
816 static void ipath_rcv_hdrerr(struct ipath_devdata
*dd
,
823 struct ipath_message_header
*hdr
;
825 get_rhf_errstring(eflags
, emsg
, sizeof emsg
);
826 hdr
= (struct ipath_message_header
*)&rc
[1];
827 ipath_cdbg(PKT
, "RHFerrs %x hdrqtail=%x typ=%u "
828 "tlen=%x opcode=%x egridx=%x: %s\n",
830 ipath_hdrget_rcv_type((__le32
*) rc
),
831 ipath_hdrget_length_in_bytes((__le32
*) rc
),
832 be32_to_cpu(hdr
->bth
[0]) >> 24,
835 /* Count local link integrity errors. */
836 if (eflags
& (INFINIPATH_RHF_H_ICRCERR
| INFINIPATH_RHF_H_VCRCERR
)) {
837 u8 n
= (dd
->ipath_ibcctrl
>>
838 INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT
) &
839 INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK
;
841 if (++dd
->ipath_lli_counter
> n
) {
842 dd
->ipath_lli_counter
= 0;
843 dd
->ipath_lli_errors
++;
849 * ipath_kreceive - receive a packet
850 * @dd: the infinipath device
852 * called from interrupt handler for errors or receive interrupt
854 void ipath_kreceive(struct ipath_devdata
*dd
)
858 const u32 rsize
= dd
->ipath_rcvhdrentsize
; /* words */
859 const u32 maxcnt
= dd
->ipath_rcvhdrcnt
* rsize
; /* words */
860 u32 etail
= -1, l
, hdrqtail
;
861 struct ipath_message_header
*hdr
;
862 u32 eflags
, i
, etype
, tlen
, pkttot
= 0, updegr
=0, reloop
=0;
863 static u64 totcalls
; /* stats, may eventually remove */
865 if (!dd
->ipath_hdrqtailptr
) {
867 "hdrqtailptr not set, can't do receives\n");
871 /* There is already a thread processing this queue. */
872 if (test_and_set_bit(0, &dd
->ipath_rcv_pending
))
875 l
= dd
->ipath_port0head
;
876 hdrqtail
= (u32
) le64_to_cpu(*dd
->ipath_hdrqtailptr
);
881 for (i
= 0; l
!= hdrqtail
; i
++) {
885 rc
= (u64
*) (dd
->ipath_pd
[0]->port_rcvhdrq
+ (l
<< 2));
886 hdr
= (struct ipath_message_header
*)&rc
[1];
888 * could make a network order version of IPATH_KD_QP, and
889 * do the obvious shift before masking to speed this up.
891 qp
= ntohl(hdr
->bth
[1]) & 0xffffff;
892 bthbytes
= (u8
*) hdr
->bth
;
894 eflags
= ipath_hdrget_err_flags((__le32
*) rc
);
895 etype
= ipath_hdrget_rcv_type((__le32
*) rc
);
897 tlen
= ipath_hdrget_length_in_bytes((__le32
*) rc
);
899 if (etype
!= RCVHQ_RCV_TYPE_EXPECTED
) {
901 * it turns out that the chips uses an eager buffer
902 * for all non-expected packets, whether it "needs"
903 * one or not. So always get the index, but don't
904 * set ebuf (so we try to copy data) unless the
905 * length requires it.
907 etail
= ipath_hdrget_index((__le32
*) rc
);
908 if (tlen
> sizeof(*hdr
) ||
909 etype
== RCVHQ_RCV_TYPE_NON_KD
)
910 ebuf
= ipath_get_egrbuf(dd
, etail
, 0);
914 * both tiderr and ipathhdrerr are set for all plain IB
915 * packets; only ipathhdrerr should be set.
918 if (etype
!= RCVHQ_RCV_TYPE_NON_KD
&& etype
!=
919 RCVHQ_RCV_TYPE_ERROR
&& ipath_hdrget_ipath_ver(
920 hdr
->iph
.ver_port_tid_offset
) !=
922 ipath_cdbg(PKT
, "Bad InfiniPath protocol version "
926 if (unlikely(eflags
))
927 ipath_rcv_hdrerr(dd
, eflags
, l
, etail
, rc
);
928 else if (etype
== RCVHQ_RCV_TYPE_NON_KD
) {
929 ipath_ib_rcv(dd
->verbs_dev
, rc
+ 1, ebuf
, tlen
);
930 if (dd
->ipath_lli_counter
)
931 dd
->ipath_lli_counter
--;
932 ipath_cdbg(PKT
, "typ %x, opcode %x (eager, "
933 "qp=%x), len %x; ignored\n",
934 etype
, bthbytes
[0], qp
, tlen
);
936 else if (etype
== RCVHQ_RCV_TYPE_EAGER
)
937 ipath_cdbg(PKT
, "typ %x, opcode %x (eager, "
938 "qp=%x), len %x; ignored\n",
939 etype
, bthbytes
[0], qp
, tlen
);
940 else if (etype
== RCVHQ_RCV_TYPE_EXPECTED
)
941 ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
942 be32_to_cpu(hdr
->bth
[0]) & 0xff);
945 * error packet, type of error unknown.
946 * Probably type 3, but we don't know, so don't
947 * even try to print the opcode, etc.
949 ipath_dbg("Error Pkt, but no eflags! egrbuf %x, "
950 "len %x\nhdrq@%lx;hdrq+%x rhf: %llx; "
951 "hdr %llx %llx %llx %llx %llx\n",
952 etail
, tlen
, (unsigned long) rc
, l
,
953 (unsigned long long) rc
[0],
954 (unsigned long long) rc
[1],
955 (unsigned long long) rc
[2],
956 (unsigned long long) rc
[3],
957 (unsigned long long) rc
[4],
958 (unsigned long long) rc
[5]);
963 if (etype
!= RCVHQ_RCV_TYPE_EXPECTED
)
966 * update head regs on last packet, and every 16 packets.
967 * Reduce bus traffic, while still trying to prevent
968 * rcvhdrq overflows, for when the queue is nearly full
970 if (l
== hdrqtail
|| (i
&& !(i
&0xf))) {
972 if (l
== hdrqtail
) /* PE-800 interrupt only on last */
973 lval
= dd
->ipath_rhdrhead_intr_off
| l
;
976 (void)ipath_write_ureg(dd
, ur_rcvhdrhead
, lval
, 0);
978 (void)ipath_write_ureg(dd
, ur_rcvegrindexhead
,
985 if (!dd
->ipath_rhdrhead_intr_off
&& !reloop
) {
986 /* HT-400 workaround; we can have a race clearing chip
987 * interrupt with another interrupt about to be delivered,
988 * and can clear it before it is delivered on the GPIO
989 * workaround. By doing the extra check here for the
990 * in-memory tail register updating while we were doing
991 * earlier packets, we "almost" guarantee we have covered
994 u32 hqtail
= (u32
)le64_to_cpu(*dd
->ipath_hdrqtailptr
);
995 if (hqtail
!= hdrqtail
) {
997 reloop
= 1; /* loop 1 extra time at most */
1004 dd
->ipath_port0head
= l
;
1006 if (pkttot
> ipath_stats
.sps_maxpkts_call
)
1007 ipath_stats
.sps_maxpkts_call
= pkttot
;
1008 ipath_stats
.sps_port0pkts
+= pkttot
;
1009 ipath_stats
.sps_avgpkts_call
=
1010 ipath_stats
.sps_port0pkts
/ ++totcalls
;
1013 clear_bit(0, &dd
->ipath_rcv_pending
);
1014 smp_mb__after_clear_bit();
1020 * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1021 * @dd: the infinipath device
1023 * called whenever our local copy indicates we have run out of send buffers
1024 * NOTE: This can be called from interrupt context by some code
1025 * and from non-interrupt context by ipath_getpiobuf().
1028 static void ipath_update_pio_bufs(struct ipath_devdata
*dd
)
1030 unsigned long flags
;
1032 const unsigned piobregs
= (unsigned)dd
->ipath_pioavregs
;
1034 /* If the generation (check) bits have changed, then we update the
1035 * busy bit for the corresponding PIO buffer. This algorithm will
1036 * modify positions to the value they already have in some cases
1037 * (i.e., no change), but it's faster than changing only the bits
1038 * that have changed.
1040 * We would like to do this atomicly, to avoid spinlocks in the
1041 * critical send path, but that's not really possible, given the
1042 * type of changes, and that this routine could be called on
1043 * multiple cpu's simultaneously, so we lock in this routine only,
1044 * to avoid conflicting updates; all we change is the shadow, and
1045 * it's a single 64 bit memory location, so by definition the update
1046 * is atomic in terms of what other cpu's can see in testing the
1047 * bits. The spin_lock overhead isn't too bad, since it only
1048 * happens when all buffers are in use, so only cpu overhead, not
1049 * latency or bandwidth is affected.
1051 #define _IPATH_ALL_CHECKBITS 0x5555555555555555ULL
1052 if (!dd
->ipath_pioavailregs_dma
) {
1053 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1056 if (ipath_debug
& __IPATH_VERBDBG
) {
1057 /* only if packet debug and verbose */
1058 volatile __le64
*dma
= dd
->ipath_pioavailregs_dma
;
1059 unsigned long *shadow
= dd
->ipath_pioavailshadow
;
1061 ipath_cdbg(PKT
, "Refill avail, dma0=%llx shad0=%lx, "
1062 "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1064 (unsigned long long) le64_to_cpu(dma
[0]),
1066 (unsigned long long) le64_to_cpu(dma
[1]),
1068 (unsigned long long) le64_to_cpu(dma
[2]),
1070 (unsigned long long) le64_to_cpu(dma
[3]),
1074 PKT
, "2nd group, dma4=%llx shad4=%lx, "
1075 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1077 (unsigned long long) le64_to_cpu(dma
[4]),
1079 (unsigned long long) le64_to_cpu(dma
[5]),
1081 (unsigned long long) le64_to_cpu(dma
[6]),
1083 (unsigned long long) le64_to_cpu(dma
[7]),
1086 spin_lock_irqsave(&ipath_pioavail_lock
, flags
);
1087 for (i
= 0; i
< piobregs
; i
++) {
1088 u64 pchbusy
, pchg
, piov
, pnew
;
1090 * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1095 dd
->ipath_pioavailregs_dma
[i
- 1]);
1098 dd
->ipath_pioavailregs_dma
[i
+ 1]);
1100 piov
= le64_to_cpu(dd
->ipath_pioavailregs_dma
[i
]);
1101 pchg
= _IPATH_ALL_CHECKBITS
&
1102 ~(dd
->ipath_pioavailshadow
[i
] ^ piov
);
1103 pchbusy
= pchg
<< INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT
;
1104 if (pchg
&& (pchbusy
& dd
->ipath_pioavailshadow
[i
])) {
1105 pnew
= dd
->ipath_pioavailshadow
[i
] & ~pchbusy
;
1106 pnew
|= piov
& pchbusy
;
1107 dd
->ipath_pioavailshadow
[i
] = pnew
;
1110 spin_unlock_irqrestore(&ipath_pioavail_lock
, flags
);
1114 * ipath_setrcvhdrsize - set the receive header size
1115 * @dd: the infinipath device
1116 * @rhdrsize: the receive header size
1118 * called from user init code, and also layered driver init
1120 int ipath_setrcvhdrsize(struct ipath_devdata
*dd
, unsigned rhdrsize
)
1124 if (dd
->ipath_flags
& IPATH_RCVHDRSZ_SET
) {
1125 if (dd
->ipath_rcvhdrsize
!= rhdrsize
) {
1126 dev_info(&dd
->pcidev
->dev
,
1127 "Error: can't set protocol header "
1128 "size %u, already %u\n",
1129 rhdrsize
, dd
->ipath_rcvhdrsize
);
1132 ipath_cdbg(VERBOSE
, "Reuse same protocol header "
1133 "size %u\n", dd
->ipath_rcvhdrsize
);
1134 } else if (rhdrsize
> (dd
->ipath_rcvhdrentsize
-
1135 (sizeof(u64
) / sizeof(u32
)))) {
1136 ipath_dbg("Error: can't set protocol header size %u "
1137 "(> max %u)\n", rhdrsize
,
1138 dd
->ipath_rcvhdrentsize
-
1139 (u32
) (sizeof(u64
) / sizeof(u32
)));
1142 dd
->ipath_flags
|= IPATH_RCVHDRSZ_SET
;
1143 dd
->ipath_rcvhdrsize
= rhdrsize
;
1144 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_rcvhdrsize
,
1145 dd
->ipath_rcvhdrsize
);
1146 ipath_cdbg(VERBOSE
, "Set protocol header size to %u\n",
1147 dd
->ipath_rcvhdrsize
);
1153 * ipath_getpiobuf - find an available pio buffer
1154 * @dd: the infinipath device
1155 * @pbufnum: the buffer number is placed here
1157 * do appropriate marking as busy, etc.
1158 * returns buffer number if one found (>=0), negative number is error.
1159 * Used by ipath_layer_send
1161 u32 __iomem
*ipath_getpiobuf(struct ipath_devdata
*dd
, u32
* pbufnum
)
1163 int i
, j
, starti
, updated
= 0;
1164 unsigned piobcnt
, iter
;
1165 unsigned long flags
;
1166 unsigned long *shadow
= dd
->ipath_pioavailshadow
;
1169 piobcnt
= (unsigned)(dd
->ipath_piobcnt2k
1170 + dd
->ipath_piobcnt4k
);
1171 starti
= dd
->ipath_lastport_piobuf
;
1172 iter
= piobcnt
- starti
;
1173 if (dd
->ipath_upd_pio_shadow
) {
1175 * Minor optimization. If we had no buffers on last call,
1176 * start out by doing the update; continue and do scan even
1177 * if no buffers were updated, to be paranoid
1179 ipath_update_pio_bufs(dd
);
1180 /* we scanned here, don't do it at end of scan */
1184 i
= dd
->ipath_lastpioindex
;
1188 * while test_and_set_bit() is atomic, we do that and then the
1189 * change_bit(), and the pair is not. See if this is the cause
1190 * of the remaining armlaunch errors.
1192 spin_lock_irqsave(&ipath_pioavail_lock
, flags
);
1193 for (j
= 0; j
< iter
; j
++, i
++) {
1197 * To avoid bus lock overhead, we first find a candidate
1198 * buffer, then do the test and set, and continue if that
1201 if (test_bit((2 * i
) + 1, shadow
) ||
1202 test_and_set_bit((2 * i
) + 1, shadow
))
1204 /* flip generation bit */
1205 change_bit(2 * i
, shadow
);
1208 spin_unlock_irqrestore(&ipath_pioavail_lock
, flags
);
1211 volatile __le64
*dma
= dd
->ipath_pioavailregs_dma
;
1214 * first time through; shadow exhausted, but may be real
1215 * buffers available, so go see; if any updated, rescan
1219 ipath_update_pio_bufs(dd
);
1224 dd
->ipath_upd_pio_shadow
= 1;
1226 * not atomic, but if we lose one once in a while, that's OK
1228 ipath_stats
.sps_nopiobufs
++;
1229 if (!(++dd
->ipath_consec_nopiobuf
% 100000)) {
1231 "%u pio sends with no bufavail; dmacopy: "
1232 "%llx %llx %llx %llx; shadow: "
1233 "%lx %lx %lx %lx\n",
1234 dd
->ipath_consec_nopiobuf
,
1235 (unsigned long long) le64_to_cpu(dma
[0]),
1236 (unsigned long long) le64_to_cpu(dma
[1]),
1237 (unsigned long long) le64_to_cpu(dma
[2]),
1238 (unsigned long long) le64_to_cpu(dma
[3]),
1239 shadow
[0], shadow
[1], shadow
[2],
1242 * 4 buffers per byte, 4 registers above, cover rest
1245 if ((dd
->ipath_piobcnt2k
+ dd
->ipath_piobcnt4k
) >
1246 (sizeof(shadow
[0]) * 4 * 4))
1247 ipath_dbg("2nd group: dmacopy: %llx %llx "
1248 "%llx %llx; shadow: %lx %lx "
1250 (unsigned long long)
1251 le64_to_cpu(dma
[4]),
1252 (unsigned long long)
1253 le64_to_cpu(dma
[5]),
1254 (unsigned long long)
1255 le64_to_cpu(dma
[6]),
1256 (unsigned long long)
1257 le64_to_cpu(dma
[7]),
1258 shadow
[4], shadow
[5],
1259 shadow
[6], shadow
[7]);
1266 * set next starting place. Since it's just an optimization,
1267 * it doesn't matter who wins on this, so no locking
1269 dd
->ipath_lastpioindex
= i
+ 1;
1270 if (dd
->ipath_upd_pio_shadow
)
1271 dd
->ipath_upd_pio_shadow
= 0;
1272 if (dd
->ipath_consec_nopiobuf
)
1273 dd
->ipath_consec_nopiobuf
= 0;
1274 if (i
< dd
->ipath_piobcnt2k
)
1275 buf
= (u32 __iomem
*) (dd
->ipath_pio2kbase
+
1276 i
* dd
->ipath_palign
);
1278 buf
= (u32 __iomem
*)
1279 (dd
->ipath_pio4kbase
+
1280 (i
- dd
->ipath_piobcnt2k
) * dd
->ipath_4kalign
);
1281 ipath_cdbg(VERBOSE
, "Return piobuf%u %uk @ %p\n",
1282 i
, (i
< dd
->ipath_piobcnt2k
) ? 2 : 4, buf
);
1291 * ipath_create_rcvhdrq - create a receive header queue
1292 * @dd: the infinipath device
1293 * @pd: the port data
1295 * this must be contiguous memory (from an i/o perspective), and must be
1296 * DMA'able (which means for some systems, it will go through an IOMMU,
1297 * or be forced into a low address range).
1299 int ipath_create_rcvhdrq(struct ipath_devdata
*dd
,
1300 struct ipath_portdata
*pd
)
1304 if (!pd
->port_rcvhdrq
) {
1305 dma_addr_t phys_hdrqtail
;
1306 gfp_t gfp_flags
= GFP_USER
| __GFP_COMP
;
1307 int amt
= ALIGN(dd
->ipath_rcvhdrcnt
* dd
->ipath_rcvhdrentsize
*
1308 sizeof(u32
), PAGE_SIZE
);
1310 pd
->port_rcvhdrq
= dma_alloc_coherent(
1311 &dd
->pcidev
->dev
, amt
, &pd
->port_rcvhdrq_phys
,
1314 if (!pd
->port_rcvhdrq
) {
1315 ipath_dev_err(dd
, "attempt to allocate %d bytes "
1316 "for port %u rcvhdrq failed\n",
1317 amt
, pd
->port_port
);
1321 pd
->port_rcvhdrtail_kvaddr
= dma_alloc_coherent(
1322 &dd
->pcidev
->dev
, PAGE_SIZE
, &phys_hdrqtail
, GFP_KERNEL
);
1323 if (!pd
->port_rcvhdrtail_kvaddr
) {
1324 ipath_dev_err(dd
, "attempt to allocate 1 page "
1325 "for port %u rcvhdrqtailaddr failed\n",
1330 pd
->port_rcvhdrqtailaddr_phys
= phys_hdrqtail
;
1332 pd
->port_rcvhdrq_size
= amt
;
1334 ipath_cdbg(VERBOSE
, "%d pages at %p (phys %lx) size=%lu "
1335 "for port %u rcvhdr Q\n",
1336 amt
>> PAGE_SHIFT
, pd
->port_rcvhdrq
,
1337 (unsigned long) pd
->port_rcvhdrq_phys
,
1338 (unsigned long) pd
->port_rcvhdrq_size
,
1341 ipath_cdbg(VERBOSE
, "port %d hdrtailaddr, %llx physical\n",
1343 (unsigned long long) phys_hdrqtail
);
1346 ipath_cdbg(VERBOSE
, "reuse port %d rcvhdrq @%p %llx phys; "
1347 "hdrtailaddr@%p %llx physical\n",
1348 pd
->port_port
, pd
->port_rcvhdrq
,
1349 pd
->port_rcvhdrq_phys
, pd
->port_rcvhdrtail_kvaddr
,
1350 (unsigned long long)pd
->port_rcvhdrqtailaddr_phys
);
1352 /* clear for security and sanity on each use */
1353 memset(pd
->port_rcvhdrq
, 0, pd
->port_rcvhdrq_size
);
1354 memset((void *)pd
->port_rcvhdrtail_kvaddr
, 0, PAGE_SIZE
);
1357 * tell chip each time we init it, even if we are re-using previous
1358 * memory (we zero the register at process close)
1360 ipath_write_kreg_port(dd
, dd
->ipath_kregs
->kr_rcvhdrtailaddr
,
1361 pd
->port_port
, pd
->port_rcvhdrqtailaddr_phys
);
1362 ipath_write_kreg_port(dd
, dd
->ipath_kregs
->kr_rcvhdraddr
,
1363 pd
->port_port
, pd
->port_rcvhdrq_phys
);
1370 int ipath_waitfor_complete(struct ipath_devdata
*dd
, ipath_kreg reg_id
,
1371 u64 bits_to_wait_for
, u64
* valp
)
1373 unsigned long timeout
;
1377 lastval
= ipath_read_kreg64(dd
, reg_id
);
1378 /* wait a ridiculously long time */
1379 timeout
= jiffies
+ msecs_to_jiffies(5);
1381 val
= ipath_read_kreg64(dd
, reg_id
);
1382 /* set so they have something, even on failures. */
1384 if ((val
& bits_to_wait_for
) == bits_to_wait_for
) {
1389 ipath_cdbg(VERBOSE
, "Changed from %llx to %llx, "
1390 "waiting for %llx bits\n",
1391 (unsigned long long) lastval
,
1392 (unsigned long long) val
,
1393 (unsigned long long) bits_to_wait_for
);
1395 if (time_after(jiffies
, timeout
)) {
1396 ipath_dbg("Didn't get bits %llx in register 0x%x, "
1398 (unsigned long long) bits_to_wait_for
,
1399 reg_id
, (unsigned long long) *valp
);
1409 * ipath_waitfor_mdio_cmdready - wait for last command to complete
1410 * @dd: the infinipath device
1412 * Like ipath_waitfor_complete(), but we wait for the CMDVALID bit to go
1413 * away indicating the last command has completed. It doesn't return data
1415 int ipath_waitfor_mdio_cmdready(struct ipath_devdata
*dd
)
1417 unsigned long timeout
;
1421 /* wait a ridiculously long time */
1422 timeout
= jiffies
+ msecs_to_jiffies(5);
1424 val
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_mdio
);
1425 if (!(val
& IPATH_MDIO_CMDVALID
)) {
1430 if (time_after(jiffies
, timeout
)) {
1431 ipath_dbg("CMDVALID stuck in mdio reg? (%llx)\n",
1432 (unsigned long long) val
);
1441 static void ipath_set_ib_lstate(struct ipath_devdata
*dd
, int which
)
1443 static const char *what
[4] = {
1445 [INFINIPATH_IBCC_LINKCMD_INIT
] = "INIT",
1446 [INFINIPATH_IBCC_LINKCMD_ARMED
] = "ARMED",
1447 [INFINIPATH_IBCC_LINKCMD_ACTIVE
] = "ACTIVE"
1449 int linkcmd
= (which
>> INFINIPATH_IBCC_LINKCMD_SHIFT
) &
1450 INFINIPATH_IBCC_LINKCMD_MASK
;
1452 ipath_cdbg(VERBOSE
, "Trying to move unit %u to %s, current ltstate "
1453 "is %s\n", dd
->ipath_unit
,
1455 ipath_ibcstatus_str
[
1457 (dd
, dd
->ipath_kregs
->kr_ibcstatus
) >>
1458 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT
) &
1459 INFINIPATH_IBCS_LINKTRAININGSTATE_MASK
]);
1460 /* flush all queued sends when going to DOWN or INIT, to be sure that
1461 * they don't block MAD packets */
1462 if (!linkcmd
|| linkcmd
== INFINIPATH_IBCC_LINKCMD_INIT
) {
1463 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
1464 INFINIPATH_S_ABORT
);
1465 ipath_disarm_piobufs(dd
, dd
->ipath_lastport_piobuf
,
1466 (unsigned)(dd
->ipath_piobcnt2k
+
1467 dd
->ipath_piobcnt4k
) -
1468 dd
->ipath_lastport_piobuf
);
1471 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_ibcctrl
,
1472 dd
->ipath_ibcctrl
| which
);
1475 int ipath_set_linkstate(struct ipath_devdata
*dd
, u8 newstate
)
1481 case IPATH_IB_LINKDOWN
:
1482 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKINITCMD_POLL
<<
1483 INFINIPATH_IBCC_LINKINITCMD_SHIFT
);
1488 case IPATH_IB_LINKDOWN_SLEEP
:
1489 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKINITCMD_SLEEP
<<
1490 INFINIPATH_IBCC_LINKINITCMD_SHIFT
);
1495 case IPATH_IB_LINKDOWN_DISABLE
:
1496 ipath_set_ib_lstate(dd
,
1497 INFINIPATH_IBCC_LINKINITCMD_DISABLE
<<
1498 INFINIPATH_IBCC_LINKINITCMD_SHIFT
);
1503 case IPATH_IB_LINKINIT
:
1504 if (dd
->ipath_flags
& IPATH_LINKINIT
) {
1508 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKCMD_INIT
<<
1509 INFINIPATH_IBCC_LINKCMD_SHIFT
);
1510 lstate
= IPATH_LINKINIT
;
1513 case IPATH_IB_LINKARM
:
1514 if (dd
->ipath_flags
& IPATH_LINKARMED
) {
1518 if (!(dd
->ipath_flags
&
1519 (IPATH_LINKINIT
| IPATH_LINKACTIVE
))) {
1523 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKCMD_ARMED
<<
1524 INFINIPATH_IBCC_LINKCMD_SHIFT
);
1526 * Since the port can transition to ACTIVE by receiving
1527 * a non VL 15 packet, wait for either state.
1529 lstate
= IPATH_LINKARMED
| IPATH_LINKACTIVE
;
1532 case IPATH_IB_LINKACTIVE
:
1533 if (dd
->ipath_flags
& IPATH_LINKACTIVE
) {
1537 if (!(dd
->ipath_flags
& IPATH_LINKARMED
)) {
1541 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKCMD_ACTIVE
<<
1542 INFINIPATH_IBCC_LINKCMD_SHIFT
);
1543 lstate
= IPATH_LINKACTIVE
;
1547 ipath_dbg("Invalid linkstate 0x%x requested\n", newstate
);
1551 ret
= ipath_wait_linkstate(dd
, lstate
, 2000);
1558 * ipath_set_mtu - set the MTU
1559 * @dd: the infinipath device
1562 * we can handle "any" incoming size, the issue here is whether we
1563 * need to restrict our outgoing size. For now, we don't do any
1564 * sanity checking on this, and we don't deal with what happens to
1565 * programs that are already running when the size changes.
1566 * NOTE: changing the MTU will usually cause the IBC to go back to
1567 * link initialize (IPATH_IBSTATE_INIT) state...
1569 int ipath_set_mtu(struct ipath_devdata
*dd
, u16 arg
)
1576 * mtu is IB data payload max. It's the largest power of 2 less
1577 * than piosize (or even larger, since it only really controls the
1578 * largest we can receive; we can send the max of the mtu and
1579 * piosize). We check that it's one of the valid IB sizes.
1581 if (arg
!= 256 && arg
!= 512 && arg
!= 1024 && arg
!= 2048 &&
1583 ipath_dbg("Trying to set invalid mtu %u, failing\n", arg
);
1587 if (dd
->ipath_ibmtu
== arg
) {
1588 ret
= 0; /* same as current */
1592 piosize
= dd
->ipath_ibmaxlen
;
1593 dd
->ipath_ibmtu
= arg
;
1595 if (arg
>= (piosize
- IPATH_PIO_MAXIBHDR
)) {
1596 /* Only if it's not the initial value (or reset to it) */
1597 if (piosize
!= dd
->ipath_init_ibmaxlen
) {
1598 dd
->ipath_ibmaxlen
= piosize
;
1601 } else if ((arg
+ IPATH_PIO_MAXIBHDR
) != dd
->ipath_ibmaxlen
) {
1602 piosize
= arg
+ IPATH_PIO_MAXIBHDR
;
1603 ipath_cdbg(VERBOSE
, "ibmaxlen was 0x%x, setting to 0x%x "
1604 "(mtu 0x%x)\n", dd
->ipath_ibmaxlen
, piosize
,
1606 dd
->ipath_ibmaxlen
= piosize
;
1612 * set the IBC maxpktlength to the size of our pio
1615 u64 ibc
= dd
->ipath_ibcctrl
;
1616 ibc
&= ~(INFINIPATH_IBCC_MAXPKTLEN_MASK
<<
1617 INFINIPATH_IBCC_MAXPKTLEN_SHIFT
);
1619 piosize
= piosize
- 2 * sizeof(u32
); /* ignore pbc */
1620 dd
->ipath_ibmaxlen
= piosize
;
1621 piosize
/= sizeof(u32
); /* in words */
1623 * for ICRC, which we only send in diag test pkt mode, and
1624 * we don't need to worry about that for mtu
1628 ibc
|= piosize
<< INFINIPATH_IBCC_MAXPKTLEN_SHIFT
;
1629 dd
->ipath_ibcctrl
= ibc
;
1630 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_ibcctrl
,
1632 dd
->ipath_f_tidtemplate(dd
);
1641 int ipath_set_lid(struct ipath_devdata
*dd
, u32 arg
, u8 lmc
)
1643 dd
->ipath_lid
= arg
;
1644 dd
->ipath_lmc
= lmc
;
1650 * ipath_read_kreg64_port - read a device's per-port 64-bit kernel register
1651 * @dd: the infinipath device
1652 * @regno: the register number to read
1653 * @port: the port containing the register
1655 * Registers that vary with the chip implementation constants (port)
1658 u64
ipath_read_kreg64_port(const struct ipath_devdata
*dd
, ipath_kreg regno
,
1663 if (port
< dd
->ipath_portcnt
&&
1664 (regno
== dd
->ipath_kregs
->kr_rcvhdraddr
||
1665 regno
== dd
->ipath_kregs
->kr_rcvhdrtailaddr
))
1666 where
= regno
+ port
;
1670 return ipath_read_kreg64(dd
, where
);
1674 * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
1675 * @dd: the infinipath device
1676 * @regno: the register number to write
1677 * @port: the port containing the register
1678 * @value: the value to write
1680 * Registers that vary with the chip implementation constants (port)
1683 void ipath_write_kreg_port(const struct ipath_devdata
*dd
, ipath_kreg regno
,
1684 unsigned port
, u64 value
)
1688 if (port
< dd
->ipath_portcnt
&&
1689 (regno
== dd
->ipath_kregs
->kr_rcvhdraddr
||
1690 regno
== dd
->ipath_kregs
->kr_rcvhdrtailaddr
))
1691 where
= regno
+ port
;
1695 ipath_write_kreg(dd
, where
, value
);
1699 * ipath_shutdown_device - shut down a device
1700 * @dd: the infinipath device
1702 * This is called to make the device quiet when we are about to
1703 * unload the driver, and also when the device is administratively
1704 * disabled. It does not free any data structures.
1705 * Everything it does has to be setup again by ipath_init_chip(dd,1)
1707 void ipath_shutdown_device(struct ipath_devdata
*dd
)
1711 ipath_dbg("Shutting down the device\n");
1713 dd
->ipath_flags
|= IPATH_LINKUNK
;
1714 dd
->ipath_flags
&= ~(IPATH_INITTED
| IPATH_LINKDOWN
|
1715 IPATH_LINKINIT
| IPATH_LINKARMED
|
1717 *dd
->ipath_statusp
&= ~(IPATH_STATUS_IB_CONF
|
1718 IPATH_STATUS_IB_READY
);
1720 /* mask interrupts, but not errors */
1721 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intmask
, 0ULL);
1723 dd
->ipath_rcvctrl
= 0;
1724 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_rcvctrl
,
1728 * gracefully stop all sends allowing any in progress to trickle out
1731 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
, 0ULL);
1733 val
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
1735 * enough for anything that's going to trickle out to have actually
1741 * abort any armed or launched PIO buffers that didn't go. (self
1742 * clearing). Will cause any packet currently being transmitted to
1743 * go out with an EBP, and may also cause a short packet error on
1746 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
1747 INFINIPATH_S_ABORT
);
1749 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKINITCMD_DISABLE
<<
1750 INFINIPATH_IBCC_LINKINITCMD_SHIFT
);
1753 dd
->ipath_control
&= ~INFINIPATH_C_LINKENABLE
;
1754 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_control
,
1755 dd
->ipath_control
| INFINIPATH_C_FREEZEMODE
);
1758 * clear SerdesEnable and turn the leds off; do this here because
1759 * we are unloading, so don't count on interrupts to move along
1760 * Turn the LEDs off explictly for the same reason.
1762 dd
->ipath_f_quiet_serdes(dd
);
1763 dd
->ipath_f_setextled(dd
, 0, 0);
1765 if (dd
->ipath_stats_timer_active
) {
1766 del_timer_sync(&dd
->ipath_stats_timer
);
1767 dd
->ipath_stats_timer_active
= 0;
1771 * clear all interrupts and errors, so that the next time the driver
1772 * is loaded or device is enabled, we know that whatever is set
1773 * happened while we were unloaded
1775 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_hwerrclear
,
1776 ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED
);
1777 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errorclear
, -1LL);
1778 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intclear
, -1LL);
1782 * ipath_free_pddata - free a port's allocated data
1783 * @dd: the infinipath device
1784 * @pd: the portdata structure
1786 * free up any allocated data for a port
1787 * This should not touch anything that would affect a simultaneous
1788 * re-allocation of port data, because it is called after ipath_mutex
1789 * is released (and can be called from reinit as well).
1790 * It should never change any chip state, or global driver state.
1791 * (The only exception to global state is freeing the port0 port0_skbs.)
1793 void ipath_free_pddata(struct ipath_devdata
*dd
, struct ipath_portdata
*pd
)
1798 if (pd
->port_rcvhdrq
) {
1799 ipath_cdbg(VERBOSE
, "free closed port %d rcvhdrq @ %p "
1800 "(size=%lu)\n", pd
->port_port
, pd
->port_rcvhdrq
,
1801 (unsigned long) pd
->port_rcvhdrq_size
);
1802 dma_free_coherent(&dd
->pcidev
->dev
, pd
->port_rcvhdrq_size
,
1803 pd
->port_rcvhdrq
, pd
->port_rcvhdrq_phys
);
1804 pd
->port_rcvhdrq
= NULL
;
1805 if (pd
->port_rcvhdrtail_kvaddr
) {
1806 dma_free_coherent(&dd
->pcidev
->dev
, PAGE_SIZE
,
1807 (void *)pd
->port_rcvhdrtail_kvaddr
,
1808 pd
->port_rcvhdrqtailaddr_phys
);
1809 pd
->port_rcvhdrtail_kvaddr
= NULL
;
1812 if (pd
->port_port
&& pd
->port_rcvegrbuf
) {
1815 for (e
= 0; e
< pd
->port_rcvegrbuf_chunks
; e
++) {
1816 void *base
= pd
->port_rcvegrbuf
[e
];
1817 size_t size
= pd
->port_rcvegrbuf_size
;
1819 ipath_cdbg(VERBOSE
, "egrbuf free(%p, %lu), "
1820 "chunk %u/%u\n", base
,
1821 (unsigned long) size
,
1822 e
, pd
->port_rcvegrbuf_chunks
);
1823 dma_free_coherent(&dd
->pcidev
->dev
, size
,
1824 base
, pd
->port_rcvegrbuf_phys
[e
]);
1826 vfree(pd
->port_rcvegrbuf
);
1827 pd
->port_rcvegrbuf
= NULL
;
1828 vfree(pd
->port_rcvegrbuf_phys
);
1829 pd
->port_rcvegrbuf_phys
= NULL
;
1830 pd
->port_rcvegrbuf_chunks
= 0;
1831 } else if (pd
->port_port
== 0 && dd
->ipath_port0_skbs
) {
1833 struct sk_buff
**skbs
= dd
->ipath_port0_skbs
;
1835 dd
->ipath_port0_skbs
= NULL
;
1836 ipath_cdbg(VERBOSE
, "free closed port %d ipath_port0_skbs "
1837 "@ %p\n", pd
->port_port
, skbs
);
1838 for (e
= 0; e
< dd
->ipath_rcvegrcnt
; e
++)
1840 dev_kfree_skb(skbs
[e
]);
1843 kfree(pd
->port_tid_pg_list
);
1847 static int __init
infinipath_init(void)
1851 ipath_dbg(KERN_INFO DRIVER_LOAD_MSG
"%s", ib_ipath_version
);
1854 * These must be called before the driver is registered with
1855 * the PCI subsystem.
1857 idr_init(&unit_table
);
1858 if (!idr_pre_get(&unit_table
, GFP_KERNEL
)) {
1863 ret
= pci_register_driver(&ipath_driver
);
1865 printk(KERN_ERR IPATH_DRV_NAME
1866 ": Unable to register driver: error %d\n", -ret
);
1870 ret
= ipath_driver_create_group(&ipath_driver
.driver
);
1872 printk(KERN_ERR IPATH_DRV_NAME
": Unable to create driver "
1873 "sysfs entries: error %d\n", -ret
);
1877 ret
= ipath_init_ipathfs();
1879 printk(KERN_ERR IPATH_DRV_NAME
": Unable to create "
1880 "ipathfs: error %d\n", -ret
);
1887 ipath_driver_remove_group(&ipath_driver
.driver
);
1890 pci_unregister_driver(&ipath_driver
);
1893 idr_destroy(&unit_table
);
1899 static void cleanup_device(struct ipath_devdata
*dd
)
1903 ipath_shutdown_device(dd
);
1905 if (*dd
->ipath_statusp
& IPATH_STATUS_CHIP_PRESENT
) {
1906 /* can't do anything more with chip; needs re-init */
1907 *dd
->ipath_statusp
&= ~IPATH_STATUS_CHIP_PRESENT
;
1908 if (dd
->ipath_kregbase
) {
1910 * if we haven't already cleaned up before these are
1911 * to ensure any register reads/writes "fail" until
1914 dd
->ipath_kregbase
= NULL
;
1915 dd
->ipath_uregbase
= 0;
1916 dd
->ipath_sregbase
= 0;
1917 dd
->ipath_cregbase
= 0;
1918 dd
->ipath_kregsize
= 0;
1920 ipath_disable_wc(dd
);
1923 if (dd
->ipath_pioavailregs_dma
) {
1924 dma_free_coherent(&dd
->pcidev
->dev
, PAGE_SIZE
,
1925 (void *) dd
->ipath_pioavailregs_dma
,
1926 dd
->ipath_pioavailregs_phys
);
1927 dd
->ipath_pioavailregs_dma
= NULL
;
1929 if (dd
->ipath_dummy_hdrq
) {
1930 dma_free_coherent(&dd
->pcidev
->dev
,
1931 dd
->ipath_pd
[0]->port_rcvhdrq_size
,
1932 dd
->ipath_dummy_hdrq
, dd
->ipath_dummy_hdrq_phys
);
1933 dd
->ipath_dummy_hdrq
= NULL
;
1936 if (dd
->ipath_pageshadow
) {
1937 struct page
**tmpp
= dd
->ipath_pageshadow
;
1940 ipath_cdbg(VERBOSE
, "Unlocking any expTID pages still "
1942 for (port
= 0; port
< dd
->ipath_cfgports
; port
++) {
1943 int port_tidbase
= port
* dd
->ipath_rcvtidcnt
;
1944 int maxtid
= port_tidbase
+ dd
->ipath_rcvtidcnt
;
1945 for (i
= port_tidbase
; i
< maxtid
; i
++) {
1948 ipath_release_user_pages(&tmpp
[i
], 1);
1954 ipath_stats
.sps_pageunlocks
+= cnt
;
1955 ipath_cdbg(VERBOSE
, "There were still %u expTID "
1956 "entries locked\n", cnt
);
1958 if (ipath_stats
.sps_pagelocks
||
1959 ipath_stats
.sps_pageunlocks
)
1960 ipath_cdbg(VERBOSE
, "%llu pages locked, %llu "
1961 "unlocked via ipath_m{un}lock\n",
1962 (unsigned long long)
1963 ipath_stats
.sps_pagelocks
,
1964 (unsigned long long)
1965 ipath_stats
.sps_pageunlocks
);
1967 ipath_cdbg(VERBOSE
, "Free shadow page tid array at %p\n",
1968 dd
->ipath_pageshadow
);
1969 vfree(dd
->ipath_pageshadow
);
1970 dd
->ipath_pageshadow
= NULL
;
1974 * free any resources still in use (usually just kernel ports)
1975 * at unload; we do for portcnt, not cfgports, because cfgports
1976 * could have changed while we were loaded.
1978 for (port
= 0; port
< dd
->ipath_portcnt
; port
++) {
1979 struct ipath_portdata
*pd
= dd
->ipath_pd
[port
];
1980 dd
->ipath_pd
[port
] = NULL
;
1981 ipath_free_pddata(dd
, pd
);
1983 kfree(dd
->ipath_pd
);
1985 * debuggability, in case some cleanup path tries to use it
1988 dd
->ipath_pd
= NULL
;
1991 static void __exit
infinipath_cleanup(void)
1993 struct ipath_devdata
*dd
, *tmp
;
1994 unsigned long flags
;
1996 ipath_exit_ipathfs();
1998 ipath_driver_remove_group(&ipath_driver
.driver
);
2000 spin_lock_irqsave(&ipath_devs_lock
, flags
);
2003 * turn off rcv, send, and interrupts for all ports, all drivers
2004 * should also hard reset the chip here?
2005 * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
2006 * for all versions of the driver, if they were allocated
2008 list_for_each_entry_safe(dd
, tmp
, &ipath_dev_list
, ipath_list
) {
2009 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
2011 if (dd
->ipath_kregbase
)
2015 if (dd
->pcidev
->irq
) {
2017 "unit %u free_irq of irq %x\n",
2018 dd
->ipath_unit
, dd
->pcidev
->irq
);
2019 free_irq(dd
->pcidev
->irq
, dd
);
2021 ipath_dbg("irq is 0, not doing free_irq "
2022 "for unit %u\n", dd
->ipath_unit
);
2025 * we check for NULL here, because it's outside
2026 * the kregbase check, and we need to call it
2027 * after the free_irq. Thus it's possible that
2028 * the function pointers were never initialized.
2030 if (dd
->ipath_f_cleanup
)
2031 /* clean up chip-specific stuff */
2032 dd
->ipath_f_cleanup(dd
);
2036 spin_lock_irqsave(&ipath_devs_lock
, flags
);
2039 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
2041 ipath_cdbg(VERBOSE
, "Unregistering pci driver\n");
2042 pci_unregister_driver(&ipath_driver
);
2044 idr_destroy(&unit_table
);
2048 * ipath_reset_device - reset the chip if possible
2049 * @unit: the device to reset
2051 * Whether or not reset is successful, we attempt to re-initialize the chip
2052 * (that is, much like a driver unload/reload). We clear the INITTED flag
2053 * so that the various entry points will fail until we reinitialize. For
2054 * now, we only allow this if no user ports are open that use chip resources
2056 int ipath_reset_device(int unit
)
2059 struct ipath_devdata
*dd
= ipath_lookup(unit
);
2066 dev_info(&dd
->pcidev
->dev
, "Reset on unit %u requested\n", unit
);
2068 if (!dd
->ipath_kregbase
|| !(dd
->ipath_flags
& IPATH_PRESENT
)) {
2069 dev_info(&dd
->pcidev
->dev
, "Invalid unit number %u or "
2070 "not initialized or not present\n", unit
);
2076 for (i
= 1; i
< dd
->ipath_cfgports
; i
++) {
2077 if (dd
->ipath_pd
[i
] && dd
->ipath_pd
[i
]->port_cnt
) {
2078 ipath_dbg("unit %u port %d is in use "
2079 "(PID %u cmd %s), can't reset\n",
2081 dd
->ipath_pd
[i
]->port_pid
,
2082 dd
->ipath_pd
[i
]->port_comm
);
2088 dd
->ipath_flags
&= ~IPATH_INITTED
;
2089 ret
= dd
->ipath_f_reset(dd
);
2091 ipath_dbg("reset was not successful\n");
2092 ipath_dbg("Trying to reinitialize unit %u after reset attempt\n",
2094 ret
= ipath_init_chip(dd
, 1);
2096 ipath_dev_err(dd
, "Reinitialize unit %u after "
2097 "reset failed with %d\n", unit
, ret
);
2099 dev_info(&dd
->pcidev
->dev
, "Reinitialized unit %u after "
2100 "resetting\n", unit
);
2106 module_init(infinipath_init
);
2107 module_exit(infinipath_cleanup
);