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libata: implement and use ops inheritance
[linux-2.6/x86.git] / drivers / ata / pata_via.c
blobd1edb1b27480cddd21c16a53669fa878903d6852
1 /*
2 * pata_via.c - VIA PATA for new ATA layer
3 * (C) 2005-2006 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * Documentation
7 * Most chipset documentation available under NDA only
8 *
9 * VIA version guide
10 * VIA VT82C561 - early design, uses ata_generic currently
11 * VIA VT82C576 - MWDMA, 33Mhz
12 * VIA VT82C586 - MWDMA, 33Mhz
13 * VIA VT82C586a - Added UDMA to 33Mhz
14 * VIA VT82C586b - UDMA33
15 * VIA VT82C596a - Nonfunctional UDMA66
16 * VIA VT82C596b - Working UDMA66
17 * VIA VT82C686 - Nonfunctional UDMA66
18 * VIA VT82C686a - Working UDMA66
19 * VIA VT82C686b - Updated to UDMA100
20 * VIA VT8231 - UDMA100
21 * VIA VT8233 - UDMA100
22 * VIA VT8233a - UDMA133
23 * VIA VT8233c - UDMA100
24 * VIA VT8235 - UDMA133
25 * VIA VT8237 - UDMA133
26 * VIA VT8237S - UDMA133
27 * VIA VT8251 - UDMA133
28 *
29 * Most registers remain compatible across chips. Others start reserved
30 * and acquire sensible semantics if set to 1 (eg cable detect). A few
31 * exceptions exist, notably around the FIFO settings.
32 *
33 * One additional quirk of the VIA design is that like ALi they use few
34 * PCI IDs for a lot of chips.
35 *
36 * Based heavily on:
37 *
38 * Version 3.38
39 *
40 * VIA IDE driver for Linux. Supported southbridges:
41 *
42 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
43 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
44 * vt8235, vt8237
45 *
46 * Copyright (c) 2000-2002 Vojtech Pavlik
47 *
48 * Based on the work of:
49 * Michel Aubry
50 * Jeff Garzik
51 * Andre Hedrick
52
53 */
54
55 #include <linux/kernel.h>
56 #include <linux/module.h>
57 #include <linux/pci.h>
58 #include <linux/init.h>
59 #include <linux/blkdev.h>
60 #include <linux/delay.h>
61 #include <scsi/scsi_host.h>
62 #include <linux/libata.h>
63 #include <linux/dmi.h>
64
65 #define DRV_NAME "pata_via"
66 #define DRV_VERSION "0.3.3"
67
68 /*
69 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
70 * driver.
71 */
72
73 enum {
74 VIA_UDMA = 0x007,
75 VIA_UDMA_NONE = 0x000,
76 VIA_UDMA_33 = 0x001,
77 VIA_UDMA_66 = 0x002,
78 VIA_UDMA_100 = 0x003,
79 VIA_UDMA_133 = 0x004,
80 VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */
81 VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */
82 VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
83 VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
84 VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
85 VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
86 VIA_NO_ENABLES = 0x400, /* Has no enablebits */
87 VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */
88 };
89
90 /*
91 * VIA SouthBridge chips.
92 */
93
94 static const struct via_isa_bridge {
95 const char *name;
96 u16 id;
97 u8 rev_min;
98 u8 rev_max;
99 u16 flags;
100 } via_isa_bridges[] = {
101 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
102 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
103 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
104 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
105 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES},
106 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
107 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
108 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
109 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
110 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
111 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
112 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
113 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
114 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
115 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
116 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
117 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
118 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
119 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
120 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
121 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
122 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
123 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
124 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
125 { NULL }
126 };
127
128
129 /*
130 * Cable special cases
131 */
132
133 static const struct dmi_system_id cable_dmi_table[] = {
134 {
135 .ident = "Acer Ferrari 3400",
136 .matches = {
137 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
138 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
139 },
140 },
141 { }
142 };
143
144 static int via_cable_override(struct pci_dev *pdev)
145 {
146 /* Systems by DMI */
147 if (dmi_check_system(cable_dmi_table))
148 return 1;
149 /* Arima W730-K8/Targa Visionary 811/... */
150 if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
151 return 1;
152 return 0;
153 }
154
155
156 /**
157 * via_cable_detect - cable detection
158 * @ap: ATA port
159 *
160 * Perform cable detection. Actually for the VIA case the BIOS
161 * already did this for us. We read the values provided by the
162 * BIOS. If you are using an 8235 in a non-PC configuration you
163 * may need to update this code.
164 *
165 * Hotplug also impacts on this.
166 */
167
168 static int via_cable_detect(struct ata_port *ap) {
169 const struct via_isa_bridge *config = ap->host->private_data;
170 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
171 u32 ata66;
172
173 if (via_cable_override(pdev))
174 return ATA_CBL_PATA40_SHORT;
175
176 if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0)
177 return ATA_CBL_SATA;
178
179 /* Early chips are 40 wire */
180 if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
181 return ATA_CBL_PATA40;
182 /* UDMA 66 chips have only drive side logic */
183 else if ((config->flags & VIA_UDMA) < VIA_UDMA_100)
184 return ATA_CBL_PATA_UNK;
185 /* UDMA 100 or later */
186 pci_read_config_dword(pdev, 0x50, &ata66);
187 /* Check both the drive cable reporting bits, we might not have
188 two drives */
189 if (ata66 & (0x10100000 >> (16 * ap->port_no)))
190 return ATA_CBL_PATA80;
191 /* Check with ACPI so we can spot BIOS reported SATA bridges */
192 if (ata_acpi_init_gtm(ap) &&
193 ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap)))
194 return ATA_CBL_PATA80;
195 return ATA_CBL_PATA40;
196 }
197
198 static int via_pre_reset(struct ata_link *link, unsigned long deadline)
199 {
200 struct ata_port *ap = link->ap;
201 const struct via_isa_bridge *config = ap->host->private_data;
202
203 if (!(config->flags & VIA_NO_ENABLES)) {
204 static const struct pci_bits via_enable_bits[] = {
205 { 0x40, 1, 0x02, 0x02 },
206 { 0x40, 1, 0x01, 0x01 }
207 };
208 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
209 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
210 return -ENOENT;
211 }
212
213 return ata_std_prereset(link, deadline);
214 }
215
216
217 /**
218 * via_error_handler - reset for VIA chips
219 * @ap: ATA port
220 *
221 * Handle the reset callback for the later chips with cable detect
222 */
223
224 static void via_error_handler(struct ata_port *ap)
225 {
226 ata_bmdma_drive_eh(ap, via_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
227 }
228
229 /**
230 * via_do_set_mode - set initial PIO mode data
231 * @ap: ATA interface
232 * @adev: ATA device
233 * @mode: ATA mode being programmed
234 * @tdiv: Clocks per PCI clock
235 * @set_ast: Set to program address setup
236 * @udma_type: UDMA mode/format of registers
237 *
238 * Program the VIA registers for DMA and PIO modes. Uses the ata timing
239 * support in order to compute modes.
240 *
241 * FIXME: Hotplug will require we serialize multiple mode changes
242 * on the two channels.
243 */
244
245 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
246 {
247 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
248 struct ata_device *peer = ata_dev_pair(adev);
249 struct ata_timing t, p;
250 static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */
251 unsigned long T = 1000000000 / via_clock;
252 unsigned long UT = T/tdiv;
253 int ut;
254 int offset = 3 - (2*ap->port_no) - adev->devno;
255
256 /* Calculate the timing values we require */
257 ata_timing_compute(adev, mode, &t, T, UT);
258
259 /* We share 8bit timing so we must merge the constraints */
260 if (peer) {
261 if (peer->pio_mode) {
262 ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
263 ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
264 }
265 }
266
267 /* Address setup is programmable but breaks on UDMA133 setups */
268 if (set_ast) {
269 u8 setup; /* 2 bits per drive */
270 int shift = 2 * offset;
271
272 pci_read_config_byte(pdev, 0x4C, &setup);
273 setup &= ~(3 << shift);
274 setup |= FIT(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */
275 pci_write_config_byte(pdev, 0x4C, setup);
276 }
277
278 /* Load the PIO mode bits */
279 pci_write_config_byte(pdev, 0x4F - ap->port_no,
280 ((FIT(t.act8b, 1, 16) - 1) << 4) | (FIT(t.rec8b, 1, 16) - 1));
281 pci_write_config_byte(pdev, 0x48 + offset,
282 ((FIT(t.active, 1, 16) - 1) << 4) | (FIT(t.recover, 1, 16) - 1));
283
284 /* Load the UDMA bits according to type */
285 switch(udma_type) {
286 default:
287 /* BUG() ? */
288 /* fall through */
289 case 33:
290 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 5) - 2)) : 0x03;
291 break;
292 case 66:
293 ut = t.udma ? (0xe8 | (FIT(t.udma, 2, 9) - 2)) : 0x0f;
294 break;
295 case 100:
296 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
297 break;
298 case 133:
299 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
300 break;
301 }
302
303 /* Set UDMA unless device is not UDMA capable */
304 if (udma_type && t.udma) {
305 u8 cable80_status;
306
307 /* Get 80-wire cable detection bit */
308 pci_read_config_byte(pdev, 0x50 + offset, &cable80_status);
309 cable80_status &= 0x10;
310
311 pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status);
312 }
313 }
314
315 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
316 {
317 const struct via_isa_bridge *config = ap->host->private_data;
318 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
319 int mode = config->flags & VIA_UDMA;
320 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
321 static u8 udma[5] = { 0, 33, 66, 100, 133 };
322
323 via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
324 }
325
326 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
327 {
328 const struct via_isa_bridge *config = ap->host->private_data;
329 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
330 int mode = config->flags & VIA_UDMA;
331 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
332 static u8 udma[5] = { 0, 33, 66, 100, 133 };
333
334 via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
335 }
336
337 static struct scsi_host_template via_sht = {
338 ATA_BMDMA_SHT(DRV_NAME),
339 };
340
341 static struct ata_port_operations via_port_ops = {
342 .inherits = &ata_bmdma_port_ops,
343 .cable_detect = via_cable_detect,
344 .set_piomode = via_set_piomode,
345 .set_dmamode = via_set_dmamode,
346 .error_handler = via_error_handler,
347 };
348
349 static struct ata_port_operations via_port_ops_noirq = {
350 .inherits = &via_port_ops,
351 .data_xfer = ata_data_xfer_noirq,
352 };
353
354 /**
355 * via_config_fifo - set up the FIFO
356 * @pdev: PCI device
357 * @flags: configuration flags
358 *
359 * Set the FIFO properties for this device if necessary. Used both on
360 * set up and on and the resume path
361 */
362
363 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
364 {
365 u8 enable;
366
367 /* 0x40 low bits indicate enabled channels */
368 pci_read_config_byte(pdev, 0x40 , &enable);
369 enable &= 3;
370
371 if (flags & VIA_SET_FIFO) {
372 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
373 u8 fifo;
374
375 pci_read_config_byte(pdev, 0x43, &fifo);
376
377 /* Clear PREQ# until DDACK# for errata */
378 if (flags & VIA_BAD_PREQ)
379 fifo &= 0x7F;
380 else
381 fifo &= 0x9f;
382 /* Turn on FIFO for enabled channels */
383 fifo |= fifo_setting[enable];
384 pci_write_config_byte(pdev, 0x43, fifo);
385 }
386 }
387
388 /**
389 * via_init_one - discovery callback
390 * @pdev: PCI device
391 * @id: PCI table info
392 *
393 * A VIA IDE interface has been discovered. Figure out what revision
394 * and perform configuration work before handing it to the ATA layer
395 */
396
397 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
398 {
399 /* Early VIA without UDMA support */
400 static const struct ata_port_info via_mwdma_info = {
401 .sht = &via_sht,
402 .flags = ATA_FLAG_SLAVE_POSS,
403 .pio_mask = 0x1f,
404 .mwdma_mask = 0x07,
405 .port_ops = &via_port_ops
406 };
407 /* Ditto with IRQ masking required */
408 static const struct ata_port_info via_mwdma_info_borked = {
409 .sht = &via_sht,
410 .flags = ATA_FLAG_SLAVE_POSS,
411 .pio_mask = 0x1f,
412 .mwdma_mask = 0x07,
413 .port_ops = &via_port_ops_noirq,
414 };
415 /* VIA UDMA 33 devices (and borked 66) */
416 static const struct ata_port_info via_udma33_info = {
417 .sht = &via_sht,
418 .flags = ATA_FLAG_SLAVE_POSS,
419 .pio_mask = 0x1f,
420 .mwdma_mask = 0x07,
421 .udma_mask = ATA_UDMA2,
422 .port_ops = &via_port_ops
423 };
424 /* VIA UDMA 66 devices */
425 static const struct ata_port_info via_udma66_info = {
426 .sht = &via_sht,
427 .flags = ATA_FLAG_SLAVE_POSS,
428 .pio_mask = 0x1f,
429 .mwdma_mask = 0x07,
430 .udma_mask = ATA_UDMA4,
431 .port_ops = &via_port_ops
432 };
433 /* VIA UDMA 100 devices */
434 static const struct ata_port_info via_udma100_info = {
435 .sht = &via_sht,
436 .flags = ATA_FLAG_SLAVE_POSS,
437 .pio_mask = 0x1f,
438 .mwdma_mask = 0x07,
439 .udma_mask = ATA_UDMA5,
440 .port_ops = &via_port_ops
441 };
442 /* UDMA133 with bad AST (All current 133) */
443 static const struct ata_port_info via_udma133_info = {
444 .sht = &via_sht,
445 .flags = ATA_FLAG_SLAVE_POSS,
446 .pio_mask = 0x1f,
447 .mwdma_mask = 0x07,
448 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
449 .port_ops = &via_port_ops
450 };
451 struct ata_port_info type;
452 const struct ata_port_info *ppi[] = { &type, NULL };
453 struct pci_dev *isa = NULL;
454 const struct via_isa_bridge *config;
455 static int printed_version;
456 u8 enable;
457 u32 timing;
458 int rc;
459
460 if (!printed_version++)
461 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
462
463 rc = pcim_enable_device(pdev);
464 if (rc)
465 return rc;
466
467 /* To find out how the IDE will behave and what features we
468 actually have to look at the bridge not the IDE controller */
469 for (config = via_isa_bridges; config->id; config++)
470 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
471 !!(config->flags & VIA_BAD_ID),
472 config->id, NULL))) {
473
474 if (isa->revision >= config->rev_min &&
475 isa->revision <= config->rev_max)
476 break;
477 pci_dev_put(isa);
478 }
479
480 if (!config->id) {
481 printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n");
482 return -ENODEV;
483 }
484 pci_dev_put(isa);
485
486 /* 0x40 low bits indicate enabled channels */
487 pci_read_config_byte(pdev, 0x40 , &enable);
488 enable &= 3;
489 if (enable == 0) {
490 return -ENODEV;
491 }
492
493 /* Initialise the FIFO for the enabled channels. */
494 via_config_fifo(pdev, config->flags);
495
496 /* Clock set up */
497 switch(config->flags & VIA_UDMA) {
498 case VIA_UDMA_NONE:
499 if (config->flags & VIA_NO_UNMASK)
500 type = via_mwdma_info_borked;
501 else
502 type = via_mwdma_info;
503 break;
504 case VIA_UDMA_33:
505 type = via_udma33_info;
506 break;
507 case VIA_UDMA_66:
508 type = via_udma66_info;
509 /* The 66 MHz devices require we enable the clock */
510 pci_read_config_dword(pdev, 0x50, &timing);
511 timing |= 0x80008;
512 pci_write_config_dword(pdev, 0x50, timing);
513 break;
514 case VIA_UDMA_100:
515 type = via_udma100_info;
516 break;
517 case VIA_UDMA_133:
518 type = via_udma133_info;
519 break;
520 default:
521 WARN_ON(1);
522 return -ENODEV;
523 }
524
525 if (config->flags & VIA_BAD_CLK66) {
526 /* Disable the 66MHz clock on problem devices */
527 pci_read_config_dword(pdev, 0x50, &timing);
528 timing &= ~0x80008;
529 pci_write_config_dword(pdev, 0x50, timing);
530 }
531
532 /* We have established the device type, now fire it up */
533 type.private_data = (void *)config;
534
535 return ata_pci_init_one(pdev, ppi);
536 }
537
538 #ifdef CONFIG_PM
539 /**
540 * via_reinit_one - reinit after resume
541 * @pdev; PCI device
542 *
543 * Called when the VIA PATA device is resumed. We must then
544 * reconfigure the fifo and other setup we may have altered. In
545 * addition the kernel needs to have the resume methods on PCI
546 * quirk supported.
547 */
548
549 static int via_reinit_one(struct pci_dev *pdev)
550 {
551 u32 timing;
552 struct ata_host *host = dev_get_drvdata(&pdev->dev);
553 const struct via_isa_bridge *config = host->private_data;
554 int rc;
555
556 rc = ata_pci_device_do_resume(pdev);
557 if (rc)
558 return rc;
559
560 via_config_fifo(pdev, config->flags);
561
562 if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
563 /* The 66 MHz devices require we enable the clock */
564 pci_read_config_dword(pdev, 0x50, &timing);
565 timing |= 0x80008;
566 pci_write_config_dword(pdev, 0x50, timing);
567 }
568 if (config->flags & VIA_BAD_CLK66) {
569 /* Disable the 66MHz clock on problem devices */
570 pci_read_config_dword(pdev, 0x50, &timing);
571 timing &= ~0x80008;
572 pci_write_config_dword(pdev, 0x50, timing);
573 }
574
575 ata_host_resume(host);
576 return 0;
577 }
578 #endif
579
580 static const struct pci_device_id via[] = {
581 { PCI_VDEVICE(VIA, 0x0571), },
582 { PCI_VDEVICE(VIA, 0x0581), },
583 { PCI_VDEVICE(VIA, 0x1571), },
584 { PCI_VDEVICE(VIA, 0x3164), },
585 { PCI_VDEVICE(VIA, 0x5324), },
586
587 { },
588 };
589
590 static struct pci_driver via_pci_driver = {
591 .name = DRV_NAME,
592 .id_table = via,
593 .probe = via_init_one,
594 .remove = ata_pci_remove_one,
595 #ifdef CONFIG_PM
596 .suspend = ata_pci_device_suspend,
597 .resume = via_reinit_one,
598 #endif
599 };
600
601 static int __init via_init(void)
602 {
603 return pci_register_driver(&via_pci_driver);
604 }
605
606 static void __exit via_exit(void)
607 {
608 pci_unregister_driver(&via_pci_driver);
609 }
610
611 MODULE_AUTHOR("Alan Cox");
612 MODULE_DESCRIPTION("low-level driver for VIA PATA");
613 MODULE_LICENSE("GPL");
614 MODULE_DEVICE_TABLE(pci, via);
615 MODULE_VERSION(DRV_VERSION);
616
617 module_init(via_init);
618 module_exit(via_exit);
x86 "subsystem" repository