9 int node
; /* NUMA node */
10 void* iommu
; /* IOMMU private data */
13 #ifdef CONFIG_CALGARY_IOMMU
14 static inline void* pci_iommu(struct pci_bus
*bus
)
16 struct pci_sysdata
*sd
= bus
->sysdata
;
20 static inline void set_pci_iommu(struct pci_bus
*bus
, void *val
)
22 struct pci_sysdata
*sd
= bus
->sysdata
;
25 #endif /* CONFIG_CALGARY_IOMMU */
27 #include <linux/mm.h> /* for struct page */
29 /* Can be used to override the logic in pci_scan_bus for skipping
30 already-configured bus numbers - to be used for buggy BIOSes
31 or architectures with incomplete PCI setup by the loader */
34 extern unsigned int pcibios_assign_all_busses(void);
36 #define pcibios_assign_all_busses() 0
38 #define pcibios_scan_all_fns(a, b) 0
40 extern unsigned long pci_mem_start
;
41 #define PCIBIOS_MIN_IO 0x1000
42 #define PCIBIOS_MIN_MEM (pci_mem_start)
44 #define PCIBIOS_MIN_CARDBUS_IO 0x4000
46 void pcibios_config_init(void);
47 struct pci_bus
* pcibios_scan_root(int bus
);
48 extern int (*pci_config_read
)(int seg
, int bus
, int dev
, int fn
, int reg
, int len
, u32
*value
);
49 extern int (*pci_config_write
)(int seg
, int bus
, int dev
, int fn
, int reg
, int len
, u32 value
);
51 void pcibios_set_master(struct pci_dev
*dev
);
52 void pcibios_penalize_isa_irq(int irq
, int active
);
53 struct irq_routing_table
*pcibios_get_irq_routing_table(void);
54 int pcibios_set_irq_routing(struct pci_dev
*dev
, int pin
, int irq
);
56 #include <linux/types.h>
57 #include <linux/slab.h>
58 #include <asm/scatterlist.h>
59 #include <linux/string.h>
62 extern void pci_iommu_alloc(void);
63 extern int iommu_setup(char *opt
);
65 /* The PCI address space does equal the physical memory
66 * address space. The networking and block device layers use
67 * this boolean for bounce buffer decisions
69 * On AMD64 it mostly equals, but we set it to zero if a hardware
70 * IOMMU (gart) of sotware IOMMU (swiotlb) is available.
72 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
74 #if defined(CONFIG_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
76 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
78 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
80 #define pci_unmap_addr(PTR, ADDR_NAME) \
82 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
83 (((PTR)->ADDR_NAME) = (VAL))
84 #define pci_unmap_len(PTR, LEN_NAME) \
86 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
87 (((PTR)->LEN_NAME) = (VAL))
92 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
93 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
94 #define pci_unmap_addr(PTR, ADDR_NAME) (0)
95 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
96 #define pci_unmap_len(PTR, LEN_NAME) (0)
97 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
101 #include <asm-generic/pci-dma-compat.h>
104 static inline void pci_dma_burst_advice(struct pci_dev
*pdev
,
105 enum pci_dma_burst_strategy
*strat
,
106 unsigned long *strategy_parameter
)
108 *strat
= PCI_DMA_BURST_INFINITY
;
109 *strategy_parameter
= ~0UL;
113 #define HAVE_PCI_MMAP
114 extern int pci_mmap_page_range(struct pci_dev
*dev
, struct vm_area_struct
*vma
,
115 enum pci_mmap_state mmap_state
, int write_combine
);
117 #endif /* __KERNEL__ */
119 /* generic pci stuff */
121 #include <asm-generic/pci.h>
124 #endif /* __x8664_PCI_H */