3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/proc_fs.h>
25 #include <linux/rbtree.h>
26 #include <linux/seq_file.h>
27 #include <linux/spinlock.h>
28 #include <asm/atomic.h>
30 #include <asm/eeh_event.h>
32 #include <asm/machdep.h>
33 #include <asm/ppc-pci.h>
39 * EEH, or "Extended Error Handling" is a PCI bridge technology for
40 * dealing with PCI bus errors that can't be dealt with within the
41 * usual PCI framework, except by check-stopping the CPU. Systems
42 * that are designed for high-availability/reliability cannot afford
43 * to crash due to a "mere" PCI error, thus the need for EEH.
44 * An EEH-capable bridge operates by converting a detected error
45 * into a "slot freeze", taking the PCI adapter off-line, making
46 * the slot behave, from the OS'es point of view, as if the slot
47 * were "empty": all reads return 0xff's and all writes are silently
48 * ignored. EEH slot isolation events can be triggered by parity
49 * errors on the address or data busses (e.g. during posted writes),
50 * which in turn might be caused by low voltage on the bus, dust,
51 * vibration, humidity, radioactivity or plain-old failed hardware.
53 * Note, however, that one of the leading causes of EEH slot
54 * freeze events are buggy device drivers, buggy device microcode,
55 * or buggy device hardware. This is because any attempt by the
56 * device to bus-master data to a memory address that is not
57 * assigned to the device will trigger a slot freeze. (The idea
58 * is to prevent devices-gone-wild from corrupting system memory).
59 * Buggy hardware/drivers will have a miserable time co-existing
62 * Ideally, a PCI device driver, when suspecting that an isolation
63 * event has occured (e.g. by reading 0xff's), will then ask EEH
64 * whether this is the case, and then take appropriate steps to
65 * reset the PCI slot, the PCI device, and then resume operations.
66 * However, until that day, the checking is done here, with the
67 * eeh_check_failure() routine embedded in the MMIO macros. If
68 * the slot is found to be isolated, an "EEH Event" is synthesized
69 * and sent out for processing.
72 /* If a device driver keeps reading an MMIO register in an interrupt
73 * handler after a slot isolation event has occurred, we assume it
74 * is broken and panic. This sets the threshold for how many read
75 * attempts we allow before panicking.
77 #define EEH_MAX_FAILS 100000
80 static int ibm_set_eeh_option
;
81 static int ibm_set_slot_reset
;
82 static int ibm_read_slot_reset_state
;
83 static int ibm_read_slot_reset_state2
;
84 static int ibm_slot_error_detail
;
85 static int ibm_get_config_addr_info
;
87 int eeh_subsystem_enabled
;
88 EXPORT_SYMBOL(eeh_subsystem_enabled
);
90 /* Lock to avoid races due to multiple reports of an error */
91 static DEFINE_SPINLOCK(confirm_error_lock
);
93 /* Buffer for reporting slot-error-detail rtas calls */
94 static unsigned char slot_errbuf
[RTAS_ERROR_LOG_MAX
];
95 static DEFINE_SPINLOCK(slot_errbuf_lock
);
96 static int eeh_error_buf_size
;
98 /* System monitoring statistics */
99 static DEFINE_PER_CPU(unsigned long, no_device
);
100 static DEFINE_PER_CPU(unsigned long, no_dn
);
101 static DEFINE_PER_CPU(unsigned long, no_cfg_addr
);
102 static DEFINE_PER_CPU(unsigned long, ignored_check
);
103 static DEFINE_PER_CPU(unsigned long, total_mmio_ffs
);
104 static DEFINE_PER_CPU(unsigned long, false_positives
);
105 static DEFINE_PER_CPU(unsigned long, ignored_failures
);
106 static DEFINE_PER_CPU(unsigned long, slot_resets
);
108 /* --------------------------------------------------------------- */
109 /* Below lies the EEH event infrastructure */
111 void eeh_slot_error_detail (struct pci_dn
*pdn
, int severity
)
117 /* Log the error with the rtas logger */
118 spin_lock_irqsave(&slot_errbuf_lock
, flags
);
119 memset(slot_errbuf
, 0, eeh_error_buf_size
);
121 /* Use PE configuration address, if present */
122 config_addr
= pdn
->eeh_config_addr
;
123 if (pdn
->eeh_pe_config_addr
)
124 config_addr
= pdn
->eeh_pe_config_addr
;
126 rc
= rtas_call(ibm_slot_error_detail
,
127 8, 1, NULL
, config_addr
,
128 BUID_HI(pdn
->phb
->buid
),
129 BUID_LO(pdn
->phb
->buid
), NULL
, 0,
130 virt_to_phys(slot_errbuf
),
135 log_error(slot_errbuf
, ERR_TYPE_RTAS_LOG
, 0);
136 spin_unlock_irqrestore(&slot_errbuf_lock
, flags
);
140 * read_slot_reset_state - Read the reset state of a device node's slot
141 * @dn: device node to read
142 * @rets: array to return results in
144 static int read_slot_reset_state(struct pci_dn
*pdn
, int rets
[])
149 if (ibm_read_slot_reset_state2
!= RTAS_UNKNOWN_SERVICE
) {
150 token
= ibm_read_slot_reset_state2
;
153 token
= ibm_read_slot_reset_state
;
154 rets
[2] = 0; /* fake PE Unavailable info */
158 /* Use PE configuration address, if present */
159 config_addr
= pdn
->eeh_config_addr
;
160 if (pdn
->eeh_pe_config_addr
)
161 config_addr
= pdn
->eeh_pe_config_addr
;
163 return rtas_call(token
, 3, outputs
, rets
, config_addr
,
164 BUID_HI(pdn
->phb
->buid
), BUID_LO(pdn
->phb
->buid
));
168 * eeh_token_to_phys - convert EEH address token to phys address
169 * @token i/o token, should be address in the form 0xA....
171 static inline unsigned long eeh_token_to_phys(unsigned long token
)
176 ptep
= find_linux_pte(init_mm
.pgd
, token
);
179 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
181 return pa
| (token
& (PAGE_SIZE
-1));
185 * Return the "partitionable endpoint" (pe) under which this device lies
187 struct device_node
* find_device_pe(struct device_node
*dn
)
189 while ((dn
->parent
) && PCI_DN(dn
->parent
) &&
190 (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
196 /** Mark all devices that are peers of this device as failed.
197 * Mark the device driver too, so that it can see the failure
198 * immediately; this is critical, since some drivers poll
199 * status registers in interrupts ... If a driver is polling,
200 * and the slot is frozen, then the driver can deadlock in
201 * an interrupt context, which is bad.
204 static void __eeh_mark_slot (struct device_node
*dn
, int mode_flag
)
208 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
210 /* Mark the pci device driver too */
211 struct pci_dev
*dev
= PCI_DN(dn
)->pcidev
;
212 if (dev
&& dev
->driver
)
213 dev
->error_state
= pci_channel_io_frozen
;
216 __eeh_mark_slot (dn
->child
, mode_flag
);
222 void eeh_mark_slot (struct device_node
*dn
, int mode_flag
)
224 dn
= find_device_pe (dn
);
225 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
226 __eeh_mark_slot (dn
->child
, mode_flag
);
229 static void __eeh_clear_slot (struct device_node
*dn
, int mode_flag
)
233 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
234 PCI_DN(dn
)->eeh_check_count
= 0;
236 __eeh_clear_slot (dn
->child
, mode_flag
);
242 void eeh_clear_slot (struct device_node
*dn
, int mode_flag
)
245 spin_lock_irqsave(&confirm_error_lock
, flags
);
246 dn
= find_device_pe (dn
);
247 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
248 PCI_DN(dn
)->eeh_check_count
= 0;
249 __eeh_clear_slot (dn
->child
, mode_flag
);
250 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
254 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
256 * @dev pci device, if known
258 * Check for an EEH failure for the given device node. Call this
259 * routine if the result of a read was all 0xff's and you want to
260 * find out if this is due to an EEH slot freeze. This routine
261 * will query firmware for the EEH status.
263 * Returns 0 if there has not been an EEH error; otherwise returns
264 * a non-zero value and queues up a slot isolation event notification.
266 * It is safe to call this routine in an interrupt context.
268 int eeh_dn_check_failure(struct device_node
*dn
, struct pci_dev
*dev
)
274 enum pci_channel_state state
;
277 __get_cpu_var(total_mmio_ffs
)++;
279 if (!eeh_subsystem_enabled
)
283 __get_cpu_var(no_dn
)++;
288 /* Access to IO BARs might get this far and still not want checking. */
289 if (!(pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) ||
290 pdn
->eeh_mode
& EEH_MODE_NOCHECK
) {
291 __get_cpu_var(ignored_check
)++;
293 printk ("EEH:ignored check (%x) for %s %s\n",
294 pdn
->eeh_mode
, pci_name (dev
), dn
->full_name
);
299 if (!pdn
->eeh_config_addr
&& !pdn
->eeh_pe_config_addr
) {
300 __get_cpu_var(no_cfg_addr
)++;
304 /* If we already have a pending isolation event for this
305 * slot, we know it's bad already, we don't need to check.
306 * Do this checking under a lock; as multiple PCI devices
307 * in one slot might report errors simultaneously, and we
308 * only want one error recovery routine running.
310 spin_lock_irqsave(&confirm_error_lock
, flags
);
312 if (pdn
->eeh_mode
& EEH_MODE_ISOLATED
) {
313 pdn
->eeh_check_count
++;
314 if (pdn
->eeh_check_count
>= EEH_MAX_FAILS
) {
315 printk (KERN_ERR
"EEH: Device driver ignored %d bad reads, panicing\n",
316 pdn
->eeh_check_count
);
319 /* re-read the slot reset state */
320 if (read_slot_reset_state(pdn
, rets
) != 0)
321 rets
[0] = -1; /* reset state unknown */
323 /* If we are here, then we hit an infinite loop. Stop. */
324 panic("EEH: MMIO halt (%d) on device:%s\n", rets
[0], pci_name(dev
));
330 * Now test for an EEH failure. This is VERY expensive.
331 * Note that the eeh_config_addr may be a parent device
332 * in the case of a device behind a bridge, or it may be
333 * function zero of a multi-function device.
334 * In any case they must share a common PHB.
336 ret
= read_slot_reset_state(pdn
, rets
);
338 /* If the call to firmware failed, punt */
340 printk(KERN_WARNING
"EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
342 __get_cpu_var(false_positives
)++;
347 /* If EEH is not supported on this device, punt. */
349 printk(KERN_WARNING
"EEH: event on unsupported device, rc=%d dn=%s\n",
351 __get_cpu_var(false_positives
)++;
356 /* If not the kind of error we know about, punt. */
357 if (rets
[0] != 2 && rets
[0] != 4 && rets
[0] != 5) {
358 __get_cpu_var(false_positives
)++;
363 /* Note that config-io to empty slots may fail;
364 * we recognize empty because they don't have children. */
365 if ((rets
[0] == 5) && (dn
->child
== NULL
)) {
366 __get_cpu_var(false_positives
)++;
371 __get_cpu_var(slot_resets
)++;
373 /* Avoid repeated reports of this failure, including problems
374 * with other functions on this device, and functions under
376 eeh_mark_slot (dn
, EEH_MODE_ISOLATED
);
377 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
379 state
= pci_channel_io_normal
;
380 if ((rets
[0] == 2) || (rets
[0] == 4))
381 state
= pci_channel_io_frozen
;
383 state
= pci_channel_io_perm_failure
;
384 eeh_send_failure_event (dn
, dev
, state
, rets
[2]);
386 /* Most EEH events are due to device driver bugs. Having
387 * a stack trace will help the device-driver authors figure
388 * out what happened. So print that out. */
389 if (rets
[0] != 5) dump_stack();
393 spin_unlock_irqrestore(&confirm_error_lock
, flags
);
397 EXPORT_SYMBOL_GPL(eeh_dn_check_failure
);
400 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
401 * @token i/o token, should be address in the form 0xA....
402 * @val value, should be all 1's (XXX why do we need this arg??)
404 * Check for an EEH failure at the given token address. Call this
405 * routine if the result of a read was all 0xff's and you want to
406 * find out if this is due to an EEH slot freeze event. This routine
407 * will query firmware for the EEH status.
409 * Note this routine is safe to call in an interrupt context.
411 unsigned long eeh_check_failure(const volatile void __iomem
*token
, unsigned long val
)
415 struct device_node
*dn
;
417 /* Finding the phys addr + pci device; this is pretty quick. */
418 addr
= eeh_token_to_phys((unsigned long __force
) token
);
419 dev
= pci_get_device_by_addr(addr
);
421 __get_cpu_var(no_device
)++;
425 dn
= pci_device_to_OF_node(dev
);
426 eeh_dn_check_failure (dn
, dev
);
432 EXPORT_SYMBOL(eeh_check_failure
);
434 /* ------------------------------------------------------------- */
435 /* The code below deals with error recovery */
437 /** Return negative value if a permanent error, else return
438 * a number of milliseconds to wait until the PCI slot is
442 eeh_slot_availability(struct pci_dn
*pdn
)
447 rc
= read_slot_reset_state(pdn
, rets
);
451 if (rets
[1] == 0) return -1; /* EEH is not supported */
452 if (rets
[0] == 0) return 0; /* Oll Korrect */
454 if (rets
[2] == 0) return -1; /* permanently unavailable */
455 return rets
[2]; /* number of millisecs to wait */
460 /** rtas_pci_slot_reset raises/lowers the pci #RST line
461 * state: 1/0 to raise/lower the #RST
463 * Clear the EEH-frozen condition on a slot. This routine
464 * asserts the PCI #RST line if the 'state' argument is '1',
465 * and drops the #RST line if 'state is '0'. This routine is
466 * safe to call in an interrupt context.
471 rtas_pci_slot_reset(struct pci_dn
*pdn
, int state
)
479 printk (KERN_WARNING
"EEH: in slot reset, device node %s has no phb\n",
480 pdn
->node
->full_name
);
484 /* Use PE configuration address, if present */
485 config_addr
= pdn
->eeh_config_addr
;
486 if (pdn
->eeh_pe_config_addr
)
487 config_addr
= pdn
->eeh_pe_config_addr
;
489 rc
= rtas_call(ibm_set_slot_reset
,4,1, NULL
,
491 BUID_HI(pdn
->phb
->buid
),
492 BUID_LO(pdn
->phb
->buid
),
495 printk (KERN_WARNING
"EEH: Unable to reset the failed slot, (%d) #RST=%d dn=%s\n",
496 rc
, state
, pdn
->node
->full_name
);
501 /** rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
502 * dn -- device node to be reset.
506 rtas_set_slot_reset(struct pci_dn
*pdn
)
510 rtas_pci_slot_reset (pdn
, 1);
512 /* The PCI bus requires that the reset be held high for at least
513 * a 100 milliseconds. We wait a bit longer 'just in case'. */
515 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
516 msleep (PCI_BUS_RST_HOLD_TIME_MSEC
);
518 /* We might get hit with another EEH freeze as soon as the
519 * pci slot reset line is dropped. Make sure we don't miss
520 * these, and clear the flag now. */
521 eeh_clear_slot (pdn
->node
, EEH_MODE_ISOLATED
);
523 rtas_pci_slot_reset (pdn
, 0);
525 /* After a PCI slot has been reset, the PCI Express spec requires
526 * a 1.5 second idle time for the bus to stabilize, before starting
528 #define PCI_BUS_SETTLE_TIME_MSEC 1800
529 msleep (PCI_BUS_SETTLE_TIME_MSEC
);
531 /* Now double check with the firmware to make sure the device is
532 * ready to be used; if not, wait for recovery. */
533 for (i
=0; i
<10; i
++) {
534 rc
= eeh_slot_availability (pdn
);
541 /* ------------------------------------------------------- */
542 /** Save and restore of PCI BARs
544 * Although firmware will set up BARs during boot, it doesn't
545 * set up device BAR's after a device reset, although it will,
546 * if requested, set up bridge configuration. Thus, we need to
547 * configure the PCI devices ourselves.
551 * __restore_bars - Restore the Base Address Registers
552 * Loads the PCI configuration space base address registers,
553 * the expansion ROM base address, the latency timer, and etc.
554 * from the saved values in the device node.
556 static inline void __restore_bars (struct pci_dn
*pdn
)
560 if (NULL
==pdn
->phb
) return;
561 for (i
=4; i
<10; i
++) {
562 rtas_write_config(pdn
, i
*4, 4, pdn
->config_space
[i
]);
565 /* 12 == Expansion ROM Address */
566 rtas_write_config(pdn
, 12*4, 4, pdn
->config_space
[12]);
568 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
569 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
571 rtas_write_config (pdn
, PCI_CACHE_LINE_SIZE
, 1,
572 SAVED_BYTE(PCI_CACHE_LINE_SIZE
));
574 rtas_write_config (pdn
, PCI_LATENCY_TIMER
, 1,
575 SAVED_BYTE(PCI_LATENCY_TIMER
));
577 /* max latency, min grant, interrupt pin and line */
578 rtas_write_config(pdn
, 15*4, 4, pdn
->config_space
[15]);
582 * eeh_restore_bars - restore the PCI config space info
584 * This routine performs a recursive walk to the children
585 * of this device as well.
587 void eeh_restore_bars(struct pci_dn
*pdn
)
589 struct device_node
*dn
;
593 if (! pdn
->eeh_is_bridge
)
594 __restore_bars (pdn
);
596 dn
= pdn
->node
->child
;
598 eeh_restore_bars (PCI_DN(dn
));
604 * eeh_save_bars - save device bars
606 * Save the values of the device bars. Unlike the restore
607 * routine, this routine is *not* recursive. This is because
608 * PCI devices are added individuallly; but, for the restore,
609 * an entire slot is reset at a time.
611 void eeh_save_bars(struct pci_dev
* pdev
, struct pci_dn
*pdn
)
618 for (i
= 0; i
< 16; i
++)
619 pci_read_config_dword(pdev
, i
* 4, &pdn
->config_space
[i
]);
621 if (pdev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
)
622 pdn
->eeh_is_bridge
= 1;
626 rtas_configure_bridge(struct pci_dn
*pdn
)
629 int token
= rtas_token ("ibm,configure-bridge");
632 if (token
== RTAS_UNKNOWN_SERVICE
)
635 /* Use PE configuration address, if present */
636 config_addr
= pdn
->eeh_config_addr
;
637 if (pdn
->eeh_pe_config_addr
)
638 config_addr
= pdn
->eeh_pe_config_addr
;
640 rc
= rtas_call(token
,3,1, NULL
,
642 BUID_HI(pdn
->phb
->buid
),
643 BUID_LO(pdn
->phb
->buid
));
645 printk (KERN_WARNING
"EEH: Unable to configure device bridge (%d) for %s\n",
646 rc
, pdn
->node
->full_name
);
650 /* ------------------------------------------------------------- */
651 /* The code below deals with enabling EEH for devices during the
652 * early boot sequence. EEH must be enabled before any PCI probing
658 struct eeh_early_enable_info
{
659 unsigned int buid_hi
;
660 unsigned int buid_lo
;
663 /* Enable eeh for the given device node. */
664 static void *early_enable_eeh(struct device_node
*dn
, void *data
)
666 struct eeh_early_enable_info
*info
= data
;
668 char *status
= get_property(dn
, "status", NULL
);
669 u32
*class_code
= (u32
*)get_property(dn
, "class-code", NULL
);
670 u32
*vendor_id
= (u32
*)get_property(dn
, "vendor-id", NULL
);
671 u32
*device_id
= (u32
*)get_property(dn
, "device-id", NULL
);
674 struct pci_dn
*pdn
= PCI_DN(dn
);
677 pdn
->eeh_check_count
= 0;
678 pdn
->eeh_freeze_count
= 0;
680 if (status
&& strcmp(status
, "ok") != 0)
681 return NULL
; /* ignore devices with bad status */
683 /* Ignore bad nodes. */
684 if (!class_code
|| !vendor_id
|| !device_id
)
687 /* There is nothing to check on PCI to ISA bridges */
688 if (dn
->type
&& !strcmp(dn
->type
, "isa")) {
689 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
694 * Now decide if we are going to "Disable" EEH checking
695 * for this device. We still run with the EEH hardware active,
696 * but we won't be checking for ff's. This means a driver
697 * could return bad data (very bad!), an interrupt handler could
698 * hang waiting on status bits that won't change, etc.
699 * But there are a few cases like display devices that make sense.
701 enable
= 1; /* i.e. we will do checking */
703 if ((*class_code
>> 16) == PCI_BASE_CLASS_DISPLAY
)
708 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
710 /* Ok... see if this device supports EEH. Some do, some don't,
711 * and the only way to find out is to check each and every one. */
712 regs
= (u32
*)get_property(dn
, "reg", NULL
);
714 /* First register entry is addr (00BBSS00) */
715 /* Try to enable eeh */
716 ret
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
717 regs
[0], info
->buid_hi
, info
->buid_lo
,
721 eeh_subsystem_enabled
= 1;
722 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
723 pdn
->eeh_config_addr
= regs
[0];
725 /* If the newer, better, ibm,get-config-addr-info is supported,
726 * then use that instead. */
727 pdn
->eeh_pe_config_addr
= 0;
728 if (ibm_get_config_addr_info
!= RTAS_UNKNOWN_SERVICE
) {
729 unsigned int rets
[2];
730 ret
= rtas_call (ibm_get_config_addr_info
, 4, 2, rets
,
731 pdn
->eeh_config_addr
,
732 info
->buid_hi
, info
->buid_lo
,
735 pdn
->eeh_pe_config_addr
= rets
[0];
738 printk(KERN_DEBUG
"EEH: %s: eeh enabled, config=%x pe_config=%x\n",
739 dn
->full_name
, pdn
->eeh_config_addr
, pdn
->eeh_pe_config_addr
);
743 /* This device doesn't support EEH, but it may have an
744 * EEH parent, in which case we mark it as supported. */
745 if (dn
->parent
&& PCI_DN(dn
->parent
)
746 && (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
747 /* Parent supports EEH. */
748 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
749 pdn
->eeh_config_addr
= PCI_DN(dn
->parent
)->eeh_config_addr
;
754 printk(KERN_WARNING
"EEH: %s: unable to get reg property.\n",
762 * Initialize EEH by trying to enable it for all of the adapters in the system.
763 * As a side effect we can determine here if eeh is supported at all.
764 * Note that we leave EEH on so failed config cycles won't cause a machine
765 * check. If a user turns off EEH for a particular adapter they are really
766 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
767 * grant access to a slot if EEH isn't enabled, and so we always enable
768 * EEH for all slots/all devices.
770 * The eeh-force-off option disables EEH checking globally, for all slots.
771 * Even if force-off is set, the EEH hardware is still enabled, so that
772 * newer systems can boot.
774 void __init
eeh_init(void)
776 struct device_node
*phb
, *np
;
777 struct eeh_early_enable_info info
;
779 spin_lock_init(&confirm_error_lock
);
780 spin_lock_init(&slot_errbuf_lock
);
782 np
= of_find_node_by_path("/rtas");
786 ibm_set_eeh_option
= rtas_token("ibm,set-eeh-option");
787 ibm_set_slot_reset
= rtas_token("ibm,set-slot-reset");
788 ibm_read_slot_reset_state2
= rtas_token("ibm,read-slot-reset-state2");
789 ibm_read_slot_reset_state
= rtas_token("ibm,read-slot-reset-state");
790 ibm_slot_error_detail
= rtas_token("ibm,slot-error-detail");
791 ibm_get_config_addr_info
= rtas_token("ibm,get-config-addr-info");
793 if (ibm_set_eeh_option
== RTAS_UNKNOWN_SERVICE
)
796 eeh_error_buf_size
= rtas_token("rtas-error-log-max");
797 if (eeh_error_buf_size
== RTAS_UNKNOWN_SERVICE
) {
798 eeh_error_buf_size
= 1024;
800 if (eeh_error_buf_size
> RTAS_ERROR_LOG_MAX
) {
801 printk(KERN_WARNING
"EEH: rtas-error-log-max is bigger than allocated "
802 "buffer ! (%d vs %d)", eeh_error_buf_size
, RTAS_ERROR_LOG_MAX
);
803 eeh_error_buf_size
= RTAS_ERROR_LOG_MAX
;
806 /* Enable EEH for all adapters. Note that eeh requires buid's */
807 for (phb
= of_find_node_by_name(NULL
, "pci"); phb
;
808 phb
= of_find_node_by_name(phb
, "pci")) {
811 buid
= get_phb_buid(phb
);
812 if (buid
== 0 || PCI_DN(phb
) == NULL
)
815 info
.buid_lo
= BUID_LO(buid
);
816 info
.buid_hi
= BUID_HI(buid
);
817 traverse_pci_devices(phb
, early_enable_eeh
, &info
);
820 if (eeh_subsystem_enabled
)
821 printk(KERN_INFO
"EEH: PCI Enhanced I/O Error Handling Enabled\n");
823 printk(KERN_WARNING
"EEH: No capable adapters found\n");
827 * eeh_add_device_early - enable EEH for the indicated device_node
828 * @dn: device node for which to set up EEH
830 * This routine must be used to perform EEH initialization for PCI
831 * devices that were added after system boot (e.g. hotplug, dlpar).
832 * This routine must be called before any i/o is performed to the
833 * adapter (inluding any config-space i/o).
834 * Whether this actually enables EEH or not for this device depends
835 * on the CEC architecture, type of the device, on earlier boot
836 * command-line arguments & etc.
838 void eeh_add_device_early(struct device_node
*dn
)
840 struct pci_controller
*phb
;
841 struct eeh_early_enable_info info
;
843 if (!dn
|| !PCI_DN(dn
))
845 phb
= PCI_DN(dn
)->phb
;
847 /* USB Bus children of PCI devices will not have BUID's */
848 if (NULL
== phb
|| 0 == phb
->buid
)
851 info
.buid_hi
= BUID_HI(phb
->buid
);
852 info
.buid_lo
= BUID_LO(phb
->buid
);
853 early_enable_eeh(dn
, &info
);
855 EXPORT_SYMBOL_GPL(eeh_add_device_early
);
857 void eeh_add_device_tree_early(struct device_node
*dn
)
859 struct device_node
*sib
;
860 for (sib
= dn
->child
; sib
; sib
= sib
->sibling
)
861 eeh_add_device_tree_early(sib
);
862 eeh_add_device_early(dn
);
864 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early
);
867 * eeh_add_device_late - perform EEH initialization for the indicated pci device
868 * @dev: pci device for which to set up EEH
870 * This routine must be used to complete EEH initialization for PCI
871 * devices that were added after system boot (e.g. hotplug, dlpar).
873 void eeh_add_device_late(struct pci_dev
*dev
)
875 struct device_node
*dn
;
878 if (!dev
|| !eeh_subsystem_enabled
)
882 printk(KERN_DEBUG
"EEH: adding device %s\n", pci_name(dev
));
886 dn
= pci_device_to_OF_node(dev
);
890 pci_addr_cache_insert_device (dev
);
891 eeh_save_bars(dev
, pdn
);
893 EXPORT_SYMBOL_GPL(eeh_add_device_late
);
896 * eeh_remove_device - undo EEH setup for the indicated pci device
897 * @dev: pci device to be removed
899 * This routine should be when a device is removed from a running
900 * system (e.g. by hotplug or dlpar).
902 void eeh_remove_device(struct pci_dev
*dev
)
904 struct device_node
*dn
;
905 if (!dev
|| !eeh_subsystem_enabled
)
908 /* Unregister the device with the EEH/PCI address search system */
910 printk(KERN_DEBUG
"EEH: remove device %s\n", pci_name(dev
));
912 pci_addr_cache_remove_device(dev
);
914 dn
= pci_device_to_OF_node(dev
);
915 PCI_DN(dn
)->pcidev
= NULL
;
918 EXPORT_SYMBOL_GPL(eeh_remove_device
);
920 void eeh_remove_bus_device(struct pci_dev
*dev
)
922 eeh_remove_device(dev
);
923 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
924 struct pci_bus
*bus
= dev
->subordinate
;
925 struct list_head
*ln
;
928 for (ln
= bus
->devices
.next
; ln
!= &bus
->devices
; ln
= ln
->next
) {
929 struct pci_dev
*pdev
= pci_dev_b(ln
);
931 eeh_remove_bus_device(pdev
);
935 EXPORT_SYMBOL_GPL(eeh_remove_bus_device
);
937 static int proc_eeh_show(struct seq_file
*m
, void *v
)
940 unsigned long ffs
= 0, positives
= 0, failures
= 0;
941 unsigned long resets
= 0;
942 unsigned long no_dev
= 0, no_dn
= 0, no_cfg
= 0, no_check
= 0;
945 ffs
+= per_cpu(total_mmio_ffs
, cpu
);
946 positives
+= per_cpu(false_positives
, cpu
);
947 failures
+= per_cpu(ignored_failures
, cpu
);
948 resets
+= per_cpu(slot_resets
, cpu
);
949 no_dev
+= per_cpu(no_device
, cpu
);
950 no_dn
+= per_cpu(no_dn
, cpu
);
951 no_cfg
+= per_cpu(no_cfg_addr
, cpu
);
952 no_check
+= per_cpu(ignored_check
, cpu
);
955 if (0 == eeh_subsystem_enabled
) {
956 seq_printf(m
, "EEH Subsystem is globally disabled\n");
957 seq_printf(m
, "eeh_total_mmio_ffs=%ld\n", ffs
);
959 seq_printf(m
, "EEH Subsystem is enabled\n");
962 "no device node=%ld\n"
963 "no config address=%ld\n"
964 "check not wanted=%ld\n"
965 "eeh_total_mmio_ffs=%ld\n"
966 "eeh_false_positives=%ld\n"
967 "eeh_ignored_failures=%ld\n"
968 "eeh_slot_resets=%ld\n",
969 no_dev
, no_dn
, no_cfg
, no_check
,
970 ffs
, positives
, failures
, resets
);
976 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
978 return single_open(file
, proc_eeh_show
, NULL
);
981 static struct file_operations proc_eeh_operations
= {
982 .open
= proc_eeh_open
,
985 .release
= single_release
,
988 static int __init
eeh_init_proc(void)
990 struct proc_dir_entry
*e
;
992 if (platform_is_pseries()) {
993 e
= create_proc_entry("ppc64/eeh", 0, NULL
);
995 e
->proc_fops
= &proc_eeh_operations
;
1000 __initcall(eeh_init_proc
);