arch/x86/kernel/i387.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <linux/module.h>
   9 #include <linux/regset.h>
  10 #include <linux/sched.h>
  11
  12 #include <asm/sigcontext.h>
  13 #include <asm/processor.h>
  14 #include <asm/math_emu.h>
  15 #include <asm/uaccess.h>
  16 #include <asm/ptrace.h>
  17 #include <asm/i387.h>
  18 #include <asm/user.h>
  19
  20 #ifdef CONFIG_X86_64
  21 # include <asm/sigcontext32.h>
  22 # include <asm/user32.h>
  23 #else
  24 # define save_i387_ia32         save_i387
  25 # define restore_i387_ia32      restore_i387
  26 # define _fpstate_ia32          _fpstate
  27 # define user_i387_ia32_struct  user_i387_struct
  28 # define user32_fxsr_struct     user_fxsr_struct
  29 #endif
  30
  31 #ifdef CONFIG_MATH_EMULATION
  32 # define HAVE_HWFP              (boot_cpu_data.hard_math)
  33 #else
  34 # define HAVE_HWFP              1
  35 #endif
  36
  37 static unsigned int             mxcsr_feature_mask __read_mostly = 0xffffffffu;
  38
  39 void mxcsr_feature_mask_init(void)
  40 {
  41         unsigned long mask = 0;
  42
  43         clts();
  44         if (cpu_has_fxsr) {
  45                 memset(&current->thread.i387.fxsave, 0,
  46                        sizeof(struct i387_fxsave_struct));
  47                 asm volatile("fxsave %0" : : "m" (current->thread.i387.fxsave));
  48                 mask = current->thread.i387.fxsave.mxcsr_mask;
  49                 if (mask == 0)
  50                         mask = 0x0000ffbf;
  51         }
  52         mxcsr_feature_mask &= mask;
  53         stts();
  54 }
  55
  56 #ifdef CONFIG_X86_64
  57 /*
  58  * Called at bootup to set up the initial FPU state that is later cloned
  59  * into all processes.
  60  */
  61 void __cpuinit fpu_init(void)
  62 {
  63         unsigned long oldcr0 = read_cr0();
  64         extern void __bad_fxsave_alignment(void);
  65
  66         if (offsetof(struct task_struct, thread.i387.fxsave) & 15)
  67                 __bad_fxsave_alignment();
  68
  69         set_in_cr4(X86_CR4_OSFXSR);
  70         set_in_cr4(X86_CR4_OSXMMEXCPT);
  71
  72         write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
  73
  74         mxcsr_feature_mask_init();
  75         /* clean state in init */
  76         current_thread_info()->status = 0;
  77         clear_used_math();
  78 }
  79 #endif  /* CONFIG_X86_64 */
  80
  81 /*
  82  * The _current_ task is using the FPU for the first time
  83  * so initialize it and set the mxcsr to its default
  84  * value at reset if we support XMM instructions and then
  85  * remeber the current task has used the FPU.
  86  */
  87 void init_fpu(struct task_struct *tsk)
  88 {
  89         if (tsk_used_math(tsk)) {
  90                 if (tsk == current)
  91                         unlazy_fpu(tsk);
  92                 return;
  93         }
  94
  95         if (cpu_has_fxsr) {
  96                 memset(&tsk->thread.i387.fxsave, 0,
  97                        sizeof(struct i387_fxsave_struct));
  98                 tsk->thread.i387.fxsave.cwd = 0x37f;
  99                 if (cpu_has_xmm)
 100                         tsk->thread.i387.fxsave.mxcsr = MXCSR_DEFAULT;
 101         } else {
 102                 memset(&tsk->thread.i387.fsave, 0,
 103                        sizeof(struct i387_fsave_struct));
 104                 tsk->thread.i387.fsave.cwd = 0xffff037fu;
 105                 tsk->thread.i387.fsave.swd = 0xffff0000u;
 106                 tsk->thread.i387.fsave.twd = 0xffffffffu;
 107                 tsk->thread.i387.fsave.fos = 0xffff0000u;
 108         }
 109         /*
 110          * Only the device not available exception or ptrace can call init_fpu.
 111          */
 112         set_stopped_child_used_math(tsk);
 113 }
 114
 115 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 116 {
 117         return tsk_used_math(target) ? regset->n : 0;
 118 }
 119
 120 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 121 {
 122         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 123 }
 124
 125 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 126                 unsigned int pos, unsigned int count,
 127                 void *kbuf, void __user *ubuf)
 128 {
 129         if (!cpu_has_fxsr)
 130                 return -ENODEV;
 131
 132         init_fpu(target);
 133
 134         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 135                                    &target->thread.i387.fxsave, 0, -1);
 136 }
 137
 138 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 139                 unsigned int pos, unsigned int count,
 140                 const void *kbuf, const void __user *ubuf)
 141 {
 142         int ret;
 143
 144         if (!cpu_has_fxsr)
 145                 return -ENODEV;
 146
 147         init_fpu(target);
 148         set_stopped_child_used_math(target);
 149
 150         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 151                                  &target->thread.i387.fxsave, 0, -1);
 152
 153         /*
 154          * mxcsr reserved bits must be masked to zero for security reasons.
 155          */
 156         target->thread.i387.fxsave.mxcsr &= mxcsr_feature_mask;
 157
 158         return ret;
 159 }
 160
 161 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 162
 163 /*
 164  * FPU tag word conversions.
 165  */
 166
 167 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 168 {
 169         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 170
 171         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 172         tmp = ~twd;
 173         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 174         /* and move the valid bits to the lower byte. */
 175         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 176         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 177         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 178
 179         return tmp;
 180 }
 181
 182 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16);
 183 #define FP_EXP_TAG_VALID        0
 184 #define FP_EXP_TAG_ZERO         1
 185 #define FP_EXP_TAG_SPECIAL      2
 186 #define FP_EXP_TAG_EMPTY        3
 187
 188 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 189 {
 190         struct _fpxreg *st;
 191         u32 tos = (fxsave->swd >> 11) & 7;
 192         u32 twd = (unsigned long) fxsave->twd;
 193         u32 tag;
 194         u32 ret = 0xffff0000u;
 195         int i;
 196
 197         for (i = 0; i < 8; i++, twd >>= 1) {
 198                 if (twd & 0x1) {
 199                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 200
 201                         switch (st->exponent & 0x7fff) {
 202                         case 0x7fff:
 203                                 tag = FP_EXP_TAG_SPECIAL;
 204                                 break;
 205                         case 0x0000:
 206                                 if (!st->significand[0] &&
 207                                     !st->significand[1] &&
 208                                     !st->significand[2] &&
 209                                     !st->significand[3])
 210                                         tag = FP_EXP_TAG_ZERO;
 211                                 else
 212                                         tag = FP_EXP_TAG_SPECIAL;
 213                                 break;
 214                         default:
 215                                 if (st->significand[3] & 0x8000)
 216                                         tag = FP_EXP_TAG_VALID;
 217                                 else
 218                                         tag = FP_EXP_TAG_SPECIAL;
 219                                 break;
 220                         }
 221                 } else {
 222                         tag = FP_EXP_TAG_EMPTY;
 223                 }
 224                 ret |= tag << (2 * i);
 225         }
 226         return ret;
 227 }
 228
 229 /*
 230  * FXSR floating point environment conversions.
 231  */
 232
 233 static void
 234 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 235 {
 236         struct i387_fxsave_struct *fxsave = &tsk->thread.i387.fxsave;
 237         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 238         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 239         int i;
 240
 241         env->cwd = fxsave->cwd | 0xffff0000u;
 242         env->swd = fxsave->swd | 0xffff0000u;
 243         env->twd = twd_fxsr_to_i387(fxsave);
 244
 245 #ifdef CONFIG_X86_64
 246         env->fip = fxsave->rip;
 247         env->foo = fxsave->rdp;
 248         if (tsk == current) {
 249                 /*
 250                  * should be actually ds/cs at fpu exception time, but
 251                  * that information is not available in 64bit mode.
 252                  */
 253                 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
 254                 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
 255         } else {
 256                 struct pt_regs *regs = task_pt_regs(tsk);
 257
 258                 env->fos = 0xffff0000 | tsk->thread.ds;
 259                 env->fcs = regs->cs;
 260         }
 261 #else
 262         env->fip = fxsave->fip;
 263         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 264         env->foo = fxsave->foo;
 265         env->fos = fxsave->fos;
 266 #endif
 267
 268         for (i = 0; i < 8; ++i)
 269                 memcpy(&to[i], &from[i], sizeof(to[0]));
 270 }
 271
 272 static void convert_to_fxsr(struct task_struct *tsk,
 273                             const struct user_i387_ia32_struct *env)
 274
 275 {
 276         struct i387_fxsave_struct *fxsave = &tsk->thread.i387.fxsave;
 277         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 278         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 279         int i;
 280
 281         fxsave->cwd = env->cwd;
 282         fxsave->swd = env->swd;
 283         fxsave->twd = twd_i387_to_fxsr(env->twd);
 284         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 285 #ifdef CONFIG_X86_64
 286         fxsave->rip = env->fip;
 287         fxsave->rdp = env->foo;
 288         /* cs and ds ignored */
 289 #else
 290         fxsave->fip = env->fip;
 291         fxsave->fcs = (env->fcs & 0xffff);
 292         fxsave->foo = env->foo;
 293         fxsave->fos = env->fos;
 294 #endif
 295
 296         for (i = 0; i < 8; ++i)
 297                 memcpy(&to[i], &from[i], sizeof(from[0]));
 298 }
 299
 300 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 301                unsigned int pos, unsigned int count,
 302                void *kbuf, void __user *ubuf)
 303 {
 304         struct user_i387_ia32_struct env;
 305
 306         if (!HAVE_HWFP)
 307                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 308
 309         init_fpu(target);
 310
 311         if (!cpu_has_fxsr) {
 312                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 313                                            &target->thread.i387.fsave, 0, -1);
 314         }
 315
 316         if (kbuf && pos == 0 && count == sizeof(env)) {
 317                 convert_from_fxsr(kbuf, target);
 318                 return 0;
 319         }
 320
 321         convert_from_fxsr(&env, target);
 322
 323         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 324 }
 325
 326 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 327                unsigned int pos, unsigned int count,
 328                const void *kbuf, const void __user *ubuf)
 329 {
 330         struct user_i387_ia32_struct env;
 331         int ret;
 332
 333         if (!HAVE_HWFP)
 334                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 335
 336         init_fpu(target);
 337         set_stopped_child_used_math(target);
 338
 339         if (!cpu_has_fxsr) {
 340                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 341                                           &target->thread.i387.fsave, 0, -1);
 342         }
 343
 344         if (pos > 0 || count < sizeof(env))
 345                 convert_from_fxsr(&env, target);
 346
 347         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 348         if (!ret)
 349                 convert_to_fxsr(target, &env);
 350
 351         return ret;
 352 }
 353
 354 /*
 355  * Signal frame handlers.
 356  */
 357
 358 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
 359 {
 360         struct task_struct *tsk = current;
 361
 362         unlazy_fpu(tsk);
 363         tsk->thread.i387.fsave.status = tsk->thread.i387.fsave.swd;
 364         if (__copy_to_user(buf, &tsk->thread.i387.fsave,
 365                            sizeof(struct i387_fsave_struct)))
 366                 return -1;
 367         return 1;
 368 }
 369
 370 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
 371 {
 372         struct task_struct *tsk = current;
 373         struct user_i387_ia32_struct env;
 374         int err = 0;
 375
 376         unlazy_fpu(tsk);
 377
 378         convert_from_fxsr(&env, tsk);
 379         if (__copy_to_user(buf, &env, sizeof(env)))
 380                 return -1;
 381
 382         err |= __put_user(tsk->thread.i387.fxsave.swd, &buf->status);
 383         err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
 384         if (err)
 385                 return -1;
 386
 387         if (__copy_to_user(&buf->_fxsr_env[0], &tsk->thread.i387.fxsave,
 388                            sizeof(struct i387_fxsave_struct)))
 389                 return -1;
 390         return 1;
 391 }
 392
 393 int save_i387_ia32(struct _fpstate_ia32 __user *buf)
 394 {
 395         if (!used_math())
 396                 return 0;
 397         /*
 398          * This will cause a "finit" to be triggered by the next
 399          * attempted FPU operation by the 'current' process.
 400          */
 401         clear_used_math();
 402
 403         if (!HAVE_HWFP) {
 404                 return fpregs_soft_get(current, NULL,
 405                                        0, sizeof(struct user_i387_ia32_struct),
 406                                        NULL, buf) ? -1 : 1;
 407         }
 408
 409         if (cpu_has_fxsr)
 410                 return save_i387_fxsave(buf);
 411         else
 412                 return save_i387_fsave(buf);
 413 }
 414
 415 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
 416 {
 417         struct task_struct *tsk = current;
 418
 419         clear_fpu(tsk);
 420         return __copy_from_user(&tsk->thread.i387.fsave, buf,
 421                                 sizeof(struct i387_fsave_struct));
 422 }
 423
 424 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
 425 {
 426         struct task_struct *tsk = current;
 427         struct user_i387_ia32_struct env;
 428         int err;
 429
 430         clear_fpu(tsk);
 431         err = __copy_from_user(&tsk->thread.i387.fxsave, &buf->_fxsr_env[0],
 432                                sizeof(struct i387_fxsave_struct));
 433         /* mxcsr reserved bits must be masked to zero for security reasons */
 434         tsk->thread.i387.fxsave.mxcsr &= mxcsr_feature_mask;
 435         if (err || __copy_from_user(&env, buf, sizeof(env)))
 436                 return 1;
 437         convert_to_fxsr(tsk, &env);
 438
 439         return 0;
 440 }
 441
 442 int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
 443 {
 444         int err;
 445
 446         if (HAVE_HWFP) {
 447                 if (cpu_has_fxsr)
 448                         err = restore_i387_fxsave(buf);
 449                 else
 450                         err = restore_i387_fsave(buf);
 451         } else {
 452                 err = fpregs_soft_set(current, NULL,
 453                                       0, sizeof(struct user_i387_ia32_struct),
 454                                       NULL, buf) != 0;
 455         }
 456         set_used_math();
 457
 458         return err;
 459 }
 460
 461 /*
 462  * FPU state for core dumps.
 463  * This is only used for a.out dumps now.
 464  * It is declared generically using elf_fpregset_t (which is
 465  * struct user_i387_struct) but is in fact only used for 32-bit
 466  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 467  */
 468 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 469 {
 470         struct task_struct *tsk = current;
 471         int fpvalid;
 472
 473         fpvalid = !!used_math();
 474         if (fpvalid)
 475                 fpvalid = !fpregs_get(tsk, NULL,
 476                                       0, sizeof(struct user_i387_ia32_struct),
 477                                       fpu, NULL);
 478
 479         return fpvalid;
 480 }
 481 EXPORT_SYMBOL(dump_fpu);
 482
 483 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */