3 * Broadcom B43legacy wireless driver
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
7 * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/firmware.h>
38 #include <linux/wireless.h>
39 #include <linux/workqueue.h>
40 #include <linux/skbuff.h>
41 #include <linux/dma-mapping.h>
43 #include <asm/unaligned.h>
45 #include "b43legacy.h"
56 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
57 MODULE_AUTHOR("Martin Langer");
58 MODULE_AUTHOR("Stefano Brivio");
59 MODULE_AUTHOR("Michael Buesch");
60 MODULE_LICENSE("GPL");
62 MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID
);
64 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
65 static int modparam_pio
;
66 module_param_named(pio
, modparam_pio
, int, 0444);
67 MODULE_PARM_DESC(pio
, "enable(1) / disable(0) PIO mode");
68 #elif defined(CONFIG_B43LEGACY_DMA)
69 # define modparam_pio 0
70 #elif defined(CONFIG_B43LEGACY_PIO)
71 # define modparam_pio 1
74 static int modparam_bad_frames_preempt
;
75 module_param_named(bad_frames_preempt
, modparam_bad_frames_preempt
, int, 0444);
76 MODULE_PARM_DESC(bad_frames_preempt
, "enable(1) / disable(0) Bad Frames"
79 static char modparam_fwpostfix
[16];
80 module_param_string(fwpostfix
, modparam_fwpostfix
, 16, 0444);
81 MODULE_PARM_DESC(fwpostfix
, "Postfix for the firmware files to load.");
83 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
84 static const struct ssb_device_id b43legacy_ssb_tbl
[] = {
85 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 2),
86 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 4),
89 MODULE_DEVICE_TABLE(ssb
, b43legacy_ssb_tbl
);
92 /* Channel and ratetables are shared for all devices.
93 * They can't be const, because ieee80211 puts some precalculated
94 * data in there. This data is the same for all devices, so we don't
95 * get concurrency issues */
96 #define RATETAB_ENT(_rateid, _flags) \
98 .bitrate = B43legacy_RATE_TO_100KBPS(_rateid), \
99 .hw_value = (_rateid), \
103 * NOTE: When changing this, sync with xmit.c's
104 * b43legacy_plcp_get_bitrate_idx_* functions!
106 static struct ieee80211_rate __b43legacy_ratetable
[] = {
107 RATETAB_ENT(B43legacy_CCK_RATE_1MB
, 0),
108 RATETAB_ENT(B43legacy_CCK_RATE_2MB
, IEEE80211_RATE_SHORT_PREAMBLE
),
109 RATETAB_ENT(B43legacy_CCK_RATE_5MB
, IEEE80211_RATE_SHORT_PREAMBLE
),
110 RATETAB_ENT(B43legacy_CCK_RATE_11MB
, IEEE80211_RATE_SHORT_PREAMBLE
),
111 RATETAB_ENT(B43legacy_OFDM_RATE_6MB
, 0),
112 RATETAB_ENT(B43legacy_OFDM_RATE_9MB
, 0),
113 RATETAB_ENT(B43legacy_OFDM_RATE_12MB
, 0),
114 RATETAB_ENT(B43legacy_OFDM_RATE_18MB
, 0),
115 RATETAB_ENT(B43legacy_OFDM_RATE_24MB
, 0),
116 RATETAB_ENT(B43legacy_OFDM_RATE_36MB
, 0),
117 RATETAB_ENT(B43legacy_OFDM_RATE_48MB
, 0),
118 RATETAB_ENT(B43legacy_OFDM_RATE_54MB
, 0),
120 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
121 #define b43legacy_b_ratetable_size 4
122 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
123 #define b43legacy_g_ratetable_size 12
125 #define CHANTAB_ENT(_chanid, _freq) \
127 .center_freq = (_freq), \
128 .hw_value = (_chanid), \
130 static struct ieee80211_channel b43legacy_bg_chantable
[] = {
131 CHANTAB_ENT(1, 2412),
132 CHANTAB_ENT(2, 2417),
133 CHANTAB_ENT(3, 2422),
134 CHANTAB_ENT(4, 2427),
135 CHANTAB_ENT(5, 2432),
136 CHANTAB_ENT(6, 2437),
137 CHANTAB_ENT(7, 2442),
138 CHANTAB_ENT(8, 2447),
139 CHANTAB_ENT(9, 2452),
140 CHANTAB_ENT(10, 2457),
141 CHANTAB_ENT(11, 2462),
142 CHANTAB_ENT(12, 2467),
143 CHANTAB_ENT(13, 2472),
144 CHANTAB_ENT(14, 2484),
147 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY
= {
148 .channels
= b43legacy_bg_chantable
,
149 .n_channels
= ARRAY_SIZE(b43legacy_bg_chantable
),
150 .bitrates
= b43legacy_b_ratetable
,
151 .n_bitrates
= b43legacy_b_ratetable_size
,
154 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY
= {
155 .channels
= b43legacy_bg_chantable
,
156 .n_channels
= ARRAY_SIZE(b43legacy_bg_chantable
),
157 .bitrates
= b43legacy_g_ratetable
,
158 .n_bitrates
= b43legacy_g_ratetable_size
,
161 static void b43legacy_wireless_core_exit(struct b43legacy_wldev
*dev
);
162 static int b43legacy_wireless_core_init(struct b43legacy_wldev
*dev
);
163 static void b43legacy_wireless_core_stop(struct b43legacy_wldev
*dev
);
164 static int b43legacy_wireless_core_start(struct b43legacy_wldev
*dev
);
167 static int b43legacy_ratelimit(struct b43legacy_wl
*wl
)
169 if (!wl
|| !wl
->current_dev
)
171 if (b43legacy_status(wl
->current_dev
) < B43legacy_STAT_STARTED
)
173 /* We are up and running.
174 * Ratelimit the messages to avoid DoS over the net. */
175 return net_ratelimit();
178 void b43legacyinfo(struct b43legacy_wl
*wl
, const char *fmt
, ...)
182 if (!b43legacy_ratelimit(wl
))
185 printk(KERN_INFO
"b43legacy-%s: ",
186 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
191 void b43legacyerr(struct b43legacy_wl
*wl
, const char *fmt
, ...)
195 if (!b43legacy_ratelimit(wl
))
198 printk(KERN_ERR
"b43legacy-%s ERROR: ",
199 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
204 void b43legacywarn(struct b43legacy_wl
*wl
, const char *fmt
, ...)
208 if (!b43legacy_ratelimit(wl
))
211 printk(KERN_WARNING
"b43legacy-%s warning: ",
212 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
218 void b43legacydbg(struct b43legacy_wl
*wl
, const char *fmt
, ...)
223 printk(KERN_DEBUG
"b43legacy-%s debug: ",
224 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
230 static void b43legacy_ram_write(struct b43legacy_wldev
*dev
, u16 offset
,
235 B43legacy_WARN_ON(offset
% 4 != 0);
237 status
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
238 if (status
& B43legacy_MACCTL_BE
)
241 b43legacy_write32(dev
, B43legacy_MMIO_RAM_CONTROL
, offset
);
243 b43legacy_write32(dev
, B43legacy_MMIO_RAM_DATA
, val
);
247 void b43legacy_shm_control_word(struct b43legacy_wldev
*dev
,
248 u16 routing
, u16 offset
)
252 /* "offset" is the WORD offset. */
257 b43legacy_write32(dev
, B43legacy_MMIO_SHM_CONTROL
, control
);
260 u32
b43legacy_shm_read32(struct b43legacy_wldev
*dev
,
261 u16 routing
, u16 offset
)
265 if (routing
== B43legacy_SHM_SHARED
) {
266 B43legacy_WARN_ON((offset
& 0x0001) != 0);
267 if (offset
& 0x0003) {
268 /* Unaligned access */
269 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
270 ret
= b43legacy_read16(dev
,
271 B43legacy_MMIO_SHM_DATA_UNALIGNED
);
273 b43legacy_shm_control_word(dev
, routing
,
275 ret
|= b43legacy_read16(dev
, B43legacy_MMIO_SHM_DATA
);
281 b43legacy_shm_control_word(dev
, routing
, offset
);
282 ret
= b43legacy_read32(dev
, B43legacy_MMIO_SHM_DATA
);
287 u16
b43legacy_shm_read16(struct b43legacy_wldev
*dev
,
288 u16 routing
, u16 offset
)
292 if (routing
== B43legacy_SHM_SHARED
) {
293 B43legacy_WARN_ON((offset
& 0x0001) != 0);
294 if (offset
& 0x0003) {
295 /* Unaligned access */
296 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
297 ret
= b43legacy_read16(dev
,
298 B43legacy_MMIO_SHM_DATA_UNALIGNED
);
304 b43legacy_shm_control_word(dev
, routing
, offset
);
305 ret
= b43legacy_read16(dev
, B43legacy_MMIO_SHM_DATA
);
310 void b43legacy_shm_write32(struct b43legacy_wldev
*dev
,
311 u16 routing
, u16 offset
,
314 if (routing
== B43legacy_SHM_SHARED
) {
315 B43legacy_WARN_ON((offset
& 0x0001) != 0);
316 if (offset
& 0x0003) {
317 /* Unaligned access */
318 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
320 b43legacy_write16(dev
,
321 B43legacy_MMIO_SHM_DATA_UNALIGNED
,
322 (value
>> 16) & 0xffff);
324 b43legacy_shm_control_word(dev
, routing
,
327 b43legacy_write16(dev
, B43legacy_MMIO_SHM_DATA
,
333 b43legacy_shm_control_word(dev
, routing
, offset
);
335 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
, value
);
338 void b43legacy_shm_write16(struct b43legacy_wldev
*dev
, u16 routing
, u16 offset
,
341 if (routing
== B43legacy_SHM_SHARED
) {
342 B43legacy_WARN_ON((offset
& 0x0001) != 0);
343 if (offset
& 0x0003) {
344 /* Unaligned access */
345 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
347 b43legacy_write16(dev
,
348 B43legacy_MMIO_SHM_DATA_UNALIGNED
,
354 b43legacy_shm_control_word(dev
, routing
, offset
);
356 b43legacy_write16(dev
, B43legacy_MMIO_SHM_DATA
, value
);
360 u32
b43legacy_hf_read(struct b43legacy_wldev
*dev
)
364 ret
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
365 B43legacy_SHM_SH_HOSTFHI
);
367 ret
|= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
368 B43legacy_SHM_SH_HOSTFLO
);
373 /* Write HostFlags */
374 void b43legacy_hf_write(struct b43legacy_wldev
*dev
, u32 value
)
376 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
377 B43legacy_SHM_SH_HOSTFLO
,
378 (value
& 0x0000FFFF));
379 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
380 B43legacy_SHM_SH_HOSTFHI
,
381 ((value
& 0xFFFF0000) >> 16));
384 void b43legacy_tsf_read(struct b43legacy_wldev
*dev
, u64
*tsf
)
386 /* We need to be careful. As we read the TSF from multiple
387 * registers, we should take care of register overflows.
388 * In theory, the whole tsf read process should be atomic.
389 * We try to be atomic here, by restaring the read process,
390 * if any of the high registers changed (overflew).
392 if (dev
->dev
->id
.revision
>= 3) {
398 high
= b43legacy_read32(dev
,
399 B43legacy_MMIO_REV3PLUS_TSF_HIGH
);
400 low
= b43legacy_read32(dev
,
401 B43legacy_MMIO_REV3PLUS_TSF_LOW
);
402 high2
= b43legacy_read32(dev
,
403 B43legacy_MMIO_REV3PLUS_TSF_HIGH
);
404 } while (unlikely(high
!= high2
));
420 v3
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_3
);
421 v2
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_2
);
422 v1
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_1
);
423 v0
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_0
);
425 test3
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_3
);
426 test2
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_2
);
427 test1
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_1
);
428 } while (v3
!= test3
|| v2
!= test2
|| v1
!= test1
);
442 static void b43legacy_time_lock(struct b43legacy_wldev
*dev
)
446 status
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
447 status
|= B43legacy_MACCTL_TBTTHOLD
;
448 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, status
);
452 static void b43legacy_time_unlock(struct b43legacy_wldev
*dev
)
456 status
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
457 status
&= ~B43legacy_MACCTL_TBTTHOLD
;
458 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, status
);
461 static void b43legacy_tsf_write_locked(struct b43legacy_wldev
*dev
, u64 tsf
)
463 /* Be careful with the in-progress timer.
464 * First zero out the low register, so we have a full
465 * register-overflow duration to complete the operation.
467 if (dev
->dev
->id
.revision
>= 3) {
468 u32 lo
= (tsf
& 0x00000000FFFFFFFFULL
);
469 u32 hi
= (tsf
& 0xFFFFFFFF00000000ULL
) >> 32;
471 b43legacy_write32(dev
, B43legacy_MMIO_REV3PLUS_TSF_LOW
, 0);
473 b43legacy_write32(dev
, B43legacy_MMIO_REV3PLUS_TSF_HIGH
,
476 b43legacy_write32(dev
, B43legacy_MMIO_REV3PLUS_TSF_LOW
,
479 u16 v0
= (tsf
& 0x000000000000FFFFULL
);
480 u16 v1
= (tsf
& 0x00000000FFFF0000ULL
) >> 16;
481 u16 v2
= (tsf
& 0x0000FFFF00000000ULL
) >> 32;
482 u16 v3
= (tsf
& 0xFFFF000000000000ULL
) >> 48;
484 b43legacy_write16(dev
, B43legacy_MMIO_TSF_0
, 0);
486 b43legacy_write16(dev
, B43legacy_MMIO_TSF_3
, v3
);
488 b43legacy_write16(dev
, B43legacy_MMIO_TSF_2
, v2
);
490 b43legacy_write16(dev
, B43legacy_MMIO_TSF_1
, v1
);
492 b43legacy_write16(dev
, B43legacy_MMIO_TSF_0
, v0
);
496 void b43legacy_tsf_write(struct b43legacy_wldev
*dev
, u64 tsf
)
498 b43legacy_time_lock(dev
);
499 b43legacy_tsf_write_locked(dev
, tsf
);
500 b43legacy_time_unlock(dev
);
504 void b43legacy_macfilter_set(struct b43legacy_wldev
*dev
,
505 u16 offset
, const u8
*mac
)
507 static const u8 zero_addr
[ETH_ALEN
] = { 0 };
514 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_CONTROL
, offset
);
518 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_DATA
, data
);
521 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_DATA
, data
);
524 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_DATA
, data
);
527 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev
*dev
)
529 static const u8 zero_addr
[ETH_ALEN
] = { 0 };
530 const u8
*mac
= dev
->wl
->mac_addr
;
531 const u8
*bssid
= dev
->wl
->bssid
;
532 u8 mac_bssid
[ETH_ALEN
* 2];
541 b43legacy_macfilter_set(dev
, B43legacy_MACFILTER_BSSID
, bssid
);
543 memcpy(mac_bssid
, mac
, ETH_ALEN
);
544 memcpy(mac_bssid
+ ETH_ALEN
, bssid
, ETH_ALEN
);
546 /* Write our MAC address and BSSID to template ram */
547 for (i
= 0; i
< ARRAY_SIZE(mac_bssid
); i
+= sizeof(u32
)) {
548 tmp
= (u32
)(mac_bssid
[i
+ 0]);
549 tmp
|= (u32
)(mac_bssid
[i
+ 1]) << 8;
550 tmp
|= (u32
)(mac_bssid
[i
+ 2]) << 16;
551 tmp
|= (u32
)(mac_bssid
[i
+ 3]) << 24;
552 b43legacy_ram_write(dev
, 0x20 + i
, tmp
);
553 b43legacy_ram_write(dev
, 0x78 + i
, tmp
);
554 b43legacy_ram_write(dev
, 0x478 + i
, tmp
);
558 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev
*dev
)
560 b43legacy_write_mac_bssid_templates(dev
);
561 b43legacy_macfilter_set(dev
, B43legacy_MACFILTER_SELF
,
565 static void b43legacy_set_slot_time(struct b43legacy_wldev
*dev
,
568 /* slot_time is in usec. */
569 if (dev
->phy
.type
!= B43legacy_PHYTYPE_G
)
571 b43legacy_write16(dev
, 0x684, 510 + slot_time
);
572 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0010,
576 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev
*dev
)
578 b43legacy_set_slot_time(dev
, 9);
582 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev
*dev
)
584 b43legacy_set_slot_time(dev
, 20);
588 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
589 * Returns the _previously_ enabled IRQ mask.
591 static inline u32
b43legacy_interrupt_enable(struct b43legacy_wldev
*dev
,
596 old_mask
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
);
597 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
, old_mask
|
603 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
604 * Returns the _previously_ enabled IRQ mask.
606 static inline u32
b43legacy_interrupt_disable(struct b43legacy_wldev
*dev
,
611 old_mask
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
);
612 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
, old_mask
& ~mask
);
617 /* Synchronize IRQ top- and bottom-half.
618 * IRQs must be masked before calling this.
619 * This must not be called with the irq_lock held.
621 static void b43legacy_synchronize_irq(struct b43legacy_wldev
*dev
)
623 synchronize_irq(dev
->dev
->irq
);
624 tasklet_kill(&dev
->isr_tasklet
);
627 /* DummyTransmission function, as documented on
628 * http://bcm-specs.sipsolutions.net/DummyTransmission
630 void b43legacy_dummy_transmission(struct b43legacy_wldev
*dev
)
632 struct b43legacy_phy
*phy
= &dev
->phy
;
634 unsigned int max_loop
;
645 case B43legacy_PHYTYPE_B
:
646 case B43legacy_PHYTYPE_G
:
648 buffer
[0] = 0x000B846E;
655 for (i
= 0; i
< 5; i
++)
656 b43legacy_ram_write(dev
, i
* 4, buffer
[i
]);
658 /* dummy read follows */
659 b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
661 b43legacy_write16(dev
, 0x0568, 0x0000);
662 b43legacy_write16(dev
, 0x07C0, 0x0000);
663 b43legacy_write16(dev
, 0x050C, 0x0000);
664 b43legacy_write16(dev
, 0x0508, 0x0000);
665 b43legacy_write16(dev
, 0x050A, 0x0000);
666 b43legacy_write16(dev
, 0x054C, 0x0000);
667 b43legacy_write16(dev
, 0x056A, 0x0014);
668 b43legacy_write16(dev
, 0x0568, 0x0826);
669 b43legacy_write16(dev
, 0x0500, 0x0000);
670 b43legacy_write16(dev
, 0x0502, 0x0030);
672 if (phy
->radio_ver
== 0x2050 && phy
->radio_rev
<= 0x5)
673 b43legacy_radio_write16(dev
, 0x0051, 0x0017);
674 for (i
= 0x00; i
< max_loop
; i
++) {
675 value
= b43legacy_read16(dev
, 0x050E);
680 for (i
= 0x00; i
< 0x0A; i
++) {
681 value
= b43legacy_read16(dev
, 0x050E);
686 for (i
= 0x00; i
< 0x0A; i
++) {
687 value
= b43legacy_read16(dev
, 0x0690);
688 if (!(value
& 0x0100))
692 if (phy
->radio_ver
== 0x2050 && phy
->radio_rev
<= 0x5)
693 b43legacy_radio_write16(dev
, 0x0051, 0x0037);
696 /* Turn the Analog ON/OFF */
697 static void b43legacy_switch_analog(struct b43legacy_wldev
*dev
, int on
)
699 b43legacy_write16(dev
, B43legacy_MMIO_PHY0
, on
? 0 : 0xF4);
702 void b43legacy_wireless_core_reset(struct b43legacy_wldev
*dev
, u32 flags
)
707 flags
|= B43legacy_TMSLOW_PHYCLKEN
;
708 flags
|= B43legacy_TMSLOW_PHYRESET
;
709 ssb_device_enable(dev
->dev
, flags
);
710 msleep(2); /* Wait for the PLL to turn on. */
712 /* Now take the PHY out of Reset again */
713 tmslow
= ssb_read32(dev
->dev
, SSB_TMSLOW
);
714 tmslow
|= SSB_TMSLOW_FGC
;
715 tmslow
&= ~B43legacy_TMSLOW_PHYRESET
;
716 ssb_write32(dev
->dev
, SSB_TMSLOW
, tmslow
);
717 ssb_read32(dev
->dev
, SSB_TMSLOW
); /* flush */
719 tmslow
&= ~SSB_TMSLOW_FGC
;
720 ssb_write32(dev
->dev
, SSB_TMSLOW
, tmslow
);
721 ssb_read32(dev
->dev
, SSB_TMSLOW
); /* flush */
725 b43legacy_switch_analog(dev
, 1);
727 macctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
728 macctl
&= ~B43legacy_MACCTL_GMODE
;
729 if (flags
& B43legacy_TMSLOW_GMODE
) {
730 macctl
|= B43legacy_MACCTL_GMODE
;
734 macctl
|= B43legacy_MACCTL_IHR_ENABLED
;
735 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
738 static void handle_irq_transmit_status(struct b43legacy_wldev
*dev
)
743 struct b43legacy_txstatus stat
;
746 v0
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_0
);
747 if (!(v0
& 0x00000001))
749 v1
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_1
);
751 stat
.cookie
= (v0
>> 16);
752 stat
.seq
= (v1
& 0x0000FFFF);
753 stat
.phy_stat
= ((v1
& 0x00FF0000) >> 16);
754 tmp
= (v0
& 0x0000FFFF);
755 stat
.frame_count
= ((tmp
& 0xF000) >> 12);
756 stat
.rts_count
= ((tmp
& 0x0F00) >> 8);
757 stat
.supp_reason
= ((tmp
& 0x001C) >> 2);
758 stat
.pm_indicated
= !!(tmp
& 0x0080);
759 stat
.intermediate
= !!(tmp
& 0x0040);
760 stat
.for_ampdu
= !!(tmp
& 0x0020);
761 stat
.acked
= !!(tmp
& 0x0002);
763 b43legacy_handle_txstatus(dev
, &stat
);
767 static void drain_txstatus_queue(struct b43legacy_wldev
*dev
)
771 if (dev
->dev
->id
.revision
< 5)
773 /* Read all entries from the microcode TXstatus FIFO
774 * and throw them away.
777 dummy
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_0
);
778 if (!(dummy
& 0x00000001))
780 dummy
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_1
);
784 static u32
b43legacy_jssi_read(struct b43legacy_wldev
*dev
)
788 val
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
, 0x40A);
790 val
|= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
, 0x408);
795 static void b43legacy_jssi_write(struct b43legacy_wldev
*dev
, u32 jssi
)
797 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x408,
798 (jssi
& 0x0000FFFF));
799 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x40A,
800 (jssi
& 0xFFFF0000) >> 16);
803 static void b43legacy_generate_noise_sample(struct b43legacy_wldev
*dev
)
805 b43legacy_jssi_write(dev
, 0x7F7F7F7F);
806 b43legacy_write32(dev
, B43legacy_MMIO_MACCMD
,
807 b43legacy_read32(dev
, B43legacy_MMIO_MACCMD
)
808 | B43legacy_MACCMD_BGNOISE
);
809 B43legacy_WARN_ON(dev
->noisecalc
.channel_at_start
!=
813 static void b43legacy_calculate_link_quality(struct b43legacy_wldev
*dev
)
815 /* Top half of Link Quality calculation. */
817 if (dev
->noisecalc
.calculation_running
)
819 dev
->noisecalc
.channel_at_start
= dev
->phy
.channel
;
820 dev
->noisecalc
.calculation_running
= 1;
821 dev
->noisecalc
.nr_samples
= 0;
823 b43legacy_generate_noise_sample(dev
);
826 static void handle_irq_noise(struct b43legacy_wldev
*dev
)
828 struct b43legacy_phy
*phy
= &dev
->phy
;
835 /* Bottom half of Link Quality calculation. */
837 B43legacy_WARN_ON(!dev
->noisecalc
.calculation_running
);
838 if (dev
->noisecalc
.channel_at_start
!= phy
->channel
)
839 goto drop_calculation
;
840 *((__le32
*)noise
) = cpu_to_le32(b43legacy_jssi_read(dev
));
841 if (noise
[0] == 0x7F || noise
[1] == 0x7F ||
842 noise
[2] == 0x7F || noise
[3] == 0x7F)
845 /* Get the noise samples. */
846 B43legacy_WARN_ON(dev
->noisecalc
.nr_samples
>= 8);
847 i
= dev
->noisecalc
.nr_samples
;
848 noise
[0] = clamp_val(noise
[0], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
849 noise
[1] = clamp_val(noise
[1], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
850 noise
[2] = clamp_val(noise
[2], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
851 noise
[3] = clamp_val(noise
[3], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
852 dev
->noisecalc
.samples
[i
][0] = phy
->nrssi_lt
[noise
[0]];
853 dev
->noisecalc
.samples
[i
][1] = phy
->nrssi_lt
[noise
[1]];
854 dev
->noisecalc
.samples
[i
][2] = phy
->nrssi_lt
[noise
[2]];
855 dev
->noisecalc
.samples
[i
][3] = phy
->nrssi_lt
[noise
[3]];
856 dev
->noisecalc
.nr_samples
++;
857 if (dev
->noisecalc
.nr_samples
== 8) {
858 /* Calculate the Link Quality by the noise samples. */
860 for (i
= 0; i
< 8; i
++) {
861 for (j
= 0; j
< 4; j
++)
862 average
+= dev
->noisecalc
.samples
[i
][j
];
868 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
870 tmp
= (tmp
/ 128) & 0x1F;
880 dev
->stats
.link_noise
= average
;
882 dev
->noisecalc
.calculation_running
= 0;
886 b43legacy_generate_noise_sample(dev
);
889 static void handle_irq_tbtt_indication(struct b43legacy_wldev
*dev
)
891 if (b43legacy_is_mode(dev
->wl
, IEEE80211_IF_TYPE_AP
)) {
894 if (1/*FIXME: the last PSpoll frame was sent successfully */)
895 b43legacy_power_saving_ctl_bits(dev
, -1, -1);
897 if (b43legacy_is_mode(dev
->wl
, IEEE80211_IF_TYPE_IBSS
))
901 static void handle_irq_atim_end(struct b43legacy_wldev
*dev
)
903 if (dev
->dfq_valid
) {
904 b43legacy_write32(dev
, B43legacy_MMIO_MACCMD
,
905 b43legacy_read32(dev
, B43legacy_MMIO_MACCMD
)
906 | B43legacy_MACCMD_DFQ_VALID
);
911 static void handle_irq_pmq(struct b43legacy_wldev
*dev
)
918 tmp
= b43legacy_read32(dev
, B43legacy_MMIO_PS_STATUS
);
919 if (!(tmp
& 0x00000008))
922 /* 16bit write is odd, but correct. */
923 b43legacy_write16(dev
, B43legacy_MMIO_PS_STATUS
, 0x0002);
926 static void b43legacy_write_template_common(struct b43legacy_wldev
*dev
,
927 const u8
*data
, u16 size
,
929 u16 shm_size_offset
, u8 rate
)
933 struct b43legacy_plcp_hdr4 plcp
;
936 b43legacy_generate_plcp_hdr(&plcp
, size
+ FCS_LEN
, rate
);
937 b43legacy_ram_write(dev
, ram_offset
, le32_to_cpu(plcp
.data
));
938 ram_offset
+= sizeof(u32
);
939 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
940 * So leave the first two bytes of the next write blank.
942 tmp
= (u32
)(data
[0]) << 16;
943 tmp
|= (u32
)(data
[1]) << 24;
944 b43legacy_ram_write(dev
, ram_offset
, tmp
);
945 ram_offset
+= sizeof(u32
);
946 for (i
= 2; i
< size
; i
+= sizeof(u32
)) {
947 tmp
= (u32
)(data
[i
+ 0]);
949 tmp
|= (u32
)(data
[i
+ 1]) << 8;
951 tmp
|= (u32
)(data
[i
+ 2]) << 16;
953 tmp
|= (u32
)(data
[i
+ 3]) << 24;
954 b43legacy_ram_write(dev
, ram_offset
+ i
- 2, tmp
);
956 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_size_offset
,
957 size
+ sizeof(struct b43legacy_plcp_hdr6
));
960 static void b43legacy_write_beacon_template(struct b43legacy_wldev
*dev
,
962 u16 shm_size_offset
, u8 rate
)
965 unsigned int i
, len
, variable_len
;
966 const struct ieee80211_mgmt
*bcn
;
970 bcn
= (const struct ieee80211_mgmt
*)(dev
->wl
->current_beacon
->data
);
971 len
= min((size_t)dev
->wl
->current_beacon
->len
,
972 0x200 - sizeof(struct b43legacy_plcp_hdr6
));
974 b43legacy_write_template_common(dev
, (const u8
*)bcn
, len
, ram_offset
,
975 shm_size_offset
, rate
);
977 /* Find the position of the TIM and the DTIM_period value
978 * and write them to SHM. */
979 ie
= bcn
->u
.beacon
.variable
;
980 variable_len
= len
- offsetof(struct ieee80211_mgmt
, u
.beacon
.variable
);
981 for (i
= 0; i
< variable_len
- 2; ) {
982 uint8_t ie_id
, ie_len
;
989 /* This is the TIM Information Element */
991 /* Check whether the ie_len is in the beacon data range. */
992 if (variable_len
< ie_len
+ 2 + i
)
994 /* A valid TIM is at least 4 bytes long. */
999 tim_position
= sizeof(struct b43legacy_plcp_hdr6
);
1000 tim_position
+= offsetof(struct ieee80211_mgmt
,
1004 dtim_period
= ie
[i
+ 3];
1006 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1007 B43legacy_SHM_SH_TIMPOS
, tim_position
);
1008 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1009 B43legacy_SHM_SH_DTIMP
, dtim_period
);
1015 b43legacywarn(dev
->wl
, "Did not find a valid TIM IE in the "
1016 "beacon template packet. AP or IBSS operation "
1017 "may be broken.\n");
1021 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev
*dev
,
1022 u16 shm_offset
, u16 size
,
1023 struct ieee80211_rate
*rate
)
1025 struct b43legacy_plcp_hdr4 plcp
;
1030 b43legacy_generate_plcp_hdr(&plcp
, size
+ FCS_LEN
, rate
->bitrate
);
1031 dur
= ieee80211_generic_frame_duration(dev
->wl
->hw
,
1035 /* Write PLCP in two parts and timing for packet transfer */
1036 tmp
= le32_to_cpu(plcp
.data
);
1037 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_offset
,
1039 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_offset
+ 2,
1041 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_offset
+ 6,
1045 /* Instead of using custom probe response template, this function
1046 * just patches custom beacon template by:
1047 * 1) Changing packet type
1048 * 2) Patching duration field
1051 static const u8
*b43legacy_generate_probe_resp(struct b43legacy_wldev
*dev
,
1053 struct ieee80211_rate
*rate
)
1057 u16 src_size
, elem_size
, src_pos
, dest_pos
;
1059 struct ieee80211_hdr
*hdr
;
1062 src_size
= dev
->wl
->current_beacon
->len
;
1063 src_data
= (const u8
*)dev
->wl
->current_beacon
->data
;
1065 /* Get the start offset of the variable IEs in the packet. */
1066 ie_start
= offsetof(struct ieee80211_mgmt
, u
.probe_resp
.variable
);
1067 B43legacy_WARN_ON(ie_start
!= offsetof(struct ieee80211_mgmt
,
1068 u
.beacon
.variable
));
1070 if (B43legacy_WARN_ON(src_size
< ie_start
))
1073 dest_data
= kmalloc(src_size
, GFP_ATOMIC
);
1074 if (unlikely(!dest_data
))
1077 /* Copy the static data and all Information Elements, except the TIM. */
1078 memcpy(dest_data
, src_data
, ie_start
);
1080 dest_pos
= ie_start
;
1081 for ( ; src_pos
< src_size
- 2; src_pos
+= elem_size
) {
1082 elem_size
= src_data
[src_pos
+ 1] + 2;
1083 if (src_data
[src_pos
] == 5) {
1084 /* This is the TIM. */
1087 memcpy(dest_data
+ dest_pos
, src_data
+ src_pos
, elem_size
);
1088 dest_pos
+= elem_size
;
1090 *dest_size
= dest_pos
;
1091 hdr
= (struct ieee80211_hdr
*)dest_data
;
1093 /* Set the frame control. */
1094 hdr
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_MGMT
|
1095 IEEE80211_STYPE_PROBE_RESP
);
1096 dur
= ieee80211_generic_frame_duration(dev
->wl
->hw
,
1100 hdr
->duration_id
= dur
;
1105 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev
*dev
,
1107 u16 shm_size_offset
,
1108 struct ieee80211_rate
*rate
)
1110 const u8
*probe_resp_data
;
1113 size
= dev
->wl
->current_beacon
->len
;
1114 probe_resp_data
= b43legacy_generate_probe_resp(dev
, &size
, rate
);
1115 if (unlikely(!probe_resp_data
))
1118 /* Looks like PLCP headers plus packet timings are stored for
1119 * all possible basic rates
1121 b43legacy_write_probe_resp_plcp(dev
, 0x31A, size
,
1122 &b43legacy_b_ratetable
[0]);
1123 b43legacy_write_probe_resp_plcp(dev
, 0x32C, size
,
1124 &b43legacy_b_ratetable
[1]);
1125 b43legacy_write_probe_resp_plcp(dev
, 0x33E, size
,
1126 &b43legacy_b_ratetable
[2]);
1127 b43legacy_write_probe_resp_plcp(dev
, 0x350, size
,
1128 &b43legacy_b_ratetable
[3]);
1130 size
= min((size_t)size
,
1131 0x200 - sizeof(struct b43legacy_plcp_hdr6
));
1132 b43legacy_write_template_common(dev
, probe_resp_data
,
1134 shm_size_offset
, rate
->bitrate
);
1135 kfree(probe_resp_data
);
1138 /* Asynchronously update the packet templates in template RAM.
1139 * Locking: Requires wl->irq_lock to be locked. */
1140 static void b43legacy_update_templates(struct b43legacy_wl
*wl
)
1142 struct sk_buff
*beacon
;
1143 /* This is the top half of the ansynchronous beacon update. The bottom
1144 * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1145 * sending an invalid beacon. This can happen for example, if the
1146 * firmware transmits a beacon while we are updating it. */
1148 /* We could modify the existing beacon and set the aid bit in the TIM
1149 * field, but that would probably require resizing and moving of data
1150 * within the beacon template. Simply request a new beacon and let
1151 * mac80211 do the hard work. */
1152 beacon
= ieee80211_beacon_get(wl
->hw
, wl
->vif
);
1153 if (unlikely(!beacon
))
1156 if (wl
->current_beacon
)
1157 dev_kfree_skb_any(wl
->current_beacon
);
1158 wl
->current_beacon
= beacon
;
1159 wl
->beacon0_uploaded
= 0;
1160 wl
->beacon1_uploaded
= 0;
1163 static void b43legacy_set_ssid(struct b43legacy_wldev
*dev
,
1164 const u8
*ssid
, u8 ssid_len
)
1170 len
= min((u16
)ssid_len
, (u16
)0x100);
1171 for (i
= 0; i
< len
; i
+= sizeof(u32
)) {
1172 tmp
= (u32
)(ssid
[i
+ 0]);
1174 tmp
|= (u32
)(ssid
[i
+ 1]) << 8;
1176 tmp
|= (u32
)(ssid
[i
+ 2]) << 16;
1178 tmp
|= (u32
)(ssid
[i
+ 3]) << 24;
1179 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
,
1182 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1186 static void b43legacy_set_beacon_int(struct b43legacy_wldev
*dev
,
1189 b43legacy_time_lock(dev
);
1190 if (dev
->dev
->id
.revision
>= 3)
1191 b43legacy_write32(dev
, 0x188, (beacon_int
<< 16));
1193 b43legacy_write16(dev
, 0x606, (beacon_int
>> 6));
1194 b43legacy_write16(dev
, 0x610, beacon_int
);
1196 b43legacy_time_unlock(dev
);
1199 static void handle_irq_beacon(struct b43legacy_wldev
*dev
)
1201 struct b43legacy_wl
*wl
= dev
->wl
;
1204 if (!b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_AP
))
1207 /* This is the bottom half of the asynchronous beacon update. */
1209 cmd
= b43legacy_read32(dev
, B43legacy_MMIO_MACCMD
);
1210 if (!(cmd
& B43legacy_MACCMD_BEACON0_VALID
)) {
1211 if (!wl
->beacon0_uploaded
) {
1212 b43legacy_write_beacon_template(dev
, 0x68,
1213 B43legacy_SHM_SH_BTL0
,
1214 B43legacy_CCK_RATE_1MB
);
1215 b43legacy_write_probe_resp_template(dev
, 0x268,
1216 B43legacy_SHM_SH_PRTLEN
,
1217 &__b43legacy_ratetable
[3]);
1218 wl
->beacon0_uploaded
= 1;
1220 cmd
|= B43legacy_MACCMD_BEACON0_VALID
;
1222 if (!(cmd
& B43legacy_MACCMD_BEACON1_VALID
)) {
1223 if (!wl
->beacon1_uploaded
) {
1224 b43legacy_write_beacon_template(dev
, 0x468,
1225 B43legacy_SHM_SH_BTL1
,
1226 B43legacy_CCK_RATE_1MB
);
1227 wl
->beacon1_uploaded
= 1;
1229 cmd
|= B43legacy_MACCMD_BEACON1_VALID
;
1231 b43legacy_write32(dev
, B43legacy_MMIO_MACCMD
, cmd
);
1234 static void handle_irq_ucode_debug(struct b43legacy_wldev
*dev
)
1238 /* Interrupt handler bottom-half */
1239 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev
*dev
)
1242 u32 dma_reason
[ARRAY_SIZE(dev
->dma_reason
)];
1243 u32 merged_dma_reason
= 0;
1245 unsigned long flags
;
1247 spin_lock_irqsave(&dev
->wl
->irq_lock
, flags
);
1249 B43legacy_WARN_ON(b43legacy_status(dev
) <
1250 B43legacy_STAT_INITIALIZED
);
1252 reason
= dev
->irq_reason
;
1253 for (i
= 0; i
< ARRAY_SIZE(dma_reason
); i
++) {
1254 dma_reason
[i
] = dev
->dma_reason
[i
];
1255 merged_dma_reason
|= dma_reason
[i
];
1258 if (unlikely(reason
& B43legacy_IRQ_MAC_TXERR
))
1259 b43legacyerr(dev
->wl
, "MAC transmission error\n");
1261 if (unlikely(reason
& B43legacy_IRQ_PHY_TXERR
)) {
1262 b43legacyerr(dev
->wl
, "PHY transmission error\n");
1264 if (unlikely(atomic_dec_and_test(&dev
->phy
.txerr_cnt
))) {
1265 b43legacyerr(dev
->wl
, "Too many PHY TX errors, "
1266 "restarting the controller\n");
1267 b43legacy_controller_restart(dev
, "PHY TX errors");
1271 if (unlikely(merged_dma_reason
& (B43legacy_DMAIRQ_FATALMASK
|
1272 B43legacy_DMAIRQ_NONFATALMASK
))) {
1273 if (merged_dma_reason
& B43legacy_DMAIRQ_FATALMASK
) {
1274 b43legacyerr(dev
->wl
, "Fatal DMA error: "
1275 "0x%08X, 0x%08X, 0x%08X, "
1276 "0x%08X, 0x%08X, 0x%08X\n",
1277 dma_reason
[0], dma_reason
[1],
1278 dma_reason
[2], dma_reason
[3],
1279 dma_reason
[4], dma_reason
[5]);
1280 b43legacy_controller_restart(dev
, "DMA error");
1282 spin_unlock_irqrestore(&dev
->wl
->irq_lock
, flags
);
1285 if (merged_dma_reason
& B43legacy_DMAIRQ_NONFATALMASK
)
1286 b43legacyerr(dev
->wl
, "DMA error: "
1287 "0x%08X, 0x%08X, 0x%08X, "
1288 "0x%08X, 0x%08X, 0x%08X\n",
1289 dma_reason
[0], dma_reason
[1],
1290 dma_reason
[2], dma_reason
[3],
1291 dma_reason
[4], dma_reason
[5]);
1294 if (unlikely(reason
& B43legacy_IRQ_UCODE_DEBUG
))
1295 handle_irq_ucode_debug(dev
);
1296 if (reason
& B43legacy_IRQ_TBTT_INDI
)
1297 handle_irq_tbtt_indication(dev
);
1298 if (reason
& B43legacy_IRQ_ATIM_END
)
1299 handle_irq_atim_end(dev
);
1300 if (reason
& B43legacy_IRQ_BEACON
)
1301 handle_irq_beacon(dev
);
1302 if (reason
& B43legacy_IRQ_PMQ
)
1303 handle_irq_pmq(dev
);
1304 if (reason
& B43legacy_IRQ_TXFIFO_FLUSH_OK
)
1306 if (reason
& B43legacy_IRQ_NOISESAMPLE_OK
)
1307 handle_irq_noise(dev
);
1309 /* Check the DMA reason registers for received data. */
1310 if (dma_reason
[0] & B43legacy_DMAIRQ_RX_DONE
) {
1311 if (b43legacy_using_pio(dev
))
1312 b43legacy_pio_rx(dev
->pio
.queue0
);
1314 b43legacy_dma_rx(dev
->dma
.rx_ring0
);
1316 B43legacy_WARN_ON(dma_reason
[1] & B43legacy_DMAIRQ_RX_DONE
);
1317 B43legacy_WARN_ON(dma_reason
[2] & B43legacy_DMAIRQ_RX_DONE
);
1318 if (dma_reason
[3] & B43legacy_DMAIRQ_RX_DONE
) {
1319 if (b43legacy_using_pio(dev
))
1320 b43legacy_pio_rx(dev
->pio
.queue3
);
1322 b43legacy_dma_rx(dev
->dma
.rx_ring3
);
1324 B43legacy_WARN_ON(dma_reason
[4] & B43legacy_DMAIRQ_RX_DONE
);
1325 B43legacy_WARN_ON(dma_reason
[5] & B43legacy_DMAIRQ_RX_DONE
);
1327 if (reason
& B43legacy_IRQ_TX_OK
)
1328 handle_irq_transmit_status(dev
);
1330 b43legacy_interrupt_enable(dev
, dev
->irq_savedstate
);
1332 spin_unlock_irqrestore(&dev
->wl
->irq_lock
, flags
);
1335 static void pio_irq_workaround(struct b43legacy_wldev
*dev
,
1336 u16 base
, int queueidx
)
1340 rxctl
= b43legacy_read16(dev
, base
+ B43legacy_PIO_RXCTL
);
1341 if (rxctl
& B43legacy_PIO_RXCTL_DATAAVAILABLE
)
1342 dev
->dma_reason
[queueidx
] |= B43legacy_DMAIRQ_RX_DONE
;
1344 dev
->dma_reason
[queueidx
] &= ~B43legacy_DMAIRQ_RX_DONE
;
1347 static void b43legacy_interrupt_ack(struct b43legacy_wldev
*dev
, u32 reason
)
1349 if (b43legacy_using_pio(dev
) &&
1350 (dev
->dev
->id
.revision
< 3) &&
1351 (!(reason
& B43legacy_IRQ_PIO_WORKAROUND
))) {
1352 /* Apply a PIO specific workaround to the dma_reasons */
1353 pio_irq_workaround(dev
, B43legacy_MMIO_PIO1_BASE
, 0);
1354 pio_irq_workaround(dev
, B43legacy_MMIO_PIO2_BASE
, 1);
1355 pio_irq_workaround(dev
, B43legacy_MMIO_PIO3_BASE
, 2);
1356 pio_irq_workaround(dev
, B43legacy_MMIO_PIO4_BASE
, 3);
1359 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
, reason
);
1361 b43legacy_write32(dev
, B43legacy_MMIO_DMA0_REASON
,
1362 dev
->dma_reason
[0]);
1363 b43legacy_write32(dev
, B43legacy_MMIO_DMA1_REASON
,
1364 dev
->dma_reason
[1]);
1365 b43legacy_write32(dev
, B43legacy_MMIO_DMA2_REASON
,
1366 dev
->dma_reason
[2]);
1367 b43legacy_write32(dev
, B43legacy_MMIO_DMA3_REASON
,
1368 dev
->dma_reason
[3]);
1369 b43legacy_write32(dev
, B43legacy_MMIO_DMA4_REASON
,
1370 dev
->dma_reason
[4]);
1371 b43legacy_write32(dev
, B43legacy_MMIO_DMA5_REASON
,
1372 dev
->dma_reason
[5]);
1375 /* Interrupt handler top-half */
1376 static irqreturn_t
b43legacy_interrupt_handler(int irq
, void *dev_id
)
1378 irqreturn_t ret
= IRQ_NONE
;
1379 struct b43legacy_wldev
*dev
= dev_id
;
1385 spin_lock(&dev
->wl
->irq_lock
);
1387 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
)
1389 reason
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1390 if (reason
== 0xffffffff) /* shared IRQ */
1393 reason
&= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
);
1397 dev
->dma_reason
[0] = b43legacy_read32(dev
,
1398 B43legacy_MMIO_DMA0_REASON
)
1400 dev
->dma_reason
[1] = b43legacy_read32(dev
,
1401 B43legacy_MMIO_DMA1_REASON
)
1403 dev
->dma_reason
[2] = b43legacy_read32(dev
,
1404 B43legacy_MMIO_DMA2_REASON
)
1406 dev
->dma_reason
[3] = b43legacy_read32(dev
,
1407 B43legacy_MMIO_DMA3_REASON
)
1409 dev
->dma_reason
[4] = b43legacy_read32(dev
,
1410 B43legacy_MMIO_DMA4_REASON
)
1412 dev
->dma_reason
[5] = b43legacy_read32(dev
,
1413 B43legacy_MMIO_DMA5_REASON
)
1416 b43legacy_interrupt_ack(dev
, reason
);
1417 /* disable all IRQs. They are enabled again in the bottom half. */
1418 dev
->irq_savedstate
= b43legacy_interrupt_disable(dev
,
1420 /* save the reason code and call our bottom half. */
1421 dev
->irq_reason
= reason
;
1422 tasklet_schedule(&dev
->isr_tasklet
);
1425 spin_unlock(&dev
->wl
->irq_lock
);
1430 static void b43legacy_release_firmware(struct b43legacy_wldev
*dev
)
1432 release_firmware(dev
->fw
.ucode
);
1433 dev
->fw
.ucode
= NULL
;
1434 release_firmware(dev
->fw
.pcm
);
1436 release_firmware(dev
->fw
.initvals
);
1437 dev
->fw
.initvals
= NULL
;
1438 release_firmware(dev
->fw
.initvals_band
);
1439 dev
->fw
.initvals_band
= NULL
;
1442 static void b43legacy_print_fw_helptext(struct b43legacy_wl
*wl
)
1444 b43legacyerr(wl
, "You must go to http://linuxwireless.org/en/users/"
1445 "Drivers/b43#devicefirmware "
1446 "and download the correct firmware (version 3).\n");
1449 static int do_request_fw(struct b43legacy_wldev
*dev
,
1451 const struct firmware
**fw
)
1453 char path
[sizeof(modparam_fwpostfix
) + 32];
1454 struct b43legacy_fw_header
*hdr
;
1461 snprintf(path
, ARRAY_SIZE(path
),
1462 "b43legacy%s/%s.fw",
1463 modparam_fwpostfix
, name
);
1464 err
= request_firmware(fw
, path
, dev
->dev
->dev
);
1466 b43legacyerr(dev
->wl
, "Firmware file \"%s\" not found "
1467 "or load failed.\n", path
);
1470 if ((*fw
)->size
< sizeof(struct b43legacy_fw_header
))
1472 hdr
= (struct b43legacy_fw_header
*)((*fw
)->data
);
1473 switch (hdr
->type
) {
1474 case B43legacy_FW_TYPE_UCODE
:
1475 case B43legacy_FW_TYPE_PCM
:
1476 size
= be32_to_cpu(hdr
->size
);
1477 if (size
!= (*fw
)->size
- sizeof(struct b43legacy_fw_header
))
1480 case B43legacy_FW_TYPE_IV
:
1491 b43legacyerr(dev
->wl
, "Firmware file \"%s\" format error.\n", path
);
1495 static int b43legacy_request_firmware(struct b43legacy_wldev
*dev
)
1497 struct b43legacy_firmware
*fw
= &dev
->fw
;
1498 const u8 rev
= dev
->dev
->id
.revision
;
1499 const char *filename
;
1503 tmshigh
= ssb_read32(dev
->dev
, SSB_TMSHIGH
);
1506 filename
= "ucode2";
1508 filename
= "ucode4";
1510 filename
= "ucode5";
1511 err
= do_request_fw(dev
, filename
, &fw
->ucode
);
1520 err
= do_request_fw(dev
, filename
, &fw
->pcm
);
1524 if (!fw
->initvals
) {
1525 switch (dev
->phy
.type
) {
1526 case B43legacy_PHYTYPE_B
:
1527 case B43legacy_PHYTYPE_G
:
1528 if ((rev
>= 5) && (rev
<= 10))
1529 filename
= "b0g0initvals5";
1530 else if (rev
== 2 || rev
== 4)
1531 filename
= "b0g0initvals2";
1533 goto err_no_initvals
;
1536 goto err_no_initvals
;
1538 err
= do_request_fw(dev
, filename
, &fw
->initvals
);
1542 if (!fw
->initvals_band
) {
1543 switch (dev
->phy
.type
) {
1544 case B43legacy_PHYTYPE_B
:
1545 case B43legacy_PHYTYPE_G
:
1546 if ((rev
>= 5) && (rev
<= 10))
1547 filename
= "b0g0bsinitvals5";
1550 else if (rev
== 2 || rev
== 4)
1553 goto err_no_initvals
;
1556 goto err_no_initvals
;
1558 err
= do_request_fw(dev
, filename
, &fw
->initvals_band
);
1566 b43legacy_print_fw_helptext(dev
->wl
);
1571 b43legacyerr(dev
->wl
, "No Initial Values firmware file for PHY %u, "
1572 "core rev %u\n", dev
->phy
.type
, rev
);
1576 b43legacy_release_firmware(dev
);
1580 static int b43legacy_upload_microcode(struct b43legacy_wldev
*dev
)
1582 const size_t hdr_len
= sizeof(struct b43legacy_fw_header
);
1593 /* Jump the microcode PSM to offset 0 */
1594 macctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
1595 B43legacy_WARN_ON(macctl
& B43legacy_MACCTL_PSM_RUN
);
1596 macctl
|= B43legacy_MACCTL_PSM_JMP0
;
1597 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
1598 /* Zero out all microcode PSM registers and shared memory. */
1599 for (i
= 0; i
< 64; i
++)
1600 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
, i
, 0);
1601 for (i
= 0; i
< 4096; i
+= 2)
1602 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, i
, 0);
1604 /* Upload Microcode. */
1605 data
= (__be32
*) (dev
->fw
.ucode
->data
+ hdr_len
);
1606 len
= (dev
->fw
.ucode
->size
- hdr_len
) / sizeof(__be32
);
1607 b43legacy_shm_control_word(dev
,
1608 B43legacy_SHM_UCODE
|
1609 B43legacy_SHM_AUTOINC_W
,
1611 for (i
= 0; i
< len
; i
++) {
1612 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
,
1613 be32_to_cpu(data
[i
]));
1618 /* Upload PCM data. */
1619 data
= (__be32
*) (dev
->fw
.pcm
->data
+ hdr_len
);
1620 len
= (dev
->fw
.pcm
->size
- hdr_len
) / sizeof(__be32
);
1621 b43legacy_shm_control_word(dev
, B43legacy_SHM_HW
, 0x01EA);
1622 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
, 0x00004000);
1623 /* No need for autoinc bit in SHM_HW */
1624 b43legacy_shm_control_word(dev
, B43legacy_SHM_HW
, 0x01EB);
1625 for (i
= 0; i
< len
; i
++) {
1626 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
,
1627 be32_to_cpu(data
[i
]));
1632 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
,
1635 /* Start the microcode PSM */
1636 macctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
1637 macctl
&= ~B43legacy_MACCTL_PSM_JMP0
;
1638 macctl
|= B43legacy_MACCTL_PSM_RUN
;
1639 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
1641 /* Wait for the microcode to load and respond */
1644 tmp
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1645 if (tmp
== B43legacy_IRQ_MAC_SUSPENDED
)
1648 if (i
>= B43legacy_IRQWAIT_MAX_RETRIES
) {
1649 b43legacyerr(dev
->wl
, "Microcode not responding\n");
1650 b43legacy_print_fw_helptext(dev
->wl
);
1654 msleep_interruptible(50);
1655 if (signal_pending(current
)) {
1660 /* dummy read follows */
1661 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1663 /* Get and check the revisions. */
1664 fwrev
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1665 B43legacy_SHM_SH_UCODEREV
);
1666 fwpatch
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1667 B43legacy_SHM_SH_UCODEPATCH
);
1668 fwdate
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1669 B43legacy_SHM_SH_UCODEDATE
);
1670 fwtime
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1671 B43legacy_SHM_SH_UCODETIME
);
1673 if (fwrev
> 0x128) {
1674 b43legacyerr(dev
->wl
, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1675 " Only firmware from binary drivers version 3.x"
1676 " is supported. You must change your firmware"
1678 b43legacy_print_fw_helptext(dev
->wl
);
1682 b43legacyinfo(dev
->wl
, "Loading firmware version 0x%X, patch level %u "
1683 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev
, fwpatch
,
1684 (fwdate
>> 12) & 0xF, (fwdate
>> 8) & 0xF, fwdate
& 0xFF,
1685 (fwtime
>> 11) & 0x1F, (fwtime
>> 5) & 0x3F,
1688 dev
->fw
.rev
= fwrev
;
1689 dev
->fw
.patch
= fwpatch
;
1694 macctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
1695 macctl
&= ~B43legacy_MACCTL_PSM_RUN
;
1696 macctl
|= B43legacy_MACCTL_PSM_JMP0
;
1697 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
1702 static int b43legacy_write_initvals(struct b43legacy_wldev
*dev
,
1703 const struct b43legacy_iv
*ivals
,
1707 const struct b43legacy_iv
*iv
;
1712 BUILD_BUG_ON(sizeof(struct b43legacy_iv
) != 6);
1714 for (i
= 0; i
< count
; i
++) {
1715 if (array_size
< sizeof(iv
->offset_size
))
1717 array_size
-= sizeof(iv
->offset_size
);
1718 offset
= be16_to_cpu(iv
->offset_size
);
1719 bit32
= !!(offset
& B43legacy_IV_32BIT
);
1720 offset
&= B43legacy_IV_OFFSET_MASK
;
1721 if (offset
>= 0x1000)
1726 if (array_size
< sizeof(iv
->data
.d32
))
1728 array_size
-= sizeof(iv
->data
.d32
);
1730 value
= get_unaligned_be32(&iv
->data
.d32
);
1731 b43legacy_write32(dev
, offset
, value
);
1733 iv
= (const struct b43legacy_iv
*)((const uint8_t *)iv
+
1739 if (array_size
< sizeof(iv
->data
.d16
))
1741 array_size
-= sizeof(iv
->data
.d16
);
1743 value
= be16_to_cpu(iv
->data
.d16
);
1744 b43legacy_write16(dev
, offset
, value
);
1746 iv
= (const struct b43legacy_iv
*)((const uint8_t *)iv
+
1757 b43legacyerr(dev
->wl
, "Initial Values Firmware file-format error.\n");
1758 b43legacy_print_fw_helptext(dev
->wl
);
1763 static int b43legacy_upload_initvals(struct b43legacy_wldev
*dev
)
1765 const size_t hdr_len
= sizeof(struct b43legacy_fw_header
);
1766 const struct b43legacy_fw_header
*hdr
;
1767 struct b43legacy_firmware
*fw
= &dev
->fw
;
1768 const struct b43legacy_iv
*ivals
;
1772 hdr
= (const struct b43legacy_fw_header
*)(fw
->initvals
->data
);
1773 ivals
= (const struct b43legacy_iv
*)(fw
->initvals
->data
+ hdr_len
);
1774 count
= be32_to_cpu(hdr
->size
);
1775 err
= b43legacy_write_initvals(dev
, ivals
, count
,
1776 fw
->initvals
->size
- hdr_len
);
1779 if (fw
->initvals_band
) {
1780 hdr
= (const struct b43legacy_fw_header
*)
1781 (fw
->initvals_band
->data
);
1782 ivals
= (const struct b43legacy_iv
*)(fw
->initvals_band
->data
1784 count
= be32_to_cpu(hdr
->size
);
1785 err
= b43legacy_write_initvals(dev
, ivals
, count
,
1786 fw
->initvals_band
->size
- hdr_len
);
1795 /* Initialize the GPIOs
1796 * http://bcm-specs.sipsolutions.net/GPIO
1798 static int b43legacy_gpio_init(struct b43legacy_wldev
*dev
)
1800 struct ssb_bus
*bus
= dev
->dev
->bus
;
1801 struct ssb_device
*gpiodev
, *pcidev
= NULL
;
1805 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
,
1806 b43legacy_read32(dev
,
1807 B43legacy_MMIO_MACCTL
)
1810 b43legacy_write16(dev
, B43legacy_MMIO_GPIO_MASK
,
1811 b43legacy_read16(dev
,
1812 B43legacy_MMIO_GPIO_MASK
)
1817 if (dev
->dev
->bus
->chip_id
== 0x4301) {
1821 if (dev
->dev
->bus
->sprom
.boardflags_lo
& B43legacy_BFL_PACTRL
) {
1822 b43legacy_write16(dev
, B43legacy_MMIO_GPIO_MASK
,
1823 b43legacy_read16(dev
,
1824 B43legacy_MMIO_GPIO_MASK
)
1829 if (dev
->dev
->id
.revision
>= 2)
1830 mask
|= 0x0010; /* FIXME: This is redundant. */
1832 #ifdef CONFIG_SSB_DRIVER_PCICORE
1833 pcidev
= bus
->pcicore
.dev
;
1835 gpiodev
= bus
->chipco
.dev
? : pcidev
;
1838 ssb_write32(gpiodev
, B43legacy_GPIO_CONTROL
,
1839 (ssb_read32(gpiodev
, B43legacy_GPIO_CONTROL
)
1845 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1846 static void b43legacy_gpio_cleanup(struct b43legacy_wldev
*dev
)
1848 struct ssb_bus
*bus
= dev
->dev
->bus
;
1849 struct ssb_device
*gpiodev
, *pcidev
= NULL
;
1851 #ifdef CONFIG_SSB_DRIVER_PCICORE
1852 pcidev
= bus
->pcicore
.dev
;
1854 gpiodev
= bus
->chipco
.dev
? : pcidev
;
1857 ssb_write32(gpiodev
, B43legacy_GPIO_CONTROL
, 0);
1860 /* http://bcm-specs.sipsolutions.net/EnableMac */
1861 void b43legacy_mac_enable(struct b43legacy_wldev
*dev
)
1863 dev
->mac_suspended
--;
1864 B43legacy_WARN_ON(dev
->mac_suspended
< 0);
1865 B43legacy_WARN_ON(irqs_disabled());
1866 if (dev
->mac_suspended
== 0) {
1867 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
,
1868 b43legacy_read32(dev
,
1869 B43legacy_MMIO_MACCTL
)
1870 | B43legacy_MACCTL_ENABLED
);
1871 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
,
1872 B43legacy_IRQ_MAC_SUSPENDED
);
1873 /* the next two are dummy reads */
1874 b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
1875 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1876 b43legacy_power_saving_ctl_bits(dev
, -1, -1);
1878 /* Re-enable IRQs. */
1879 spin_lock_irq(&dev
->wl
->irq_lock
);
1880 b43legacy_interrupt_enable(dev
, dev
->irq_savedstate
);
1881 spin_unlock_irq(&dev
->wl
->irq_lock
);
1885 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1886 void b43legacy_mac_suspend(struct b43legacy_wldev
*dev
)
1892 B43legacy_WARN_ON(irqs_disabled());
1893 B43legacy_WARN_ON(dev
->mac_suspended
< 0);
1895 if (dev
->mac_suspended
== 0) {
1896 /* Mask IRQs before suspending MAC. Otherwise
1897 * the MAC stays busy and won't suspend. */
1898 spin_lock_irq(&dev
->wl
->irq_lock
);
1899 tmp
= b43legacy_interrupt_disable(dev
, B43legacy_IRQ_ALL
);
1900 spin_unlock_irq(&dev
->wl
->irq_lock
);
1901 b43legacy_synchronize_irq(dev
);
1902 dev
->irq_savedstate
= tmp
;
1904 b43legacy_power_saving_ctl_bits(dev
, -1, 1);
1905 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
,
1906 b43legacy_read32(dev
,
1907 B43legacy_MMIO_MACCTL
)
1908 & ~B43legacy_MACCTL_ENABLED
);
1909 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1910 for (i
= 40; i
; i
--) {
1911 tmp
= b43legacy_read32(dev
,
1912 B43legacy_MMIO_GEN_IRQ_REASON
);
1913 if (tmp
& B43legacy_IRQ_MAC_SUSPENDED
)
1917 b43legacyerr(dev
->wl
, "MAC suspend failed\n");
1920 dev
->mac_suspended
++;
1923 static void b43legacy_adjust_opmode(struct b43legacy_wldev
*dev
)
1925 struct b43legacy_wl
*wl
= dev
->wl
;
1929 ctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
1930 /* Reset status to STA infrastructure mode. */
1931 ctl
&= ~B43legacy_MACCTL_AP
;
1932 ctl
&= ~B43legacy_MACCTL_KEEP_CTL
;
1933 ctl
&= ~B43legacy_MACCTL_KEEP_BADPLCP
;
1934 ctl
&= ~B43legacy_MACCTL_KEEP_BAD
;
1935 ctl
&= ~B43legacy_MACCTL_PROMISC
;
1936 ctl
&= ~B43legacy_MACCTL_BEACPROMISC
;
1937 ctl
|= B43legacy_MACCTL_INFRA
;
1939 if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_AP
))
1940 ctl
|= B43legacy_MACCTL_AP
;
1941 else if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_IBSS
))
1942 ctl
&= ~B43legacy_MACCTL_INFRA
;
1944 if (wl
->filter_flags
& FIF_CONTROL
)
1945 ctl
|= B43legacy_MACCTL_KEEP_CTL
;
1946 if (wl
->filter_flags
& FIF_FCSFAIL
)
1947 ctl
|= B43legacy_MACCTL_KEEP_BAD
;
1948 if (wl
->filter_flags
& FIF_PLCPFAIL
)
1949 ctl
|= B43legacy_MACCTL_KEEP_BADPLCP
;
1950 if (wl
->filter_flags
& FIF_PROMISC_IN_BSS
)
1951 ctl
|= B43legacy_MACCTL_PROMISC
;
1952 if (wl
->filter_flags
& FIF_BCN_PRBRESP_PROMISC
)
1953 ctl
|= B43legacy_MACCTL_BEACPROMISC
;
1955 /* Workaround: On old hardware the HW-MAC-address-filter
1956 * doesn't work properly, so always run promisc in filter
1957 * it in software. */
1958 if (dev
->dev
->id
.revision
<= 4)
1959 ctl
|= B43legacy_MACCTL_PROMISC
;
1961 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, ctl
);
1964 if ((ctl
& B43legacy_MACCTL_INFRA
) &&
1965 !(ctl
& B43legacy_MACCTL_AP
)) {
1966 if (dev
->dev
->bus
->chip_id
== 0x4306 &&
1967 dev
->dev
->bus
->chip_rev
== 3)
1972 b43legacy_write16(dev
, 0x612, cfp_pretbtt
);
1975 static void b43legacy_rate_memory_write(struct b43legacy_wldev
*dev
,
1983 offset
+= (b43legacy_plcp_get_ratecode_ofdm(rate
) & 0x000F) * 2;
1986 offset
+= (b43legacy_plcp_get_ratecode_cck(rate
) & 0x000F) * 2;
1988 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, offset
+ 0x20,
1989 b43legacy_shm_read16(dev
,
1990 B43legacy_SHM_SHARED
, offset
));
1993 static void b43legacy_rate_memory_init(struct b43legacy_wldev
*dev
)
1995 switch (dev
->phy
.type
) {
1996 case B43legacy_PHYTYPE_G
:
1997 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_6MB
, 1);
1998 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_12MB
, 1);
1999 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_18MB
, 1);
2000 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_24MB
, 1);
2001 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_36MB
, 1);
2002 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_48MB
, 1);
2003 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_54MB
, 1);
2005 case B43legacy_PHYTYPE_B
:
2006 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_1MB
, 0);
2007 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_2MB
, 0);
2008 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_5MB
, 0);
2009 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_11MB
, 0);
2012 B43legacy_BUG_ON(1);
2016 /* Set the TX-Antenna for management frames sent by firmware. */
2017 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev
*dev
,
2024 case B43legacy_ANTENNA0
:
2025 ant
|= B43legacy_TX4_PHY_ANT0
;
2027 case B43legacy_ANTENNA1
:
2028 ant
|= B43legacy_TX4_PHY_ANT1
;
2030 case B43legacy_ANTENNA_AUTO
:
2031 ant
|= B43legacy_TX4_PHY_ANTLAST
;
2034 B43legacy_BUG_ON(1);
2037 /* FIXME We also need to set the other flags of the PHY control
2038 * field somewhere. */
2041 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
2042 B43legacy_SHM_SH_BEACPHYCTL
);
2043 tmp
= (tmp
& ~B43legacy_TX4_PHY_ANT
) | ant
;
2044 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
2045 B43legacy_SHM_SH_BEACPHYCTL
, tmp
);
2047 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
2048 B43legacy_SHM_SH_ACKCTSPHYCTL
);
2049 tmp
= (tmp
& ~B43legacy_TX4_PHY_ANT
) | ant
;
2050 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
2051 B43legacy_SHM_SH_ACKCTSPHYCTL
, tmp
);
2052 /* For Probe Resposes */
2053 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
2054 B43legacy_SHM_SH_PRPHYCTL
);
2055 tmp
= (tmp
& ~B43legacy_TX4_PHY_ANT
) | ant
;
2056 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
2057 B43legacy_SHM_SH_PRPHYCTL
, tmp
);
2060 /* This is the opposite of b43legacy_chip_init() */
2061 static void b43legacy_chip_exit(struct b43legacy_wldev
*dev
)
2063 b43legacy_radio_turn_off(dev
, 1);
2064 b43legacy_gpio_cleanup(dev
);
2065 /* firmware is released later */
2068 /* Initialize the chip
2069 * http://bcm-specs.sipsolutions.net/ChipInit
2071 static int b43legacy_chip_init(struct b43legacy_wldev
*dev
)
2073 struct b43legacy_phy
*phy
= &dev
->phy
;
2076 u32 value32
, macctl
;
2079 /* Initialize the MAC control */
2080 macctl
= B43legacy_MACCTL_IHR_ENABLED
| B43legacy_MACCTL_SHM_ENABLED
;
2082 macctl
|= B43legacy_MACCTL_GMODE
;
2083 macctl
|= B43legacy_MACCTL_INFRA
;
2084 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
2086 err
= b43legacy_request_firmware(dev
);
2089 err
= b43legacy_upload_microcode(dev
);
2091 goto out
; /* firmware is released later */
2093 err
= b43legacy_gpio_init(dev
);
2095 goto out
; /* firmware is released later */
2097 err
= b43legacy_upload_initvals(dev
);
2099 goto err_gpio_clean
;
2100 b43legacy_radio_turn_on(dev
);
2102 b43legacy_write16(dev
, 0x03E6, 0x0000);
2103 err
= b43legacy_phy_init(dev
);
2107 /* Select initial Interference Mitigation. */
2108 tmp
= phy
->interfmode
;
2109 phy
->interfmode
= B43legacy_INTERFMODE_NONE
;
2110 b43legacy_radio_set_interference_mitigation(dev
, tmp
);
2112 b43legacy_phy_set_antenna_diversity(dev
);
2113 b43legacy_mgmtframe_txantenna(dev
, B43legacy_ANTENNA_DEFAULT
);
2115 if (phy
->type
== B43legacy_PHYTYPE_B
) {
2116 value16
= b43legacy_read16(dev
, 0x005E);
2118 b43legacy_write16(dev
, 0x005E, value16
);
2120 b43legacy_write32(dev
, 0x0100, 0x01000000);
2121 if (dev
->dev
->id
.revision
< 5)
2122 b43legacy_write32(dev
, 0x010C, 0x01000000);
2124 value32
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
2125 value32
&= ~B43legacy_MACCTL_INFRA
;
2126 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, value32
);
2127 value32
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
2128 value32
|= B43legacy_MACCTL_INFRA
;
2129 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, value32
);
2131 if (b43legacy_using_pio(dev
)) {
2132 b43legacy_write32(dev
, 0x0210, 0x00000100);
2133 b43legacy_write32(dev
, 0x0230, 0x00000100);
2134 b43legacy_write32(dev
, 0x0250, 0x00000100);
2135 b43legacy_write32(dev
, 0x0270, 0x00000100);
2136 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0034,
2140 /* Probe Response Timeout value */
2141 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2142 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0074, 0x0000);
2144 /* Initially set the wireless operation mode. */
2145 b43legacy_adjust_opmode(dev
);
2147 if (dev
->dev
->id
.revision
< 3) {
2148 b43legacy_write16(dev
, 0x060E, 0x0000);
2149 b43legacy_write16(dev
, 0x0610, 0x8000);
2150 b43legacy_write16(dev
, 0x0604, 0x0000);
2151 b43legacy_write16(dev
, 0x0606, 0x0200);
2153 b43legacy_write32(dev
, 0x0188, 0x80000000);
2154 b43legacy_write32(dev
, 0x018C, 0x02000000);
2156 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
, 0x00004000);
2157 b43legacy_write32(dev
, B43legacy_MMIO_DMA0_IRQ_MASK
, 0x0001DC00);
2158 b43legacy_write32(dev
, B43legacy_MMIO_DMA1_IRQ_MASK
, 0x0000DC00);
2159 b43legacy_write32(dev
, B43legacy_MMIO_DMA2_IRQ_MASK
, 0x0000DC00);
2160 b43legacy_write32(dev
, B43legacy_MMIO_DMA3_IRQ_MASK
, 0x0001DC00);
2161 b43legacy_write32(dev
, B43legacy_MMIO_DMA4_IRQ_MASK
, 0x0000DC00);
2162 b43legacy_write32(dev
, B43legacy_MMIO_DMA5_IRQ_MASK
, 0x0000DC00);
2164 value32
= ssb_read32(dev
->dev
, SSB_TMSLOW
);
2165 value32
|= 0x00100000;
2166 ssb_write32(dev
->dev
, SSB_TMSLOW
, value32
);
2168 b43legacy_write16(dev
, B43legacy_MMIO_POWERUP_DELAY
,
2169 dev
->dev
->bus
->chipco
.fast_pwrup_delay
);
2171 /* PHY TX errors counter. */
2172 atomic_set(&phy
->txerr_cnt
, B43legacy_PHY_TX_BADNESS_LIMIT
);
2174 B43legacy_WARN_ON(err
!= 0);
2175 b43legacydbg(dev
->wl
, "Chip initialized\n");
2180 b43legacy_radio_turn_off(dev
, 1);
2182 b43legacy_gpio_cleanup(dev
);
2186 static void b43legacy_periodic_every120sec(struct b43legacy_wldev
*dev
)
2188 struct b43legacy_phy
*phy
= &dev
->phy
;
2190 if (phy
->type
!= B43legacy_PHYTYPE_G
|| phy
->rev
< 2)
2193 b43legacy_mac_suspend(dev
);
2194 b43legacy_phy_lo_g_measure(dev
);
2195 b43legacy_mac_enable(dev
);
2198 static void b43legacy_periodic_every60sec(struct b43legacy_wldev
*dev
)
2200 b43legacy_phy_lo_mark_all_unused(dev
);
2201 if (dev
->dev
->bus
->sprom
.boardflags_lo
& B43legacy_BFL_RSSI
) {
2202 b43legacy_mac_suspend(dev
);
2203 b43legacy_calc_nrssi_slope(dev
);
2204 b43legacy_mac_enable(dev
);
2208 static void b43legacy_periodic_every30sec(struct b43legacy_wldev
*dev
)
2210 /* Update device statistics. */
2211 b43legacy_calculate_link_quality(dev
);
2214 static void b43legacy_periodic_every15sec(struct b43legacy_wldev
*dev
)
2216 b43legacy_phy_xmitpower(dev
); /* FIXME: unless scanning? */
2218 atomic_set(&dev
->phy
.txerr_cnt
, B43legacy_PHY_TX_BADNESS_LIMIT
);
2222 static void do_periodic_work(struct b43legacy_wldev
*dev
)
2226 state
= dev
->periodic_state
;
2228 b43legacy_periodic_every120sec(dev
);
2230 b43legacy_periodic_every60sec(dev
);
2232 b43legacy_periodic_every30sec(dev
);
2233 b43legacy_periodic_every15sec(dev
);
2236 /* Periodic work locking policy:
2237 * The whole periodic work handler is protected by
2238 * wl->mutex. If another lock is needed somewhere in the
2239 * pwork callchain, it's aquired in-place, where it's needed.
2241 static void b43legacy_periodic_work_handler(struct work_struct
*work
)
2243 struct b43legacy_wldev
*dev
= container_of(work
, struct b43legacy_wldev
,
2244 periodic_work
.work
);
2245 struct b43legacy_wl
*wl
= dev
->wl
;
2246 unsigned long delay
;
2248 mutex_lock(&wl
->mutex
);
2250 if (unlikely(b43legacy_status(dev
) != B43legacy_STAT_STARTED
))
2252 if (b43legacy_debug(dev
, B43legacy_DBG_PWORK_STOP
))
2255 do_periodic_work(dev
);
2257 dev
->periodic_state
++;
2259 if (b43legacy_debug(dev
, B43legacy_DBG_PWORK_FAST
))
2260 delay
= msecs_to_jiffies(50);
2262 delay
= round_jiffies_relative(HZ
* 15);
2263 queue_delayed_work(wl
->hw
->workqueue
, &dev
->periodic_work
, delay
);
2265 mutex_unlock(&wl
->mutex
);
2268 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev
*dev
)
2270 struct delayed_work
*work
= &dev
->periodic_work
;
2272 dev
->periodic_state
= 0;
2273 INIT_DELAYED_WORK(work
, b43legacy_periodic_work_handler
);
2274 queue_delayed_work(dev
->wl
->hw
->workqueue
, work
, 0);
2277 /* Validate access to the chip (SHM) */
2278 static int b43legacy_validate_chipaccess(struct b43legacy_wldev
*dev
)
2283 shm_backup
= b43legacy_shm_read32(dev
, B43legacy_SHM_SHARED
, 0);
2284 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
, 0, 0xAA5555AA);
2285 if (b43legacy_shm_read32(dev
, B43legacy_SHM_SHARED
, 0) !=
2288 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
, 0, 0x55AAAA55);
2289 if (b43legacy_shm_read32(dev
, B43legacy_SHM_SHARED
, 0) !=
2292 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
, 0, shm_backup
);
2294 value
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
2295 if ((value
| B43legacy_MACCTL_GMODE
) !=
2296 (B43legacy_MACCTL_GMODE
| B43legacy_MACCTL_IHR_ENABLED
))
2299 value
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
2305 b43legacyerr(dev
->wl
, "Failed to validate the chipaccess\n");
2309 static void b43legacy_security_init(struct b43legacy_wldev
*dev
)
2311 dev
->max_nr_keys
= (dev
->dev
->id
.revision
>= 5) ? 58 : 20;
2312 B43legacy_WARN_ON(dev
->max_nr_keys
> ARRAY_SIZE(dev
->key
));
2313 dev
->ktp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
2315 /* KTP is a word address, but we address SHM bytewise.
2316 * So multiply by two.
2319 if (dev
->dev
->id
.revision
>= 5)
2320 /* Number of RCMTA address slots */
2321 b43legacy_write16(dev
, B43legacy_MMIO_RCMTA_COUNT
,
2322 dev
->max_nr_keys
- 8);
2325 static int b43legacy_rng_read(struct hwrng
*rng
, u32
*data
)
2327 struct b43legacy_wl
*wl
= (struct b43legacy_wl
*)rng
->priv
;
2328 unsigned long flags
;
2330 /* Don't take wl->mutex here, as it could deadlock with
2331 * hwrng internal locking. It's not needed to take
2332 * wl->mutex here, anyway. */
2334 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2335 *data
= b43legacy_read16(wl
->current_dev
, B43legacy_MMIO_RNG
);
2336 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2338 return (sizeof(u16
));
2341 static void b43legacy_rng_exit(struct b43legacy_wl
*wl
)
2343 if (wl
->rng_initialized
)
2344 hwrng_unregister(&wl
->rng
);
2347 static int b43legacy_rng_init(struct b43legacy_wl
*wl
)
2351 snprintf(wl
->rng_name
, ARRAY_SIZE(wl
->rng_name
),
2352 "%s_%s", KBUILD_MODNAME
, wiphy_name(wl
->hw
->wiphy
));
2353 wl
->rng
.name
= wl
->rng_name
;
2354 wl
->rng
.data_read
= b43legacy_rng_read
;
2355 wl
->rng
.priv
= (unsigned long)wl
;
2356 wl
->rng_initialized
= 1;
2357 err
= hwrng_register(&wl
->rng
);
2359 wl
->rng_initialized
= 0;
2360 b43legacyerr(wl
, "Failed to register the random "
2361 "number generator (%d)\n", err
);
2367 static int b43legacy_op_tx(struct ieee80211_hw
*hw
,
2368 struct sk_buff
*skb
)
2370 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2371 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2373 unsigned long flags
;
2377 if (unlikely(b43legacy_status(dev
) < B43legacy_STAT_STARTED
))
2379 /* DMA-TX is done without a global lock. */
2380 if (b43legacy_using_pio(dev
)) {
2381 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2382 err
= b43legacy_pio_tx(dev
, skb
);
2383 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2385 err
= b43legacy_dma_tx(dev
, skb
);
2387 if (unlikely(err
)) {
2388 /* Drop the packet. */
2389 dev_kfree_skb_any(skb
);
2391 return NETDEV_TX_OK
;
2394 static int b43legacy_op_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
2395 const struct ieee80211_tx_queue_params
*params
)
2400 static int b43legacy_op_get_tx_stats(struct ieee80211_hw
*hw
,
2401 struct ieee80211_tx_queue_stats
*stats
)
2403 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2404 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2405 unsigned long flags
;
2410 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2411 if (likely(b43legacy_status(dev
) >= B43legacy_STAT_STARTED
)) {
2412 if (b43legacy_using_pio(dev
))
2413 b43legacy_pio_get_tx_stats(dev
, stats
);
2415 b43legacy_dma_get_tx_stats(dev
, stats
);
2418 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2423 static int b43legacy_op_get_stats(struct ieee80211_hw
*hw
,
2424 struct ieee80211_low_level_stats
*stats
)
2426 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2427 unsigned long flags
;
2429 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2430 memcpy(stats
, &wl
->ieee_stats
, sizeof(*stats
));
2431 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2436 static const char *phymode_to_string(unsigned int phymode
)
2439 case B43legacy_PHYMODE_B
:
2441 case B43legacy_PHYMODE_G
:
2444 B43legacy_BUG_ON(1);
2449 static int find_wldev_for_phymode(struct b43legacy_wl
*wl
,
2450 unsigned int phymode
,
2451 struct b43legacy_wldev
**dev
,
2454 struct b43legacy_wldev
*d
;
2456 list_for_each_entry(d
, &wl
->devlist
, list
) {
2457 if (d
->phy
.possible_phymodes
& phymode
) {
2458 /* Ok, this device supports the PHY-mode.
2459 * Set the gmode bit. */
2470 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev
*dev
)
2472 struct ssb_device
*sdev
= dev
->dev
;
2475 tmslow
= ssb_read32(sdev
, SSB_TMSLOW
);
2476 tmslow
&= ~B43legacy_TMSLOW_GMODE
;
2477 tmslow
|= B43legacy_TMSLOW_PHYRESET
;
2478 tmslow
|= SSB_TMSLOW_FGC
;
2479 ssb_write32(sdev
, SSB_TMSLOW
, tmslow
);
2482 tmslow
= ssb_read32(sdev
, SSB_TMSLOW
);
2483 tmslow
&= ~SSB_TMSLOW_FGC
;
2484 tmslow
|= B43legacy_TMSLOW_PHYRESET
;
2485 ssb_write32(sdev
, SSB_TMSLOW
, tmslow
);
2489 /* Expects wl->mutex locked */
2490 static int b43legacy_switch_phymode(struct b43legacy_wl
*wl
,
2491 unsigned int new_mode
)
2493 struct b43legacy_wldev
*up_dev
;
2494 struct b43legacy_wldev
*down_dev
;
2499 err
= find_wldev_for_phymode(wl
, new_mode
, &up_dev
, &gmode
);
2501 b43legacyerr(wl
, "Could not find a device for %s-PHY mode\n",
2502 phymode_to_string(new_mode
));
2505 if ((up_dev
== wl
->current_dev
) &&
2506 (!!wl
->current_dev
->phy
.gmode
== !!gmode
))
2507 /* This device is already running. */
2509 b43legacydbg(wl
, "Reconfiguring PHYmode to %s-PHY\n",
2510 phymode_to_string(new_mode
));
2511 down_dev
= wl
->current_dev
;
2513 prev_status
= b43legacy_status(down_dev
);
2514 /* Shutdown the currently running core. */
2515 if (prev_status
>= B43legacy_STAT_STARTED
)
2516 b43legacy_wireless_core_stop(down_dev
);
2517 if (prev_status
>= B43legacy_STAT_INITIALIZED
)
2518 b43legacy_wireless_core_exit(down_dev
);
2520 if (down_dev
!= up_dev
)
2521 /* We switch to a different core, so we put PHY into
2522 * RESET on the old core. */
2523 b43legacy_put_phy_into_reset(down_dev
);
2525 /* Now start the new core. */
2526 up_dev
->phy
.gmode
= gmode
;
2527 if (prev_status
>= B43legacy_STAT_INITIALIZED
) {
2528 err
= b43legacy_wireless_core_init(up_dev
);
2530 b43legacyerr(wl
, "Fatal: Could not initialize device"
2531 " for newly selected %s-PHY mode\n",
2532 phymode_to_string(new_mode
));
2536 if (prev_status
>= B43legacy_STAT_STARTED
) {
2537 err
= b43legacy_wireless_core_start(up_dev
);
2539 b43legacyerr(wl
, "Fatal: Coult not start device for "
2540 "newly selected %s-PHY mode\n",
2541 phymode_to_string(new_mode
));
2542 b43legacy_wireless_core_exit(up_dev
);
2546 B43legacy_WARN_ON(b43legacy_status(up_dev
) != prev_status
);
2548 b43legacy_shm_write32(up_dev
, B43legacy_SHM_SHARED
, 0x003E, 0);
2550 wl
->current_dev
= up_dev
;
2554 /* Whoops, failed to init the new core. No core is operating now. */
2555 wl
->current_dev
= NULL
;
2559 static int b43legacy_antenna_from_ieee80211(u8 antenna
)
2562 case 0: /* default/diversity */
2563 return B43legacy_ANTENNA_DEFAULT
;
2564 case 1: /* Antenna 0 */
2565 return B43legacy_ANTENNA0
;
2566 case 2: /* Antenna 1 */
2567 return B43legacy_ANTENNA1
;
2569 return B43legacy_ANTENNA_DEFAULT
;
2573 static int b43legacy_op_dev_config(struct ieee80211_hw
*hw
,
2574 struct ieee80211_conf
*conf
)
2576 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2577 struct b43legacy_wldev
*dev
;
2578 struct b43legacy_phy
*phy
;
2579 unsigned long flags
;
2580 unsigned int new_phymode
= 0xFFFF;
2586 antenna_tx
= b43legacy_antenna_from_ieee80211(conf
->antenna_sel_tx
);
2587 antenna_rx
= b43legacy_antenna_from_ieee80211(conf
->antenna_sel_rx
);
2589 mutex_lock(&wl
->mutex
);
2590 dev
= wl
->current_dev
;
2593 /* Switch the PHY mode (if necessary). */
2594 switch (conf
->channel
->band
) {
2595 case IEEE80211_BAND_2GHZ
:
2596 if (phy
->type
== B43legacy_PHYTYPE_B
)
2597 new_phymode
= B43legacy_PHYMODE_B
;
2599 new_phymode
= B43legacy_PHYMODE_G
;
2602 B43legacy_WARN_ON(1);
2604 err
= b43legacy_switch_phymode(wl
, new_phymode
);
2606 goto out_unlock_mutex
;
2608 /* Disable IRQs while reconfiguring the device.
2609 * This makes it possible to drop the spinlock throughout
2610 * the reconfiguration process. */
2611 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2612 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
) {
2613 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2614 goto out_unlock_mutex
;
2616 savedirqs
= b43legacy_interrupt_disable(dev
, B43legacy_IRQ_ALL
);
2617 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2618 b43legacy_synchronize_irq(dev
);
2620 /* Switch to the requested channel.
2621 * The firmware takes care of races with the TX handler. */
2622 if (conf
->channel
->hw_value
!= phy
->channel
)
2623 b43legacy_radio_selectchannel(dev
, conf
->channel
->hw_value
, 0);
2625 /* Enable/Disable ShortSlot timing. */
2626 if ((!!(conf
->flags
& IEEE80211_CONF_SHORT_SLOT_TIME
))
2627 != dev
->short_slot
) {
2628 B43legacy_WARN_ON(phy
->type
!= B43legacy_PHYTYPE_G
);
2629 if (conf
->flags
& IEEE80211_CONF_SHORT_SLOT_TIME
)
2630 b43legacy_short_slot_timing_enable(dev
);
2632 b43legacy_short_slot_timing_disable(dev
);
2635 dev
->wl
->radiotap_enabled
= !!(conf
->flags
& IEEE80211_CONF_RADIOTAP
);
2637 /* Adjust the desired TX power level. */
2638 if (conf
->power_level
!= 0) {
2639 if (conf
->power_level
!= phy
->power_level
) {
2640 phy
->power_level
= conf
->power_level
;
2641 b43legacy_phy_xmitpower(dev
);
2645 /* Antennas for RX and management frame TX. */
2646 b43legacy_mgmtframe_txantenna(dev
, antenna_tx
);
2648 /* Update templates for AP mode. */
2649 if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_AP
))
2650 b43legacy_set_beacon_int(dev
, conf
->beacon_int
);
2653 if (!!conf
->radio_enabled
!= phy
->radio_on
) {
2654 if (conf
->radio_enabled
) {
2655 b43legacy_radio_turn_on(dev
);
2656 b43legacyinfo(dev
->wl
, "Radio turned on by software\n");
2657 if (!dev
->radio_hw_enable
)
2658 b43legacyinfo(dev
->wl
, "The hardware RF-kill"
2659 " button still turns the radio"
2660 " physically off. Press the"
2661 " button to turn it on.\n");
2663 b43legacy_radio_turn_off(dev
, 0);
2664 b43legacyinfo(dev
->wl
, "Radio turned off by"
2669 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2670 b43legacy_interrupt_enable(dev
, savedirqs
);
2672 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2674 mutex_unlock(&wl
->mutex
);
2679 static void b43legacy_op_configure_filter(struct ieee80211_hw
*hw
,
2680 unsigned int changed
,
2681 unsigned int *fflags
,
2683 struct dev_addr_list
*mc_list
)
2685 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2686 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2687 unsigned long flags
;
2694 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2695 *fflags
&= FIF_PROMISC_IN_BSS
|
2701 FIF_BCN_PRBRESP_PROMISC
;
2703 changed
&= FIF_PROMISC_IN_BSS
|
2709 FIF_BCN_PRBRESP_PROMISC
;
2711 wl
->filter_flags
= *fflags
;
2713 if (changed
&& b43legacy_status(dev
) >= B43legacy_STAT_INITIALIZED
)
2714 b43legacy_adjust_opmode(dev
);
2715 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2718 static int b43legacy_op_config_interface(struct ieee80211_hw
*hw
,
2719 struct ieee80211_vif
*vif
,
2720 struct ieee80211_if_conf
*conf
)
2722 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2723 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2724 unsigned long flags
;
2728 mutex_lock(&wl
->mutex
);
2729 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2730 B43legacy_WARN_ON(wl
->vif
!= vif
);
2732 memcpy(wl
->bssid
, conf
->bssid
, ETH_ALEN
);
2734 memset(wl
->bssid
, 0, ETH_ALEN
);
2735 if (b43legacy_status(dev
) >= B43legacy_STAT_INITIALIZED
) {
2736 if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_AP
)) {
2737 B43legacy_WARN_ON(vif
->type
!= IEEE80211_IF_TYPE_AP
);
2738 b43legacy_set_ssid(dev
, conf
->ssid
, conf
->ssid_len
);
2739 if (conf
->changed
& IEEE80211_IFCC_BEACON
)
2740 b43legacy_update_templates(wl
);
2741 } else if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_IBSS
)) {
2742 if (conf
->changed
& IEEE80211_IFCC_BEACON
)
2743 b43legacy_update_templates(wl
);
2745 b43legacy_write_mac_bssid_templates(dev
);
2747 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2748 mutex_unlock(&wl
->mutex
);
2753 /* Locking: wl->mutex */
2754 static void b43legacy_wireless_core_stop(struct b43legacy_wldev
*dev
)
2756 struct b43legacy_wl
*wl
= dev
->wl
;
2757 unsigned long flags
;
2759 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
)
2762 /* Disable and sync interrupts. We must do this before than
2763 * setting the status to INITIALIZED, as the interrupt handler
2764 * won't care about IRQs then. */
2765 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2766 dev
->irq_savedstate
= b43legacy_interrupt_disable(dev
,
2768 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
); /* flush */
2769 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2770 b43legacy_synchronize_irq(dev
);
2772 b43legacy_set_status(dev
, B43legacy_STAT_INITIALIZED
);
2774 mutex_unlock(&wl
->mutex
);
2775 /* Must unlock as it would otherwise deadlock. No races here.
2776 * Cancel the possibly running self-rearming periodic work. */
2777 cancel_delayed_work_sync(&dev
->periodic_work
);
2778 mutex_lock(&wl
->mutex
);
2780 ieee80211_stop_queues(wl
->hw
); /* FIXME this could cause a deadlock */
2782 b43legacy_mac_suspend(dev
);
2783 free_irq(dev
->dev
->irq
, dev
);
2784 b43legacydbg(wl
, "Wireless interface stopped\n");
2787 /* Locking: wl->mutex */
2788 static int b43legacy_wireless_core_start(struct b43legacy_wldev
*dev
)
2792 B43legacy_WARN_ON(b43legacy_status(dev
) != B43legacy_STAT_INITIALIZED
);
2794 drain_txstatus_queue(dev
);
2795 err
= request_irq(dev
->dev
->irq
, b43legacy_interrupt_handler
,
2796 IRQF_SHARED
, KBUILD_MODNAME
, dev
);
2798 b43legacyerr(dev
->wl
, "Cannot request IRQ-%d\n",
2802 /* We are ready to run. */
2803 b43legacy_set_status(dev
, B43legacy_STAT_STARTED
);
2805 /* Start data flow (TX/RX) */
2806 b43legacy_mac_enable(dev
);
2807 b43legacy_interrupt_enable(dev
, dev
->irq_savedstate
);
2809 /* Start maintenance work */
2810 b43legacy_periodic_tasks_setup(dev
);
2812 b43legacydbg(dev
->wl
, "Wireless interface started\n");
2817 /* Get PHY and RADIO versioning numbers */
2818 static int b43legacy_phy_versioning(struct b43legacy_wldev
*dev
)
2820 struct b43legacy_phy
*phy
= &dev
->phy
;
2828 int unsupported
= 0;
2830 /* Get PHY versioning */
2831 tmp
= b43legacy_read16(dev
, B43legacy_MMIO_PHY_VER
);
2832 analog_type
= (tmp
& B43legacy_PHYVER_ANALOG
)
2833 >> B43legacy_PHYVER_ANALOG_SHIFT
;
2834 phy_type
= (tmp
& B43legacy_PHYVER_TYPE
) >> B43legacy_PHYVER_TYPE_SHIFT
;
2835 phy_rev
= (tmp
& B43legacy_PHYVER_VERSION
);
2837 case B43legacy_PHYTYPE_B
:
2838 if (phy_rev
!= 2 && phy_rev
!= 4
2839 && phy_rev
!= 6 && phy_rev
!= 7)
2842 case B43legacy_PHYTYPE_G
:
2850 b43legacyerr(dev
->wl
, "FOUND UNSUPPORTED PHY "
2851 "(Analog %u, Type %u, Revision %u)\n",
2852 analog_type
, phy_type
, phy_rev
);
2855 b43legacydbg(dev
->wl
, "Found PHY: Analog %u, Type %u, Revision %u\n",
2856 analog_type
, phy_type
, phy_rev
);
2859 /* Get RADIO versioning */
2860 if (dev
->dev
->bus
->chip_id
== 0x4317) {
2861 if (dev
->dev
->bus
->chip_rev
== 0)
2863 else if (dev
->dev
->bus
->chip_rev
== 1)
2868 b43legacy_write16(dev
, B43legacy_MMIO_RADIO_CONTROL
,
2869 B43legacy_RADIOCTL_ID
);
2870 tmp
= b43legacy_read16(dev
, B43legacy_MMIO_RADIO_DATA_HIGH
);
2872 b43legacy_write16(dev
, B43legacy_MMIO_RADIO_CONTROL
,
2873 B43legacy_RADIOCTL_ID
);
2874 tmp
|= b43legacy_read16(dev
, B43legacy_MMIO_RADIO_DATA_LOW
);
2876 radio_manuf
= (tmp
& 0x00000FFF);
2877 radio_ver
= (tmp
& 0x0FFFF000) >> 12;
2878 radio_rev
= (tmp
& 0xF0000000) >> 28;
2880 case B43legacy_PHYTYPE_B
:
2881 if ((radio_ver
& 0xFFF0) != 0x2050)
2884 case B43legacy_PHYTYPE_G
:
2885 if (radio_ver
!= 0x2050)
2889 B43legacy_BUG_ON(1);
2892 b43legacyerr(dev
->wl
, "FOUND UNSUPPORTED RADIO "
2893 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2894 radio_manuf
, radio_ver
, radio_rev
);
2897 b43legacydbg(dev
->wl
, "Found Radio: Manuf 0x%X, Version 0x%X,"
2898 " Revision %u\n", radio_manuf
, radio_ver
, radio_rev
);
2901 phy
->radio_manuf
= radio_manuf
;
2902 phy
->radio_ver
= radio_ver
;
2903 phy
->radio_rev
= radio_rev
;
2905 phy
->analog
= analog_type
;
2906 phy
->type
= phy_type
;
2912 static void setup_struct_phy_for_init(struct b43legacy_wldev
*dev
,
2913 struct b43legacy_phy
*phy
)
2915 struct b43legacy_lopair
*lo
;
2918 memset(phy
->minlowsig
, 0xFF, sizeof(phy
->minlowsig
));
2919 memset(phy
->minlowsigpos
, 0, sizeof(phy
->minlowsigpos
));
2921 /* Assume the radio is enabled. If it's not enabled, the state will
2922 * immediately get fixed on the first periodic work run. */
2923 dev
->radio_hw_enable
= 1;
2925 phy
->savedpctlreg
= 0xFFFF;
2926 phy
->aci_enable
= 0;
2927 phy
->aci_wlan_automatic
= 0;
2928 phy
->aci_hw_rssi
= 0;
2930 lo
= phy
->_lo_pairs
;
2932 memset(lo
, 0, sizeof(struct b43legacy_lopair
) *
2933 B43legacy_LO_COUNT
);
2934 phy
->max_lb_gain
= 0;
2935 phy
->trsw_rx_gain
= 0;
2937 /* Set default attenuation values. */
2938 phy
->bbatt
= b43legacy_default_baseband_attenuation(dev
);
2939 phy
->rfatt
= b43legacy_default_radio_attenuation(dev
);
2940 phy
->txctl1
= b43legacy_default_txctl1(dev
);
2941 phy
->txpwr_offset
= 0;
2944 phy
->nrssislope
= 0;
2945 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi
); i
++)
2946 phy
->nrssi
[i
] = -1000;
2947 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi_lt
); i
++)
2948 phy
->nrssi_lt
[i
] = i
;
2950 phy
->lofcal
= 0xFFFF;
2951 phy
->initval
= 0xFFFF;
2953 phy
->interfmode
= B43legacy_INTERFMODE_NONE
;
2954 phy
->channel
= 0xFF;
2957 static void setup_struct_wldev_for_init(struct b43legacy_wldev
*dev
)
2963 memset(&dev
->stats
, 0, sizeof(dev
->stats
));
2965 setup_struct_phy_for_init(dev
, &dev
->phy
);
2967 /* IRQ related flags */
2968 dev
->irq_reason
= 0;
2969 memset(dev
->dma_reason
, 0, sizeof(dev
->dma_reason
));
2970 dev
->irq_savedstate
= B43legacy_IRQ_MASKTEMPLATE
;
2972 dev
->mac_suspended
= 1;
2974 /* Noise calculation context */
2975 memset(&dev
->noisecalc
, 0, sizeof(dev
->noisecalc
));
2978 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev
*dev
)
2980 #ifdef CONFIG_SSB_DRIVER_PCICORE
2981 struct ssb_bus
*bus
= dev
->dev
->bus
;
2984 if (bus
->pcicore
.dev
&&
2985 bus
->pcicore
.dev
->id
.coreid
== SSB_DEV_PCI
&&
2986 bus
->pcicore
.dev
->id
.revision
<= 5) {
2987 /* IMCFGLO timeouts workaround. */
2988 tmp
= ssb_read32(dev
->dev
, SSB_IMCFGLO
);
2989 tmp
&= ~SSB_IMCFGLO_REQTO
;
2990 tmp
&= ~SSB_IMCFGLO_SERTO
;
2991 switch (bus
->bustype
) {
2992 case SSB_BUSTYPE_PCI
:
2993 case SSB_BUSTYPE_PCMCIA
:
2996 case SSB_BUSTYPE_SSB
:
3000 ssb_write32(dev
->dev
, SSB_IMCFGLO
, tmp
);
3002 #endif /* CONFIG_SSB_DRIVER_PCICORE */
3005 /* Write the short and long frame retry limit values. */
3006 static void b43legacy_set_retry_limits(struct b43legacy_wldev
*dev
,
3007 unsigned int short_retry
,
3008 unsigned int long_retry
)
3010 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
3011 * the chip-internal counter. */
3012 short_retry
= min(short_retry
, (unsigned int)0xF);
3013 long_retry
= min(long_retry
, (unsigned int)0xF);
3015 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
, 0x0006, short_retry
);
3016 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
, 0x0007, long_retry
);
3019 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev
*dev
,
3021 u16 pu_delay
= 1050;
3023 if (b43legacy_is_mode(dev
->wl
, IEEE80211_IF_TYPE_IBSS
) || idle
)
3025 if ((dev
->phy
.radio_ver
== 0x2050) && (dev
->phy
.radio_rev
== 8))
3026 pu_delay
= max(pu_delay
, (u16
)2400);
3028 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3029 B43legacy_SHM_SH_SPUWKUP
, pu_delay
);
3032 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3033 static void b43legacy_set_pretbtt(struct b43legacy_wldev
*dev
)
3037 /* The time value is in microseconds. */
3038 if (b43legacy_is_mode(dev
->wl
, IEEE80211_IF_TYPE_IBSS
))
3042 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3043 B43legacy_SHM_SH_PRETBTT
, pretbtt
);
3044 b43legacy_write16(dev
, B43legacy_MMIO_TSF_CFP_PRETBTT
, pretbtt
);
3047 /* Shutdown a wireless core */
3048 /* Locking: wl->mutex */
3049 static void b43legacy_wireless_core_exit(struct b43legacy_wldev
*dev
)
3051 struct b43legacy_phy
*phy
= &dev
->phy
;
3054 B43legacy_WARN_ON(b43legacy_status(dev
) > B43legacy_STAT_INITIALIZED
);
3055 if (b43legacy_status(dev
) != B43legacy_STAT_INITIALIZED
)
3057 b43legacy_set_status(dev
, B43legacy_STAT_UNINIT
);
3059 /* Stop the microcode PSM. */
3060 macctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
3061 macctl
&= ~B43legacy_MACCTL_PSM_RUN
;
3062 macctl
|= B43legacy_MACCTL_PSM_JMP0
;
3063 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
3065 b43legacy_leds_exit(dev
);
3066 b43legacy_rng_exit(dev
->wl
);
3067 b43legacy_pio_free(dev
);
3068 b43legacy_dma_free(dev
);
3069 b43legacy_chip_exit(dev
);
3070 b43legacy_radio_turn_off(dev
, 1);
3071 b43legacy_switch_analog(dev
, 0);
3072 if (phy
->dyn_tssi_tbl
)
3073 kfree(phy
->tssi2dbm
);
3074 kfree(phy
->lo_control
);
3075 phy
->lo_control
= NULL
;
3076 if (dev
->wl
->current_beacon
) {
3077 dev_kfree_skb_any(dev
->wl
->current_beacon
);
3078 dev
->wl
->current_beacon
= NULL
;
3081 ssb_device_disable(dev
->dev
, 0);
3082 ssb_bus_may_powerdown(dev
->dev
->bus
);
3085 static void prepare_phy_data_for_init(struct b43legacy_wldev
*dev
)
3087 struct b43legacy_phy
*phy
= &dev
->phy
;
3090 /* Set default attenuation values. */
3091 phy
->bbatt
= b43legacy_default_baseband_attenuation(dev
);
3092 phy
->rfatt
= b43legacy_default_radio_attenuation(dev
);
3093 phy
->txctl1
= b43legacy_default_txctl1(dev
);
3094 phy
->txctl2
= 0xFFFF;
3095 phy
->txpwr_offset
= 0;
3098 phy
->nrssislope
= 0;
3099 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi
); i
++)
3100 phy
->nrssi
[i
] = -1000;
3101 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi_lt
); i
++)
3102 phy
->nrssi_lt
[i
] = i
;
3104 phy
->lofcal
= 0xFFFF;
3105 phy
->initval
= 0xFFFF;
3107 phy
->aci_enable
= 0;
3108 phy
->aci_wlan_automatic
= 0;
3109 phy
->aci_hw_rssi
= 0;
3111 phy
->antenna_diversity
= 0xFFFF;
3112 memset(phy
->minlowsig
, 0xFF, sizeof(phy
->minlowsig
));
3113 memset(phy
->minlowsigpos
, 0, sizeof(phy
->minlowsigpos
));
3116 phy
->calibrated
= 0;
3119 memset(phy
->_lo_pairs
, 0,
3120 sizeof(struct b43legacy_lopair
) * B43legacy_LO_COUNT
);
3121 memset(phy
->loopback_gain
, 0, sizeof(phy
->loopback_gain
));
3124 /* Initialize a wireless core */
3125 static int b43legacy_wireless_core_init(struct b43legacy_wldev
*dev
)
3127 struct b43legacy_wl
*wl
= dev
->wl
;
3128 struct ssb_bus
*bus
= dev
->dev
->bus
;
3129 struct b43legacy_phy
*phy
= &dev
->phy
;
3130 struct ssb_sprom
*sprom
= &dev
->dev
->bus
->sprom
;
3135 B43legacy_WARN_ON(b43legacy_status(dev
) != B43legacy_STAT_UNINIT
);
3137 err
= ssb_bus_powerup(bus
, 0);
3140 if (!ssb_device_is_enabled(dev
->dev
)) {
3141 tmp
= phy
->gmode
? B43legacy_TMSLOW_GMODE
: 0;
3142 b43legacy_wireless_core_reset(dev
, tmp
);
3145 if ((phy
->type
== B43legacy_PHYTYPE_B
) ||
3146 (phy
->type
== B43legacy_PHYTYPE_G
)) {
3147 phy
->_lo_pairs
= kzalloc(sizeof(struct b43legacy_lopair
)
3148 * B43legacy_LO_COUNT
,
3150 if (!phy
->_lo_pairs
)
3153 setup_struct_wldev_for_init(dev
);
3155 err
= b43legacy_phy_init_tssi2dbm_table(dev
);
3157 goto err_kfree_lo_control
;
3159 /* Enable IRQ routing to this device. */
3160 ssb_pcicore_dev_irqvecs_enable(&bus
->pcicore
, dev
->dev
);
3162 b43legacy_imcfglo_timeouts_workaround(dev
);
3163 prepare_phy_data_for_init(dev
);
3164 b43legacy_phy_calibrate(dev
);
3165 err
= b43legacy_chip_init(dev
);
3167 goto err_kfree_tssitbl
;
3168 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3169 B43legacy_SHM_SH_WLCOREREV
,
3170 dev
->dev
->id
.revision
);
3171 hf
= b43legacy_hf_read(dev
);
3172 if (phy
->type
== B43legacy_PHYTYPE_G
) {
3173 hf
|= B43legacy_HF_SYMW
;
3175 hf
|= B43legacy_HF_GDCW
;
3176 if (sprom
->boardflags_lo
& B43legacy_BFL_PACTRL
)
3177 hf
|= B43legacy_HF_OFDMPABOOST
;
3178 } else if (phy
->type
== B43legacy_PHYTYPE_B
) {
3179 hf
|= B43legacy_HF_SYMW
;
3180 if (phy
->rev
>= 2 && phy
->radio_ver
== 0x2050)
3181 hf
&= ~B43legacy_HF_GDCW
;
3183 b43legacy_hf_write(dev
, hf
);
3185 b43legacy_set_retry_limits(dev
,
3186 B43legacy_DEFAULT_SHORT_RETRY_LIMIT
,
3187 B43legacy_DEFAULT_LONG_RETRY_LIMIT
);
3189 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3191 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3194 /* Disable sending probe responses from firmware.
3195 * Setting the MaxTime to one usec will always trigger
3196 * a timeout, so we never send any probe resp.
3197 * A timeout of zero is infinite. */
3198 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3199 B43legacy_SHM_SH_PRMAXTIME
, 1);
3201 b43legacy_rate_memory_init(dev
);
3203 /* Minimum Contention Window */
3204 if (phy
->type
== B43legacy_PHYTYPE_B
)
3205 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3208 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3210 /* Maximum Contention Window */
3211 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3215 if (b43legacy_using_pio(dev
))
3216 err
= b43legacy_pio_init(dev
);
3218 err
= b43legacy_dma_init(dev
);
3220 b43legacy_qos_init(dev
);
3222 } while (err
== -EAGAIN
);
3226 b43legacy_set_synth_pu_delay(dev
, 1);
3228 ssb_bus_powerup(bus
, 1); /* Enable dynamic PCTL */
3229 b43legacy_upload_card_macaddress(dev
);
3230 b43legacy_security_init(dev
);
3231 b43legacy_rng_init(wl
);
3233 b43legacy_set_status(dev
, B43legacy_STAT_INITIALIZED
);
3235 b43legacy_leds_init(dev
);
3240 b43legacy_chip_exit(dev
);
3242 if (phy
->dyn_tssi_tbl
)
3243 kfree(phy
->tssi2dbm
);
3244 err_kfree_lo_control
:
3245 kfree(phy
->lo_control
);
3246 phy
->lo_control
= NULL
;
3247 ssb_bus_may_powerdown(bus
);
3248 B43legacy_WARN_ON(b43legacy_status(dev
) != B43legacy_STAT_UNINIT
);
3252 static int b43legacy_op_add_interface(struct ieee80211_hw
*hw
,
3253 struct ieee80211_if_init_conf
*conf
)
3255 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3256 struct b43legacy_wldev
*dev
;
3257 unsigned long flags
;
3258 int err
= -EOPNOTSUPP
;
3260 /* TODO: allow WDS/AP devices to coexist */
3262 if (conf
->type
!= IEEE80211_IF_TYPE_AP
&&
3263 conf
->type
!= IEEE80211_IF_TYPE_STA
&&
3264 conf
->type
!= IEEE80211_IF_TYPE_WDS
&&
3265 conf
->type
!= IEEE80211_IF_TYPE_IBSS
)
3268 mutex_lock(&wl
->mutex
);
3270 goto out_mutex_unlock
;
3272 b43legacydbg(wl
, "Adding Interface type %d\n", conf
->type
);
3274 dev
= wl
->current_dev
;
3276 wl
->vif
= conf
->vif
;
3277 wl
->if_type
= conf
->type
;
3278 memcpy(wl
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
3280 spin_lock_irqsave(&wl
->irq_lock
, flags
);
3281 b43legacy_adjust_opmode(dev
);
3282 b43legacy_set_pretbtt(dev
);
3283 b43legacy_set_synth_pu_delay(dev
, 0);
3284 b43legacy_upload_card_macaddress(dev
);
3285 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
3289 mutex_unlock(&wl
->mutex
);
3294 static void b43legacy_op_remove_interface(struct ieee80211_hw
*hw
,
3295 struct ieee80211_if_init_conf
*conf
)
3297 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3298 struct b43legacy_wldev
*dev
= wl
->current_dev
;
3299 unsigned long flags
;
3301 b43legacydbg(wl
, "Removing Interface type %d\n", conf
->type
);
3303 mutex_lock(&wl
->mutex
);
3305 B43legacy_WARN_ON(!wl
->operating
);
3306 B43legacy_WARN_ON(wl
->vif
!= conf
->vif
);
3311 spin_lock_irqsave(&wl
->irq_lock
, flags
);
3312 b43legacy_adjust_opmode(dev
);
3313 memset(wl
->mac_addr
, 0, ETH_ALEN
);
3314 b43legacy_upload_card_macaddress(dev
);
3315 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
3317 mutex_unlock(&wl
->mutex
);
3320 static int b43legacy_op_start(struct ieee80211_hw
*hw
)
3322 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3323 struct b43legacy_wldev
*dev
= wl
->current_dev
;
3326 bool do_rfkill_exit
= 0;
3328 /* First register RFkill.
3329 * LEDs that are registered later depend on it. */
3330 b43legacy_rfkill_init(dev
);
3332 /* Kill all old instance specific information to make sure
3333 * the card won't use it in the short timeframe between start
3334 * and mac80211 reconfiguring it. */
3335 memset(wl
->bssid
, 0, ETH_ALEN
);
3336 memset(wl
->mac_addr
, 0, ETH_ALEN
);
3337 wl
->filter_flags
= 0;
3339 mutex_lock(&wl
->mutex
);
3341 if (b43legacy_status(dev
) < B43legacy_STAT_INITIALIZED
) {
3342 err
= b43legacy_wireless_core_init(dev
);
3345 goto out_mutex_unlock
;
3350 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
) {
3351 err
= b43legacy_wireless_core_start(dev
);
3354 b43legacy_wireless_core_exit(dev
);
3356 goto out_mutex_unlock
;
3361 mutex_unlock(&wl
->mutex
);
3364 b43legacy_rfkill_exit(dev
);
3369 static void b43legacy_op_stop(struct ieee80211_hw
*hw
)
3371 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3372 struct b43legacy_wldev
*dev
= wl
->current_dev
;
3374 b43legacy_rfkill_exit(dev
);
3376 mutex_lock(&wl
->mutex
);
3377 if (b43legacy_status(dev
) >= B43legacy_STAT_STARTED
)
3378 b43legacy_wireless_core_stop(dev
);
3379 b43legacy_wireless_core_exit(dev
);
3380 mutex_unlock(&wl
->mutex
);
3383 static int b43legacy_op_set_retry_limit(struct ieee80211_hw
*hw
,
3384 u32 short_retry_limit
,
3385 u32 long_retry_limit
)
3387 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3388 struct b43legacy_wldev
*dev
;
3391 mutex_lock(&wl
->mutex
);
3392 dev
= wl
->current_dev
;
3393 if (unlikely(!dev
||
3394 (b43legacy_status(dev
) < B43legacy_STAT_INITIALIZED
))) {
3398 b43legacy_set_retry_limits(dev
, short_retry_limit
, long_retry_limit
);
3400 mutex_unlock(&wl
->mutex
);
3405 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw
*hw
,
3408 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3409 unsigned long flags
;
3411 spin_lock_irqsave(&wl
->irq_lock
, flags
);
3412 b43legacy_update_templates(wl
);
3413 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
3418 static const struct ieee80211_ops b43legacy_hw_ops
= {
3419 .tx
= b43legacy_op_tx
,
3420 .conf_tx
= b43legacy_op_conf_tx
,
3421 .add_interface
= b43legacy_op_add_interface
,
3422 .remove_interface
= b43legacy_op_remove_interface
,
3423 .config
= b43legacy_op_dev_config
,
3424 .config_interface
= b43legacy_op_config_interface
,
3425 .configure_filter
= b43legacy_op_configure_filter
,
3426 .get_stats
= b43legacy_op_get_stats
,
3427 .get_tx_stats
= b43legacy_op_get_tx_stats
,
3428 .start
= b43legacy_op_start
,
3429 .stop
= b43legacy_op_stop
,
3430 .set_retry_limit
= b43legacy_op_set_retry_limit
,
3431 .set_tim
= b43legacy_op_beacon_set_tim
,
3434 /* Hard-reset the chip. Do not call this directly.
3435 * Use b43legacy_controller_restart()
3437 static void b43legacy_chip_reset(struct work_struct
*work
)
3439 struct b43legacy_wldev
*dev
=
3440 container_of(work
, struct b43legacy_wldev
, restart_work
);
3441 struct b43legacy_wl
*wl
= dev
->wl
;
3445 mutex_lock(&wl
->mutex
);
3447 prev_status
= b43legacy_status(dev
);
3448 /* Bring the device down... */
3449 if (prev_status
>= B43legacy_STAT_STARTED
)
3450 b43legacy_wireless_core_stop(dev
);
3451 if (prev_status
>= B43legacy_STAT_INITIALIZED
)
3452 b43legacy_wireless_core_exit(dev
);
3454 /* ...and up again. */
3455 if (prev_status
>= B43legacy_STAT_INITIALIZED
) {
3456 err
= b43legacy_wireless_core_init(dev
);
3460 if (prev_status
>= B43legacy_STAT_STARTED
) {
3461 err
= b43legacy_wireless_core_start(dev
);
3463 b43legacy_wireless_core_exit(dev
);
3469 wl
->current_dev
= NULL
; /* Failed to init the dev. */
3470 mutex_unlock(&wl
->mutex
);
3472 b43legacyerr(wl
, "Controller restart FAILED\n");
3474 b43legacyinfo(wl
, "Controller restarted\n");
3477 static int b43legacy_setup_modes(struct b43legacy_wldev
*dev
,
3481 struct ieee80211_hw
*hw
= dev
->wl
->hw
;
3482 struct b43legacy_phy
*phy
= &dev
->phy
;
3484 phy
->possible_phymodes
= 0;
3486 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] =
3487 &b43legacy_band_2GHz_BPHY
;
3488 phy
->possible_phymodes
|= B43legacy_PHYMODE_B
;
3492 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] =
3493 &b43legacy_band_2GHz_GPHY
;
3494 phy
->possible_phymodes
|= B43legacy_PHYMODE_G
;
3500 static void b43legacy_wireless_core_detach(struct b43legacy_wldev
*dev
)
3502 /* We release firmware that late to not be required to re-request
3503 * is all the time when we reinit the core. */
3504 b43legacy_release_firmware(dev
);
3507 static int b43legacy_wireless_core_attach(struct b43legacy_wldev
*dev
)
3509 struct b43legacy_wl
*wl
= dev
->wl
;
3510 struct ssb_bus
*bus
= dev
->dev
->bus
;
3511 struct pci_dev
*pdev
= bus
->host_pci
;
3517 /* Do NOT do any device initialization here.
3518 * Do it in wireless_core_init() instead.
3519 * This function is for gathering basic information about the HW, only.
3520 * Also some structs may be set up here. But most likely you want to
3521 * have that in core_init(), too.
3524 err
= ssb_bus_powerup(bus
, 0);
3526 b43legacyerr(wl
, "Bus powerup failed\n");
3529 /* Get the PHY type. */
3530 if (dev
->dev
->id
.revision
>= 5) {
3533 tmshigh
= ssb_read32(dev
->dev
, SSB_TMSHIGH
);
3534 have_gphy
= !!(tmshigh
& B43legacy_TMSHIGH_GPHY
);
3537 } else if (dev
->dev
->id
.revision
== 4)
3542 dev
->phy
.gmode
= (have_gphy
|| have_bphy
);
3543 tmp
= dev
->phy
.gmode
? B43legacy_TMSLOW_GMODE
: 0;
3544 b43legacy_wireless_core_reset(dev
, tmp
);
3546 err
= b43legacy_phy_versioning(dev
);
3549 /* Check if this device supports multiband. */
3551 (pdev
->device
!= 0x4312 &&
3552 pdev
->device
!= 0x4319 &&
3553 pdev
->device
!= 0x4324)) {
3554 /* No multiband support. */
3557 switch (dev
->phy
.type
) {
3558 case B43legacy_PHYTYPE_B
:
3561 case B43legacy_PHYTYPE_G
:
3565 B43legacy_BUG_ON(1);
3568 dev
->phy
.gmode
= (have_gphy
|| have_bphy
);
3569 tmp
= dev
->phy
.gmode
? B43legacy_TMSLOW_GMODE
: 0;
3570 b43legacy_wireless_core_reset(dev
, tmp
);
3572 err
= b43legacy_validate_chipaccess(dev
);
3575 err
= b43legacy_setup_modes(dev
, have_bphy
, have_gphy
);
3579 /* Now set some default "current_dev" */
3580 if (!wl
->current_dev
)
3581 wl
->current_dev
= dev
;
3582 INIT_WORK(&dev
->restart_work
, b43legacy_chip_reset
);
3584 b43legacy_radio_turn_off(dev
, 1);
3585 b43legacy_switch_analog(dev
, 0);
3586 ssb_device_disable(dev
->dev
, 0);
3587 ssb_bus_may_powerdown(bus
);
3593 ssb_bus_may_powerdown(bus
);
3597 static void b43legacy_one_core_detach(struct ssb_device
*dev
)
3599 struct b43legacy_wldev
*wldev
;
3600 struct b43legacy_wl
*wl
;
3602 /* Do not cancel ieee80211-workqueue based work here.
3603 * See comment in b43legacy_remove(). */
3605 wldev
= ssb_get_drvdata(dev
);
3607 b43legacy_debugfs_remove_device(wldev
);
3608 b43legacy_wireless_core_detach(wldev
);
3609 list_del(&wldev
->list
);
3611 ssb_set_drvdata(dev
, NULL
);
3615 static int b43legacy_one_core_attach(struct ssb_device
*dev
,
3616 struct b43legacy_wl
*wl
)
3618 struct b43legacy_wldev
*wldev
;
3619 struct pci_dev
*pdev
;
3622 if (!list_empty(&wl
->devlist
)) {
3623 /* We are not the first core on this chip. */
3624 pdev
= dev
->bus
->host_pci
;
3625 /* Only special chips support more than one wireless
3626 * core, although some of the other chips have more than
3627 * one wireless core as well. Check for this and
3631 ((pdev
->device
!= 0x4321) &&
3632 (pdev
->device
!= 0x4313) &&
3633 (pdev
->device
!= 0x431A))) {
3634 b43legacydbg(wl
, "Ignoring unconnected 802.11 core\n");
3639 wldev
= kzalloc(sizeof(*wldev
), GFP_KERNEL
);
3645 b43legacy_set_status(wldev
, B43legacy_STAT_UNINIT
);
3646 wldev
->bad_frames_preempt
= modparam_bad_frames_preempt
;
3647 tasklet_init(&wldev
->isr_tasklet
,
3648 (void (*)(unsigned long))b43legacy_interrupt_tasklet
,
3649 (unsigned long)wldev
);
3651 wldev
->__using_pio
= 1;
3652 INIT_LIST_HEAD(&wldev
->list
);
3654 err
= b43legacy_wireless_core_attach(wldev
);
3656 goto err_kfree_wldev
;
3658 list_add(&wldev
->list
, &wl
->devlist
);
3660 ssb_set_drvdata(dev
, wldev
);
3661 b43legacy_debugfs_add_device(wldev
);
3670 static void b43legacy_sprom_fixup(struct ssb_bus
*bus
)
3672 /* boardflags workarounds */
3673 if (bus
->boardinfo
.vendor
== PCI_VENDOR_ID_APPLE
&&
3674 bus
->boardinfo
.type
== 0x4E &&
3675 bus
->boardinfo
.rev
> 0x40)
3676 bus
->sprom
.boardflags_lo
|= B43legacy_BFL_PACTRL
;
3679 static void b43legacy_wireless_exit(struct ssb_device
*dev
,
3680 struct b43legacy_wl
*wl
)
3682 struct ieee80211_hw
*hw
= wl
->hw
;
3684 ssb_set_devtypedata(dev
, NULL
);
3685 ieee80211_free_hw(hw
);
3688 static int b43legacy_wireless_init(struct ssb_device
*dev
)
3690 struct ssb_sprom
*sprom
= &dev
->bus
->sprom
;
3691 struct ieee80211_hw
*hw
;
3692 struct b43legacy_wl
*wl
;
3695 b43legacy_sprom_fixup(dev
->bus
);
3697 hw
= ieee80211_alloc_hw(sizeof(*wl
), &b43legacy_hw_ops
);
3699 b43legacyerr(NULL
, "Could not allocate ieee80211 device\n");
3704 hw
->flags
= IEEE80211_HW_RX_INCLUDES_FCS
|
3705 IEEE80211_HW_SIGNAL_DBM
|
3706 IEEE80211_HW_NOISE_DBM
;
3707 hw
->wiphy
->interface_modes
=
3708 BIT(NL80211_IFTYPE_AP
) |
3709 BIT(NL80211_IFTYPE_STATION
) |
3710 BIT(NL80211_IFTYPE_WDS
) |
3711 BIT(NL80211_IFTYPE_ADHOC
);
3712 hw
->queues
= 1; /* FIXME: hardware has more queues */
3713 SET_IEEE80211_DEV(hw
, dev
->dev
);
3714 if (is_valid_ether_addr(sprom
->et1mac
))
3715 SET_IEEE80211_PERM_ADDR(hw
, sprom
->et1mac
);
3717 SET_IEEE80211_PERM_ADDR(hw
, sprom
->il0mac
);
3719 /* Get and initialize struct b43legacy_wl */
3720 wl
= hw_to_b43legacy_wl(hw
);
3721 memset(wl
, 0, sizeof(*wl
));
3723 spin_lock_init(&wl
->irq_lock
);
3724 spin_lock_init(&wl
->leds_lock
);
3725 mutex_init(&wl
->mutex
);
3726 INIT_LIST_HEAD(&wl
->devlist
);
3728 ssb_set_devtypedata(dev
, wl
);
3729 b43legacyinfo(wl
, "Broadcom %04X WLAN found\n", dev
->bus
->chip_id
);
3735 static int b43legacy_probe(struct ssb_device
*dev
,
3736 const struct ssb_device_id
*id
)
3738 struct b43legacy_wl
*wl
;
3742 wl
= ssb_get_devtypedata(dev
);
3744 /* Probing the first core - setup common struct b43legacy_wl */
3746 err
= b43legacy_wireless_init(dev
);
3749 wl
= ssb_get_devtypedata(dev
);
3750 B43legacy_WARN_ON(!wl
);
3752 err
= b43legacy_one_core_attach(dev
, wl
);
3754 goto err_wireless_exit
;
3757 err
= ieee80211_register_hw(wl
->hw
);
3759 goto err_one_core_detach
;
3765 err_one_core_detach
:
3766 b43legacy_one_core_detach(dev
);
3769 b43legacy_wireless_exit(dev
, wl
);
3773 static void b43legacy_remove(struct ssb_device
*dev
)
3775 struct b43legacy_wl
*wl
= ssb_get_devtypedata(dev
);
3776 struct b43legacy_wldev
*wldev
= ssb_get_drvdata(dev
);
3778 /* We must cancel any work here before unregistering from ieee80211,
3779 * as the ieee80211 unreg will destroy the workqueue. */
3780 cancel_work_sync(&wldev
->restart_work
);
3782 B43legacy_WARN_ON(!wl
);
3783 if (wl
->current_dev
== wldev
)
3784 ieee80211_unregister_hw(wl
->hw
);
3786 b43legacy_one_core_detach(dev
);
3788 if (list_empty(&wl
->devlist
))
3789 /* Last core on the chip unregistered.
3790 * We can destroy common struct b43legacy_wl.
3792 b43legacy_wireless_exit(dev
, wl
);
3795 /* Perform a hardware reset. This can be called from any context. */
3796 void b43legacy_controller_restart(struct b43legacy_wldev
*dev
,
3799 /* Must avoid requeueing, if we are in shutdown. */
3800 if (b43legacy_status(dev
) < B43legacy_STAT_INITIALIZED
)
3802 b43legacyinfo(dev
->wl
, "Controller RESET (%s) ...\n", reason
);
3803 queue_work(dev
->wl
->hw
->workqueue
, &dev
->restart_work
);
3808 static int b43legacy_suspend(struct ssb_device
*dev
, pm_message_t state
)
3810 struct b43legacy_wldev
*wldev
= ssb_get_drvdata(dev
);
3811 struct b43legacy_wl
*wl
= wldev
->wl
;
3813 b43legacydbg(wl
, "Suspending...\n");
3815 mutex_lock(&wl
->mutex
);
3816 wldev
->suspend_init_status
= b43legacy_status(wldev
);
3817 if (wldev
->suspend_init_status
>= B43legacy_STAT_STARTED
)
3818 b43legacy_wireless_core_stop(wldev
);
3819 if (wldev
->suspend_init_status
>= B43legacy_STAT_INITIALIZED
)
3820 b43legacy_wireless_core_exit(wldev
);
3821 mutex_unlock(&wl
->mutex
);
3823 b43legacydbg(wl
, "Device suspended.\n");
3828 static int b43legacy_resume(struct ssb_device
*dev
)
3830 struct b43legacy_wldev
*wldev
= ssb_get_drvdata(dev
);
3831 struct b43legacy_wl
*wl
= wldev
->wl
;
3834 b43legacydbg(wl
, "Resuming...\n");
3836 mutex_lock(&wl
->mutex
);
3837 if (wldev
->suspend_init_status
>= B43legacy_STAT_INITIALIZED
) {
3838 err
= b43legacy_wireless_core_init(wldev
);
3840 b43legacyerr(wl
, "Resume failed at core init\n");
3844 if (wldev
->suspend_init_status
>= B43legacy_STAT_STARTED
) {
3845 err
= b43legacy_wireless_core_start(wldev
);
3847 b43legacy_wireless_core_exit(wldev
);
3848 b43legacyerr(wl
, "Resume failed at core start\n");
3853 b43legacydbg(wl
, "Device resumed.\n");
3855 mutex_unlock(&wl
->mutex
);
3859 #else /* CONFIG_PM */
3860 # define b43legacy_suspend NULL
3861 # define b43legacy_resume NULL
3862 #endif /* CONFIG_PM */
3864 static struct ssb_driver b43legacy_ssb_driver
= {
3865 .name
= KBUILD_MODNAME
,
3866 .id_table
= b43legacy_ssb_tbl
,
3867 .probe
= b43legacy_probe
,
3868 .remove
= b43legacy_remove
,
3869 .suspend
= b43legacy_suspend
,
3870 .resume
= b43legacy_resume
,
3873 static void b43legacy_print_driverinfo(void)
3875 const char *feat_pci
= "", *feat_leds
= "", *feat_rfkill
= "",
3876 *feat_pio
= "", *feat_dma
= "";
3878 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3881 #ifdef CONFIG_B43LEGACY_LEDS
3884 #ifdef CONFIG_B43LEGACY_RFKILL
3887 #ifdef CONFIG_B43LEGACY_PIO
3890 #ifdef CONFIG_B43LEGACY_DMA
3893 printk(KERN_INFO
"Broadcom 43xx-legacy driver loaded "
3894 "[ Features: %s%s%s%s%s, Firmware-ID: "
3895 B43legacy_SUPPORTED_FIRMWARE_ID
" ]\n",
3896 feat_pci
, feat_leds
, feat_rfkill
, feat_pio
, feat_dma
);
3899 static int __init
b43legacy_init(void)
3903 b43legacy_debugfs_init();
3905 err
= ssb_driver_register(&b43legacy_ssb_driver
);
3909 b43legacy_print_driverinfo();
3914 b43legacy_debugfs_exit();
3918 static void __exit
b43legacy_exit(void)
3920 ssb_driver_unregister(&b43legacy_ssb_driver
);
3921 b43legacy_debugfs_exit();
3924 module_init(b43legacy_init
)
3925 module_exit(b43legacy_exit
)