include/asm-avr32/dma-mapping.h

   1 #ifndef __ASM_AVR32_DMA_MAPPING_H
   2 #define __ASM_AVR32_DMA_MAPPING_H
   3
   4 #include <linux/mm.h>
   5 #include <linux/device.h>
   6 #include <asm/scatterlist.h>
   7 #include <asm/processor.h>
   8 #include <asm/cacheflush.h>
   9 #include <asm/io.h>
  10
  11 extern void dma_cache_sync(void *vaddr, size_t size, int direction);
  12
  13 /*
  14  * Return whether the given device DMA address mask can be supported
  15  * properly.  For example, if your device can only drive the low 24-bits
  16  * during bus mastering, then you would pass 0x00ffffff as the mask
  17  * to this function.
  18  */
  19 static inline int dma_supported(struct device *dev, u64 mask)
  20 {
  21         /* Fix when needed. I really don't know of any limitations */
  22         return 1;
  23 }
  24
  25 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  26 {
  27         if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  28                 return -EIO;
  29
  30         *dev->dma_mask = dma_mask;
  31         return 0;
  32 }
  33
  34 /**
  35  * dma_alloc_coherent - allocate consistent memory for DMA
  36  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  37  * @size: required memory size
  38  * @handle: bus-specific DMA address
  39  *
  40  * Allocate some uncached, unbuffered memory for a device for
  41  * performing DMA.  This function allocates pages, and will
  42  * return the CPU-viewed address, and sets @handle to be the
  43  * device-viewed address.
  44  */
  45 extern void *dma_alloc_coherent(struct device *dev, size_t size,
  46                                 dma_addr_t *handle, gfp_t gfp);
  47
  48 /**
  49  * dma_free_coherent - free memory allocated by dma_alloc_coherent
  50  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  51  * @size: size of memory originally requested in dma_alloc_coherent
  52  * @cpu_addr: CPU-view address returned from dma_alloc_coherent
  53  * @handle: device-view address returned from dma_alloc_coherent
  54  *
  55  * Free (and unmap) a DMA buffer previously allocated by
  56  * dma_alloc_coherent().
  57  *
  58  * References to memory and mappings associated with cpu_addr/handle
  59  * during and after this call executing are illegal.
  60  */
  61 extern void dma_free_coherent(struct device *dev, size_t size,
  62                               void *cpu_addr, dma_addr_t handle);
  63
  64 /**
  65  * dma_alloc_writecombine - allocate write-combining memory for DMA
  66  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  67  * @size: required memory size
  68  * @handle: bus-specific DMA address
  69  *
  70  * Allocate some uncached, buffered memory for a device for
  71  * performing DMA.  This function allocates pages, and will
  72  * return the CPU-viewed address, and sets @handle to be the
  73  * device-viewed address.
  74  */
  75 extern void *dma_alloc_writecombine(struct device *dev, size_t size,
  76                                     dma_addr_t *handle, gfp_t gfp);
  77
  78 /**
  79  * dma_free_coherent - free memory allocated by dma_alloc_writecombine
  80  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  81  * @size: size of memory originally requested in dma_alloc_writecombine
  82  * @cpu_addr: CPU-view address returned from dma_alloc_writecombine
  83  * @handle: device-view address returned from dma_alloc_writecombine
  84  *
  85  * Free (and unmap) a DMA buffer previously allocated by
  86  * dma_alloc_writecombine().
  87  *
  88  * References to memory and mappings associated with cpu_addr/handle
  89  * during and after this call executing are illegal.
  90  */
  91 extern void dma_free_writecombine(struct device *dev, size_t size,
  92                                   void *cpu_addr, dma_addr_t handle);
  93
  94 /**
  95  * dma_map_single - map a single buffer for streaming DMA
  96  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  97  * @cpu_addr: CPU direct mapped address of buffer
  98  * @size: size of buffer to map
  99  * @dir: DMA transfer direction
 100  *
 101  * Ensure that any data held in the cache is appropriately discarded
 102  * or written back.
 103  *
 104  * The device owns this memory once this call has completed.  The CPU
 105  * can regain ownership by calling dma_unmap_single() or dma_sync_single().
 106  */
 107 static inline dma_addr_t
 108 dma_map_single(struct device *dev, void *cpu_addr, size_t size,
 109                enum dma_data_direction direction)
 110 {
 111         dma_cache_sync(cpu_addr, size, direction);
 112         return virt_to_bus(cpu_addr);
 113 }
 114
 115 /**
 116  * dma_unmap_single - unmap a single buffer previously mapped
 117  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 118  * @handle: DMA address of buffer
 119  * @size: size of buffer to map
 120  * @dir: DMA transfer direction
 121  *
 122  * Unmap a single streaming mode DMA translation.  The handle and size
 123  * must match what was provided in the previous dma_map_single() call.
 124  * All other usages are undefined.
 125  *
 126  * After this call, reads by the CPU to the buffer are guaranteed to see
 127  * whatever the device wrote there.
 128  */
 129 static inline void
 130 dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
 131                  enum dma_data_direction direction)
 132 {
 133
 134 }
 135
 136 /**
 137  * dma_map_page - map a portion of a page for streaming DMA
 138  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 139  * @page: page that buffer resides in
 140  * @offset: offset into page for start of buffer
 141  * @size: size of buffer to map
 142  * @dir: DMA transfer direction
 143  *
 144  * Ensure that any data held in the cache is appropriately discarded
 145  * or written back.
 146  *
 147  * The device owns this memory once this call has completed.  The CPU
 148  * can regain ownership by calling dma_unmap_page() or dma_sync_single().
 149  */
 150 static inline dma_addr_t
 151 dma_map_page(struct device *dev, struct page *page,
 152              unsigned long offset, size_t size,
 153              enum dma_data_direction direction)
 154 {
 155         return dma_map_single(dev, page_address(page) + offset,
 156                               size, direction);
 157 }
 158
 159 /**
 160  * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
 161  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 162  * @handle: DMA address of buffer
 163  * @size: size of buffer to map
 164  * @dir: DMA transfer direction
 165  *
 166  * Unmap a single streaming mode DMA translation.  The handle and size
 167  * must match what was provided in the previous dma_map_single() call.
 168  * All other usages are undefined.
 169  *
 170  * After this call, reads by the CPU to the buffer are guaranteed to see
 171  * whatever the device wrote there.
 172  */
 173 static inline void
 174 dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
 175                enum dma_data_direction direction)
 176 {
 177         dma_unmap_single(dev, dma_address, size, direction);
 178 }
 179
 180 /**
 181  * dma_map_sg - map a set of SG buffers for streaming mode DMA
 182  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 183  * @sg: list of buffers
 184  * @nents: number of buffers to map
 185  * @dir: DMA transfer direction
 186  *
 187  * Map a set of buffers described by scatterlist in streaming
 188  * mode for DMA.  This is the scatter-gather version of the
 189  * above pci_map_single interface.  Here the scatter gather list
 190  * elements are each tagged with the appropriate dma address
 191  * and length.  They are obtained via sg_dma_{address,length}(SG).
 192  *
 193  * NOTE: An implementation may be able to use a smaller number of
 194  *       DMA address/length pairs than there are SG table elements.
 195  *       (for example via virtual mapping capabilities)
 196  *       The routine returns the number of addr/length pairs actually
 197  *       used, at most nents.
 198  *
 199  * Device ownership issues as mentioned above for pci_map_single are
 200  * the same here.
 201  */
 202 static inline int
 203 dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 204            enum dma_data_direction direction)
 205 {
 206         int i;
 207
 208         for (i = 0; i < nents; i++) {
 209                 char *virt;
 210
 211                 sg[i].dma_address = page_to_bus(sg[i].page) + sg[i].offset;
 212                 virt = page_address(sg[i].page) + sg[i].offset;
 213                 dma_cache_sync(virt, sg[i].length, direction);
 214         }
 215
 216         return nents;
 217 }
 218
 219 /**
 220  * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
 221  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 222  * @sg: list of buffers
 223  * @nents: number of buffers to map
 224  * @dir: DMA transfer direction
 225  *
 226  * Unmap a set of streaming mode DMA translations.
 227  * Again, CPU read rules concerning calls here are the same as for
 228  * pci_unmap_single() above.
 229  */
 230 static inline void
 231 dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
 232              enum dma_data_direction direction)
 233 {
 234
 235 }
 236
 237 /**
 238  * dma_sync_single_for_cpu
 239  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 240  * @handle: DMA address of buffer
 241  * @size: size of buffer to map
 242  * @dir: DMA transfer direction
 243  *
 244  * Make physical memory consistent for a single streaming mode DMA
 245  * translation after a transfer.
 246  *
 247  * If you perform a dma_map_single() but wish to interrogate the
 248  * buffer using the cpu, yet do not wish to teardown the DMA mapping,
 249  * you must call this function before doing so.  At the next point you
 250  * give the DMA address back to the card, you must first perform a
 251  * dma_sync_single_for_device, and then the device again owns the
 252  * buffer.
 253  */
 254 static inline void
 255 dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
 256                         size_t size, enum dma_data_direction direction)
 257 {
 258         dma_cache_sync(bus_to_virt(dma_handle), size, direction);
 259 }
 260
 261 static inline void
 262 dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
 263                            size_t size, enum dma_data_direction direction)
 264 {
 265         dma_cache_sync(bus_to_virt(dma_handle), size, direction);
 266 }
 267
 268 /**
 269  * dma_sync_sg_for_cpu
 270  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 271  * @sg: list of buffers
 272  * @nents: number of buffers to map
 273  * @dir: DMA transfer direction
 274  *
 275  * Make physical memory consistent for a set of streaming
 276  * mode DMA translations after a transfer.
 277  *
 278  * The same as dma_sync_single_for_* but for a scatter-gather list,
 279  * same rules and usage.
 280  */
 281 static inline void
 282 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
 283                     int nents, enum dma_data_direction direction)
 284 {
 285         int i;
 286
 287         for (i = 0; i < nents; i++) {
 288                 dma_cache_sync(page_address(sg[i].page) + sg[i].offset,
 289                                sg[i].length, direction);
 290         }
 291 }
 292
 293 static inline void
 294 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
 295                        int nents, enum dma_data_direction direction)
 296 {
 297         int i;
 298
 299         for (i = 0; i < nents; i++) {
 300                 dma_cache_sync(page_address(sg[i].page) + sg[i].offset,
 301                                sg[i].length, direction);
 302         }
 303 }
 304
 305 /* Now for the API extensions over the pci_ one */
 306
 307 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 308 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 309
 310 static inline int dma_is_consistent(dma_addr_t dma_addr)
 311 {
 312         return 1;
 313 }
 314
 315 static inline int dma_get_cache_alignment(void)
 316 {
 317         return boot_cpu_data.dcache.linesz;
 318 }
 319
 320 #endif /* __ASM_AVR32_DMA_MAPPING_H */