hwmon: (w83627hf) Enable VBAT monitoring
[linux-2.6/verdex.git] / drivers / hwmon / w83627hf.c
blob185ae1b8027df5a5af07a028dcecab9a5143b075
1 /*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 Supports following chips:
28 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
29 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
32 w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
33 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
35 For other winbond chips, and for i2c support in the above chips,
36 use w83781d.c.
38 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
39 supported yet.
42 #include <linux/module.h>
43 #include <linux/init.h>
44 #include <linux/slab.h>
45 #include <linux/jiffies.h>
46 #include <linux/platform_device.h>
47 #include <linux/hwmon.h>
48 #include <linux/hwmon-sysfs.h>
49 #include <linux/hwmon-vid.h>
50 #include <linux/err.h>
51 #include <linux/mutex.h>
52 #include <linux/ioport.h>
53 #include <asm/io.h>
54 #include "lm75.h"
56 static struct platform_device *pdev;
58 #define DRVNAME "w83627hf"
59 enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
61 static u16 force_addr;
62 module_param(force_addr, ushort, 0);
63 MODULE_PARM_DESC(force_addr,
64 "Initialize the base address of the sensors");
65 static u8 force_i2c = 0x1f;
66 module_param(force_i2c, byte, 0);
67 MODULE_PARM_DESC(force_i2c,
68 "Initialize the i2c address of the sensors");
70 static int reset;
71 module_param(reset, bool, 0);
72 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
74 static int init = 1;
75 module_param(init, bool, 0);
76 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
78 static unsigned short force_id;
79 module_param(force_id, ushort, 0);
80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
82 /* modified from kernel/include/traps.c */
83 static int REG; /* The register to read/write */
84 #define DEV 0x07 /* Register: Logical device select */
85 static int VAL; /* The value to read/write */
87 /* logical device numbers for superio_select (below) */
88 #define W83627HF_LD_FDC 0x00
89 #define W83627HF_LD_PRT 0x01
90 #define W83627HF_LD_UART1 0x02
91 #define W83627HF_LD_UART2 0x03
92 #define W83627HF_LD_KBC 0x05
93 #define W83627HF_LD_CIR 0x06 /* w83627hf only */
94 #define W83627HF_LD_GAME 0x07
95 #define W83627HF_LD_MIDI 0x07
96 #define W83627HF_LD_GPIO1 0x07
97 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
98 #define W83627HF_LD_GPIO2 0x08
99 #define W83627HF_LD_GPIO3 0x09
100 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
101 #define W83627HF_LD_ACPI 0x0a
102 #define W83627HF_LD_HWM 0x0b
104 #define DEVID 0x20 /* Register: Device ID */
106 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
107 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
108 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
110 #define W83687THF_VID_EN 0x29 /* w83687thf only */
111 #define W83687THF_VID_CFG 0xF0 /* w83687thf only */
112 #define W83687THF_VID_DATA 0xF1 /* w83687thf only */
114 static inline void
115 superio_outb(int reg, int val)
117 outb(reg, REG);
118 outb(val, VAL);
121 static inline int
122 superio_inb(int reg)
124 outb(reg, REG);
125 return inb(VAL);
128 static inline void
129 superio_select(int ld)
131 outb(DEV, REG);
132 outb(ld, VAL);
135 static inline void
136 superio_enter(void)
138 outb(0x87, REG);
139 outb(0x87, REG);
142 static inline void
143 superio_exit(void)
145 outb(0xAA, REG);
148 #define W627_DEVID 0x52
149 #define W627THF_DEVID 0x82
150 #define W697_DEVID 0x60
151 #define W637_DEVID 0x70
152 #define W687THF_DEVID 0x85
153 #define WINB_ACT_REG 0x30
154 #define WINB_BASE_REG 0x60
155 /* Constants specified below */
157 /* Alignment of the base address */
158 #define WINB_ALIGNMENT ~7
160 /* Offset & size of I/O region we are interested in */
161 #define WINB_REGION_OFFSET 5
162 #define WINB_REGION_SIZE 2
164 /* Where are the sensors address/data registers relative to the region offset */
165 #define W83781D_ADDR_REG_OFFSET 0
166 #define W83781D_DATA_REG_OFFSET 1
168 /* The W83781D registers */
169 /* The W83782D registers for nr=7,8 are in bank 5 */
170 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
171 (0x554 + (((nr) - 7) * 2)))
172 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
173 (0x555 + (((nr) - 7) * 2)))
174 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
175 (0x550 + (nr) - 7))
177 /* nr:0-2 for fans:1-3 */
178 #define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
179 #define W83627HF_REG_FAN(nr) (0x28 + (nr))
181 #define W83627HF_REG_TEMP2_CONFIG 0x152
182 #define W83627HF_REG_TEMP3_CONFIG 0x252
183 /* these are zero-based, unlike config constants above */
184 static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
185 static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
186 static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
188 #define W83781D_REG_BANK 0x4E
190 #define W83781D_REG_CONFIG 0x40
191 #define W83781D_REG_ALARM1 0x459
192 #define W83781D_REG_ALARM2 0x45A
193 #define W83781D_REG_ALARM3 0x45B
195 #define W83781D_REG_BEEP_CONFIG 0x4D
196 #define W83781D_REG_BEEP_INTS1 0x56
197 #define W83781D_REG_BEEP_INTS2 0x57
198 #define W83781D_REG_BEEP_INTS3 0x453
200 #define W83781D_REG_VID_FANDIV 0x47
202 #define W83781D_REG_CHIPID 0x49
203 #define W83781D_REG_WCHIPID 0x58
204 #define W83781D_REG_CHIPMAN 0x4F
205 #define W83781D_REG_PIN 0x4B
207 #define W83781D_REG_VBAT 0x5D
209 #define W83627HF_REG_PWM1 0x5A
210 #define W83627HF_REG_PWM2 0x5B
212 #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
213 #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
214 #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
216 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
218 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
219 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
220 W83627THF_REG_PWM3 };
221 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
222 regpwm_627hf[nr] : regpwm[nr])
224 #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
226 #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
227 #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
228 #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
230 static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
231 W83637HF_REG_PWM_FREQ2,
232 W83637HF_REG_PWM_FREQ3 };
234 #define W83627HF_BASE_PWM_FREQ 46870
236 #define W83781D_REG_I2C_ADDR 0x48
237 #define W83781D_REG_I2C_SUBADDR 0x4A
239 /* Sensor selection */
240 #define W83781D_REG_SCFG1 0x5D
241 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
242 #define W83781D_REG_SCFG2 0x59
243 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
244 #define W83781D_DEFAULT_BETA 3435
246 /* Conversions. Limit checking is only done on the TO_REG
247 variants. Note that you should be a bit careful with which arguments
248 these macros are called: arguments may be evaluated more than once.
249 Fixing this is just not worth it. */
250 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
251 #define IN_FROM_REG(val) ((val) * 16)
253 static inline u8 FAN_TO_REG(long rpm, int div)
255 if (rpm == 0)
256 return 255;
257 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
258 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
259 254);
262 #define TEMP_MIN (-128000)
263 #define TEMP_MAX ( 127000)
265 /* TEMP: 0.001C/bit (-128C to +127C)
266 REG: 1C/bit, two's complement */
267 static u8 TEMP_TO_REG(long temp)
269 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
270 ntemp += (ntemp<0 ? -500 : 500);
271 return (u8)(ntemp / 1000);
274 static int TEMP_FROM_REG(u8 reg)
276 return (s8)reg * 1000;
279 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
281 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
283 static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
285 unsigned long freq;
286 freq = W83627HF_BASE_PWM_FREQ >> reg;
287 return freq;
289 static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
291 u8 i;
292 /* Only 5 dividers (1 2 4 8 16)
293 Search for the nearest available frequency */
294 for (i = 0; i < 4; i++) {
295 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
296 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
297 break;
299 return i;
302 static inline unsigned long pwm_freq_from_reg(u8 reg)
304 /* Clock bit 8 -> 180 kHz or 24 MHz */
305 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
307 reg &= 0x7f;
308 /* This should not happen but anyway... */
309 if (reg == 0)
310 reg++;
311 return (clock / (reg << 8));
313 static inline u8 pwm_freq_to_reg(unsigned long val)
315 /* Minimum divider value is 0x01 and maximum is 0x7F */
316 if (val >= 93750) /* The highest we can do */
317 return 0x01;
318 if (val >= 720) /* Use 24 MHz clock */
319 return (24000000UL / (val << 8));
320 if (val < 6) /* The lowest we can do */
321 return 0xFF;
322 else /* Use 180 kHz clock */
323 return (0x80 | (180000UL / (val << 8)));
326 #define BEEP_MASK_FROM_REG(val) (val)
327 #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
328 #define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
329 #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
331 #define DIV_FROM_REG(val) (1 << (val))
333 static inline u8 DIV_TO_REG(long val)
335 int i;
336 val = SENSORS_LIMIT(val, 1, 128) >> 1;
337 for (i = 0; i < 7; i++) {
338 if (val == 0)
339 break;
340 val >>= 1;
342 return ((u8) i);
345 /* For each registered chip, we need to keep some data in memory.
346 The structure is dynamically allocated. */
347 struct w83627hf_data {
348 unsigned short addr;
349 const char *name;
350 struct device *hwmon_dev;
351 struct mutex lock;
352 enum chips type;
354 struct mutex update_lock;
355 char valid; /* !=0 if following fields are valid */
356 unsigned long last_updated; /* In jiffies */
358 u8 in[9]; /* Register value */
359 u8 in_max[9]; /* Register value */
360 u8 in_min[9]; /* Register value */
361 u8 fan[3]; /* Register value */
362 u8 fan_min[3]; /* Register value */
363 u16 temp[3]; /* Register value */
364 u16 temp_max[3]; /* Register value */
365 u16 temp_max_hyst[3]; /* Register value */
366 u8 fan_div[3]; /* Register encoding, shifted right */
367 u8 vid; /* Register encoding, combined */
368 u32 alarms; /* Register encoding, combined */
369 u32 beep_mask; /* Register encoding, combined */
370 u8 beep_enable; /* Boolean */
371 u8 pwm[3]; /* Register value */
372 u8 pwm_freq[3]; /* Register value */
373 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
374 4 = thermistor */
375 u8 vrm;
376 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
379 struct w83627hf_sio_data {
380 enum chips type;
384 static int w83627hf_probe(struct platform_device *pdev);
385 static int __devexit w83627hf_remove(struct platform_device *pdev);
387 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
388 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
389 static void w83627hf_update_fan_div(struct w83627hf_data *data);
390 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
391 static void w83627hf_init_device(struct platform_device *pdev);
393 static struct platform_driver w83627hf_driver = {
394 .driver = {
395 .owner = THIS_MODULE,
396 .name = DRVNAME,
398 .probe = w83627hf_probe,
399 .remove = __devexit_p(w83627hf_remove),
402 static ssize_t
403 show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
405 int nr = to_sensor_dev_attr(devattr)->index;
406 struct w83627hf_data *data = w83627hf_update_device(dev);
407 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
409 static ssize_t
410 show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
412 int nr = to_sensor_dev_attr(devattr)->index;
413 struct w83627hf_data *data = w83627hf_update_device(dev);
414 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
416 static ssize_t
417 show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
419 int nr = to_sensor_dev_attr(devattr)->index;
420 struct w83627hf_data *data = w83627hf_update_device(dev);
421 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
423 static ssize_t
424 store_in_min(struct device *dev, struct device_attribute *devattr,
425 const char *buf, size_t count)
427 int nr = to_sensor_dev_attr(devattr)->index;
428 struct w83627hf_data *data = dev_get_drvdata(dev);
429 long val = simple_strtol(buf, NULL, 10);
431 mutex_lock(&data->update_lock);
432 data->in_min[nr] = IN_TO_REG(val);
433 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
434 mutex_unlock(&data->update_lock);
435 return count;
437 static ssize_t
438 store_in_max(struct device *dev, struct device_attribute *devattr,
439 const char *buf, size_t count)
441 int nr = to_sensor_dev_attr(devattr)->index;
442 struct w83627hf_data *data = dev_get_drvdata(dev);
443 long val = simple_strtol(buf, NULL, 10);
445 mutex_lock(&data->update_lock);
446 data->in_max[nr] = IN_TO_REG(val);
447 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
448 mutex_unlock(&data->update_lock);
449 return count;
451 #define sysfs_vin_decl(offset) \
452 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
453 show_in_input, NULL, offset); \
454 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \
455 show_in_min, store_in_min, offset); \
456 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \
457 show_in_max, store_in_max, offset);
459 sysfs_vin_decl(1);
460 sysfs_vin_decl(2);
461 sysfs_vin_decl(3);
462 sysfs_vin_decl(4);
463 sysfs_vin_decl(5);
464 sysfs_vin_decl(6);
465 sysfs_vin_decl(7);
466 sysfs_vin_decl(8);
468 /* use a different set of functions for in0 */
469 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
471 long in0;
473 if ((data->vrm_ovt & 0x01) &&
474 (w83627thf == data->type || w83637hf == data->type
475 || w83687thf == data->type))
477 /* use VRM9 calculation */
478 in0 = (long)((reg * 488 + 70000 + 50) / 100);
479 else
480 /* use VRM8 (standard) calculation */
481 in0 = (long)IN_FROM_REG(reg);
483 return sprintf(buf,"%ld\n", in0);
486 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
488 struct w83627hf_data *data = w83627hf_update_device(dev);
489 return show_in_0(data, buf, data->in[0]);
492 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
494 struct w83627hf_data *data = w83627hf_update_device(dev);
495 return show_in_0(data, buf, data->in_min[0]);
498 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
500 struct w83627hf_data *data = w83627hf_update_device(dev);
501 return show_in_0(data, buf, data->in_max[0]);
504 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
505 const char *buf, size_t count)
507 struct w83627hf_data *data = dev_get_drvdata(dev);
508 u32 val;
510 val = simple_strtoul(buf, NULL, 10);
512 mutex_lock(&data->update_lock);
514 if ((data->vrm_ovt & 0x01) &&
515 (w83627thf == data->type || w83637hf == data->type
516 || w83687thf == data->type))
518 /* use VRM9 calculation */
519 data->in_min[0] =
520 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
521 255);
522 else
523 /* use VRM8 (standard) calculation */
524 data->in_min[0] = IN_TO_REG(val);
526 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
527 mutex_unlock(&data->update_lock);
528 return count;
531 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
532 const char *buf, size_t count)
534 struct w83627hf_data *data = dev_get_drvdata(dev);
535 u32 val;
537 val = simple_strtoul(buf, NULL, 10);
539 mutex_lock(&data->update_lock);
541 if ((data->vrm_ovt & 0x01) &&
542 (w83627thf == data->type || w83637hf == data->type
543 || w83687thf == data->type))
545 /* use VRM9 calculation */
546 data->in_max[0] =
547 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
548 255);
549 else
550 /* use VRM8 (standard) calculation */
551 data->in_max[0] = IN_TO_REG(val);
553 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
554 mutex_unlock(&data->update_lock);
555 return count;
558 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
559 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
560 show_regs_in_min0, store_regs_in_min0);
561 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
562 show_regs_in_max0, store_regs_in_max0);
564 static ssize_t
565 show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
567 int nr = to_sensor_dev_attr(devattr)->index;
568 struct w83627hf_data *data = w83627hf_update_device(dev);
569 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
570 (long)DIV_FROM_REG(data->fan_div[nr])));
572 static ssize_t
573 show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
575 int nr = to_sensor_dev_attr(devattr)->index;
576 struct w83627hf_data *data = w83627hf_update_device(dev);
577 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
578 (long)DIV_FROM_REG(data->fan_div[nr])));
580 static ssize_t
581 store_fan_min(struct device *dev, struct device_attribute *devattr,
582 const char *buf, size_t count)
584 int nr = to_sensor_dev_attr(devattr)->index;
585 struct w83627hf_data *data = dev_get_drvdata(dev);
586 u32 val = simple_strtoul(buf, NULL, 10);
588 mutex_lock(&data->update_lock);
589 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
590 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
591 data->fan_min[nr]);
593 mutex_unlock(&data->update_lock);
594 return count;
596 #define sysfs_fan_decl(offset) \
597 static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
598 show_fan_input, NULL, offset - 1); \
599 static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
600 show_fan_min, store_fan_min, offset - 1);
602 sysfs_fan_decl(1);
603 sysfs_fan_decl(2);
604 sysfs_fan_decl(3);
606 static ssize_t
607 show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
609 int nr = to_sensor_dev_attr(devattr)->index;
610 struct w83627hf_data *data = w83627hf_update_device(dev);
612 u16 tmp = data->temp[nr];
613 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
614 : (long) TEMP_FROM_REG(tmp));
617 static ssize_t
618 show_temp_max(struct device *dev, struct device_attribute *devattr,
619 char *buf)
621 int nr = to_sensor_dev_attr(devattr)->index;
622 struct w83627hf_data *data = w83627hf_update_device(dev);
624 u16 tmp = data->temp_max[nr];
625 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
626 : (long) TEMP_FROM_REG(tmp));
629 static ssize_t
630 show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
631 char *buf)
633 int nr = to_sensor_dev_attr(devattr)->index;
634 struct w83627hf_data *data = w83627hf_update_device(dev);
636 u16 tmp = data->temp_max_hyst[nr];
637 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
638 : (long) TEMP_FROM_REG(tmp));
641 static ssize_t
642 store_temp_max(struct device *dev, struct device_attribute *devattr,
643 const char *buf, size_t count)
645 int nr = to_sensor_dev_attr(devattr)->index;
646 struct w83627hf_data *data = dev_get_drvdata(dev);
647 long val = simple_strtol(buf, NULL, 10);
648 u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
650 mutex_lock(&data->update_lock);
651 data->temp_max[nr] = tmp;
652 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
653 mutex_unlock(&data->update_lock);
654 return count;
657 static ssize_t
658 store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
659 const char *buf, size_t count)
661 int nr = to_sensor_dev_attr(devattr)->index;
662 struct w83627hf_data *data = dev_get_drvdata(dev);
663 long val = simple_strtol(buf, NULL, 10);
664 u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
666 mutex_lock(&data->update_lock);
667 data->temp_max_hyst[nr] = tmp;
668 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
669 mutex_unlock(&data->update_lock);
670 return count;
673 #define sysfs_temp_decl(offset) \
674 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
675 show_temp, NULL, offset - 1); \
676 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \
677 show_temp_max, store_temp_max, offset - 1); \
678 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \
679 show_temp_max_hyst, store_temp_max_hyst, offset - 1);
681 sysfs_temp_decl(1);
682 sysfs_temp_decl(2);
683 sysfs_temp_decl(3);
685 static ssize_t
686 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
688 struct w83627hf_data *data = w83627hf_update_device(dev);
689 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
691 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
693 static ssize_t
694 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
696 struct w83627hf_data *data = dev_get_drvdata(dev);
697 return sprintf(buf, "%ld\n", (long) data->vrm);
699 static ssize_t
700 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
702 struct w83627hf_data *data = dev_get_drvdata(dev);
703 u32 val;
705 val = simple_strtoul(buf, NULL, 10);
706 data->vrm = val;
708 return count;
710 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
712 static ssize_t
713 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
715 struct w83627hf_data *data = w83627hf_update_device(dev);
716 return sprintf(buf, "%ld\n", (long) data->alarms);
718 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
720 #define show_beep_reg(REG, reg) \
721 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
723 struct w83627hf_data *data = w83627hf_update_device(dev); \
724 return sprintf(buf,"%ld\n", \
725 (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
727 show_beep_reg(ENABLE, enable)
728 show_beep_reg(MASK, mask)
730 #define BEEP_ENABLE 0 /* Store beep_enable */
731 #define BEEP_MASK 1 /* Store beep_mask */
733 static ssize_t
734 store_beep_reg(struct device *dev, const char *buf, size_t count,
735 int update_mask)
737 struct w83627hf_data *data = dev_get_drvdata(dev);
738 u32 val, val2;
740 val = simple_strtoul(buf, NULL, 10);
742 mutex_lock(&data->update_lock);
744 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
745 data->beep_mask = BEEP_MASK_TO_REG(val);
746 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
747 data->beep_mask & 0xff);
748 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
749 ((data->beep_mask) >> 16) & 0xff);
750 val2 = (data->beep_mask >> 8) & 0x7f;
751 } else { /* We are storing beep_enable */
752 val2 =
753 w83627hf_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f;
754 data->beep_enable = BEEP_ENABLE_TO_REG(val);
757 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
758 val2 | data->beep_enable << 7);
760 mutex_unlock(&data->update_lock);
761 return count;
764 #define sysfs_beep(REG, reg) \
765 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
767 return show_beep_##reg(dev, attr, buf); \
769 static ssize_t \
770 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
772 return store_beep_reg(dev, buf, count, BEEP_##REG); \
774 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
775 show_regs_beep_##reg, store_regs_beep_##reg);
777 sysfs_beep(ENABLE, enable);
778 sysfs_beep(MASK, mask);
780 static ssize_t
781 show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
783 int nr = to_sensor_dev_attr(devattr)->index;
784 struct w83627hf_data *data = w83627hf_update_device(dev);
785 return sprintf(buf, "%ld\n",
786 (long) DIV_FROM_REG(data->fan_div[nr]));
788 /* Note: we save and restore the fan minimum here, because its value is
789 determined in part by the fan divisor. This follows the principle of
790 least surprise; the user doesn't expect the fan minimum to change just
791 because the divisor changed. */
792 static ssize_t
793 store_fan_div(struct device *dev, struct device_attribute *devattr,
794 const char *buf, size_t count)
796 int nr = to_sensor_dev_attr(devattr)->index;
797 struct w83627hf_data *data = dev_get_drvdata(dev);
798 unsigned long min;
799 u8 reg;
800 unsigned long val = simple_strtoul(buf, NULL, 10);
802 mutex_lock(&data->update_lock);
804 /* Save fan_min */
805 min = FAN_FROM_REG(data->fan_min[nr],
806 DIV_FROM_REG(data->fan_div[nr]));
808 data->fan_div[nr] = DIV_TO_REG(val);
810 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
811 & (nr==0 ? 0xcf : 0x3f))
812 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
813 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
815 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
816 & ~(1 << (5 + nr)))
817 | ((data->fan_div[nr] & 0x04) << (3 + nr));
818 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
820 /* Restore fan_min */
821 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
822 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
824 mutex_unlock(&data->update_lock);
825 return count;
828 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
829 show_fan_div, store_fan_div, 0);
830 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
831 show_fan_div, store_fan_div, 1);
832 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
833 show_fan_div, store_fan_div, 2);
835 static ssize_t
836 show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
838 int nr = to_sensor_dev_attr(devattr)->index;
839 struct w83627hf_data *data = w83627hf_update_device(dev);
840 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
843 static ssize_t
844 store_pwm(struct device *dev, struct device_attribute *devattr,
845 const char *buf, size_t count)
847 int nr = to_sensor_dev_attr(devattr)->index;
848 struct w83627hf_data *data = dev_get_drvdata(dev);
849 u32 val = simple_strtoul(buf, NULL, 10);
851 mutex_lock(&data->update_lock);
853 if (data->type == w83627thf) {
854 /* bits 0-3 are reserved in 627THF */
855 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
856 w83627hf_write_value(data,
857 W836X7HF_REG_PWM(data->type, nr),
858 data->pwm[nr] |
859 (w83627hf_read_value(data,
860 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
861 } else {
862 data->pwm[nr] = PWM_TO_REG(val);
863 w83627hf_write_value(data,
864 W836X7HF_REG_PWM(data->type, nr),
865 data->pwm[nr]);
868 mutex_unlock(&data->update_lock);
869 return count;
872 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
873 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
874 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
876 static ssize_t
877 show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
879 int nr = to_sensor_dev_attr(devattr)->index;
880 struct w83627hf_data *data = w83627hf_update_device(dev);
881 if (data->type == w83627hf)
882 return sprintf(buf, "%ld\n",
883 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
884 else
885 return sprintf(buf, "%ld\n",
886 pwm_freq_from_reg(data->pwm_freq[nr]));
889 static ssize_t
890 store_pwm_freq(struct device *dev, struct device_attribute *devattr,
891 const char *buf, size_t count)
893 int nr = to_sensor_dev_attr(devattr)->index;
894 struct w83627hf_data *data = dev_get_drvdata(dev);
895 static const u8 mask[]={0xF8, 0x8F};
896 u32 val;
898 val = simple_strtoul(buf, NULL, 10);
900 mutex_lock(&data->update_lock);
902 if (data->type == w83627hf) {
903 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
904 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
905 (data->pwm_freq[nr] << (nr*4)) |
906 (w83627hf_read_value(data,
907 W83627HF_REG_PWM_FREQ) & mask[nr]));
908 } else {
909 data->pwm_freq[nr] = pwm_freq_to_reg(val);
910 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
911 data->pwm_freq[nr]);
914 mutex_unlock(&data->update_lock);
915 return count;
918 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
919 show_pwm_freq, store_pwm_freq, 0);
920 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
921 show_pwm_freq, store_pwm_freq, 1);
922 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
923 show_pwm_freq, store_pwm_freq, 2);
925 static ssize_t
926 show_temp_type(struct device *dev, struct device_attribute *devattr,
927 char *buf)
929 int nr = to_sensor_dev_attr(devattr)->index;
930 struct w83627hf_data *data = w83627hf_update_device(dev);
931 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
934 static ssize_t
935 store_temp_type(struct device *dev, struct device_attribute *devattr,
936 const char *buf, size_t count)
938 int nr = to_sensor_dev_attr(devattr)->index;
939 struct w83627hf_data *data = dev_get_drvdata(dev);
940 u32 val, tmp;
942 val = simple_strtoul(buf, NULL, 10);
944 mutex_lock(&data->update_lock);
946 switch (val) {
947 case 1: /* PII/Celeron diode */
948 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
949 w83627hf_write_value(data, W83781D_REG_SCFG1,
950 tmp | BIT_SCFG1[nr]);
951 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
952 w83627hf_write_value(data, W83781D_REG_SCFG2,
953 tmp | BIT_SCFG2[nr]);
954 data->sens[nr] = val;
955 break;
956 case 2: /* 3904 */
957 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
958 w83627hf_write_value(data, W83781D_REG_SCFG1,
959 tmp | BIT_SCFG1[nr]);
960 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
961 w83627hf_write_value(data, W83781D_REG_SCFG2,
962 tmp & ~BIT_SCFG2[nr]);
963 data->sens[nr] = val;
964 break;
965 case W83781D_DEFAULT_BETA:
966 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
967 "instead\n", W83781D_DEFAULT_BETA);
968 /* fall through */
969 case 4: /* thermistor */
970 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
971 w83627hf_write_value(data, W83781D_REG_SCFG1,
972 tmp & ~BIT_SCFG1[nr]);
973 data->sens[nr] = val;
974 break;
975 default:
976 dev_err(dev,
977 "Invalid sensor type %ld; must be 1, 2, or 4\n",
978 (long) val);
979 break;
982 mutex_unlock(&data->update_lock);
983 return count;
986 #define sysfs_temp_type(offset) \
987 static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
988 show_temp_type, store_temp_type, offset - 1);
990 sysfs_temp_type(1);
991 sysfs_temp_type(2);
992 sysfs_temp_type(3);
994 static ssize_t
995 show_name(struct device *dev, struct device_attribute *devattr, char *buf)
997 struct w83627hf_data *data = dev_get_drvdata(dev);
999 return sprintf(buf, "%s\n", data->name);
1001 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1003 static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1004 struct w83627hf_sio_data *sio_data)
1006 int err = -ENODEV;
1007 u16 val;
1009 static const __initdata char *names[] = {
1010 "W83627HF",
1011 "W83627THF",
1012 "W83697HF",
1013 "W83637HF",
1014 "W83687THF",
1017 REG = sioaddr;
1018 VAL = sioaddr + 1;
1020 superio_enter();
1021 val = force_id ? force_id : superio_inb(DEVID);
1022 switch (val) {
1023 case W627_DEVID:
1024 sio_data->type = w83627hf;
1025 break;
1026 case W627THF_DEVID:
1027 sio_data->type = w83627thf;
1028 break;
1029 case W697_DEVID:
1030 sio_data->type = w83697hf;
1031 break;
1032 case W637_DEVID:
1033 sio_data->type = w83637hf;
1034 break;
1035 case W687THF_DEVID:
1036 sio_data->type = w83687thf;
1037 break;
1038 case 0xff: /* No device at all */
1039 goto exit;
1040 default:
1041 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
1042 goto exit;
1045 superio_select(W83627HF_LD_HWM);
1046 force_addr &= WINB_ALIGNMENT;
1047 if (force_addr) {
1048 printk(KERN_WARNING DRVNAME ": Forcing address 0x%x\n",
1049 force_addr);
1050 superio_outb(WINB_BASE_REG, force_addr >> 8);
1051 superio_outb(WINB_BASE_REG + 1, force_addr & 0xff);
1053 val = (superio_inb(WINB_BASE_REG) << 8) |
1054 superio_inb(WINB_BASE_REG + 1);
1055 *addr = val & WINB_ALIGNMENT;
1056 if (*addr == 0) {
1057 printk(KERN_WARNING DRVNAME ": Base address not set, "
1058 "skipping\n");
1059 goto exit;
1062 val = superio_inb(WINB_ACT_REG);
1063 if (!(val & 0x01)) {
1064 printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n");
1065 superio_outb(WINB_ACT_REG, val | 0x01);
1068 err = 0;
1069 pr_info(DRVNAME ": Found %s chip at %#x\n",
1070 names[sio_data->type], *addr);
1072 exit:
1073 superio_exit();
1074 return err;
1077 #define VIN_UNIT_ATTRS(_X_) \
1078 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1079 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
1080 &sensor_dev_attr_in##_X_##_max.dev_attr.attr
1082 #define FAN_UNIT_ATTRS(_X_) \
1083 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1084 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
1085 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr
1087 #define TEMP_UNIT_ATTRS(_X_) \
1088 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1089 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1090 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
1091 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr
1093 static struct attribute *w83627hf_attributes[] = {
1094 &dev_attr_in0_input.attr,
1095 &dev_attr_in0_min.attr,
1096 &dev_attr_in0_max.attr,
1097 VIN_UNIT_ATTRS(2),
1098 VIN_UNIT_ATTRS(3),
1099 VIN_UNIT_ATTRS(4),
1100 VIN_UNIT_ATTRS(7),
1101 VIN_UNIT_ATTRS(8),
1103 FAN_UNIT_ATTRS(1),
1104 FAN_UNIT_ATTRS(2),
1106 TEMP_UNIT_ATTRS(1),
1107 TEMP_UNIT_ATTRS(2),
1109 &dev_attr_alarms.attr,
1110 &dev_attr_beep_enable.attr,
1111 &dev_attr_beep_mask.attr,
1113 &sensor_dev_attr_pwm1.dev_attr.attr,
1114 &sensor_dev_attr_pwm2.dev_attr.attr,
1115 &dev_attr_name.attr,
1116 NULL
1119 static const struct attribute_group w83627hf_group = {
1120 .attrs = w83627hf_attributes,
1123 static struct attribute *w83627hf_attributes_opt[] = {
1124 VIN_UNIT_ATTRS(1),
1125 VIN_UNIT_ATTRS(5),
1126 VIN_UNIT_ATTRS(6),
1128 FAN_UNIT_ATTRS(3),
1129 TEMP_UNIT_ATTRS(3),
1130 &sensor_dev_attr_pwm3.dev_attr.attr,
1132 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1133 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1134 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1135 NULL
1138 static const struct attribute_group w83627hf_group_opt = {
1139 .attrs = w83627hf_attributes_opt,
1142 static int __devinit w83627hf_probe(struct platform_device *pdev)
1144 struct device *dev = &pdev->dev;
1145 struct w83627hf_sio_data *sio_data = dev->platform_data;
1146 struct w83627hf_data *data;
1147 struct resource *res;
1148 int err, i;
1150 static const char *names[] = {
1151 "w83627hf",
1152 "w83627thf",
1153 "w83697hf",
1154 "w83637hf",
1155 "w83687thf",
1158 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1159 if (!request_region(res->start, WINB_REGION_SIZE, DRVNAME)) {
1160 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1161 (unsigned long)res->start,
1162 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
1163 err = -EBUSY;
1164 goto ERROR0;
1167 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1168 err = -ENOMEM;
1169 goto ERROR1;
1171 data->addr = res->start;
1172 data->type = sio_data->type;
1173 data->name = names[sio_data->type];
1174 mutex_init(&data->lock);
1175 mutex_init(&data->update_lock);
1176 platform_set_drvdata(pdev, data);
1178 /* Initialize the chip */
1179 w83627hf_init_device(pdev);
1181 /* A few vars need to be filled upon startup */
1182 for (i = 0; i <= 2; i++)
1183 data->fan_min[i] = w83627hf_read_value(
1184 data, W83627HF_REG_FAN_MIN(i));
1185 w83627hf_update_fan_div(data);
1187 /* Register common device attributes */
1188 if ((err = sysfs_create_group(&dev->kobj, &w83627hf_group)))
1189 goto ERROR3;
1191 /* Register chip-specific device attributes */
1192 if (data->type == w83627hf || data->type == w83697hf)
1193 if ((err = device_create_file(dev,
1194 &sensor_dev_attr_in5_input.dev_attr))
1195 || (err = device_create_file(dev,
1196 &sensor_dev_attr_in5_min.dev_attr))
1197 || (err = device_create_file(dev,
1198 &sensor_dev_attr_in5_max.dev_attr))
1199 || (err = device_create_file(dev,
1200 &sensor_dev_attr_in6_input.dev_attr))
1201 || (err = device_create_file(dev,
1202 &sensor_dev_attr_in6_min.dev_attr))
1203 || (err = device_create_file(dev,
1204 &sensor_dev_attr_in6_max.dev_attr))
1205 || (err = device_create_file(dev,
1206 &sensor_dev_attr_pwm1_freq.dev_attr))
1207 || (err = device_create_file(dev,
1208 &sensor_dev_attr_pwm2_freq.dev_attr)))
1209 goto ERROR4;
1211 if (data->type != w83697hf)
1212 if ((err = device_create_file(dev,
1213 &sensor_dev_attr_in1_input.dev_attr))
1214 || (err = device_create_file(dev,
1215 &sensor_dev_attr_in1_min.dev_attr))
1216 || (err = device_create_file(dev,
1217 &sensor_dev_attr_in1_max.dev_attr))
1218 || (err = device_create_file(dev,
1219 &sensor_dev_attr_fan3_input.dev_attr))
1220 || (err = device_create_file(dev,
1221 &sensor_dev_attr_fan3_min.dev_attr))
1222 || (err = device_create_file(dev,
1223 &sensor_dev_attr_fan3_div.dev_attr))
1224 || (err = device_create_file(dev,
1225 &sensor_dev_attr_temp3_input.dev_attr))
1226 || (err = device_create_file(dev,
1227 &sensor_dev_attr_temp3_max.dev_attr))
1228 || (err = device_create_file(dev,
1229 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1230 || (err = device_create_file(dev,
1231 &sensor_dev_attr_temp3_type.dev_attr)))
1232 goto ERROR4;
1234 if (data->type != w83697hf && data->vid != 0xff) {
1235 /* Convert VID to voltage based on VRM */
1236 data->vrm = vid_which_vrm();
1238 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1239 || (err = device_create_file(dev, &dev_attr_vrm)))
1240 goto ERROR4;
1243 if (data->type == w83627thf || data->type == w83637hf
1244 || data->type == w83687thf)
1245 if ((err = device_create_file(dev,
1246 &sensor_dev_attr_pwm3.dev_attr)))
1247 goto ERROR4;
1249 if (data->type == w83637hf || data->type == w83687thf)
1250 if ((err = device_create_file(dev,
1251 &sensor_dev_attr_pwm1_freq.dev_attr))
1252 || (err = device_create_file(dev,
1253 &sensor_dev_attr_pwm2_freq.dev_attr))
1254 || (err = device_create_file(dev,
1255 &sensor_dev_attr_pwm3_freq.dev_attr)))
1256 goto ERROR4;
1258 data->hwmon_dev = hwmon_device_register(dev);
1259 if (IS_ERR(data->hwmon_dev)) {
1260 err = PTR_ERR(data->hwmon_dev);
1261 goto ERROR4;
1264 return 0;
1266 ERROR4:
1267 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1268 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1269 ERROR3:
1270 platform_set_drvdata(pdev, NULL);
1271 kfree(data);
1272 ERROR1:
1273 release_region(res->start, WINB_REGION_SIZE);
1274 ERROR0:
1275 return err;
1278 static int __devexit w83627hf_remove(struct platform_device *pdev)
1280 struct w83627hf_data *data = platform_get_drvdata(pdev);
1281 struct resource *res;
1283 hwmon_device_unregister(data->hwmon_dev);
1285 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1286 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
1287 platform_set_drvdata(pdev, NULL);
1288 kfree(data);
1290 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1291 release_region(res->start, WINB_REGION_SIZE);
1293 return 0;
1297 /* Registers 0x50-0x5f are banked */
1298 static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1300 if ((reg & 0x00f0) == 0x50) {
1301 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1302 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1306 /* Not strictly necessary, but play it safe for now */
1307 static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1309 if (reg & 0xff00) {
1310 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1311 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1315 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1317 int res, word_sized;
1319 mutex_lock(&data->lock);
1320 word_sized = (((reg & 0xff00) == 0x100)
1321 || ((reg & 0xff00) == 0x200))
1322 && (((reg & 0x00ff) == 0x50)
1323 || ((reg & 0x00ff) == 0x53)
1324 || ((reg & 0x00ff) == 0x55));
1325 w83627hf_set_bank(data, reg);
1326 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1327 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1328 if (word_sized) {
1329 outb_p((reg & 0xff) + 1,
1330 data->addr + W83781D_ADDR_REG_OFFSET);
1331 res =
1332 (res << 8) + inb_p(data->addr +
1333 W83781D_DATA_REG_OFFSET);
1335 w83627hf_reset_bank(data, reg);
1336 mutex_unlock(&data->lock);
1337 return res;
1340 static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
1342 int res = 0xff, sel;
1344 superio_enter();
1345 superio_select(W83627HF_LD_GPIO5);
1347 /* Make sure these GPIO pins are enabled */
1348 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1349 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1350 goto exit;
1353 /* Make sure the pins are configured for input
1354 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1355 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
1356 if ((sel & 0x1f) != 0x1f) {
1357 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1358 "function\n");
1359 goto exit;
1362 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1363 res = superio_inb(W83627THF_GPIO5_DR) & sel;
1365 exit:
1366 superio_exit();
1367 return res;
1370 static int __devinit w83687thf_read_vid(struct platform_device *pdev)
1372 int res = 0xff;
1374 superio_enter();
1375 superio_select(W83627HF_LD_HWM);
1377 /* Make sure these GPIO pins are enabled */
1378 if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) {
1379 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
1380 goto exit;
1383 /* Make sure the pins are configured for input */
1384 if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) {
1385 dev_dbg(&pdev->dev, "VID configured as output, "
1386 "no VID function\n");
1387 goto exit;
1390 res = superio_inb(W83687THF_VID_DATA) & 0x3f;
1392 exit:
1393 superio_exit();
1394 return res;
1397 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1399 int word_sized;
1401 mutex_lock(&data->lock);
1402 word_sized = (((reg & 0xff00) == 0x100)
1403 || ((reg & 0xff00) == 0x200))
1404 && (((reg & 0x00ff) == 0x53)
1405 || ((reg & 0x00ff) == 0x55));
1406 w83627hf_set_bank(data, reg);
1407 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1408 if (word_sized) {
1409 outb_p(value >> 8,
1410 data->addr + W83781D_DATA_REG_OFFSET);
1411 outb_p((reg & 0xff) + 1,
1412 data->addr + W83781D_ADDR_REG_OFFSET);
1414 outb_p(value & 0xff,
1415 data->addr + W83781D_DATA_REG_OFFSET);
1416 w83627hf_reset_bank(data, reg);
1417 mutex_unlock(&data->lock);
1418 return 0;
1421 static void __devinit w83627hf_init_device(struct platform_device *pdev)
1423 struct w83627hf_data *data = platform_get_drvdata(pdev);
1424 int i;
1425 enum chips type = data->type;
1426 u8 tmp;
1428 if (reset) {
1429 /* Resetting the chip has been the default for a long time,
1430 but repeatedly caused problems (fans going to full
1431 speed...) so it is now optional. It might even go away if
1432 nobody reports it as being useful, as I see very little
1433 reason why this would be needed at all. */
1434 dev_info(&pdev->dev, "If reset=1 solved a problem you were "
1435 "having, please report!\n");
1437 /* save this register */
1438 i = w83627hf_read_value(data, W83781D_REG_BEEP_CONFIG);
1439 /* Reset all except Watchdog values and last conversion values
1440 This sets fan-divs to 2, among others */
1441 w83627hf_write_value(data, W83781D_REG_CONFIG, 0x80);
1442 /* Restore the register and disable power-on abnormal beep.
1443 This saves FAN 1/2/3 input/output values set by BIOS. */
1444 w83627hf_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1445 /* Disable master beep-enable (reset turns it on).
1446 Individual beeps should be reset to off but for some reason
1447 disabling this bit helps some people not get beeped */
1448 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1451 /* Minimize conflicts with other winbond i2c-only clients... */
1452 /* disable i2c subclients... how to disable main i2c client?? */
1453 /* force i2c address to relatively uncommon address */
1454 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1455 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1457 /* Read VID only once */
1458 if (type == w83627hf || type == w83637hf) {
1459 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1460 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1461 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1462 } else if (type == w83627thf) {
1463 data->vid = w83627thf_read_gpio5(pdev);
1464 } else if (type == w83687thf) {
1465 data->vid = w83687thf_read_vid(pdev);
1468 /* Read VRM & OVT Config only once */
1469 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1470 data->vrm_ovt =
1471 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1474 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1475 for (i = 1; i <= 3; i++) {
1476 if (!(tmp & BIT_SCFG1[i - 1])) {
1477 data->sens[i - 1] = 4;
1478 } else {
1479 if (w83627hf_read_value
1480 (data,
1481 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1482 data->sens[i - 1] = 1;
1483 else
1484 data->sens[i - 1] = 2;
1486 if ((type == w83697hf) && (i == 2))
1487 break;
1490 if(init) {
1491 /* Enable temp2 */
1492 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1493 if (tmp & 0x01) {
1494 dev_warn(&pdev->dev, "Enabling temp2, readings "
1495 "might not make sense\n");
1496 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1497 tmp & 0xfe);
1500 /* Enable temp3 */
1501 if (type != w83697hf) {
1502 tmp = w83627hf_read_value(data,
1503 W83627HF_REG_TEMP3_CONFIG);
1504 if (tmp & 0x01) {
1505 dev_warn(&pdev->dev, "Enabling temp3, "
1506 "readings might not make sense\n");
1507 w83627hf_write_value(data,
1508 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1513 /* Start monitoring */
1514 w83627hf_write_value(data, W83781D_REG_CONFIG,
1515 (w83627hf_read_value(data,
1516 W83781D_REG_CONFIG) & 0xf7)
1517 | 0x01);
1519 /* Enable VBAT monitoring if needed */
1520 tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
1521 if (!(tmp & 0x01))
1522 w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
1525 static void w83627hf_update_fan_div(struct w83627hf_data *data)
1527 int reg;
1529 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1530 data->fan_div[0] = (reg >> 4) & 0x03;
1531 data->fan_div[1] = (reg >> 6) & 0x03;
1532 if (data->type != w83697hf) {
1533 data->fan_div[2] = (w83627hf_read_value(data,
1534 W83781D_REG_PIN) >> 6) & 0x03;
1536 reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1537 data->fan_div[0] |= (reg >> 3) & 0x04;
1538 data->fan_div[1] |= (reg >> 4) & 0x04;
1539 if (data->type != w83697hf)
1540 data->fan_div[2] |= (reg >> 5) & 0x04;
1543 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1545 struct w83627hf_data *data = dev_get_drvdata(dev);
1546 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
1548 mutex_lock(&data->update_lock);
1550 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1551 || !data->valid) {
1552 for (i = 0; i <= 8; i++) {
1553 /* skip missing sensors */
1554 if (((data->type == w83697hf) && (i == 1)) ||
1555 ((data->type != w83627hf && data->type != w83697hf)
1556 && (i == 5 || i == 6)))
1557 continue;
1558 data->in[i] =
1559 w83627hf_read_value(data, W83781D_REG_IN(i));
1560 data->in_min[i] =
1561 w83627hf_read_value(data,
1562 W83781D_REG_IN_MIN(i));
1563 data->in_max[i] =
1564 w83627hf_read_value(data,
1565 W83781D_REG_IN_MAX(i));
1567 for (i = 0; i <= 2; i++) {
1568 data->fan[i] =
1569 w83627hf_read_value(data, W83627HF_REG_FAN(i));
1570 data->fan_min[i] =
1571 w83627hf_read_value(data,
1572 W83627HF_REG_FAN_MIN(i));
1574 for (i = 0; i <= 2; i++) {
1575 u8 tmp = w83627hf_read_value(data,
1576 W836X7HF_REG_PWM(data->type, i));
1577 /* bits 0-3 are reserved in 627THF */
1578 if (data->type == w83627thf)
1579 tmp &= 0xf0;
1580 data->pwm[i] = tmp;
1581 if (i == 1 &&
1582 (data->type == w83627hf || data->type == w83697hf))
1583 break;
1585 if (data->type == w83627hf) {
1586 u8 tmp = w83627hf_read_value(data,
1587 W83627HF_REG_PWM_FREQ);
1588 data->pwm_freq[0] = tmp & 0x07;
1589 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1590 } else if (data->type != w83627thf) {
1591 for (i = 1; i <= 3; i++) {
1592 data->pwm_freq[i - 1] =
1593 w83627hf_read_value(data,
1594 W83637HF_REG_PWM_FREQ[i - 1]);
1595 if (i == 2 && (data->type == w83697hf))
1596 break;
1599 for (i = 0; i < num_temps; i++) {
1600 data->temp[i] = w83627hf_read_value(
1601 data, w83627hf_reg_temp[i]);
1602 data->temp_max[i] = w83627hf_read_value(
1603 data, w83627hf_reg_temp_over[i]);
1604 data->temp_max_hyst[i] = w83627hf_read_value(
1605 data, w83627hf_reg_temp_hyst[i]);
1608 w83627hf_update_fan_div(data);
1610 data->alarms =
1611 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1612 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1613 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1614 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1615 data->beep_enable = i >> 7;
1616 data->beep_mask = ((i & 0x7f) << 8) |
1617 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1618 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1619 data->last_updated = jiffies;
1620 data->valid = 1;
1623 mutex_unlock(&data->update_lock);
1625 return data;
1628 static int __init w83627hf_device_add(unsigned short address,
1629 const struct w83627hf_sio_data *sio_data)
1631 struct resource res = {
1632 .start = address + WINB_REGION_OFFSET,
1633 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1634 .name = DRVNAME,
1635 .flags = IORESOURCE_IO,
1637 int err;
1639 pdev = platform_device_alloc(DRVNAME, address);
1640 if (!pdev) {
1641 err = -ENOMEM;
1642 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1643 goto exit;
1646 err = platform_device_add_resources(pdev, &res, 1);
1647 if (err) {
1648 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1649 "(%d)\n", err);
1650 goto exit_device_put;
1653 err = platform_device_add_data(pdev, sio_data,
1654 sizeof(struct w83627hf_sio_data));
1655 if (err) {
1656 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1657 goto exit_device_put;
1660 err = platform_device_add(pdev);
1661 if (err) {
1662 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1663 err);
1664 goto exit_device_put;
1667 return 0;
1669 exit_device_put:
1670 platform_device_put(pdev);
1671 exit:
1672 return err;
1675 static int __init sensors_w83627hf_init(void)
1677 int err;
1678 unsigned short address;
1679 struct w83627hf_sio_data sio_data;
1681 if (w83627hf_find(0x2e, &address, &sio_data)
1682 && w83627hf_find(0x4e, &address, &sio_data))
1683 return -ENODEV;
1685 err = platform_driver_register(&w83627hf_driver);
1686 if (err)
1687 goto exit;
1689 /* Sets global pdev as a side effect */
1690 err = w83627hf_device_add(address, &sio_data);
1691 if (err)
1692 goto exit_driver;
1694 return 0;
1696 exit_driver:
1697 platform_driver_unregister(&w83627hf_driver);
1698 exit:
1699 return err;
1702 static void __exit sensors_w83627hf_exit(void)
1704 platform_device_unregister(pdev);
1705 platform_driver_unregister(&w83627hf_driver);
1708 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1709 "Philip Edelbrock <phil@netroedge.com>, "
1710 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1711 MODULE_DESCRIPTION("W83627HF driver");
1712 MODULE_LICENSE("GPL");
1714 module_init(sensors_w83627hf_init);
1715 module_exit(sensors_w83627hf_exit);