drivers/s390/s390mach.h

   1 /*
   2  *  drivers/s390/s390mach.h
   3  *   S/390 data definitions for machine check processing
   4  *
   5  *  S390 version
   6  *    Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
   7  *    Author(s): Ingo Adlung (adlung@de.ibm.com)
   8  */
   9
  10 #ifndef __s390mach_h
  11 #define __s390mach_h
  12
  13 #include <asm/types.h>
  14
  15 struct mci {
  16         __u32   sd              :  1; /* 00 system damage */
  17         __u32   pd              :  1; /* 01 instruction-processing damage */
  18         __u32   sr              :  1; /* 02 system recovery */
  19         __u32   to_be_defined_1 :  1; /* 03 */
  20         __u32   cd              :  1; /* 04 timing-facility damage */
  21         __u32   ed              :  1; /* 05 external damage */
  22         __u32   to_be_defined_2 :  1; /* 06 */
  23         __u32   dg              :  1; /* 07 degradation */
  24         __u32   w               :  1; /* 08 warning pending */
  25         __u32   cp              :  1; /* 09 channel-report pending */
  26         __u32   sp              :  1; /* 10 service-processor damage */
  27         __u32   ck              :  1; /* 11 channel-subsystem damage */
  28         __u32   to_be_defined_3 :  2; /* 12-13 */
  29         __u32   b               :  1; /* 14 backed up */
  30         __u32   to_be_defined_4 :  1; /* 15 */
  31         __u32   se              :  1; /* 16 storage error uncorrected */
  32         __u32   sc              :  1; /* 17 storage error corrected */
  33         __u32   ke              :  1; /* 18 storage-key error uncorrected */
  34         __u32   ds              :  1; /* 19 storage degradation */
  35         __u32   wp              :  1; /* 20 psw mwp validity */
  36         __u32   ms              :  1; /* 21 psw mask and key validity */
  37         __u32   pm              :  1; /* 22 psw program mask and cc validity */
  38         __u32   ia              :  1; /* 23 psw instruction address validity */
  39         __u32   fa              :  1; /* 24 failing storage address validity */
  40         __u32   to_be_defined_5 :  1; /* 25 */
  41         __u32   ec              :  1; /* 26 external damage code validity */
  42         __u32   fp              :  1; /* 27 floating point register validity */
  43         __u32   gr              :  1; /* 28 general register validity */
  44         __u32   cr              :  1; /* 29 control register validity */
  45         __u32   to_be_defined_6 :  1; /* 30 */
  46         __u32   st              :  1; /* 31 storage logical validity */
  47         __u32   ie              :  1; /* 32 indirect storage error */
  48         __u32   ar              :  1; /* 33 access register validity */
  49         __u32   da              :  1; /* 34 delayed access exception */
  50         __u32   to_be_defined_7 :  7; /* 35-41 */
  51         __u32   pr              :  1; /* 42 tod programmable register validity */
  52         __u32   fc              :  1; /* 43 fp control register validity */
  53         __u32   ap              :  1; /* 44 ancillary report */
  54         __u32   to_be_defined_8 :  1; /* 45 */
  55         __u32   ct              :  1; /* 46 cpu timer validity */
  56         __u32   cc              :  1; /* 47 clock comparator validity */
  57         __u32   to_be_defined_9 : 16; /* 47-63 */
  58 };
  59
  60 /*
  61  * Channel Report Word
  62  */
  63 struct crw {
  64         __u32 res1    :  1;   /* reserved zero */
  65         __u32 slct    :  1;   /* solicited */
  66         __u32 oflw    :  1;   /* overflow */
  67         __u32 chn     :  1;   /* chained */
  68         __u32 rsc     :  4;   /* reporting source code */
  69         __u32 anc     :  1;   /* ancillary report */
  70         __u32 res2    :  1;   /* reserved zero */
  71         __u32 erc     :  6;   /* error-recovery code */
  72         __u32 rsid    : 16;   /* reporting-source ID */
  73 } __attribute__ ((packed));
  74
  75 #define CRW_RSC_MONITOR  0x2  /* monitoring facility */
  76 #define CRW_RSC_SCH      0x3  /* subchannel */
  77 #define CRW_RSC_CPATH    0x4  /* channel path */
  78 #define CRW_RSC_CONFIG   0x9  /* configuration-alert facility */
  79 #define CRW_RSC_CSS      0xB  /* channel subsystem */
  80
  81 #define CRW_ERC_EVENT    0x00 /* event information pending */
  82 #define CRW_ERC_AVAIL    0x01 /* available */
  83 #define CRW_ERC_INIT     0x02 /* initialized */
  84 #define CRW_ERC_TERROR   0x03 /* temporary error */
  85 #define CRW_ERC_IPARM    0x04 /* installed parm initialized */
  86 #define CRW_ERC_TERM     0x05 /* terminal */
  87 #define CRW_ERC_PERRN    0x06 /* perm. error, fac. not init */
  88 #define CRW_ERC_PERRI    0x07 /* perm. error, facility init */
  89 #define CRW_ERC_PMOD     0x08 /* installed parameters modified */
  90
  91 static inline int stcrw(struct crw *pcrw )
  92 {
  93         int ccode;
  94
  95         __asm__ __volatile__(
  96                 "stcrw 0(%2)\n\t"
  97                 "ipm %0\n\t"
  98                 "srl %0,28\n\t"
  99                 : "=d" (ccode), "=m" (*pcrw)
 100                 : "a" (pcrw)
 101                 : "cc" );
 102         return ccode;
 103 }
 104
 105 #define ED_ETR_SYNC     12      /* External damage ETR sync check */
 106 #define ED_ETR_SWITCH   13      /* External damage ETR switch to local */
 107
 108 struct pt_regs;
 109
 110 void s390_handle_mcck(void);
 111 void s390_do_machine_check(struct pt_regs *regs);
 112 #endif /* __s390mach */