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V4L/DVB (3160): Updates to the tveeprom eeprom checking
[linux-2.6/verdex.git] / drivers / net / declance.c
blobf130bdab3fd319f06a1fac0101737d5149b381f2
1 /*
2 * Lance ethernet driver for the MIPS processor based
3 * DECstation family
4 *
5 *
6 * adopted from sunlance.c by Richard van den Berg
7 *
8 * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
9 *
10 * additional sources:
11 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
12 * Revision 1.2
13 *
14 * History:
15 *
16 * v0.001: The kernel accepts the code and it shows the hardware address.
17 *
18 * v0.002: Removed most sparc stuff, left only some module and dma stuff.
19 *
20 * v0.003: Enhanced base address calculation from proposals by
21 * Harald Koerfgen and Thomas Riemer.
22 *
23 * v0.004: lance-regs is pointing at the right addresses, added prom
24 * check. First start of address mapping and DMA.
25 *
26 * v0.005: started to play around with LANCE-DMA. This driver will not
27 * work for non IOASIC lances. HK
28 *
29 * v0.006: added pointer arrays to lance_private and setup routine for
30 * them in dec_lance_init. HK
31 *
32 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to
33 * access the init block. This looks like one (short) word at a
34 * time, but the smallest amount the IOASIC can transfer is a
35 * (long) word. So we have a 2-2 padding here. Changed
36 * lance_init_block accordingly. The 16-16 padding for the buffers
37 * seems to be correct. HK
38 *
39 * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer
40 *
41 * v0.009: Module support fixes, multiple interfaces support, various
42 * bits. macro
43 */
44
45 #include <linux/config.h>
46 #include <linux/crc32.h>
47 #include <linux/delay.h>
48 #include <linux/errno.h>
49 #include <linux/if_ether.h>
50 #include <linux/init.h>
51 #include <linux/kernel.h>
52 #include <linux/module.h>
53 #include <linux/netdevice.h>
54 #include <linux/etherdevice.h>
55 #include <linux/spinlock.h>
56 #include <linux/stddef.h>
57 #include <linux/string.h>
58
59 #include <asm/addrspace.h>
60 #include <asm/system.h>
61
62 #include <asm/dec/interrupts.h>
63 #include <asm/dec/ioasic.h>
64 #include <asm/dec/ioasic_addrs.h>
65 #include <asm/dec/kn01.h>
66 #include <asm/dec/machtype.h>
67 #include <asm/dec/system.h>
68 #include <asm/dec/tc.h>
69
70 static char version[] __devinitdata =
71 "declance.c: v0.009 by Linux MIPS DECstation task force\n";
72
73 MODULE_AUTHOR("Linux MIPS DECstation task force");
74 MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver");
75 MODULE_LICENSE("GPL");
76
77 /*
78 * card types
79 */
80 #define ASIC_LANCE 1
81 #define PMAD_LANCE 2
82 #define PMAX_LANCE 3
83
84
85 #define LE_CSR0 0
86 #define LE_CSR1 1
87 #define LE_CSR2 2
88 #define LE_CSR3 3
89
90 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
91
92 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
93 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
94 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
95 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
96 #define LE_C0_MERR 0x0800 /* ME: Memory error */
97 #define LE_C0_RINT 0x0400 /* Received interrupt */
98 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
99 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
100 #define LE_C0_INTR 0x0080 /* Interrupt or error */
101 #define LE_C0_INEA 0x0040 /* Interrupt enable */
102 #define LE_C0_RXON 0x0020 /* Receiver on */
103 #define LE_C0_TXON 0x0010 /* Transmitter on */
104 #define LE_C0_TDMD 0x0008 /* Transmitter demand */
105 #define LE_C0_STOP 0x0004 /* Stop the card */
106 #define LE_C0_STRT 0x0002 /* Start the card */
107 #define LE_C0_INIT 0x0001 /* Init the card */
108
109 #define LE_C3_BSWP 0x4 /* SWAP */
110 #define LE_C3_ACON 0x2 /* ALE Control */
111 #define LE_C3_BCON 0x1 /* Byte control */
112
113 /* Receive message descriptor 1 */
114 #define LE_R1_OWN 0x80 /* Who owns the entry */
115 #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
116 #define LE_R1_FRA 0x20 /* FRA: Frame error */
117 #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
118 #define LE_R1_CRC 0x08 /* CRC error */
119 #define LE_R1_BUF 0x04 /* BUF: Buffer error */
120 #define LE_R1_SOP 0x02 /* Start of packet */
121 #define LE_R1_EOP 0x01 /* End of packet */
122 #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
123
124 #define LE_T1_OWN 0x80 /* Lance owns the packet */
125 #define LE_T1_ERR 0x40 /* Error summary */
126 #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
127 #define LE_T1_EONE 0x08 /* Error: one retry needed */
128 #define LE_T1_EDEF 0x04 /* Error: deferred */
129 #define LE_T1_SOP 0x02 /* Start of packet */
130 #define LE_T1_EOP 0x01 /* End of packet */
131 #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
132
133 #define LE_T3_BUF 0x8000 /* Buffer error */
134 #define LE_T3_UFL 0x4000 /* Error underflow */
135 #define LE_T3_LCOL 0x1000 /* Error late collision */
136 #define LE_T3_CLOS 0x0800 /* Error carrier loss */
137 #define LE_T3_RTY 0x0400 /* Error retry */
138 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
139
140 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
141
142 #ifndef LANCE_LOG_TX_BUFFERS
143 #define LANCE_LOG_TX_BUFFERS 4
144 #define LANCE_LOG_RX_BUFFERS 4
145 #endif
146
147 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
148 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
149
150 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
151 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
152
153 #define PKT_BUF_SZ 1536
154 #define RX_BUFF_SIZE PKT_BUF_SZ
155 #define TX_BUFF_SIZE PKT_BUF_SZ
156
157 #undef TEST_HITS
158 #define ZERO 0
159
160 /* The DS2000/3000 have a linear 64 KB buffer.
161
162 * The PMAD-AA has 128 kb buffer on-board.
163 *
164 * The IOASIC LANCE devices use a shared memory region. This region as seen
165 * from the CPU is (max) 128 KB long and has to be on an 128 KB boundary.
166 * The LANCE sees this as a 64 KB long continuous memory region.
167 *
168 * The LANCE's DMA address is used as an index in this buffer and DMA takes
169 * place in bursts of eight 16-Bit words which are packed into four 32-Bit words
170 * by the IOASIC. This leads to a strange padding: 16 bytes of valid data followed
171 * by a 16 byte gap :-(.
172 */
173
174 struct lance_rx_desc {
175 unsigned short rmd0; /* low address of packet */
176 short gap0;
177 unsigned char rmd1_hadr; /* high address of packet */
178 unsigned char rmd1_bits; /* descriptor bits */
179 short gap1;
180 short length; /* 2s complement (negative!)
181 of buffer length */
182 short gap2;
183 unsigned short mblength; /* actual number of bytes received */
184 short gap3;
185 };
186
187 struct lance_tx_desc {
188 unsigned short tmd0; /* low address of packet */
189 short gap0;
190 unsigned char tmd1_hadr; /* high address of packet */
191 unsigned char tmd1_bits; /* descriptor bits */
192 short gap1;
193 short length; /* 2s complement (negative!)
194 of buffer length */
195 short gap2;
196 unsigned short misc;
197 short gap3;
198 };
199
200
201 /* First part of the LANCE initialization block, described in databook. */
202 struct lance_init_block {
203 unsigned short mode; /* pre-set mode (reg. 15) */
204 short gap0;
205
206 unsigned char phys_addr[12]; /* physical ethernet address
207 only 0, 1, 4, 5, 8, 9 are valid
208 2, 3, 6, 7, 10, 11 are gaps */
209 unsigned short filter[8]; /* multicast filter
210 only 0, 2, 4, 6 are valid
211 1, 3, 5, 7 are gaps */
212
213 /* Receive and transmit ring base, along with extra bits. */
214 unsigned short rx_ptr; /* receive descriptor addr */
215 short gap1;
216 unsigned short rx_len; /* receive len and high addr */
217 short gap2;
218 unsigned short tx_ptr; /* transmit descriptor addr */
219 short gap3;
220 unsigned short tx_len; /* transmit len and high addr */
221 short gap4;
222 short gap5[8];
223
224 /* The buffer descriptors */
225 struct lance_rx_desc brx_ring[RX_RING_SIZE];
226 struct lance_tx_desc btx_ring[TX_RING_SIZE];
227 };
228
229 #define BUF_OFFSET_CPU sizeof(struct lance_init_block)
230 #define BUF_OFFSET_LNC (sizeof(struct lance_init_block)>>1)
231
232 #define libdesc_offset(rt, elem) \
233 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
234
235 /*
236 * This works *only* for the ring descriptors
237 */
238 #define LANCE_ADDR(x) (CPHYSADDR(x) >> 1)
239
240 struct lance_private {
241 struct net_device *next;
242 int type;
243 int slot;
244 int dma_irq;
245 volatile struct lance_regs *ll;
246 volatile struct lance_init_block *init_block;
247
248 spinlock_t lock;
249
250 int rx_new, tx_new;
251 int rx_old, tx_old;
252
253 struct net_device_stats stats;
254
255 unsigned short busmaster_regval;
256
257 struct timer_list multicast_timer;
258
259 /* Pointers to the ring buffers as seen from the CPU */
260 char *rx_buf_ptr_cpu[RX_RING_SIZE];
261 char *tx_buf_ptr_cpu[TX_RING_SIZE];
262
263 /* Pointers to the ring buffers as seen from the LANCE */
264 char *rx_buf_ptr_lnc[RX_RING_SIZE];
265 char *tx_buf_ptr_lnc[TX_RING_SIZE];
266 };
267
268 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
269 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
270 lp->tx_old - lp->tx_new-1)
271
272 /* The lance control ports are at an absolute address, machine and tc-slot
273 * dependent.
274 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
275 * so we have to give the structure an extra member making rap pointing
276 * at the right address
277 */
278 struct lance_regs {
279 volatile unsigned short rdp; /* register data port */
280 unsigned short pad;
281 volatile unsigned short rap; /* register address port */
282 };
283
284 int dec_lance_debug = 2;
285
286 static struct net_device *root_lance_dev;
287
288 static inline void writereg(volatile unsigned short *regptr, short value)
289 {
290 *regptr = value;
291 iob();
292 }
293
294 /* Load the CSR registers */
295 static void load_csrs(struct lance_private *lp)
296 {
297 volatile struct lance_regs *ll = lp->ll;
298 int leptr;
299
300 /* The address space as seen from the LANCE
301 * begins at address 0. HK
302 */
303 leptr = 0;
304
305 writereg(&ll->rap, LE_CSR1);
306 writereg(&ll->rdp, (leptr & 0xFFFF));
307 writereg(&ll->rap, LE_CSR2);
308 writereg(&ll->rdp, leptr >> 16);
309 writereg(&ll->rap, LE_CSR3);
310 writereg(&ll->rdp, lp->busmaster_regval);
311
312 /* Point back to csr0 */
313 writereg(&ll->rap, LE_CSR0);
314 }
315
316 /*
317 * Our specialized copy routines
318 *
319 */
320 void cp_to_buf(const int type, void *to, const void *from, int len)
321 {
322 unsigned short *tp, *fp, clen;
323 unsigned char *rtp, *rfp;
324
325 if (type == PMAX_LANCE) {
326 clen = len >> 1;
327 tp = (unsigned short *) to;
328 fp = (unsigned short *) from;
329
330 while (clen--) {
331 *tp++ = *fp++;
332 tp++;
333 }
334
335 clen = len & 1;
336 rtp = (unsigned char *) tp;
337 rfp = (unsigned char *) fp;
338 while (clen--) {
339 *rtp++ = *rfp++;
340 }
341 } else {
342 /*
343 * copy 16 Byte chunks
344 */
345 clen = len >> 4;
346 tp = (unsigned short *) to;
347 fp = (unsigned short *) from;
348 while (clen--) {
349 *tp++ = *fp++;
350 *tp++ = *fp++;
351 *tp++ = *fp++;
352 *tp++ = *fp++;
353 *tp++ = *fp++;
354 *tp++ = *fp++;
355 *tp++ = *fp++;
356 *tp++ = *fp++;
357 tp += 8;
358 }
359
360 /*
361 * do the rest, if any.
362 */
363 clen = len & 15;
364 rtp = (unsigned char *) tp;
365 rfp = (unsigned char *) fp;
366 while (clen--) {
367 *rtp++ = *rfp++;
368 }
369 }
370
371 iob();
372 }
373
374 void cp_from_buf(const int type, void *to, const void *from, int len)
375 {
376 unsigned short *tp, *fp, clen;
377 unsigned char *rtp, *rfp;
378
379 if (type == PMAX_LANCE) {
380 clen = len >> 1;
381 tp = (unsigned short *) to;
382 fp = (unsigned short *) from;
383 while (clen--) {
384 *tp++ = *fp++;
385 fp++;
386 }
387
388 clen = len & 1;
389
390 rtp = (unsigned char *) tp;
391 rfp = (unsigned char *) fp;
392
393 while (clen--) {
394 *rtp++ = *rfp++;
395 }
396 } else {
397
398 /*
399 * copy 16 Byte chunks
400 */
401 clen = len >> 4;
402 tp = (unsigned short *) to;
403 fp = (unsigned short *) from;
404 while (clen--) {
405 *tp++ = *fp++;
406 *tp++ = *fp++;
407 *tp++ = *fp++;
408 *tp++ = *fp++;
409 *tp++ = *fp++;
410 *tp++ = *fp++;
411 *tp++ = *fp++;
412 *tp++ = *fp++;
413 fp += 8;
414 }
415
416 /*
417 * do the rest, if any.
418 */
419 clen = len & 15;
420 rtp = (unsigned char *) tp;
421 rfp = (unsigned char *) fp;
422 while (clen--) {
423 *rtp++ = *rfp++;
424 }
425
426
427 }
428
429 }
430
431 /* Setup the Lance Rx and Tx rings */
432 static void lance_init_ring(struct net_device *dev)
433 {
434 struct lance_private *lp = netdev_priv(dev);
435 volatile struct lance_init_block *ib;
436 int leptr;
437 int i;
438
439 ib = (struct lance_init_block *) (dev->mem_start);
440
441 /* Lock out other processes while setting up hardware */
442 netif_stop_queue(dev);
443 lp->rx_new = lp->tx_new = 0;
444 lp->rx_old = lp->tx_old = 0;
445
446 /* Copy the ethernet address to the lance init block.
447 * XXX bit 0 of the physical address registers has to be zero
448 */
449 ib->phys_addr[0] = dev->dev_addr[0];
450 ib->phys_addr[1] = dev->dev_addr[1];
451 ib->phys_addr[4] = dev->dev_addr[2];
452 ib->phys_addr[5] = dev->dev_addr[3];
453 ib->phys_addr[8] = dev->dev_addr[4];
454 ib->phys_addr[9] = dev->dev_addr[5];
455 /* Setup the initialization block */
456
457 /* Setup rx descriptor pointer */
458 leptr = LANCE_ADDR(libdesc_offset(brx_ring, 0));
459 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
460 ib->rx_ptr = leptr;
461 if (ZERO)
462 printk("RX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(brx_ring, 0));
463
464 /* Setup tx descriptor pointer */
465 leptr = LANCE_ADDR(libdesc_offset(btx_ring, 0));
466 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
467 ib->tx_ptr = leptr;
468 if (ZERO)
469 printk("TX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(btx_ring, 0));
470
471 if (ZERO)
472 printk("TX rings:\n");
473
474 /* Setup the Tx ring entries */
475 for (i = 0; i < TX_RING_SIZE; i++) {
476 leptr = (int) lp->tx_buf_ptr_lnc[i];
477 ib->btx_ring[i].tmd0 = leptr;
478 ib->btx_ring[i].tmd1_hadr = leptr >> 16;
479 ib->btx_ring[i].tmd1_bits = 0;
480 ib->btx_ring[i].length = 0xf000; /* The ones required by tmd2 */
481 ib->btx_ring[i].misc = 0;
482 if (i < 3 && ZERO)
483 printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->tx_buf_ptr_cpu[i]);
484 }
485
486 /* Setup the Rx ring entries */
487 if (ZERO)
488 printk("RX rings:\n");
489 for (i = 0; i < RX_RING_SIZE; i++) {
490 leptr = (int) lp->rx_buf_ptr_lnc[i];
491 ib->brx_ring[i].rmd0 = leptr;
492 ib->brx_ring[i].rmd1_hadr = leptr >> 16;
493 ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
494 ib->brx_ring[i].length = -RX_BUFF_SIZE | 0xf000;
495 ib->brx_ring[i].mblength = 0;
496 if (i < 3 && ZERO)
497 printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->rx_buf_ptr_cpu[i]);
498 }
499 iob();
500 }
501
502 static int init_restart_lance(struct lance_private *lp)
503 {
504 volatile struct lance_regs *ll = lp->ll;
505 int i;
506
507 writereg(&ll->rap, LE_CSR0);
508 writereg(&ll->rdp, LE_C0_INIT);
509
510 /* Wait for the lance to complete initialization */
511 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
512 udelay(10);
513 }
514 if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
515 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
516 return -1;
517 }
518 if ((ll->rdp & LE_C0_ERR)) {
519 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
520 return -1;
521 }
522 writereg(&ll->rdp, LE_C0_IDON);
523 writereg(&ll->rdp, LE_C0_STRT);
524 writereg(&ll->rdp, LE_C0_INEA);
525
526 return 0;
527 }
528
529 static int lance_rx(struct net_device *dev)
530 {
531 struct lance_private *lp = netdev_priv(dev);
532 volatile struct lance_init_block *ib;
533 volatile struct lance_rx_desc *rd = 0;
534 unsigned char bits;
535 int len = 0;
536 struct sk_buff *skb = 0;
537 ib = (struct lance_init_block *) (dev->mem_start);
538
539 #ifdef TEST_HITS
540 {
541 int i;
542
543 printk("[");
544 for (i = 0; i < RX_RING_SIZE; i++) {
545 if (i == lp->rx_new)
546 printk("%s", ib->brx_ring[i].rmd1_bits &
547 LE_R1_OWN ? "_" : "X");
548 else
549 printk("%s", ib->brx_ring[i].rmd1_bits &
550 LE_R1_OWN ? "." : "1");
551 }
552 printk("]");
553 }
554 #endif
555
556 for (rd = &ib->brx_ring[lp->rx_new];
557 !((bits = rd->rmd1_bits) & LE_R1_OWN);
558 rd = &ib->brx_ring[lp->rx_new]) {
559
560 /* We got an incomplete frame? */
561 if ((bits & LE_R1_POK) != LE_R1_POK) {
562 lp->stats.rx_over_errors++;
563 lp->stats.rx_errors++;
564 } else if (bits & LE_R1_ERR) {
565 /* Count only the end frame as a rx error,
566 * not the beginning
567 */
568 if (bits & LE_R1_BUF)
569 lp->stats.rx_fifo_errors++;
570 if (bits & LE_R1_CRC)
571 lp->stats.rx_crc_errors++;
572 if (bits & LE_R1_OFL)
573 lp->stats.rx_over_errors++;
574 if (bits & LE_R1_FRA)
575 lp->stats.rx_frame_errors++;
576 if (bits & LE_R1_EOP)
577 lp->stats.rx_errors++;
578 } else {
579 len = (rd->mblength & 0xfff) - 4;
580 skb = dev_alloc_skb(len + 2);
581
582 if (skb == 0) {
583 printk("%s: Memory squeeze, deferring packet.\n",
584 dev->name);
585 lp->stats.rx_dropped++;
586 rd->mblength = 0;
587 rd->rmd1_bits = LE_R1_OWN;
588 lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
589 return 0;
590 }
591 lp->stats.rx_bytes += len;
592
593 skb->dev = dev;
594 skb_reserve(skb, 2); /* 16 byte align */
595 skb_put(skb, len); /* make room */
596
597 cp_from_buf(lp->type, skb->data,
598 (char *)lp->rx_buf_ptr_cpu[lp->rx_new],
599 len);
600
601 skb->protocol = eth_type_trans(skb, dev);
602 netif_rx(skb);
603 dev->last_rx = jiffies;
604 lp->stats.rx_packets++;
605 }
606
607 /* Return the packet to the pool */
608 rd->mblength = 0;
609 rd->length = -RX_BUFF_SIZE | 0xf000;
610 rd->rmd1_bits = LE_R1_OWN;
611 lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
612 }
613 return 0;
614 }
615
616 static void lance_tx(struct net_device *dev)
617 {
618 struct lance_private *lp = netdev_priv(dev);
619 volatile struct lance_init_block *ib;
620 volatile struct lance_regs *ll = lp->ll;
621 volatile struct lance_tx_desc *td;
622 int i, j;
623 int status;
624 ib = (struct lance_init_block *) (dev->mem_start);
625 j = lp->tx_old;
626
627 spin_lock(&lp->lock);
628
629 for (i = j; i != lp->tx_new; i = j) {
630 td = &ib->btx_ring[i];
631 /* If we hit a packet not owned by us, stop */
632 if (td->tmd1_bits & LE_T1_OWN)
633 break;
634
635 if (td->tmd1_bits & LE_T1_ERR) {
636 status = td->misc;
637
638 lp->stats.tx_errors++;
639 if (status & LE_T3_RTY)
640 lp->stats.tx_aborted_errors++;
641 if (status & LE_T3_LCOL)
642 lp->stats.tx_window_errors++;
643
644 if (status & LE_T3_CLOS) {
645 lp->stats.tx_carrier_errors++;
646 printk("%s: Carrier Lost\n", dev->name);
647 /* Stop the lance */
648 writereg(&ll->rap, LE_CSR0);
649 writereg(&ll->rdp, LE_C0_STOP);
650 lance_init_ring(dev);
651 load_csrs(lp);
652 init_restart_lance(lp);
653 goto out;
654 }
655 /* Buffer errors and underflows turn off the
656 * transmitter, restart the adapter.
657 */
658 if (status & (LE_T3_BUF | LE_T3_UFL)) {
659 lp->stats.tx_fifo_errors++;
660
661 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
662 dev->name);
663 /* Stop the lance */
664 writereg(&ll->rap, LE_CSR0);
665 writereg(&ll->rdp, LE_C0_STOP);
666 lance_init_ring(dev);
667 load_csrs(lp);
668 init_restart_lance(lp);
669 goto out;
670 }
671 } else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
672 /*
673 * So we don't count the packet more than once.
674 */
675 td->tmd1_bits &= ~(LE_T1_POK);
676
677 /* One collision before packet was sent. */
678 if (td->tmd1_bits & LE_T1_EONE)
679 lp->stats.collisions++;
680
681 /* More than one collision, be optimistic. */
682 if (td->tmd1_bits & LE_T1_EMORE)
683 lp->stats.collisions += 2;
684
685 lp->stats.tx_packets++;
686 }
687 j = (j + 1) & TX_RING_MOD_MASK;
688 }
689 lp->tx_old = j;
690 out:
691 if (netif_queue_stopped(dev) &&
692 TX_BUFFS_AVAIL > 0)
693 netif_wake_queue(dev);
694
695 spin_unlock(&lp->lock);
696 }
697
698 static irqreturn_t lance_dma_merr_int(const int irq, void *dev_id,
699 struct pt_regs *regs)
700 {
701 struct net_device *dev = (struct net_device *) dev_id;
702
703 printk("%s: DMA error\n", dev->name);
704 return IRQ_HANDLED;
705 }
706
707 static irqreturn_t
708 lance_interrupt(const int irq, void *dev_id, struct pt_regs *regs)
709 {
710 struct net_device *dev = (struct net_device *) dev_id;
711 struct lance_private *lp = netdev_priv(dev);
712 volatile struct lance_regs *ll = lp->ll;
713 int csr0;
714
715 writereg(&ll->rap, LE_CSR0);
716 csr0 = ll->rdp;
717
718 /* Acknowledge all the interrupt sources ASAP */
719 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
720
721 if ((csr0 & LE_C0_ERR)) {
722 /* Clear the error condition */
723 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
724 LE_C0_CERR | LE_C0_MERR);
725 }
726 if (csr0 & LE_C0_RINT)
727 lance_rx(dev);
728
729 if (csr0 & LE_C0_TINT)
730 lance_tx(dev);
731
732 if (csr0 & LE_C0_BABL)
733 lp->stats.tx_errors++;
734
735 if (csr0 & LE_C0_MISS)
736 lp->stats.rx_errors++;
737
738 if (csr0 & LE_C0_MERR) {
739 printk("%s: Memory error, status %04x\n", dev->name, csr0);
740
741 writereg(&ll->rdp, LE_C0_STOP);
742
743 lance_init_ring(dev);
744 load_csrs(lp);
745 init_restart_lance(lp);
746 netif_wake_queue(dev);
747 }
748
749 writereg(&ll->rdp, LE_C0_INEA);
750 writereg(&ll->rdp, LE_C0_INEA);
751 return IRQ_HANDLED;
752 }
753
754 struct net_device *last_dev = 0;
755
756 static int lance_open(struct net_device *dev)
757 {
758 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
759 struct lance_private *lp = netdev_priv(dev);
760 volatile struct lance_regs *ll = lp->ll;
761 int status = 0;
762
763 last_dev = dev;
764
765 /* Stop the Lance */
766 writereg(&ll->rap, LE_CSR0);
767 writereg(&ll->rdp, LE_C0_STOP);
768
769 /* Set mode and clear multicast filter only at device open,
770 * so that lance_init_ring() called at any error will not
771 * forget multicast filters.
772 *
773 * BTW it is common bug in all lance drivers! --ANK
774 */
775 ib->mode = 0;
776 ib->filter [0] = 0;
777 ib->filter [2] = 0;
778 ib->filter [4] = 0;
779 ib->filter [6] = 0;
780
781 lance_init_ring(dev);
782 load_csrs(lp);
783
784 netif_start_queue(dev);
785
786 /* Associate IRQ with lance_interrupt */
787 if (request_irq(dev->irq, &lance_interrupt, 0, "lance", dev)) {
788 printk("%s: Can't get IRQ %d\n", dev->name, dev->irq);
789 return -EAGAIN;
790 }
791 if (lp->dma_irq >= 0) {
792 unsigned long flags;
793
794 if (request_irq(lp->dma_irq, &lance_dma_merr_int, 0,
795 "lance error", dev)) {
796 free_irq(dev->irq, dev);
797 printk("%s: Can't get DMA IRQ %d\n", dev->name,
798 lp->dma_irq);
799 return -EAGAIN;
800 }
801
802 spin_lock_irqsave(&ioasic_ssr_lock, flags);
803
804 fast_mb();
805 /* Enable I/O ASIC LANCE DMA. */
806 ioasic_write(IO_REG_SSR,
807 ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN);
808
809 fast_mb();
810 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
811 }
812
813 status = init_restart_lance(lp);
814 return status;
815 }
816
817 static int lance_close(struct net_device *dev)
818 {
819 struct lance_private *lp = netdev_priv(dev);
820 volatile struct lance_regs *ll = lp->ll;
821
822 netif_stop_queue(dev);
823 del_timer_sync(&lp->multicast_timer);
824
825 /* Stop the card */
826 writereg(&ll->rap, LE_CSR0);
827 writereg(&ll->rdp, LE_C0_STOP);
828
829 if (lp->dma_irq >= 0) {
830 unsigned long flags;
831
832 spin_lock_irqsave(&ioasic_ssr_lock, flags);
833
834 fast_mb();
835 /* Disable I/O ASIC LANCE DMA. */
836 ioasic_write(IO_REG_SSR,
837 ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN);
838
839 fast_iob();
840 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
841
842 free_irq(lp->dma_irq, dev);
843 }
844 free_irq(dev->irq, dev);
845 return 0;
846 }
847
848 static inline int lance_reset(struct net_device *dev)
849 {
850 struct lance_private *lp = netdev_priv(dev);
851 volatile struct lance_regs *ll = lp->ll;
852 int status;
853
854 /* Stop the lance */
855 writereg(&ll->rap, LE_CSR0);
856 writereg(&ll->rdp, LE_C0_STOP);
857
858 lance_init_ring(dev);
859 load_csrs(lp);
860 dev->trans_start = jiffies;
861 status = init_restart_lance(lp);
862 return status;
863 }
864
865 static void lance_tx_timeout(struct net_device *dev)
866 {
867 struct lance_private *lp = netdev_priv(dev);
868 volatile struct lance_regs *ll = lp->ll;
869
870 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
871 dev->name, ll->rdp);
872 lance_reset(dev);
873 netif_wake_queue(dev);
874 }
875
876 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
877 {
878 struct lance_private *lp = netdev_priv(dev);
879 volatile struct lance_regs *ll = lp->ll;
880 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
881 int entry, skblen, len;
882
883 skblen = skb->len;
884
885 len = skblen;
886
887 if (len < ETH_ZLEN) {
888 skb = skb_padto(skb, ETH_ZLEN);
889 if (skb == NULL)
890 return 0;
891 len = ETH_ZLEN;
892 }
893
894 lp->stats.tx_bytes += len;
895
896 entry = lp->tx_new & TX_RING_MOD_MASK;
897 ib->btx_ring[entry].length = (-len);
898 ib->btx_ring[entry].misc = 0;
899
900 cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data,
901 skblen);
902
903 /* Clear the slack of the packet, do I need this? */
904 /* For a firewall it's a good idea - AC */
905 /*
906 if (len != skblen)
907 memset ((char *) &ib->tx_buf [entry][skblen], 0, (len - skblen) << 1);
908 */
909
910 /* Now, give the packet to the lance */
911 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
912 lp->tx_new = (lp->tx_new + 1) & TX_RING_MOD_MASK;
913
914 if (TX_BUFFS_AVAIL <= 0)
915 netif_stop_queue(dev);
916
917 /* Kick the lance: transmit now */
918 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
919
920 spin_unlock_irq(&lp->lock);
921
922 dev->trans_start = jiffies;
923 dev_kfree_skb(skb);
924
925 return 0;
926 }
927
928 static struct net_device_stats *lance_get_stats(struct net_device *dev)
929 {
930 struct lance_private *lp = netdev_priv(dev);
931
932 return &lp->stats;
933 }
934
935 static void lance_load_multicast(struct net_device *dev)
936 {
937 volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
938 volatile u16 *mcast_table = (u16 *) & ib->filter;
939 struct dev_mc_list *dmi = dev->mc_list;
940 char *addrs;
941 int i;
942 u32 crc;
943
944 /* set all multicast bits */
945 if (dev->flags & IFF_ALLMULTI) {
946 ib->filter[0] = 0xffff;
947 ib->filter[2] = 0xffff;
948 ib->filter[4] = 0xffff;
949 ib->filter[6] = 0xffff;
950 return;
951 }
952 /* clear the multicast filter */
953 ib->filter[0] = 0;
954 ib->filter[2] = 0;
955 ib->filter[4] = 0;
956 ib->filter[6] = 0;
957
958 /* Add addresses */
959 for (i = 0; i < dev->mc_count; i++) {
960 addrs = dmi->dmi_addr;
961 dmi = dmi->next;
962
963 /* multicast address? */
964 if (!(*addrs & 1))
965 continue;
966
967 crc = ether_crc_le(ETH_ALEN, addrs);
968 crc = crc >> 26;
969 mcast_table[2 * (crc >> 4)] |= 1 << (crc & 0xf);
970 }
971 return;
972 }
973
974 static void lance_set_multicast(struct net_device *dev)
975 {
976 struct lance_private *lp = netdev_priv(dev);
977 volatile struct lance_init_block *ib;
978 volatile struct lance_regs *ll = lp->ll;
979
980 ib = (struct lance_init_block *) (dev->mem_start);
981
982 if (!netif_running(dev))
983 return;
984
985 if (lp->tx_old != lp->tx_new) {
986 mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100);
987 netif_wake_queue(dev);
988 return;
989 }
990
991 netif_stop_queue(dev);
992
993 writereg(&ll->rap, LE_CSR0);
994 writereg(&ll->rdp, LE_C0_STOP);
995
996 lance_init_ring(dev);
997
998 if (dev->flags & IFF_PROMISC) {
999 ib->mode |= LE_MO_PROM;
1000 } else {
1001 ib->mode &= ~LE_MO_PROM;
1002 lance_load_multicast(dev);
1003 }
1004 load_csrs(lp);
1005 init_restart_lance(lp);
1006 netif_wake_queue(dev);
1007 }
1008
1009 static void lance_set_multicast_retry(unsigned long _opaque)
1010 {
1011 struct net_device *dev = (struct net_device *) _opaque;
1012
1013 lance_set_multicast(dev);
1014 }
1015
1016 static int __init dec_lance_init(const int type, const int slot)
1017 {
1018 static unsigned version_printed;
1019 static const char fmt[] = "declance%d";
1020 char name[10];
1021 struct net_device *dev;
1022 struct lance_private *lp;
1023 volatile struct lance_regs *ll;
1024 int i, ret;
1025 unsigned long esar_base;
1026 unsigned char *esar;
1027
1028 if (dec_lance_debug && version_printed++ == 0)
1029 printk(version);
1030
1031 i = 0;
1032 dev = root_lance_dev;
1033 while (dev) {
1034 i++;
1035 lp = (struct lance_private *)dev->priv;
1036 dev = lp->next;
1037 }
1038 snprintf(name, sizeof(name), fmt, i);
1039
1040 dev = alloc_etherdev(sizeof(struct lance_private));
1041 if (!dev) {
1042 printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n",
1043 name);
1044 ret = -ENOMEM;
1045 goto err_out;
1046 }
1047
1048 /*
1049 * alloc_etherdev ensures the data structures used by the LANCE
1050 * are aligned.
1051 */
1052 lp = netdev_priv(dev);
1053 spin_lock_init(&lp->lock);
1054
1055 lp->type = type;
1056 lp->slot = slot;
1057 switch (type) {
1058 #ifdef CONFIG_TC
1059 case ASIC_LANCE:
1060 dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE);
1061
1062 /* buffer space for the on-board LANCE shared memory */
1063 /*
1064 * FIXME: ugly hack!
1065 */
1066 dev->mem_start = CKSEG1ADDR(0x00020000);
1067 dev->mem_end = dev->mem_start + 0x00020000;
1068 dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1069 esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR);
1070
1071 /* Workaround crash with booting KN04 2.1k from Disk */
1072 memset((void *)dev->mem_start, 0,
1073 dev->mem_end - dev->mem_start);
1074
1075 /*
1076 * setup the pointer arrays, this sucks [tm] :-(
1077 */
1078 for (i = 0; i < RX_RING_SIZE; i++) {
1079 lp->rx_buf_ptr_cpu[i] =
1080 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1081 2 * i * RX_BUFF_SIZE);
1082 lp->rx_buf_ptr_lnc[i] =
1083 (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1084 }
1085 for (i = 0; i < TX_RING_SIZE; i++) {
1086 lp->tx_buf_ptr_cpu[i] =
1087 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1088 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1089 2 * i * TX_BUFF_SIZE);
1090 lp->tx_buf_ptr_lnc[i] =
1091 (char *)(BUF_OFFSET_LNC +
1092 RX_RING_SIZE * RX_BUFF_SIZE +
1093 i * TX_BUFF_SIZE);
1094 }
1095
1096 /* Setup I/O ASIC LANCE DMA. */
1097 lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR];
1098 ioasic_write(IO_REG_LANCE_DMA_P,
1099 CPHYSADDR(dev->mem_start) << 3);
1100
1101 break;
1102
1103 case PMAD_LANCE:
1104 claim_tc_card(slot);
1105
1106 dev->mem_start = CKSEG1ADDR(get_tc_base_addr(slot));
1107 dev->base_addr = dev->mem_start + 0x100000;
1108 dev->irq = get_tc_irq_nr(slot);
1109 esar_base = dev->mem_start + 0x1c0002;
1110 lp->dma_irq = -1;
1111
1112 for (i = 0; i < RX_RING_SIZE; i++) {
1113 lp->rx_buf_ptr_cpu[i] =
1114 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1115 i * RX_BUFF_SIZE);
1116 lp->rx_buf_ptr_lnc[i] =
1117 (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1118 }
1119 for (i = 0; i < TX_RING_SIZE; i++) {
1120 lp->tx_buf_ptr_cpu[i] =
1121 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1122 RX_RING_SIZE * RX_BUFF_SIZE +
1123 i * TX_BUFF_SIZE);
1124 lp->tx_buf_ptr_lnc[i] =
1125 (char *)(BUF_OFFSET_LNC +
1126 RX_RING_SIZE * RX_BUFF_SIZE +
1127 i * TX_BUFF_SIZE);
1128 }
1129
1130 break;
1131 #endif
1132
1133 case PMAX_LANCE:
1134 dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1135 dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE);
1136 dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM);
1137 esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1);
1138 lp->dma_irq = -1;
1139
1140 /*
1141 * setup the pointer arrays, this sucks [tm] :-(
1142 */
1143 for (i = 0; i < RX_RING_SIZE; i++) {
1144 lp->rx_buf_ptr_cpu[i] =
1145 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1146 2 * i * RX_BUFF_SIZE);
1147 lp->rx_buf_ptr_lnc[i] =
1148 (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1149 }
1150 for (i = 0; i < TX_RING_SIZE; i++) {
1151 lp->tx_buf_ptr_cpu[i] =
1152 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1153 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1154 2 * i * TX_BUFF_SIZE);
1155 lp->tx_buf_ptr_lnc[i] =
1156 (char *)(BUF_OFFSET_LNC +
1157 RX_RING_SIZE * RX_BUFF_SIZE +
1158 i * TX_BUFF_SIZE);
1159 }
1160
1161 break;
1162
1163 default:
1164 printk(KERN_ERR "%s: declance_init called with unknown type\n",
1165 name);
1166 ret = -ENODEV;
1167 goto err_out_free_dev;
1168 }
1169
1170 ll = (struct lance_regs *) dev->base_addr;
1171 esar = (unsigned char *) esar_base;
1172
1173 /* prom checks */
1174 /* First, check for test pattern */
1175 if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
1176 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
1177 printk(KERN_ERR
1178 "%s: Ethernet station address prom not found!\n",
1179 name);
1180 ret = -ENODEV;
1181 goto err_out_free_dev;
1182 }
1183 /* Check the prom contents */
1184 for (i = 0; i < 8; i++) {
1185 if (esar[i * 4] != esar[0x3c - i * 4] &&
1186 esar[i * 4] != esar[0x40 + i * 4] &&
1187 esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
1188 printk(KERN_ERR "%s: Something is wrong with the "
1189 "ethernet station address prom!\n", name);
1190 ret = -ENODEV;
1191 goto err_out_free_dev;
1192 }
1193 }
1194
1195 /* Copy the ethernet address to the device structure, later to the
1196 * lance initialization block so the lance gets it every time it's
1197 * (re)initialized.
1198 */
1199 switch (type) {
1200 case ASIC_LANCE:
1201 printk("%s: IOASIC onboard LANCE, addr = ", name);
1202 break;
1203 case PMAD_LANCE:
1204 printk("%s: PMAD-AA, addr = ", name);
1205 break;
1206 case PMAX_LANCE:
1207 printk("%s: PMAX onboard LANCE, addr = ", name);
1208 break;
1209 }
1210 for (i = 0; i < 6; i++) {
1211 dev->dev_addr[i] = esar[i * 4];
1212 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':');
1213 }
1214
1215 printk(" irq = %d\n", dev->irq);
1216
1217 dev->open = &lance_open;
1218 dev->stop = &lance_close;
1219 dev->hard_start_xmit = &lance_start_xmit;
1220 dev->tx_timeout = &lance_tx_timeout;
1221 dev->watchdog_timeo = 5*HZ;
1222 dev->get_stats = &lance_get_stats;
1223 dev->set_multicast_list = &lance_set_multicast;
1224
1225 /* lp->ll is the location of the registers for lance card */
1226 lp->ll = ll;
1227
1228 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA
1229 * specification.
1230 */
1231 lp->busmaster_regval = 0;
1232
1233 dev->dma = 0;
1234
1235 /* We cannot sleep if the chip is busy during a
1236 * multicast list update event, because such events
1237 * can occur from interrupts (ex. IPv6). So we
1238 * use a timer to try again later when necessary. -DaveM
1239 */
1240 init_timer(&lp->multicast_timer);
1241 lp->multicast_timer.data = (unsigned long) dev;
1242 lp->multicast_timer.function = &lance_set_multicast_retry;
1243
1244 ret = register_netdev(dev);
1245 if (ret) {
1246 printk(KERN_ERR
1247 "%s: Unable to register netdev, aborting.\n", name);
1248 goto err_out_free_dev;
1249 }
1250
1251 lp->next = root_lance_dev;
1252 root_lance_dev = dev;
1253
1254 printk("%s: registered as %s.\n", name, dev->name);
1255 return 0;
1256
1257 err_out_free_dev:
1258 kfree(dev);
1259
1260 err_out:
1261 return ret;
1262 }
1263
1264
1265 /* Find all the lance cards on the system and initialize them */
1266 static int __init dec_lance_probe(void)
1267 {
1268 int count = 0;
1269
1270 /* Scan slots for PMAD-AA cards first. */
1271 #ifdef CONFIG_TC
1272 if (TURBOCHANNEL) {
1273 int slot;
1274
1275 while ((slot = search_tc_card("PMAD-AA")) >= 0) {
1276 if (dec_lance_init(PMAD_LANCE, slot) < 0)
1277 break;
1278 count++;
1279 }
1280 }
1281 #endif
1282
1283 /* Then handle onboard devices. */
1284 if (dec_interrupt[DEC_IRQ_LANCE] >= 0) {
1285 if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) {
1286 #ifdef CONFIG_TC
1287 if (dec_lance_init(ASIC_LANCE, -1) >= 0)
1288 count++;
1289 #endif
1290 } else if (!TURBOCHANNEL) {
1291 if (dec_lance_init(PMAX_LANCE, -1) >= 0)
1292 count++;
1293 }
1294 }
1295
1296 return (count > 0) ? 0 : -ENODEV;
1297 }
1298
1299 static void __exit dec_lance_cleanup(void)
1300 {
1301 while (root_lance_dev) {
1302 struct net_device *dev = root_lance_dev;
1303 struct lance_private *lp = netdev_priv(dev);
1304 unregister_netdev(dev);
1305 #ifdef CONFIG_TC
1306 if (lp->slot >= 0)
1307 release_tc_card(lp->slot);
1308 #endif
1309 root_lance_dev = lp->next;
1310 free_netdev(dev);
1311 }
1312 }
1313
1314 module_init(dec_lance_probe);
1315 module_exit(dec_lance_cleanup);
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