[NET_SCHED]: cls_basic: fix NULL pointer dereference
[linux-2.6/verdex.git] / arch / i386 / kernel / acpi / earlyquirk.c
bloba7d22d9f3d7e50d13ae2c4d6a43aba093a920b8a
1 /*
2 * Do early PCI probing for bug detection when the main PCI subsystem is
3 * not up yet.
4 */
5 #include <linux/init.h>
6 #include <linux/kernel.h>
7 #include <linux/pci.h>
8 #include <linux/acpi.h>
10 #include <asm/pci-direct.h>
11 #include <asm/acpi.h>
12 #include <asm/apic.h>
13 #include <asm/irq.h>
15 #ifdef CONFIG_ACPI
17 static int __init nvidia_hpet_check(struct acpi_table_header *header)
19 return 0;
21 #endif
23 static int __init check_bridge(int vendor, int device)
25 #ifdef CONFIG_ACPI
26 /* According to Nvidia all timer overrides are bogus unless HPET
27 is enabled. */
28 if (!acpi_use_timer_override && vendor == PCI_VENDOR_ID_NVIDIA) {
29 if (acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check)) {
30 acpi_skip_timer_override = 1;
31 printk(KERN_INFO "Nvidia board "
32 "detected. Ignoring ACPI "
33 "timer override.\n");
34 printk(KERN_INFO "If you got timer trouble "
35 "try acpi_use_timer_override\n");
39 #endif
40 if (vendor == PCI_VENDOR_ID_ATI && timer_over_8254 == 1) {
41 timer_over_8254 = 0;
42 printk(KERN_INFO "ATI board detected. Disabling timer routing "
43 "over 8254.\n");
45 return 0;
48 static void check_intel(void)
50 u16 vendor, device;
52 vendor = read_pci_config_16(0, 0, 0, PCI_VENDOR_ID);
54 if (vendor != PCI_VENDOR_ID_INTEL)
55 return;
57 device = read_pci_config_16(0, 0, 0, PCI_DEVICE_ID);
58 #ifdef CONFIG_SMP
59 if (device == PCI_DEVICE_ID_INTEL_E7320_MCH ||
60 device == PCI_DEVICE_ID_INTEL_E7520_MCH ||
61 device == PCI_DEVICE_ID_INTEL_E7525_MCH)
62 quirk_intel_irqbalance();
63 #endif
66 void __init check_acpi_pci(void)
68 int num, slot, func;
70 /* Assume the machine supports type 1. If not it will
71 always read ffffffff and should not have any side effect.
72 Actually a few buggy systems can machine check. Allow the user
73 to disable it by command line option at least -AK */
74 if (!early_pci_allowed())
75 return;
77 check_intel();
79 /* Poor man's PCI discovery */
80 for (num = 0; num < 32; num++) {
81 for (slot = 0; slot < 32; slot++) {
82 for (func = 0; func < 8; func++) {
83 u32 class;
84 u32 vendor;
85 class = read_pci_config(num, slot, func,
86 PCI_CLASS_REVISION);
87 if (class == 0xffffffff)
88 break;
90 if ((class >> 16) != PCI_CLASS_BRIDGE_PCI)
91 continue;
93 vendor = read_pci_config(num, slot, func,
94 PCI_VENDOR_ID);
96 if (check_bridge(vendor & 0xffff, vendor >> 16))
97 return;