drivers/video/sis/sis.h

   1 /*
   2  * SiS 300/540/630[S]/730[S],
   3  * SiS 315[E|PRO]/550/[M]65x/[M]661[F|M]X/740/[M]741[GX]/330/[M]76x[GX],
   4  * XGI V3XT/V5/V8, Z7
   5  * frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3
   6  *
   7  * Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the named License,
  12  * or any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  22  */
  23
  24 #ifndef _SIS_H_
  25 #define _SIS_H_
  26
  27 #include <linux/version.h>
  28
  29 #include "osdef.h"
  30 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
  31 #include <video/sisfb.h>
  32 #else
  33 #include <linux/sisfb.h>
  34 #endif
  35
  36 #include "vgatypes.h"
  37 #include "vstruct.h"
  38
  39 #define VER_MAJOR               1
  40 #define VER_MINOR               8
  41 #define VER_LEVEL               9
  42
  43 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
  44 #include <linux/spinlock.h>
  45 #define SIS_PCI_GET_CLASS(a, b) pci_get_class(a, b)
  46 #define SIS_PCI_GET_DEVICE(a,b,c) pci_get_device(a,b,c)
  47 #define SIS_PCI_GET_SLOT(a,b) pci_get_slot(a,b)
  48 #define SIS_PCI_PUT_DEVICE(a) pci_dev_put(a)
  49 #ifdef CONFIG_COMPAT
  50 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10)
  51 #include <linux/ioctl32.h>
  52 #define SIS_OLD_CONFIG_COMPAT
  53 #else
  54 #include <linux/smp_lock.h>
  55 #define SIS_NEW_CONFIG_COMPAT
  56 #endif
  57 #endif  /* CONFIG_COMPAT */
  58 #else  /* 2.4 */
  59 #define SIS_PCI_GET_CLASS(a, b) pci_find_class(a, b)
  60 #define SIS_PCI_GET_DEVICE(a,b,c) pci_find_device(a,b,c)
  61 #define SIS_PCI_GET_SLOT(a,b) pci_find_slot(a,b)
  62 #define SIS_PCI_PUT_DEVICE(a)
  63 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,19)
  64 #ifdef __x86_64__       /* Shouldn't we check for CONFIG_IA32_EMULATION here? */
  65 #include <asm/ioctl32.h>
  66 #define SIS_OLD_CONFIG_COMPAT
  67 #endif
  68 #endif
  69 #endif /* 2.4 */
  70 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8)
  71 #define SIS_IOTYPE1 void __iomem
  72 #define SIS_IOTYPE2 __iomem
  73 #define SISINITSTATIC static
  74 #else
  75 #define SIS_IOTYPE1 unsigned char
  76 #define SIS_IOTYPE2
  77 #define SISINITSTATIC
  78 #endif
  79
  80 #undef SISFBDEBUG
  81
  82 #ifdef SISFBDEBUG
  83 #define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
  84 #define TWDEBUG(x) printk(KERN_INFO x "\n");
  85 #else
  86 #define DPRINTK(fmt, args...)
  87 #define TWDEBUG(x)
  88 #endif
  89
  90 #define SISFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0)
  91
  92 /* To be included in pci_ids.h */
  93 #ifndef PCI_DEVICE_ID_SI_650_VGA
  94 #define PCI_DEVICE_ID_SI_650_VGA        0x6325
  95 #endif
  96 #ifndef PCI_DEVICE_ID_SI_650
  97 #define PCI_DEVICE_ID_SI_650            0x0650
  98 #endif
  99 #ifndef PCI_DEVICE_ID_SI_651
 100 #define PCI_DEVICE_ID_SI_651            0x0651
 101 #endif
 102 #ifndef PCI_DEVICE_ID_SI_740
 103 #define PCI_DEVICE_ID_SI_740            0x0740
 104 #endif
 105 #ifndef PCI_DEVICE_ID_SI_330
 106 #define PCI_DEVICE_ID_SI_330            0x0330
 107 #endif
 108 #ifndef PCI_DEVICE_ID_SI_660_VGA
 109 #define PCI_DEVICE_ID_SI_660_VGA        0x6330
 110 #endif
 111 #ifndef PCI_DEVICE_ID_SI_661
 112 #define PCI_DEVICE_ID_SI_661            0x0661
 113 #endif
 114 #ifndef PCI_DEVICE_ID_SI_741
 115 #define PCI_DEVICE_ID_SI_741            0x0741
 116 #endif
 117 #ifndef PCI_DEVICE_ID_SI_660
 118 #define PCI_DEVICE_ID_SI_660            0x0660
 119 #endif
 120 #ifndef PCI_DEVICE_ID_SI_760
 121 #define PCI_DEVICE_ID_SI_760            0x0760
 122 #endif
 123 #ifndef PCI_DEVICE_ID_SI_761
 124 #define PCI_DEVICE_ID_SI_761            0x0761
 125 #endif
 126
 127 #ifndef PCI_VENDOR_ID_XGI
 128 #define PCI_VENDOR_ID_XGI               0x18ca
 129 #endif
 130
 131 #ifndef PCI_DEVICE_ID_XGI_20
 132 #define PCI_DEVICE_ID_XGI_20            0x0020
 133 #endif
 134
 135 #ifndef PCI_DEVICE_ID_XGI_40
 136 #define PCI_DEVICE_ID_XGI_40            0x0040
 137 #endif
 138
 139 /* To be included in fb.h */
 140 #ifndef FB_ACCEL_SIS_GLAMOUR_2
 141 #define FB_ACCEL_SIS_GLAMOUR_2  40      /* SiS 315, 65x, 740, 661, 741  */
 142 #endif
 143 #ifndef FB_ACCEL_SIS_XABRE
 144 #define FB_ACCEL_SIS_XABRE      41      /* SiS 330 ("Xabre"), 76x       */
 145 #endif
 146 #ifndef FB_ACCEL_XGI_VOLARI_V
 147 #define FB_ACCEL_XGI_VOLARI_V   47      /* XGI Volari Vx (V3XT, V5, V8) */
 148 #endif
 149 #ifndef FB_ACCEL_XGI_VOLARI_Z
 150 #define FB_ACCEL_XGI_VOLARI_Z   48      /* XGI Volari Z7                */
 151 #endif
 152
 153 /* ivideo->caps */
 154 #define HW_CURSOR_CAP           0x80
 155 #define TURBO_QUEUE_CAP         0x40
 156 #define AGP_CMD_QUEUE_CAP       0x20
 157 #define VM_CMD_QUEUE_CAP        0x10
 158 #define MMIO_CMD_QUEUE_CAP      0x08
 159
 160 /* For 300 series */
 161 #define TURBO_QUEUE_AREA_SIZE   (512 * 1024)    /* 512K */
 162 #define HW_CURSOR_AREA_SIZE_300 4096            /* 4K */
 163
 164 /* For 315/Xabre series */
 165 #define COMMAND_QUEUE_AREA_SIZE (512 * 1024)    /* 512K */
 166 #define COMMAND_QUEUE_AREA_SIZE_Z7 (128 * 1024) /* 128k for XGI Z7 */
 167 #define HW_CURSOR_AREA_SIZE_315 16384           /* 16K */
 168 #define COMMAND_QUEUE_THRESHOLD 0x1F
 169
 170 #define SIS_OH_ALLOC_SIZE       4000
 171 #define SENTINEL                0x7fffffff
 172
 173 #define SEQ_ADR                 0x14
 174 #define SEQ_DATA                0x15
 175 #define DAC_ADR                 0x18
 176 #define DAC_DATA                0x19
 177 #define CRTC_ADR                0x24
 178 #define CRTC_DATA               0x25
 179 #define DAC2_ADR                (0x16-0x30)
 180 #define DAC2_DATA               (0x17-0x30)
 181 #define VB_PART1_ADR            (0x04-0x30)
 182 #define VB_PART1_DATA           (0x05-0x30)
 183 #define VB_PART2_ADR            (0x10-0x30)
 184 #define VB_PART2_DATA           (0x11-0x30)
 185 #define VB_PART3_ADR            (0x12-0x30)
 186 #define VB_PART3_DATA           (0x13-0x30)
 187 #define VB_PART4_ADR            (0x14-0x30)
 188 #define VB_PART4_DATA           (0x15-0x30)
 189
 190 #define SISSR                   ivideo->SiS_Pr.SiS_P3c4
 191 #define SISCR                   ivideo->SiS_Pr.SiS_P3d4
 192 #define SISDACA                 ivideo->SiS_Pr.SiS_P3c8
 193 #define SISDACD                 ivideo->SiS_Pr.SiS_P3c9
 194 #define SISPART1                ivideo->SiS_Pr.SiS_Part1Port
 195 #define SISPART2                ivideo->SiS_Pr.SiS_Part2Port
 196 #define SISPART3                ivideo->SiS_Pr.SiS_Part3Port
 197 #define SISPART4                ivideo->SiS_Pr.SiS_Part4Port
 198 #define SISPART5                ivideo->SiS_Pr.SiS_Part5Port
 199 #define SISDAC2A                SISPART5
 200 #define SISDAC2D                (SISPART5 + 1)
 201 #define SISMISCR                (ivideo->SiS_Pr.RelIO + 0x1c)
 202 #define SISMISCW                ivideo->SiS_Pr.SiS_P3c2
 203 #define SISINPSTAT              (ivideo->SiS_Pr.RelIO + 0x2a)
 204 #define SISPEL                  ivideo->SiS_Pr.SiS_P3c6
 205 #define SISVGAENABLE            (ivideo->SiS_Pr.RelIO + 0x13)
 206 #define SISVID                  (ivideo->SiS_Pr.RelIO + 0x02 - 0x30)
 207 #define SISCAP                  (ivideo->SiS_Pr.RelIO + 0x00 - 0x30)
 208
 209 #define IND_SIS_PASSWORD                0x05  /* SRs */
 210 #define IND_SIS_COLOR_MODE              0x06
 211 #define IND_SIS_RAMDAC_CONTROL          0x07
 212 #define IND_SIS_DRAM_SIZE               0x14
 213 #define IND_SIS_MODULE_ENABLE           0x1E
 214 #define IND_SIS_PCI_ADDRESS_SET         0x20
 215 #define IND_SIS_TURBOQUEUE_ADR          0x26
 216 #define IND_SIS_TURBOQUEUE_SET          0x27
 217 #define IND_SIS_POWER_ON_TRAP           0x38
 218 #define IND_SIS_POWER_ON_TRAP2          0x39
 219 #define IND_SIS_CMDQUEUE_SET            0x26
 220 #define IND_SIS_CMDQUEUE_THRESHOLD      0x27
 221
 222 #define IND_SIS_AGP_IO_PAD      0x48
 223
 224 #define SIS_CRT2_WENABLE_300    0x24  /* Part1 */
 225 #define SIS_CRT2_WENABLE_315    0x2F
 226
 227 #define SIS_PASSWORD            0x86  /* SR05 */
 228
 229 #define SIS_INTERLACED_MODE     0x20  /* SR06 */
 230 #define SIS_8BPP_COLOR_MODE     0x0
 231 #define SIS_15BPP_COLOR_MODE    0x1
 232 #define SIS_16BPP_COLOR_MODE    0x2
 233 #define SIS_32BPP_COLOR_MODE    0x4
 234
 235 #define SIS_ENABLE_2D           0x40  /* SR1E */
 236
 237 #define SIS_MEM_MAP_IO_ENABLE   0x01  /* SR20 */
 238 #define SIS_PCI_ADDR_ENABLE     0x80
 239
 240 #define SIS_AGP_CMDQUEUE_ENABLE         0x80  /* 315/330/340 series SR26 */
 241 #define SIS_VRAM_CMDQUEUE_ENABLE        0x40
 242 #define SIS_MMIO_CMD_ENABLE             0x20
 243 #define SIS_CMD_QUEUE_SIZE_512k         0x00
 244 #define SIS_CMD_QUEUE_SIZE_1M           0x04
 245 #define SIS_CMD_QUEUE_SIZE_2M           0x08
 246 #define SIS_CMD_QUEUE_SIZE_4M           0x0C
 247 #define SIS_CMD_QUEUE_RESET             0x01
 248 #define SIS_CMD_AUTO_CORR               0x02
 249
 250 #define SIS_CMD_QUEUE_SIZE_Z7_64k       0x00 /* XGI Z7 */
 251 #define SIS_CMD_QUEUE_SIZE_Z7_128k      0x04
 252
 253 #define SIS_SIMULTANEOUS_VIEW_ENABLE    0x01  /* CR30 */
 254 #define SIS_MODE_SELECT_CRT2            0x02
 255 #define SIS_VB_OUTPUT_COMPOSITE         0x04
 256 #define SIS_VB_OUTPUT_SVIDEO            0x08
 257 #define SIS_VB_OUTPUT_SCART             0x10
 258 #define SIS_VB_OUTPUT_LCD               0x20
 259 #define SIS_VB_OUTPUT_CRT2              0x40
 260 #define SIS_VB_OUTPUT_HIVISION          0x80
 261
 262 #define SIS_VB_OUTPUT_DISABLE   0x20  /* CR31 */
 263 #define SIS_DRIVER_MODE         0x40
 264
 265 #define SIS_VB_COMPOSITE        0x01  /* CR32 */
 266 #define SIS_VB_SVIDEO           0x02
 267 #define SIS_VB_SCART            0x04
 268 #define SIS_VB_LCD              0x08
 269 #define SIS_VB_CRT2             0x10
 270 #define SIS_CRT1                0x20
 271 #define SIS_VB_HIVISION         0x40
 272 #define SIS_VB_YPBPR            0x80
 273 #define SIS_VB_TV               (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \
 274                                 SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR)
 275
 276 #define SIS_EXTERNAL_CHIP_MASK                  0x0E  /* CR37 (< SiS 660) */
 277 #define SIS_EXTERNAL_CHIP_SIS301                0x01  /* in CR37 << 1 ! */
 278 #define SIS_EXTERNAL_CHIP_LVDS                  0x02
 279 #define SIS_EXTERNAL_CHIP_TRUMPION              0x03
 280 #define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL         0x04
 281 #define SIS_EXTERNAL_CHIP_CHRONTEL              0x05
 282 #define SIS310_EXTERNAL_CHIP_LVDS               0x02
 283 #define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL      0x03
 284
 285 #define SIS_AGP_2X              0x20  /* CR48 */
 286
 287 /* vbflags, private entries (others in sisfb.h) */
 288 #define VB_CONEXANT             0x00000800      /* 661 series only */
 289 #define VB_TRUMPION             VB_CONEXANT     /* 300 series only */
 290 #define VB_302ELV               0x00004000
 291 #define VB_301                  0x00100000      /* Video bridge type */
 292 #define VB_301B                 0x00200000
 293 #define VB_302B                 0x00400000
 294 #define VB_30xBDH               0x00800000      /* 30xB DH version (w/o LCD support) */
 295 #define VB_LVDS                 0x01000000
 296 #define VB_CHRONTEL             0x02000000
 297 #define VB_301LV                0x04000000
 298 #define VB_302LV                0x08000000
 299 #define VB_301C                 0x10000000
 300
 301 #define VB_SISBRIDGE            (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)
 302 #define VB_VIDEOBRIDGE          (VB_SISBRIDGE | VB_LVDS | VB_CHRONTEL | VB_CONEXANT)
 303
 304 /* vbflags2 (static stuff only!) */
 305 #define VB2_SISUMC              0x00000001
 306 #define VB2_301                 0x00000002      /* Video bridge type */
 307 #define VB2_301B                0x00000004
 308 #define VB2_301C                0x00000008
 309 #define VB2_307T                0x00000010
 310 #define VB2_302B                0x00000800
 311 #define VB2_301LV               0x00001000
 312 #define VB2_302LV               0x00002000
 313 #define VB2_302ELV              0x00004000
 314 #define VB2_307LV               0x00008000
 315 #define VB2_30xBDH              0x08000000      /* 30xB DH version (w/o LCD support) */
 316 #define VB2_CONEXANT            0x10000000
 317 #define VB2_TRUMPION            0x20000000
 318 #define VB2_LVDS                0x40000000
 319 #define VB2_CHRONTEL            0x80000000
 320
 321 #define VB2_SISLVDSBRIDGE       (VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
 322 #define VB2_SISTMDSBRIDGE       (VB2_301   | VB2_301B  | VB2_301C   | VB2_302B | VB2_307T)
 323 #define VB2_SISBRIDGE           (VB2_SISLVDSBRIDGE | VB2_SISTMDSBRIDGE)
 324
 325 #define VB2_SISTMDSLCDABRIDGE   (VB2_301C | VB2_307T)
 326 #define VB2_SISLCDABRIDGE       (VB2_SISTMDSLCDABRIDGE | VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
 327
 328 #define VB2_SISHIVISIONBRIDGE   (VB2_301  | VB2_301B | VB2_302B)
 329 #define VB2_SISYPBPRBRIDGE      (VB2_301C | VB2_307T | VB2_SISLVDSBRIDGE)
 330 #define VB2_SISYPBPRARBRIDGE    (VB2_301C | VB2_307T | VB2_307LV)
 331 #define VB2_SISTAP4SCALER       (VB2_301C | VB2_307T | VB2_302ELV | VB2_307LV)
 332 #define VB2_SISTVBRIDGE         (VB2_SISHIVISIONBRIDGE | VB2_SISYPBPRBRIDGE)
 333
 334 #define VB2_SISVGA2BRIDGE       (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
 335
 336 #define VB2_VIDEOBRIDGE         (VB2_SISBRIDGE | VB2_LVDS | VB2_CHRONTEL | VB2_CONEXANT)
 337
 338 #define VB2_30xB                (VB2_301B  | VB2_301C   | VB2_302B  | VB2_307T)
 339 #define VB2_30xBLV              (VB2_30xB  | VB2_SISLVDSBRIDGE)
 340 #define VB2_30xC                (VB2_301C  | VB2_307T)
 341 #define VB2_30xCLV              (VB2_301C  | VB2_307T   | VB2_302ELV| VB2_307LV)
 342 #define VB2_SISEMIBRIDGE        (VB2_302LV | VB2_302ELV | VB2_307LV)
 343 #define VB2_LCD162MHZBRIDGE     (VB2_301C  | VB2_307T)
 344 #define VB2_LCDOVER1280BRIDGE   (VB2_301C  | VB2_307T   | VB2_302LV | VB2_302ELV | VB2_307LV)
 345 #define VB2_LCDOVER1600BRIDGE   (VB2_307T  | VB2_307LV)
 346 #define VB2_RAMDAC202MHZBRIDGE  (VB2_301C  | VB2_307T)
 347
 348 /* I/O port access macros */
 349 #define inSISREG(base)          inb(base)
 350
 351 #define outSISREG(base,val)     outb(val,base)
 352
 353 #define orSISREG(base,val)                              \
 354                 do {                                    \
 355                         u8 __Temp = inSISREG(base);     \
 356                         outSISREG(base, __Temp | (val));\
 357                 } while (0)
 358
 359 #define andSISREG(base,val)                             \
 360                 do {                                    \
 361                         u8 __Temp = inSISREG(base);     \
 362                         outSISREG(base, __Temp & (val));\
 363                 } while (0)
 364
 365 #define inSISIDXREG(base,idx,var)                       \
 366                 do {                                    \
 367                         outSISREG(base, idx);           \
 368                         var = inSISREG((base)+1);       \
 369                 } while (0)
 370
 371 #define outSISIDXREG(base,idx,val)                      \
 372                 do {                                    \
 373                         outSISREG(base, idx);           \
 374                         outSISREG((base)+1, val);       \
 375                 } while (0)
 376
 377 #define orSISIDXREG(base,idx,val)                               \
 378                 do {                                            \
 379                         u8 __Temp;                              \
 380                         outSISREG(base, idx);                   \
 381                         __Temp = inSISREG((base)+1) | (val);    \
 382                         outSISREG((base)+1, __Temp);            \
 383                 } while (0)
 384
 385 #define andSISIDXREG(base,idx,and)                              \
 386                 do {                                            \
 387                         u8 __Temp;                              \
 388                         outSISREG(base, idx);                   \
 389                         __Temp = inSISREG((base)+1) & (and);    \
 390                         outSISREG((base)+1, __Temp);            \
 391                 } while (0)
 392
 393 #define setSISIDXREG(base,idx,and,or)                                   \
 394                 do {                                                    \
 395                         u8 __Temp;                                      \
 396                         outSISREG(base, idx);                           \
 397                         __Temp = (inSISREG((base)+1) & (and)) | (or);   \
 398                         outSISREG((base)+1, __Temp);                    \
 399                 } while (0)
 400
 401 /* MMIO access macros */
 402 #define MMIO_IN8(base, offset)  readb((base+offset))
 403 #define MMIO_IN16(base, offset) readw((base+offset))
 404 #define MMIO_IN32(base, offset) readl((base+offset))
 405
 406 #define MMIO_OUT8(base, offset, val)  writeb(((u8)(val)), (base+offset))
 407 #define MMIO_OUT16(base, offset, val) writew(((u16)(val)), (base+offset))
 408 #define MMIO_OUT32(base, offset, val) writel(((u32)(val)), (base+offset))
 409
 410 /* Queue control MMIO registers */
 411 #define Q_BASE_ADDR             0x85C0  /* Base address of software queue */
 412 #define Q_WRITE_PTR             0x85C4  /* Current write pointer */
 413 #define Q_READ_PTR              0x85C8  /* Current read pointer */
 414 #define Q_STATUS                0x85CC  /* queue status */
 415
 416 #define MMIO_QUEUE_PHYBASE      Q_BASE_ADDR
 417 #define MMIO_QUEUE_WRITEPORT    Q_WRITE_PTR
 418 #define MMIO_QUEUE_READPORT     Q_READ_PTR
 419
 420 #ifndef FB_BLANK_UNBLANK
 421 #define FB_BLANK_UNBLANK        0
 422 #endif
 423 #ifndef FB_BLANK_NORMAL
 424 #define FB_BLANK_NORMAL         1
 425 #endif
 426 #ifndef FB_BLANK_VSYNC_SUSPEND
 427 #define FB_BLANK_VSYNC_SUSPEND  2
 428 #endif
 429 #ifndef FB_BLANK_HSYNC_SUSPEND
 430 #define FB_BLANK_HSYNC_SUSPEND  3
 431 #endif
 432 #ifndef FB_BLANK_POWERDOWN
 433 #define FB_BLANK_POWERDOWN      4
 434 #endif
 435
 436 enum _SIS_LCD_TYPE {
 437     LCD_INVALID = 0,
 438     LCD_800x600,
 439     LCD_1024x768,
 440     LCD_1280x1024,
 441     LCD_1280x960,
 442     LCD_640x480,
 443     LCD_1600x1200,
 444     LCD_1920x1440,
 445     LCD_2048x1536,
 446     LCD_320x240,        /* FSTN */
 447     LCD_1400x1050,
 448     LCD_1152x864,
 449     LCD_1152x768,
 450     LCD_1280x768,
 451     LCD_1024x600,
 452     LCD_320x240_2,      /* DSTN */
 453     LCD_320x240_3,      /* DSTN */
 454     LCD_848x480,
 455     LCD_1280x800,
 456     LCD_1680x1050,
 457     LCD_1280x720,
 458     LCD_1280x854,
 459     LCD_CUSTOM,
 460     LCD_UNKNOWN
 461 };
 462
 463 enum _SIS_CMDTYPE {
 464     MMIO_CMD = 0,
 465     AGP_CMD_QUEUE,
 466     VM_CMD_QUEUE,
 467 };
 468
 469 struct SIS_OH {
 470         struct SIS_OH *poh_next;
 471         struct SIS_OH *poh_prev;
 472         u32            offset;
 473         u32            size;
 474 };
 475
 476 struct SIS_OHALLOC {
 477         struct SIS_OHALLOC *poha_next;
 478         struct SIS_OH aoh[1];
 479 };
 480
 481 struct SIS_HEAP {
 482         struct SIS_OH   oh_free;
 483         struct SIS_OH   oh_used;
 484         struct SIS_OH   *poh_freelist;
 485         struct SIS_OHALLOC *poha_chain;
 486         u32             max_freesize;
 487         struct sis_video_info *vinfo;
 488 };
 489
 490 /* Our "par" */
 491 struct sis_video_info {
 492         int             cardnumber;
 493         struct fb_info  *memyselfandi;
 494
 495         struct SiS_Private SiS_Pr;
 496
 497         struct sisfb_info sisfbinfo;    /* For ioctl SISFB_GET_INFO */
 498
 499         struct fb_var_screeninfo default_var;
 500
 501 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
 502         struct fb_fix_screeninfo sisfb_fix;
 503         u32             pseudo_palette[17];
 504 #endif
 505
 506 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 507         struct display           sis_disp;
 508         struct display_switch    sisfb_sw;
 509         struct {
 510                 u16 red, green, blue, pad;
 511         }               sis_palette[256];
 512         union {
 513 #ifdef FBCON_HAS_CFB16
 514                 u16 cfb16[16];
 515 #endif
 516 #ifdef FBCON_HAS_CFB32
 517                 u32 cfb32[16];
 518 #endif
 519         }               sis_fbcon_cmap;
 520 #endif
 521
 522         struct sisfb_monitor {
 523                 u16 hmin;
 524                 u16 hmax;
 525                 u16 vmin;
 526                 u16 vmax;
 527                 u32 dclockmax;
 528                 u8  feature;
 529                 bool datavalid;
 530         }               sisfb_thismonitor;
 531
 532         unsigned short  chip_id;        /* PCI ID of chip */
 533         unsigned short  chip_vendor;    /* PCI ID of vendor */
 534         char            myid[40];
 535
 536         struct pci_dev  *nbridge;
 537         struct pci_dev  *lpcdev;
 538
 539         int             mni;    /* Mode number index */
 540
 541 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 542         int             currcon;
 543 #endif
 544
 545         unsigned long   video_size;
 546         unsigned long   video_base;
 547         unsigned long   mmio_size;
 548         unsigned long   mmio_base;
 549         unsigned long   vga_base;
 550
 551         unsigned long   video_offset;
 552
 553         unsigned long   UMAsize, LFBsize;
 554
 555         SIS_IOTYPE1     *video_vbase;
 556         SIS_IOTYPE1     *mmio_vbase;
 557
 558         unsigned char   *bios_abase;
 559
 560         int             mtrr;
 561
 562         u32             sisfb_mem;
 563
 564         u32             sisfb_parm_mem;
 565         int             sisfb_accel;
 566         int             sisfb_ypan;
 567         int             sisfb_max;
 568         int             sisfb_userom;
 569         int             sisfb_useoem;
 570         int             sisfb_mode_idx;
 571         int             sisfb_parm_rate;
 572         int             sisfb_crt1off;
 573         int             sisfb_forcecrt1;
 574         int             sisfb_crt2type;
 575         int             sisfb_crt2flags;
 576         int             sisfb_dstn;
 577         int             sisfb_fstn;
 578         int             sisfb_tvplug;
 579         int             sisfb_tvstd;
 580         int             sisfb_nocrt2rate;
 581 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 582         int             sisfb_inverse;
 583 #endif
 584
 585         u32             heapstart;              /* offset  */
 586         SIS_IOTYPE1     *sisfb_heap_start;      /* address */
 587         SIS_IOTYPE1     *sisfb_heap_end;        /* address */
 588         u32             sisfb_heap_size;
 589         int             havenoheap;
 590
 591         struct SIS_HEAP sisfb_heap;             /* This card's vram heap */
 592
 593         int             video_bpp;
 594         int             video_cmap_len;
 595         int             video_width;
 596         int             video_height;
 597         unsigned int    refresh_rate;
 598
 599         unsigned int    chip;
 600         u8              revision_id;
 601         int             sisvga_enabled;         /* PCI device was enabled */
 602
 603         int             video_linelength;       /* real pitch */
 604         int             scrnpitchCRT1;          /* pitch regarding interlace */
 605
 606         u16             DstColor;               /* For 2d acceleration */
 607         u32             SiS310_AccelDepth;
 608         u32             CommandReg;
 609         int             cmdqueuelength;         /* Current (for accel) */
 610         u32             cmdQueueSize;           /* Total size in KB */
 611
 612         spinlock_t      lockaccel;              /* Do not use outside of kernel! */
 613
 614         unsigned int    pcibus;
 615         unsigned int    pcislot;
 616         unsigned int    pcifunc;
 617
 618         int             accel;
 619         int             engineok;
 620
 621         u16             subsysvendor;
 622         u16             subsysdevice;
 623
 624         u32             vbflags;                /* Replacing deprecated stuff from above */
 625         u32             currentvbflags;
 626         u32             vbflags2;
 627
 628         int             lcdxres, lcdyres;
 629         int             lcddefmodeidx, tvdefmodeidx, defmodeidx;
 630         u32             CRT2LCDType;            /* defined in "SIS_LCD_TYPE" */
 631         u32             curFSTN, curDSTN;
 632
 633         int             current_bpp;
 634         int             current_width;
 635         int             current_height;
 636         int             current_htotal;
 637         int             current_vtotal;
 638         int             current_linelength;
 639         __u32           current_pixclock;
 640         int             current_refresh_rate;
 641
 642         unsigned int    current_base;
 643
 644         u8              mode_no;
 645         u8              rate_idx;
 646         int             modechanged;
 647         unsigned char   modeprechange;
 648
 649 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
 650         u8              sisfb_lastrates[128];
 651 #endif
 652
 653         int             newrom;
 654         int             haveXGIROM;
 655         int             registered;
 656         int             warncount;
 657 #ifdef SIS_OLD_CONFIG_COMPAT
 658         int             ioctl32registered;
 659 #endif
 660
 661         int             sisvga_engine;
 662         int             hwcursor_size;
 663         int             CRT2_write_enable;
 664         u8              caps;
 665
 666         u8              detectedpdc;
 667         u8              detectedpdca;
 668         u8              detectedlcda;
 669
 670         SIS_IOTYPE1     *hwcursor_vbase;
 671
 672         int             chronteltype;
 673         int             tvxpos, tvypos;
 674         u8              p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02;
 675         int             tvx, tvy;
 676
 677         u8              sisfblocked;
 678
 679         struct sisfb_info sisfb_infoblock;
 680
 681         struct sisfb_cmd sisfb_command;
 682
 683         u32             sisfb_id;
 684
 685         u8              sisfb_can_post;
 686         u8              sisfb_card_posted;
 687         u8              sisfb_was_boot_device;
 688
 689         struct sis_video_info *next;
 690 };
 691
 692 #endif