2 * IBM Summit-Specific Code
4 * Written By: Matthew Dobson, IBM Corporation
6 * Copyright (c) 2003 IBM Corp.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 * Send feedback to <colpatch@us.ibm.com>
30 #include <linux/init.h>
32 #include <asm/bios_ebda.h>
35 * APIC driver for the IBM "Summit" chipset.
37 #include <linux/threads.h>
38 #include <linux/cpumask.h>
39 #include <asm/mpspec.h>
42 #include <asm/fixmap.h>
43 #include <asm/apicdef.h>
45 #include <linux/kernel.h>
46 #include <linux/string.h>
47 #include <linux/init.h>
48 #include <linux/gfp.h>
49 #include <linux/smp.h>
51 static unsigned summit_get_apic_id(unsigned long x
)
53 return (x
>> 24) & 0xFF;
56 static inline void summit_send_IPI_mask(const struct cpumask
*mask
, int vector
)
58 default_send_IPI_mask_sequence_logical(mask
, vector
);
61 static void summit_send_IPI_allbutself(int vector
)
63 default_send_IPI_mask_allbutself_logical(cpu_online_mask
, vector
);
66 static void summit_send_IPI_all(int vector
)
68 summit_send_IPI_mask(cpu_online_mask
, vector
);
73 extern int use_cyclone
;
75 #ifdef CONFIG_X86_SUMMIT_NUMA
76 static void setup_summit(void);
78 static inline void setup_summit(void) {}
81 static int summit_mps_oem_check(struct mpc_table
*mpc
, char *oem
,
84 if (!strncmp(oem
, "IBM ENSW", 8) &&
85 (!strncmp(productid
, "VIGIL SMP", 9)
86 || !strncmp(productid
, "EXA", 3)
87 || !strncmp(productid
, "RUTHLESS SMP", 12))){
88 mark_tsc_unstable("Summit based system");
89 use_cyclone
= 1; /*enable cyclone-timer*/
96 /* Hook from generic ACPI tables.c */
97 static int summit_acpi_madt_oem_check(char *oem_id
, char *oem_table_id
)
99 if (!strncmp(oem_id
, "IBM", 3) &&
100 (!strncmp(oem_table_id
, "SERVIGIL", 8)
101 || !strncmp(oem_table_id
, "EXA", 3))){
102 mark_tsc_unstable("Summit based system");
103 use_cyclone
= 1; /*enable cyclone-timer*/
110 struct rio_table_hdr
{
111 unsigned char version
; /* Version number of this data structure */
112 /* Version 3 adds chassis_num & WP_index */
113 unsigned char num_scal_dev
; /* # of Scalability devices (Twisters for Vigil) */
114 unsigned char num_rio_dev
; /* # of RIO I/O devices (Cyclones and Winnipegs) */
115 } __attribute__((packed
));
118 unsigned char node_id
; /* Scalability Node ID */
119 unsigned long CBAR
; /* Address of 1MB register space */
120 unsigned char port0node
; /* Node ID port connected to: 0xFF=None */
121 unsigned char port0port
; /* Port num port connected to: 0,1,2, or 0xFF=None */
122 unsigned char port1node
; /* Node ID port connected to: 0xFF = None */
123 unsigned char port1port
; /* Port num port connected to: 0,1,2, or 0xFF=None */
124 unsigned char port2node
; /* Node ID port connected to: 0xFF = None */
125 unsigned char port2port
; /* Port num port connected to: 0,1,2, or 0xFF=None */
126 unsigned char chassis_num
; /* 1 based Chassis number (1 = boot node) */
127 } __attribute__((packed
));
130 unsigned char node_id
; /* RIO Node ID */
131 unsigned long BBAR
; /* Address of 1MB register space */
132 unsigned char type
; /* Type of device */
133 unsigned char owner_id
; /* For WPEG: Node ID of Cyclone that owns this WPEG*/
134 /* For CYC: Node ID of Twister that owns this CYC */
135 unsigned char port0node
; /* Node ID port connected to: 0xFF=None */
136 unsigned char port0port
; /* Port num port connected to: 0,1,2, or 0xFF=None */
137 unsigned char port1node
; /* Node ID port connected to: 0xFF=None */
138 unsigned char port1port
; /* Port num port connected to: 0,1,2, or 0xFF=None */
139 unsigned char first_slot
; /* For WPEG: Lowest slot number below this WPEG */
141 unsigned char status
; /* For WPEG: Bit 0 = 1 : the XAPIC is used */
142 /* = 0 : the XAPIC is not used, ie:*/
143 /* ints fwded to another XAPIC */
144 /* Bits1:7 Reserved */
145 /* For CYC: Bits0:7 Reserved */
146 unsigned char WP_index
; /* For WPEG: WPEG instance index - lower ones have */
147 /* lower slot numbers/PCI bus numbers */
148 /* For CYC: No meaning */
149 unsigned char chassis_num
; /* 1 based Chassis number */
150 /* For LookOut WPEGs this field indicates the */
151 /* Expansion Chassis #, enumerated from Boot */
152 /* Node WPEG external port, then Boot Node CYC */
153 /* external port, then Next Vigil chassis WPEG */
154 /* external port, etc. */
155 /* Shared Lookouts have only 1 chassis number (the */
156 /* first one assigned) */
157 } __attribute__((packed
));
161 CompatTwister
= 0, /* Compatibility Twister */
162 AltTwister
= 1, /* Alternate Twister of internal 8-way */
163 CompatCyclone
= 2, /* Compatibility Cyclone */
164 AltCyclone
= 3, /* Alternate Cyclone of internal 8-way */
165 CompatWPEG
= 4, /* Compatibility WPEG */
166 AltWPEG
= 5, /* Second Planar WPEG */
167 LookOutAWPEG
= 6, /* LookOut WPEG */
168 LookOutBWPEG
= 7, /* LookOut WPEG */
171 static inline int is_WPEG(struct rio_detail
*rio
){
172 return (rio
->type
== CompatWPEG
|| rio
->type
== AltWPEG
||
173 rio
->type
== LookOutAWPEG
|| rio
->type
== LookOutBWPEG
);
176 #define SUMMIT_APIC_DFR_VALUE (APIC_DFR_CLUSTER)
178 static const struct cpumask
*summit_target_cpus(void)
180 /* CPU_MASK_ALL (0xff) has undefined behaviour with
181 * dest_LowestPrio mode logical clustered apic interrupt routing
182 * Just start on cpu 0. IRQ balancing will spread load
184 return cpumask_of(0);
187 static unsigned long summit_check_apicid_used(physid_mask_t bitmap
, int apicid
)
192 /* we don't use the phys_cpu_present_map to indicate apicid presence */
193 static unsigned long summit_check_apicid_present(int bit
)
198 static void summit_init_apic_ldr(void)
200 unsigned long val
, id
;
202 u8 my_id
= (u8
)hard_smp_processor_id();
203 u8 my_cluster
= APIC_CLUSTER(my_id
);
208 /* Create logical APIC IDs by counting CPUs already in cluster. */
209 for (count
= 0, i
= nr_cpu_ids
; --i
>= 0; ) {
210 lid
= cpu_2_logical_apicid
[i
];
211 if (lid
!= BAD_APICID
&& APIC_CLUSTER(lid
) == my_cluster
)
215 /* We only have a 4 wide bitmap in cluster mode. If a deranged
216 * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
217 BUG_ON(count
>= XAPIC_DEST_CPUS_SHIFT
);
218 id
= my_cluster
| (1UL << count
);
219 apic_write(APIC_DFR
, SUMMIT_APIC_DFR_VALUE
);
220 val
= apic_read(APIC_LDR
) & ~APIC_LDR_MASK
;
221 val
|= SET_APIC_LOGICAL_ID(id
);
222 apic_write(APIC_LDR
, val
);
225 static int summit_apic_id_registered(void)
230 static void summit_setup_apic_routing(void)
232 printk("Enabling APIC mode: Summit. Using %d I/O APICs\n",
236 static int summit_apicid_to_node(int logical_apicid
)
239 return apicid_2_node
[hard_smp_processor_id()];
245 /* Mapping from cpu number to logical apicid */
246 static inline int summit_cpu_to_logical_apicid(int cpu
)
249 if (cpu
>= nr_cpu_ids
)
251 return cpu_2_logical_apicid
[cpu
];
253 return logical_smp_processor_id();
257 static int summit_cpu_present_to_apicid(int mps_cpu
)
259 if (mps_cpu
< nr_cpu_ids
)
260 return (int)per_cpu(x86_bios_cpu_apicid
, mps_cpu
);
265 static physid_mask_t
summit_ioapic_phys_id_map(physid_mask_t phys_id_map
)
267 /* For clustered we don't have a good way to do this yet - hack */
268 return physids_promote(0x0F);
271 static physid_mask_t
summit_apicid_to_cpu_present(int apicid
)
273 return physid_mask_of_physid(0);
276 static int summit_check_phys_apicid_present(int boot_cpu_physical_apicid
)
281 static unsigned int summit_cpu_mask_to_apicid(const struct cpumask
*cpumask
)
283 unsigned int round
= 0;
287 * The cpus in the mask must all be on the apic cluster.
289 for_each_cpu(cpu
, cpumask
) {
290 int new_apicid
= summit_cpu_to_logical_apicid(cpu
);
292 if (round
&& APIC_CLUSTER(apicid
) != APIC_CLUSTER(new_apicid
)) {
293 printk("%s: Not a valid mask!\n", __func__
);
296 apicid
|= new_apicid
;
302 static unsigned int summit_cpu_mask_to_apicid_and(const struct cpumask
*inmask
,
303 const struct cpumask
*andmask
)
305 int apicid
= summit_cpu_to_logical_apicid(0);
306 cpumask_var_t cpumask
;
308 if (!alloc_cpumask_var(&cpumask
, GFP_ATOMIC
))
311 cpumask_and(cpumask
, inmask
, andmask
);
312 cpumask_and(cpumask
, cpumask
, cpu_online_mask
);
313 apicid
= summit_cpu_mask_to_apicid(cpumask
);
315 free_cpumask_var(cpumask
);
321 * cpuid returns the value latched in the HW at reset, not the APIC ID
322 * register's value. For any box whose BIOS changes APIC IDs, like
323 * clustered APIC systems, we must use hard_smp_processor_id.
325 * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
327 static int summit_phys_pkg_id(int cpuid_apic
, int index_msb
)
329 return hard_smp_processor_id() >> index_msb
;
332 static int probe_summit(void)
334 /* probed later in mptable/ACPI hooks */
338 static void summit_vector_allocation_domain(int cpu
, struct cpumask
*retmask
)
340 /* Careful. Some cpus do not strictly honor the set of cpus
341 * specified in the interrupt destination when using lowest
342 * priority interrupt delivery mode.
344 * In particular there was a hyperthreading cpu observed to
345 * deliver interrupts to the wrong hyperthread when only one
346 * hyperthread was specified in the interrupt desitination.
348 cpumask_clear(retmask
);
349 cpumask_bits(retmask
)[0] = APIC_ALL_CPUS
;
352 #ifdef CONFIG_X86_SUMMIT_NUMA
353 static struct rio_table_hdr
*rio_table_hdr
;
354 static struct scal_detail
*scal_devs
[MAX_NUMNODES
];
355 static struct rio_detail
*rio_devs
[MAX_NUMNODES
*4];
357 #ifndef CONFIG_X86_NUMAQ
358 static int mp_bus_id_to_node
[MAX_MP_BUSSES
];
361 static int setup_pci_node_map_for_wpeg(int wpeg_num
, int last_bus
)
363 int twister
= 0, node
= 0;
364 int i
, bus
, num_buses
;
366 for (i
= 0; i
< rio_table_hdr
->num_rio_dev
; i
++) {
367 if (rio_devs
[i
]->node_id
== rio_devs
[wpeg_num
]->owner_id
) {
368 twister
= rio_devs
[i
]->owner_id
;
372 if (i
== rio_table_hdr
->num_rio_dev
) {
373 printk(KERN_ERR
"%s: Couldn't find owner Cyclone for Winnipeg!\n", __func__
);
377 for (i
= 0; i
< rio_table_hdr
->num_scal_dev
; i
++) {
378 if (scal_devs
[i
]->node_id
== twister
) {
379 node
= scal_devs
[i
]->node_id
;
383 if (i
== rio_table_hdr
->num_scal_dev
) {
384 printk(KERN_ERR
"%s: Couldn't find owner Twister for Cyclone!\n", __func__
);
388 switch (rio_devs
[wpeg_num
]->type
) {
391 * The Compatibility Winnipeg controls the 2 legacy buses,
392 * the 66MHz PCI bus [2 slots] and the 2 "extra" buses in case
393 * a PCI-PCI bridge card is used in either slot: total 5 buses.
399 * The Alternate Winnipeg controls the 2 133MHz buses [1 slot
400 * each], their 2 "extra" buses, the 100MHz bus [2 slots] and
401 * the "extra" buses for each of those slots: total 7 buses.
408 * A Lookout Winnipeg controls 3 100MHz buses [2 slots each]
409 * & the "extra" buses for each of those slots: total 9 buses.
414 printk(KERN_INFO
"%s: Unsupported Winnipeg type!\n", __func__
);
418 for (bus
= last_bus
; bus
< last_bus
+ num_buses
; bus
++)
419 mp_bus_id_to_node
[bus
] = node
;
423 static int build_detail_arrays(void)
426 int i
, scal_detail_size
, rio_detail_size
;
428 if (rio_table_hdr
->num_scal_dev
> MAX_NUMNODES
) {
429 printk(KERN_WARNING
"%s: MAX_NUMNODES too low! Defined as %d, but system has %d nodes.\n", __func__
, MAX_NUMNODES
, rio_table_hdr
->num_scal_dev
);
433 switch (rio_table_hdr
->version
) {
435 printk(KERN_WARNING
"%s: Invalid Rio Grande Table Version: %d\n", __func__
, rio_table_hdr
->version
);
438 scal_detail_size
= 11;
439 rio_detail_size
= 13;
442 scal_detail_size
= 12;
443 rio_detail_size
= 15;
447 ptr
= (unsigned long)rio_table_hdr
+ 3;
448 for (i
= 0; i
< rio_table_hdr
->num_scal_dev
; i
++, ptr
+= scal_detail_size
)
449 scal_devs
[i
] = (struct scal_detail
*)ptr
;
451 for (i
= 0; i
< rio_table_hdr
->num_rio_dev
; i
++, ptr
+= rio_detail_size
)
452 rio_devs
[i
] = (struct rio_detail
*)ptr
;
457 void setup_summit(void)
460 unsigned short offset
;
461 int i
, next_wpeg
, next_bus
= 0;
463 /* The pointer to the EBDA is stored in the word @ phys 0x40E(40:0E) */
464 ptr
= get_bios_ebda();
465 ptr
= (unsigned long)phys_to_virt(ptr
);
467 rio_table_hdr
= NULL
;
470 /* The block id is stored in the 2nd word */
471 if (*((unsigned short *)(ptr
+ offset
+ 2)) == 0x4752) {
472 /* set the pointer past the offset & block id */
473 rio_table_hdr
= (struct rio_table_hdr
*)(ptr
+ offset
+ 4);
476 /* The next offset is stored in the 1st word. 0 means no more */
477 offset
= *((unsigned short *)(ptr
+ offset
));
479 if (!rio_table_hdr
) {
480 printk(KERN_ERR
"%s: Unable to locate Rio Grande Table in EBDA - bailing!\n", __func__
);
484 if (!build_detail_arrays())
487 /* The first Winnipeg we're looking for has an index of 0 */
490 for (i
= 0; i
< rio_table_hdr
->num_rio_dev
; i
++) {
491 if (is_WPEG(rio_devs
[i
]) && rio_devs
[i
]->WP_index
== next_wpeg
) {
492 /* It's the Winnipeg we're looking for! */
493 next_bus
= setup_pci_node_map_for_wpeg(i
, next_bus
);
499 * If we go through all Rio devices and don't find one with
500 * the next index, it means we've found all the Winnipegs,
501 * and thus all the PCI buses.
503 if (i
== rio_table_hdr
->num_rio_dev
)
505 } while (next_wpeg
!= 0);
509 struct apic apic_summit
= {
512 .probe
= probe_summit
,
513 .acpi_madt_oem_check
= summit_acpi_madt_oem_check
,
514 .apic_id_registered
= summit_apic_id_registered
,
516 .irq_delivery_mode
= dest_LowestPrio
,
517 /* logical delivery broadcast to all CPUs: */
520 .target_cpus
= summit_target_cpus
,
522 .dest_logical
= APIC_DEST_LOGICAL
,
523 .check_apicid_used
= summit_check_apicid_used
,
524 .check_apicid_present
= summit_check_apicid_present
,
526 .vector_allocation_domain
= summit_vector_allocation_domain
,
527 .init_apic_ldr
= summit_init_apic_ldr
,
529 .ioapic_phys_id_map
= summit_ioapic_phys_id_map
,
530 .setup_apic_routing
= summit_setup_apic_routing
,
531 .multi_timer_check
= NULL
,
532 .apicid_to_node
= summit_apicid_to_node
,
533 .cpu_to_logical_apicid
= summit_cpu_to_logical_apicid
,
534 .cpu_present_to_apicid
= summit_cpu_present_to_apicid
,
535 .apicid_to_cpu_present
= summit_apicid_to_cpu_present
,
536 .setup_portio_remap
= NULL
,
537 .check_phys_apicid_present
= summit_check_phys_apicid_present
,
538 .enable_apic_mode
= NULL
,
539 .phys_pkg_id
= summit_phys_pkg_id
,
540 .mps_oem_check
= summit_mps_oem_check
,
542 .get_apic_id
= summit_get_apic_id
,
544 .apic_id_mask
= 0xFF << 24,
546 .cpu_mask_to_apicid
= summit_cpu_mask_to_apicid
,
547 .cpu_mask_to_apicid_and
= summit_cpu_mask_to_apicid_and
,
549 .send_IPI_mask
= summit_send_IPI_mask
,
550 .send_IPI_mask_allbutself
= NULL
,
551 .send_IPI_allbutself
= summit_send_IPI_allbutself
,
552 .send_IPI_all
= summit_send_IPI_all
,
553 .send_IPI_self
= default_send_IPI_self
,
555 .trampoline_phys_low
= DEFAULT_TRAMPOLINE_PHYS_LOW
,
556 .trampoline_phys_high
= DEFAULT_TRAMPOLINE_PHYS_HIGH
,
558 .wait_for_init_deassert
= default_wait_for_init_deassert
,
560 .smp_callin_clear_local_apic
= NULL
,
561 .inquire_remote_apic
= default_inquire_remote_apic
,
563 .read
= native_apic_mem_read
,
564 .write
= native_apic_mem_write
,
565 .icr_read
= native_apic_icr_read
,
566 .icr_write
= native_apic_icr_write
,
567 .wait_icr_idle
= native_apic_wait_icr_idle
,
568 .safe_wait_icr_idle
= native_safe_apic_wait_icr_idle
,