drivers/edac/amd64_edac_err_types.c

   1 #include "amd64_edac.h"
   2
   3 /*
   4  * See F2x80 for K8 and F2x[1,0]80 for Fam10 and later. The table below is only
   5  * for DDR2 DRAM mapping.
   6  */
   7 u32 revf_quad_ddr2_shift[] = {
   8         0,      /* 0000b NULL DIMM (128mb) */
   9         28,     /* 0001b 256mb */
  10         29,     /* 0010b 512mb */
  11         29,     /* 0011b 512mb */
  12         29,     /* 0100b 512mb */
  13         30,     /* 0101b 1gb */
  14         30,     /* 0110b 1gb */
  15         31,     /* 0111b 2gb */
  16         31,     /* 1000b 2gb */
  17         32,     /* 1001b 4gb */
  18         32,     /* 1010b 4gb */
  19         33,     /* 1011b 8gb */
  20         0,      /* 1100b future */
  21         0,      /* 1101b future */
  22         0,      /* 1110b future */
  23         0       /* 1111b future */
  24 };
  25
  26 /*
  27  * Valid scrub rates for the K8 hardware memory scrubber. We map the scrubbing
  28  * bandwidth to a valid bit pattern. The 'set' operation finds the 'matching-
  29  * or higher value'.
  30  *
  31  *FIXME: Produce a better mapping/linearisation.
  32  */
  33
  34 struct scrubrate scrubrates[] = {
  35         { 0x01, 1600000000UL},
  36         { 0x02, 800000000UL},
  37         { 0x03, 400000000UL},
  38         { 0x04, 200000000UL},
  39         { 0x05, 100000000UL},
  40         { 0x06, 50000000UL},
  41         { 0x07, 25000000UL},
  42         { 0x08, 12284069UL},
  43         { 0x09, 6274509UL},
  44         { 0x0A, 3121951UL},
  45         { 0x0B, 1560975UL},
  46         { 0x0C, 781440UL},
  47         { 0x0D, 390720UL},
  48         { 0x0E, 195300UL},
  49         { 0x0F, 97650UL},
  50         { 0x10, 48854UL},
  51         { 0x11, 24427UL},
  52         { 0x12, 12213UL},
  53         { 0x13, 6101UL},
  54         { 0x14, 3051UL},
  55         { 0x15, 1523UL},
  56         { 0x16, 761UL},
  57         { 0x00, 0UL},        /* scrubbing off */
  58 };
  59
  60 /*
  61  * string representation for the different MCA reported error types, see F3x48
  62  * or MSR0000_0411.
  63  */
  64 const char *tt_msgs[] = {        /* transaction type */
  65         "instruction",
  66         "data",
  67         "generic",
  68         "reserved"
  69 };
  70
  71 const char *ll_msgs[] = {       /* cache level */
  72         "L0",
  73         "L1",
  74         "L2",
  75         "L3/generic"
  76 };
  77
  78 const char *rrrr_msgs[] = {
  79         "generic",
  80         "generic read",
  81         "generic write",
  82         "data read",
  83         "data write",
  84         "inst fetch",
  85         "prefetch",
  86         "evict",
  87         "snoop",
  88         "reserved RRRR= 9",
  89         "reserved RRRR= 10",
  90         "reserved RRRR= 11",
  91         "reserved RRRR= 12",
  92         "reserved RRRR= 13",
  93         "reserved RRRR= 14",
  94         "reserved RRRR= 15"
  95 };
  96
  97 const char *pp_msgs[] = {       /* participating processor */
  98         "local node originated (SRC)",
  99         "local node responded to request (RES)",
 100         "local node observed as 3rd party (OBS)",
 101         "generic"
 102 };
 103
 104 const char *to_msgs[] = {
 105         "no timeout",
 106         "timed out"
 107 };
 108
 109 const char *ii_msgs[] = {       /* memory or i/o */
 110         "mem access",
 111         "reserved",
 112         "i/o access",
 113         "generic"
 114 };
 115
 116 /* Map the 5 bits of Extended Error code to the string table. */
 117 const char *ext_msgs[] = {      /* extended error */
 118         "K8 ECC error/F10 reserved",    /* 0_0000b */
 119         "CRC error",                    /* 0_0001b */
 120         "sync error",                   /* 0_0010b */
 121         "mst abort",                    /* 0_0011b */
 122         "tgt abort",                    /* 0_0100b */
 123         "GART error",                   /* 0_0101b */
 124         "RMW error",                    /* 0_0110b */
 125         "Wdog timer error",             /* 0_0111b */
 126         "F10-ECC/K8-Chipkill error",    /* 0_1000b */
 127         "DEV Error",                    /* 0_1001b */
 128         "Link Data error",              /* 0_1010b */
 129         "Link or L3 Protocol error",    /* 0_1011b */
 130         "NB Array error",               /* 0_1100b */
 131         "DRAM Parity error",            /* 0_1101b */
 132         "Link Retry/GART Table Walk/DEV Table Walk error", /* 0_1110b */
 133         "Res 0x0ff error",              /* 0_1111b */
 134         "Res 0x100 error",              /* 1_0000b */
 135         "Res 0x101 error",              /* 1_0001b */
 136         "Res 0x102 error",              /* 1_0010b */
 137         "Res 0x103 error",              /* 1_0011b */
 138         "Res 0x104 error",              /* 1_0100b */
 139         "Res 0x105 error",              /* 1_0101b */
 140         "Res 0x106 error",              /* 1_0110b */
 141         "Res 0x107 error",              /* 1_0111b */
 142         "Res 0x108 error",              /* 1_1000b */
 143         "Res 0x109 error",              /* 1_1001b */
 144         "Res 0x10A error",              /* 1_1010b */
 145         "Res 0x10B error",              /* 1_1011b */
 146         "L3 Cache Data error",          /* 1_1100b */
 147         "L3 CacheTag error",            /* 1_1101b */
 148         "L3 Cache LRU error",           /* 1_1110b */
 149         "Res 0x1FF error"               /* 1_1111b */
 150 };
 151
 152 const char *htlink_msgs[] = {
 153         "none",
 154         "1",
 155         "2",
 156         "1 2",
 157         "3",
 158         "1 3",
 159         "2 3",
 160         "1 2 3"
 161 };