2 * linux/arch/arm/mach-realview/realview_eb.c
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
28 #include <mach/hardware.h>
31 #include <asm/mach-types.h>
32 #include <asm/hardware/gic.h>
33 #include <asm/hardware/icst307.h>
34 #include <asm/hardware/cache-l2x0.h>
35 #include <asm/localtimer.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/map.h>
39 #include <asm/mach/mmc.h>
40 #include <asm/mach/time.h>
42 #include <mach/board-eb.h>
43 #include <mach/irqs.h>
48 static struct map_desc realview_eb_io_desc
[] __initdata
= {
50 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE
),
51 .pfn
= __phys_to_pfn(REALVIEW_SYS_BASE
),
55 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE
),
56 .pfn
= __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE
),
60 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE
),
61 .pfn
= __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE
),
65 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE
),
66 .pfn
= __phys_to_pfn(REALVIEW_SCTL_BASE
),
70 .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE
),
71 .pfn
= __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE
),
75 .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE
),
76 .pfn
= __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE
),
80 #ifdef CONFIG_DEBUG_LL
82 .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE
),
83 .pfn
= __phys_to_pfn(REALVIEW_EB_UART0_BASE
),
90 static struct map_desc realview_eb11mp_io_desc
[] __initdata
= {
92 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE
),
93 .pfn
= __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE
),
97 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE
),
98 .pfn
= __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE
),
102 .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE
),
103 .pfn
= __phys_to_pfn(REALVIEW_EB11MP_L220_BASE
),
109 static void __init
realview_eb_map_io(void)
111 iotable_init(realview_eb_io_desc
, ARRAY_SIZE(realview_eb_io_desc
));
112 if (core_tile_eb11mp() || core_tile_a9mp())
113 iotable_init(realview_eb11mp_io_desc
, ARRAY_SIZE(realview_eb11mp_io_desc
));
117 * RealView EB AMBA devices
121 * These devices are connected via the core APB bridge
123 #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
124 #define GPIO2_DMA { 0, 0 }
125 #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
126 #define GPIO3_DMA { 0, 0 }
128 #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
129 #define AACI_DMA { 0x80, 0x81 }
130 #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
131 #define MMCI0_DMA { 0x84, 0 }
132 #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
133 #define KMI0_DMA { 0, 0 }
134 #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
135 #define KMI1_DMA { 0, 0 }
138 * These devices are connected directly to the multi-layer AHB switch
140 #define EB_SMC_IRQ { NO_IRQ, NO_IRQ }
141 #define EB_SMC_DMA { 0, 0 }
142 #define MPMC_IRQ { NO_IRQ, NO_IRQ }
143 #define MPMC_DMA { 0, 0 }
144 #define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
145 #define EB_CLCD_DMA { 0, 0 }
146 #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
147 #define DMAC_DMA { 0, 0 }
150 * These devices are connected via the core APB bridge
152 #define SCTL_IRQ { NO_IRQ, NO_IRQ }
153 #define SCTL_DMA { 0, 0 }
154 #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
155 #define EB_WATCHDOG_DMA { 0, 0 }
156 #define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
157 #define EB_GPIO0_DMA { 0, 0 }
158 #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
159 #define GPIO1_DMA { 0, 0 }
160 #define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
161 #define EB_RTC_DMA { 0, 0 }
164 * These devices are connected via the DMA APB bridge
166 #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
167 #define SCI_DMA { 7, 6 }
168 #define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
169 #define EB_UART0_DMA { 15, 14 }
170 #define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
171 #define EB_UART1_DMA { 13, 12 }
172 #define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
173 #define EB_UART2_DMA { 11, 10 }
174 #define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
175 #define EB_UART3_DMA { 0x86, 0x87 }
176 #define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
177 #define EB_SSP_DMA { 9, 8 }
179 /* FPGA Primecells */
180 AMBA_DEVICE(aaci
, "fpga:04", AACI
, NULL
);
181 AMBA_DEVICE(mmc0
, "fpga:05", MMCI0
, &realview_mmc0_plat_data
);
182 AMBA_DEVICE(kmi0
, "fpga:06", KMI0
, NULL
);
183 AMBA_DEVICE(kmi1
, "fpga:07", KMI1
, NULL
);
184 AMBA_DEVICE(uart3
, "fpga:09", EB_UART3
, NULL
);
186 /* DevChip Primecells */
187 AMBA_DEVICE(smc
, "dev:00", EB_SMC
, NULL
);
188 AMBA_DEVICE(clcd
, "dev:20", EB_CLCD
, &clcd_plat_data
);
189 AMBA_DEVICE(dmac
, "dev:30", DMAC
, NULL
);
190 AMBA_DEVICE(sctl
, "dev:e0", SCTL
, NULL
);
191 AMBA_DEVICE(wdog
, "dev:e1", EB_WATCHDOG
, NULL
);
192 AMBA_DEVICE(gpio0
, "dev:e4", EB_GPIO0
, NULL
);
193 AMBA_DEVICE(gpio1
, "dev:e5", GPIO1
, NULL
);
194 AMBA_DEVICE(gpio2
, "dev:e6", GPIO2
, NULL
);
195 AMBA_DEVICE(rtc
, "dev:e8", EB_RTC
, NULL
);
196 AMBA_DEVICE(sci0
, "dev:f0", SCI
, NULL
);
197 AMBA_DEVICE(uart0
, "dev:f1", EB_UART0
, NULL
);
198 AMBA_DEVICE(uart1
, "dev:f2", EB_UART1
, NULL
);
199 AMBA_DEVICE(uart2
, "dev:f3", EB_UART2
, NULL
);
200 AMBA_DEVICE(ssp0
, "dev:f4", EB_SSP
, NULL
);
202 static struct amba_device
*amba_devs
[] __initdata
= {
225 * RealView EB platform devices
227 static struct resource realview_eb_flash_resource
= {
228 .start
= REALVIEW_EB_FLASH_BASE
,
229 .end
= REALVIEW_EB_FLASH_BASE
+ REALVIEW_EB_FLASH_SIZE
- 1,
230 .flags
= IORESOURCE_MEM
,
233 static struct resource realview_eb_eth_resources
[] = {
235 .start
= REALVIEW_EB_ETH_BASE
,
236 .end
= REALVIEW_EB_ETH_BASE
+ SZ_64K
- 1,
237 .flags
= IORESOURCE_MEM
,
242 .flags
= IORESOURCE_IRQ
,
247 * Detect and register the correct Ethernet device. RealView/EB rev D
248 * platforms use the newer SMSC LAN9118 Ethernet chip
250 static int eth_device_register(void)
252 void __iomem
*eth_addr
= ioremap(REALVIEW_EB_ETH_BASE
, SZ_4K
);
253 const char *name
= NULL
;
259 idrev
= readl(eth_addr
+ 0x50);
260 if ((idrev
& 0xFFFF0000) != 0x01180000)
261 /* SMSC LAN9118 not present, use LAN91C111 instead */
265 return realview_eth_register(name
, realview_eb_eth_resources
);
268 static struct resource realview_eb_isp1761_resources
[] = {
270 .start
= REALVIEW_EB_USB_BASE
,
271 .end
= REALVIEW_EB_USB_BASE
+ SZ_128K
- 1,
272 .flags
= IORESOURCE_MEM
,
277 .flags
= IORESOURCE_IRQ
,
281 static void __init
gic_init_irq(void)
283 if (core_tile_eb11mp() || core_tile_a9mp()) {
284 unsigned int pldctrl
;
287 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK
));
288 pldctrl
= readl(__io_address(REALVIEW_SYS_BASE
) + REALVIEW_EB11MP_SYS_PLD_CTRL1
);
289 pldctrl
|= 0x00800000;
290 writel(pldctrl
, __io_address(REALVIEW_SYS_BASE
) + REALVIEW_EB11MP_SYS_PLD_CTRL1
);
291 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK
));
293 /* core tile GIC, primary */
294 gic_cpu_base_addr
= __io_address(REALVIEW_EB11MP_GIC_CPU_BASE
);
295 gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE
), 29);
296 gic_cpu_init(0, gic_cpu_base_addr
);
298 #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
299 /* board GIC, secondary */
300 gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE
), 64);
301 gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE
));
302 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1
);
305 /* board GIC, primary */
306 gic_cpu_base_addr
= __io_address(REALVIEW_EB_GIC_CPU_BASE
);
307 gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE
), 29);
308 gic_cpu_init(0, gic_cpu_base_addr
);
313 * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
315 static void realview_eb11mp_fixup(void)
318 dmac_device
.irq
[0] = IRQ_EB11MP_DMA
;
319 uart0_device
.irq
[0] = IRQ_EB11MP_UART0
;
320 uart1_device
.irq
[0] = IRQ_EB11MP_UART1
;
321 uart2_device
.irq
[0] = IRQ_EB11MP_UART2
;
322 uart3_device
.irq
[0] = IRQ_EB11MP_UART3
;
323 clcd_device
.irq
[0] = IRQ_EB11MP_CLCD
;
324 wdog_device
.irq
[0] = IRQ_EB11MP_WDOG
;
325 gpio0_device
.irq
[0] = IRQ_EB11MP_GPIO0
;
326 gpio1_device
.irq
[0] = IRQ_EB11MP_GPIO1
;
327 gpio2_device
.irq
[0] = IRQ_EB11MP_GPIO2
;
328 rtc_device
.irq
[0] = IRQ_EB11MP_RTC
;
329 sci0_device
.irq
[0] = IRQ_EB11MP_SCI
;
330 ssp0_device
.irq
[0] = IRQ_EB11MP_SSP
;
331 aaci_device
.irq
[0] = IRQ_EB11MP_AACI
;
332 mmc0_device
.irq
[0] = IRQ_EB11MP_MMCI0A
;
333 mmc0_device
.irq
[1] = IRQ_EB11MP_MMCI0B
;
334 kmi0_device
.irq
[0] = IRQ_EB11MP_KMI0
;
335 kmi1_device
.irq
[0] = IRQ_EB11MP_KMI1
;
337 /* platform devices */
338 realview_eb_eth_resources
[1].start
= IRQ_EB11MP_ETH
;
339 realview_eb_eth_resources
[1].end
= IRQ_EB11MP_ETH
;
340 realview_eb_isp1761_resources
[1].start
= IRQ_EB11MP_USB
;
341 realview_eb_isp1761_resources
[1].end
= IRQ_EB11MP_USB
;
344 static void __init
realview_eb_timer_init(void)
346 unsigned int timer_irq
;
348 timer0_va_base
= __io_address(REALVIEW_EB_TIMER0_1_BASE
);
349 timer1_va_base
= __io_address(REALVIEW_EB_TIMER0_1_BASE
) + 0x20;
350 timer2_va_base
= __io_address(REALVIEW_EB_TIMER2_3_BASE
);
351 timer3_va_base
= __io_address(REALVIEW_EB_TIMER2_3_BASE
) + 0x20;
353 if (core_tile_eb11mp() || core_tile_a9mp()) {
354 #ifdef CONFIG_LOCAL_TIMERS
355 twd_base
= __io_address(REALVIEW_EB11MP_TWD_BASE
);
357 timer_irq
= IRQ_EB11MP_TIMER0_1
;
359 timer_irq
= IRQ_EB_TIMER0_1
;
361 realview_timer_init(timer_irq
);
364 static struct sys_timer realview_eb_timer
= {
365 .init
= realview_eb_timer_init
,
368 static void __init
realview_eb_init(void)
372 if (core_tile_eb11mp() || core_tile_a9mp()) {
373 realview_eb11mp_fixup();
375 #ifdef CONFIG_CACHE_L2X0
376 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
377 * Bits: .... ...0 0111 1001 0000 .... .... .... */
378 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE
), 0x00790000, 0xfe000fff);
382 realview_flash_register(&realview_eb_flash_resource
, 1);
383 platform_device_register(&realview_i2c_device
);
384 eth_device_register();
385 realview_usb_register(realview_eb_isp1761_resources
);
387 for (i
= 0; i
< ARRAY_SIZE(amba_devs
); i
++) {
388 struct amba_device
*d
= amba_devs
[i
];
389 amba_device_register(d
, &iomem_resource
);
393 leds_event
= realview_leds_event
;
397 MACHINE_START(REALVIEW_EB
, "ARM-RealView EB")
398 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
399 .phys_io
= REALVIEW_EB_UART0_BASE
,
400 .io_pg_offst
= (IO_ADDRESS(REALVIEW_EB_UART0_BASE
) >> 18) & 0xfffc,
401 .boot_params
= PHYS_OFFSET
+ 0x00000100,
402 .map_io
= realview_eb_map_io
,
403 .init_irq
= gic_init_irq
,
404 .timer
= &realview_eb_timer
,
405 .init_machine
= realview_eb_init
,