arch/arm/mach-realview/platsmp.c

   1 /*
   2  *  linux/arch/arm/mach-realview/platsmp.c
   3  *
   4  *  Copyright (C) 2002 ARM Ltd.
   5  *  All Rights Reserved
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #include <linux/init.h>
  12 #include <linux/errno.h>
  13 #include <linux/delay.h>
  14 #include <linux/device.h>
  15 #include <linux/jiffies.h>
  16 #include <linux/smp.h>
  17 #include <linux/io.h>
  18
  19 #include <asm/cacheflush.h>
  20 #include <mach/hardware.h>
  21 #include <asm/mach-types.h>
  22 #include <asm/localtimer.h>
  23
  24 #include <mach/board-eb.h>
  25 #include <mach/board-pb11mp.h>
  26 #include <mach/board-pbx.h>
  27 #include <asm/smp_scu.h>
  28
  29 #include "core.h"
  30
  31 extern void realview_secondary_startup(void);
  32
  33 /*
  34  * control for which core is the next to come out of the secondary
  35  * boot "holding pen"
  36  */
  37 volatile int __cpuinitdata pen_release = -1;
  38
  39 static void __iomem *scu_base_addr(void)
  40 {
  41         if (machine_is_realview_eb_mp())
  42                 return __io_address(REALVIEW_EB11MP_SCU_BASE);
  43         else if (machine_is_realview_pb11mp())
  44                 return __io_address(REALVIEW_TC11MP_SCU_BASE);
  45         else if (machine_is_realview_pbx() &&
  46                  (core_tile_pbx11mp() || core_tile_pbxa9mp()))
  47                 return __io_address(REALVIEW_PBX_TILE_SCU_BASE);
  48         else
  49                 return (void __iomem *)0;
  50 }
  51
  52 static inline unsigned int get_core_count(void)
  53 {
  54         void __iomem *scu_base = scu_base_addr();
  55         if (scu_base)
  56                 return scu_get_core_count(scu_base);
  57         return 1;
  58 }
  59
  60 static DEFINE_SPINLOCK(boot_lock);
  61
  62 void __cpuinit platform_secondary_init(unsigned int cpu)
  63 {
  64         trace_hardirqs_off();
  65
  66         /*
  67          * if any interrupts are already enabled for the primary
  68          * core (e.g. timer irq), then they will not have been enabled
  69          * for us: do so
  70          */
  71         gic_cpu_init(0, gic_cpu_base_addr);
  72
  73         /*
  74          * let the primary processor know we're out of the
  75          * pen, then head off into the C entry point
  76          */
  77         pen_release = -1;
  78         smp_wmb();
  79
  80         /*
  81          * Synchronise with the boot thread.
  82          */
  83         spin_lock(&boot_lock);
  84         spin_unlock(&boot_lock);
  85 }
  86
  87 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
  88 {
  89         unsigned long timeout;
  90
  91         /*
  92          * set synchronisation state between this boot processor
  93          * and the secondary one
  94          */
  95         spin_lock(&boot_lock);
  96
  97         /*
  98          * The secondary processor is waiting to be released from
  99          * the holding pen - release it, then wait for it to flag
 100          * that it has been released by resetting pen_release.
 101          *
 102          * Note that "pen_release" is the hardware CPU ID, whereas
 103          * "cpu" is Linux's internal ID.
 104          */
 105         pen_release = cpu;
 106         flush_cache_all();
 107
 108         /*
 109          * XXX
 110          *
 111          * This is a later addition to the booting protocol: the
 112          * bootMonitor now puts secondary cores into WFI, so
 113          * poke_milo() no longer gets the cores moving; we need
 114          * to send a soft interrupt to wake the secondary core.
 115          * Use smp_cross_call() for this, since there's little
 116          * point duplicating the code here
 117          */
 118         smp_cross_call(cpumask_of(cpu));
 119
 120         timeout = jiffies + (1 * HZ);
 121         while (time_before(jiffies, timeout)) {
 122                 smp_rmb();
 123                 if (pen_release == -1)
 124                         break;
 125
 126                 udelay(10);
 127         }
 128
 129         /*
 130          * now the secondary core is starting up let it run its
 131          * calibrations, then wait for it to finish
 132          */
 133         spin_unlock(&boot_lock);
 134
 135         return pen_release != -1 ? -ENOSYS : 0;
 136 }
 137
 138 static void __init poke_milo(void)
 139 {
 140         extern void secondary_startup(void);
 141
 142         /* nobody is to be released from the pen yet */
 143         pen_release = -1;
 144
 145         /*
 146          * write the address of secondary startup into the system-wide
 147          * flags register, then clear the bottom two bits, which is what
 148          * BootMonitor is waiting for
 149          */
 150 #if 1
 151 #define REALVIEW_SYS_FLAGSS_OFFSET 0x30
 152         __raw_writel(virt_to_phys(realview_secondary_startup),
 153                      __io_address(REALVIEW_SYS_BASE) +
 154                      REALVIEW_SYS_FLAGSS_OFFSET);
 155 #define REALVIEW_SYS_FLAGSC_OFFSET 0x34
 156         __raw_writel(3,
 157                      __io_address(REALVIEW_SYS_BASE) +
 158                      REALVIEW_SYS_FLAGSC_OFFSET);
 159 #endif
 160
 161         mb();
 162 }
 163
 164 /*
 165  * Initialise the CPU possible map early - this describes the CPUs
 166  * which may be present or become present in the system.
 167  */
 168 void __init smp_init_cpus(void)
 169 {
 170         unsigned int i, ncores = get_core_count();
 171
 172         for (i = 0; i < ncores; i++)
 173                 set_cpu_possible(i, true);
 174 }
 175
 176 void __init smp_prepare_cpus(unsigned int max_cpus)
 177 {
 178         unsigned int ncores = get_core_count();
 179         unsigned int cpu = smp_processor_id();
 180         int i;
 181
 182         /* sanity check */
 183         if (ncores == 0) {
 184                 printk(KERN_ERR
 185                        "Realview: strange CM count of 0? Default to 1\n");
 186
 187                 ncores = 1;
 188         }
 189
 190         if (ncores > NR_CPUS) {
 191                 printk(KERN_WARNING
 192                        "Realview: no. of cores (%d) greater than configured "
 193                        "maximum of %d - clipping\n",
 194                        ncores, NR_CPUS);
 195                 ncores = NR_CPUS;
 196         }
 197
 198         smp_store_cpu_info(cpu);
 199
 200         /*
 201          * are we trying to boot more cores than exist?
 202          */
 203         if (max_cpus > ncores)
 204                 max_cpus = ncores;
 205
 206         /*
 207          * Initialise the present map, which describes the set of CPUs
 208          * actually populated at the present time.
 209          */
 210         for (i = 0; i < max_cpus; i++)
 211                 set_cpu_present(i, true);
 212
 213         /*
 214          * Initialise the SCU if there are more than one CPU and let
 215          * them know where to start. Note that, on modern versions of
 216          * MILO, the "poke" doesn't actually do anything until each
 217          * individual core is sent a soft interrupt to get it out of
 218          * WFI
 219          */
 220         if (max_cpus > 1) {
 221                 /*
 222                  * Enable the local timer or broadcast device for the
 223                  * boot CPU, but only if we have more than one CPU.
 224                  */
 225                 percpu_timer_setup();
 226
 227                 scu_enable(scu_base_addr());
 228                 poke_milo();
 229         }
 230 }