[IB] mthca: report asynchronous CQ events
[linux-2.6/verdex.git] / drivers / infiniband / hw / mthca / mthca_dev.h
blobe7e5d3b4f00481bb01a029eb1657d76b73c4eea4
1 /*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005 Cisco Systems. All rights reserved.
5 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
6 * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
16 * conditions are met:
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer.
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * SOFTWARE.
36 * $Id: mthca_dev.h 1349 2004-12-16 21:09:43Z roland $
39 #ifndef MTHCA_DEV_H
40 #define MTHCA_DEV_H
42 #include <linux/spinlock.h>
43 #include <linux/kernel.h>
44 #include <linux/pci.h>
45 #include <linux/dma-mapping.h>
46 #include <asm/semaphore.h>
48 #include "mthca_provider.h"
49 #include "mthca_doorbell.h"
51 #define DRV_NAME "ib_mthca"
52 #define PFX DRV_NAME ": "
53 #define DRV_VERSION "0.06"
54 #define DRV_RELDATE "June 23, 2005"
56 enum {
57 MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
58 MTHCA_FLAG_SRQ = 1 << 2,
59 MTHCA_FLAG_MSI = 1 << 3,
60 MTHCA_FLAG_MSI_X = 1 << 4,
61 MTHCA_FLAG_NO_LAM = 1 << 5,
62 MTHCA_FLAG_FMR = 1 << 6,
63 MTHCA_FLAG_MEMFREE = 1 << 7,
64 MTHCA_FLAG_PCIE = 1 << 8
67 enum {
68 MTHCA_MAX_PORTS = 2
71 enum {
72 MTHCA_BOARD_ID_LEN = 64
75 enum {
76 MTHCA_EQ_CONTEXT_SIZE = 0x40,
77 MTHCA_CQ_CONTEXT_SIZE = 0x40,
78 MTHCA_QP_CONTEXT_SIZE = 0x200,
79 MTHCA_RDB_ENTRY_SIZE = 0x20,
80 MTHCA_AV_SIZE = 0x20,
81 MTHCA_MGM_ENTRY_SIZE = 0x40,
83 /* Arbel FW gives us these, but we need them for Tavor */
84 MTHCA_MPT_ENTRY_SIZE = 0x40,
85 MTHCA_MTT_SEG_SIZE = 0x40,
87 MTHCA_QP_PER_MGM = 4 * (MTHCA_MGM_ENTRY_SIZE / 16 - 2)
90 enum {
91 MTHCA_EQ_CMD,
92 MTHCA_EQ_ASYNC,
93 MTHCA_EQ_COMP,
94 MTHCA_NUM_EQ
97 enum {
98 MTHCA_OPCODE_NOP = 0x00,
99 MTHCA_OPCODE_RDMA_WRITE = 0x08,
100 MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09,
101 MTHCA_OPCODE_SEND = 0x0a,
102 MTHCA_OPCODE_SEND_IMM = 0x0b,
103 MTHCA_OPCODE_RDMA_READ = 0x10,
104 MTHCA_OPCODE_ATOMIC_CS = 0x11,
105 MTHCA_OPCODE_ATOMIC_FA = 0x12,
106 MTHCA_OPCODE_BIND_MW = 0x18,
107 MTHCA_OPCODE_INVALID = 0xff
110 struct mthca_cmd {
111 struct pci_pool *pool;
112 int use_events;
113 struct semaphore hcr_sem;
114 struct semaphore poll_sem;
115 struct semaphore event_sem;
116 int max_cmds;
117 spinlock_t context_lock;
118 int free_head;
119 struct mthca_cmd_context *context;
120 u16 token_mask;
123 struct mthca_limits {
124 int num_ports;
125 int vl_cap;
126 int mtu_cap;
127 int gid_table_len;
128 int pkey_table_len;
129 int local_ca_ack_delay;
130 int num_uars;
131 int max_sg;
132 int num_qps;
133 int max_wqes;
134 int max_qp_init_rdma;
135 int reserved_qps;
136 int num_srqs;
137 int max_srq_wqes;
138 int reserved_srqs;
139 int num_eecs;
140 int reserved_eecs;
141 int num_cqs;
142 int max_cqes;
143 int reserved_cqs;
144 int num_eqs;
145 int reserved_eqs;
146 int num_mpts;
147 int num_mtt_segs;
148 int fmr_reserved_mtts;
149 int reserved_mtts;
150 int reserved_mrws;
151 int reserved_uars;
152 int num_mgms;
153 int num_amgms;
154 int reserved_mcgs;
155 int num_pds;
156 int reserved_pds;
157 u32 flags;
158 u8 port_width_cap;
161 struct mthca_alloc {
162 u32 last;
163 u32 top;
164 u32 max;
165 u32 mask;
166 spinlock_t lock;
167 unsigned long *table;
170 struct mthca_array {
171 struct {
172 void **page;
173 int used;
174 } *page_list;
177 struct mthca_uar_table {
178 struct mthca_alloc alloc;
179 u64 uarc_base;
180 int uarc_size;
183 struct mthca_pd_table {
184 struct mthca_alloc alloc;
187 struct mthca_buddy {
188 unsigned long **bits;
189 int max_order;
190 spinlock_t lock;
193 struct mthca_mr_table {
194 struct mthca_alloc mpt_alloc;
195 struct mthca_buddy mtt_buddy;
196 struct mthca_buddy *fmr_mtt_buddy;
197 u64 mtt_base;
198 u64 mpt_base;
199 struct mthca_icm_table *mtt_table;
200 struct mthca_icm_table *mpt_table;
201 struct {
202 void __iomem *mpt_base;
203 void __iomem *mtt_base;
204 struct mthca_buddy mtt_buddy;
205 } tavor_fmr;
208 struct mthca_eq_table {
209 struct mthca_alloc alloc;
210 void __iomem *clr_int;
211 u32 clr_mask;
212 u32 arm_mask;
213 struct mthca_eq eq[MTHCA_NUM_EQ];
214 u64 icm_virt;
215 struct page *icm_page;
216 dma_addr_t icm_dma;
217 int have_irq;
218 u8 inta_pin;
221 struct mthca_cq_table {
222 struct mthca_alloc alloc;
223 spinlock_t lock;
224 struct mthca_array cq;
225 struct mthca_icm_table *table;
228 struct mthca_srq_table {
229 struct mthca_alloc alloc;
230 spinlock_t lock;
231 struct mthca_array srq;
232 struct mthca_icm_table *table;
235 struct mthca_qp_table {
236 struct mthca_alloc alloc;
237 u32 rdb_base;
238 int rdb_shift;
239 int sqp_start;
240 spinlock_t lock;
241 struct mthca_array qp;
242 struct mthca_icm_table *qp_table;
243 struct mthca_icm_table *eqp_table;
244 struct mthca_icm_table *rdb_table;
247 struct mthca_av_table {
248 struct pci_pool *pool;
249 int num_ddr_avs;
250 u64 ddr_av_base;
251 void __iomem *av_map;
252 struct mthca_alloc alloc;
255 struct mthca_mcg_table {
256 struct semaphore sem;
257 struct mthca_alloc alloc;
258 struct mthca_icm_table *table;
261 struct mthca_catas_err {
262 u64 addr;
263 u32 __iomem *map;
264 unsigned long stop;
265 u32 size;
266 struct timer_list timer;
269 struct mthca_dev {
270 struct ib_device ib_dev;
271 struct pci_dev *pdev;
273 int hca_type;
274 unsigned long mthca_flags;
275 unsigned long device_cap_flags;
277 u32 rev_id;
278 char board_id[MTHCA_BOARD_ID_LEN];
280 /* firmware info */
281 u64 fw_ver;
282 union {
283 struct {
284 u64 fw_start;
285 u64 fw_end;
286 } tavor;
287 struct {
288 u64 clr_int_base;
289 u64 eq_arm_base;
290 u64 eq_set_ci_base;
291 struct mthca_icm *fw_icm;
292 struct mthca_icm *aux_icm;
293 u16 fw_pages;
294 } arbel;
295 } fw;
297 u64 ddr_start;
298 u64 ddr_end;
300 MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
301 struct semaphore cap_mask_mutex;
303 void __iomem *hcr;
304 void __iomem *kar;
305 void __iomem *clr_base;
306 union {
307 struct {
308 void __iomem *ecr_base;
309 } tavor;
310 struct {
311 void __iomem *eq_arm;
312 void __iomem *eq_set_ci_base;
313 } arbel;
314 } eq_regs;
316 struct mthca_cmd cmd;
317 struct mthca_limits limits;
319 struct mthca_uar_table uar_table;
320 struct mthca_pd_table pd_table;
321 struct mthca_mr_table mr_table;
322 struct mthca_eq_table eq_table;
323 struct mthca_cq_table cq_table;
324 struct mthca_srq_table srq_table;
325 struct mthca_qp_table qp_table;
326 struct mthca_av_table av_table;
327 struct mthca_mcg_table mcg_table;
329 struct mthca_catas_err catas_err;
331 struct mthca_uar driver_uar;
332 struct mthca_db_table *db_tab;
333 struct mthca_pd driver_pd;
334 struct mthca_mr driver_mr;
336 struct ib_mad_agent *send_agent[MTHCA_MAX_PORTS][2];
337 struct ib_ah *sm_ah[MTHCA_MAX_PORTS];
338 spinlock_t sm_lock;
341 #define mthca_dbg(mdev, format, arg...) \
342 dev_dbg(&mdev->pdev->dev, format, ## arg)
343 #define mthca_err(mdev, format, arg...) \
344 dev_err(&mdev->pdev->dev, format, ## arg)
345 #define mthca_info(mdev, format, arg...) \
346 dev_info(&mdev->pdev->dev, format, ## arg)
347 #define mthca_warn(mdev, format, arg...) \
348 dev_warn(&mdev->pdev->dev, format, ## arg)
350 extern void __buggy_use_of_MTHCA_GET(void);
351 extern void __buggy_use_of_MTHCA_PUT(void);
353 #define MTHCA_GET(dest, source, offset) \
354 do { \
355 void *__p = (char *) (source) + (offset); \
356 switch (sizeof (dest)) { \
357 case 1: (dest) = *(u8 *) __p; break; \
358 case 2: (dest) = be16_to_cpup(__p); break; \
359 case 4: (dest) = be32_to_cpup(__p); break; \
360 case 8: (dest) = be64_to_cpup(__p); break; \
361 default: __buggy_use_of_MTHCA_GET(); \
363 } while (0)
365 #define MTHCA_PUT(dest, source, offset) \
366 do { \
367 void *__d = ((char *) (dest) + (offset)); \
368 switch (sizeof(source)) { \
369 case 1: *(u8 *) __d = (source); break; \
370 case 2: *(__be16 *) __d = cpu_to_be16(source); break; \
371 case 4: *(__be32 *) __d = cpu_to_be32(source); break; \
372 case 8: *(__be64 *) __d = cpu_to_be64(source); break; \
373 default: __buggy_use_of_MTHCA_PUT(); \
375 } while (0)
377 int mthca_reset(struct mthca_dev *mdev);
379 u32 mthca_alloc(struct mthca_alloc *alloc);
380 void mthca_free(struct mthca_alloc *alloc, u32 obj);
381 int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
382 u32 reserved);
383 void mthca_alloc_cleanup(struct mthca_alloc *alloc);
384 void *mthca_array_get(struct mthca_array *array, int index);
385 int mthca_array_set(struct mthca_array *array, int index, void *value);
386 void mthca_array_clear(struct mthca_array *array, int index);
387 int mthca_array_init(struct mthca_array *array, int nent);
388 void mthca_array_cleanup(struct mthca_array *array, int nent);
389 int mthca_buf_alloc(struct mthca_dev *dev, int size, int max_direct,
390 union mthca_buf *buf, int *is_direct, struct mthca_pd *pd,
391 int hca_write, struct mthca_mr *mr);
392 void mthca_buf_free(struct mthca_dev *dev, int size, union mthca_buf *buf,
393 int is_direct, struct mthca_mr *mr);
395 int mthca_init_uar_table(struct mthca_dev *dev);
396 int mthca_init_pd_table(struct mthca_dev *dev);
397 int mthca_init_mr_table(struct mthca_dev *dev);
398 int mthca_init_eq_table(struct mthca_dev *dev);
399 int mthca_init_cq_table(struct mthca_dev *dev);
400 int mthca_init_srq_table(struct mthca_dev *dev);
401 int mthca_init_qp_table(struct mthca_dev *dev);
402 int mthca_init_av_table(struct mthca_dev *dev);
403 int mthca_init_mcg_table(struct mthca_dev *dev);
405 void mthca_cleanup_uar_table(struct mthca_dev *dev);
406 void mthca_cleanup_pd_table(struct mthca_dev *dev);
407 void mthca_cleanup_mr_table(struct mthca_dev *dev);
408 void mthca_cleanup_eq_table(struct mthca_dev *dev);
409 void mthca_cleanup_cq_table(struct mthca_dev *dev);
410 void mthca_cleanup_srq_table(struct mthca_dev *dev);
411 void mthca_cleanup_qp_table(struct mthca_dev *dev);
412 void mthca_cleanup_av_table(struct mthca_dev *dev);
413 void mthca_cleanup_mcg_table(struct mthca_dev *dev);
415 int mthca_register_device(struct mthca_dev *dev);
416 void mthca_unregister_device(struct mthca_dev *dev);
418 void mthca_start_catas_poll(struct mthca_dev *dev);
419 void mthca_stop_catas_poll(struct mthca_dev *dev);
421 int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
422 void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
424 int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd);
425 void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
427 struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size);
428 void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt);
429 int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
430 int start_index, u64 *buffer_list, int list_len);
431 int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
432 u64 iova, u64 total_size, u32 access, struct mthca_mr *mr);
433 int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
434 u32 access, struct mthca_mr *mr);
435 int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
436 u64 *buffer_list, int buffer_size_shift,
437 int list_len, u64 iova, u64 total_size,
438 u32 access, struct mthca_mr *mr);
439 void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr);
441 int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
442 u32 access, struct mthca_fmr *fmr);
443 int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
444 int list_len, u64 iova);
445 void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
446 int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
447 int list_len, u64 iova);
448 void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
449 int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr);
451 int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
452 void mthca_unmap_eq_icm(struct mthca_dev *dev);
454 int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
455 struct ib_wc *entry);
456 int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
457 int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
458 int mthca_init_cq(struct mthca_dev *dev, int nent,
459 struct mthca_ucontext *ctx, u32 pdn,
460 struct mthca_cq *cq);
461 void mthca_free_cq(struct mthca_dev *dev,
462 struct mthca_cq *cq);
463 void mthca_cq_completion(struct mthca_dev *dev, u32 cqn);
464 void mthca_cq_event(struct mthca_dev *dev, u32 cqn,
465 enum ib_event_type event_type);
466 void mthca_cq_clean(struct mthca_dev *dev, u32 cqn, u32 qpn,
467 struct mthca_srq *srq);
469 int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
470 struct ib_srq_attr *attr, struct mthca_srq *srq);
471 void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq);
472 int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
473 enum ib_srq_attr_mask attr_mask);
474 void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
475 enum ib_event_type event_type);
476 void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr);
477 int mthca_tavor_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
478 struct ib_recv_wr **bad_wr);
479 int mthca_arbel_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
480 struct ib_recv_wr **bad_wr);
482 void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
483 enum ib_event_type event_type);
484 int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask);
485 int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
486 struct ib_send_wr **bad_wr);
487 int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
488 struct ib_recv_wr **bad_wr);
489 int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
490 struct ib_send_wr **bad_wr);
491 int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
492 struct ib_recv_wr **bad_wr);
493 int mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
494 int index, int *dbd, __be32 *new_wqe);
495 int mthca_alloc_qp(struct mthca_dev *dev,
496 struct mthca_pd *pd,
497 struct mthca_cq *send_cq,
498 struct mthca_cq *recv_cq,
499 enum ib_qp_type type,
500 enum ib_sig_type send_policy,
501 struct ib_qp_cap *cap,
502 struct mthca_qp *qp);
503 int mthca_alloc_sqp(struct mthca_dev *dev,
504 struct mthca_pd *pd,
505 struct mthca_cq *send_cq,
506 struct mthca_cq *recv_cq,
507 enum ib_sig_type send_policy,
508 struct ib_qp_cap *cap,
509 int qpn,
510 int port,
511 struct mthca_sqp *sqp);
512 void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
513 int mthca_create_ah(struct mthca_dev *dev,
514 struct mthca_pd *pd,
515 struct ib_ah_attr *ah_attr,
516 struct mthca_ah *ah);
517 int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
518 int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
519 struct ib_ud_header *header);
521 int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
522 int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
524 int mthca_process_mad(struct ib_device *ibdev,
525 int mad_flags,
526 u8 port_num,
527 struct ib_wc *in_wc,
528 struct ib_grh *in_grh,
529 struct ib_mad *in_mad,
530 struct ib_mad *out_mad);
531 int mthca_create_agents(struct mthca_dev *dev);
532 void mthca_free_agents(struct mthca_dev *dev);
534 static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
536 return container_of(ibdev, struct mthca_dev, ib_dev);
539 static inline int mthca_is_memfree(struct mthca_dev *dev)
541 return dev->mthca_flags & MTHCA_FLAG_MEMFREE;
544 #endif /* MTHCA_DEV_H */