[PATCH] DVB: lgdt330x frontend: some bug fixes & add lgdt3303 support
[linux-2.6/verdex.git] / drivers / media / dvb / frontends / lgdt330x.c
blob1f1cd7a8d500846c07e8fd4fa49c0d8335cd7443
1 /*
2 * Support for LGDT3302 and LGDT3303 - VSB/QAM
4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * NOTES ABOUT THIS DRIVER
25 * This Linux driver supports:
26 * DViCO FusionHDTV 3 Gold-Q
27 * DViCO FusionHDTV 3 Gold-T
28 * DViCO FusionHDTV 5 Gold
30 * TODO:
31 * signal strength always returns 0.
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/moduleparam.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <asm/byteorder.h>
42 #include "dvb_frontend.h"
43 #include "lgdt330x_priv.h"
44 #include "lgdt330x.h"
46 static int debug = 0;
47 module_param(debug, int, 0644);
48 MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
49 #define dprintk(args...) \
50 do { \
51 if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
52 } while (0)
54 struct lgdt330x_state
56 struct i2c_adapter* i2c;
57 struct dvb_frontend_ops ops;
59 /* Configuration settings */
60 const struct lgdt330x_config* config;
62 struct dvb_frontend frontend;
64 /* Demodulator private data */
65 fe_modulation_t current_modulation;
67 /* Tuner private data */
68 u32 current_frequency;
71 static int i2c_write_demod_bytes (struct lgdt330x_state* state,
72 u8 *buf, /* data bytes to send */
73 int len /* number of bytes to send */ )
75 struct i2c_msg msg =
76 { .addr = state->config->demod_address,
77 .flags = 0,
78 .buf = buf,
79 .len = 2 };
80 int i;
81 int err;
83 for (i=0; i<len-1; i+=2){
84 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
85 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, msg.buf[0], msg.buf[1], err);
86 if (err < 0)
87 return err;
88 else
89 return -EREMOTEIO;
91 msg.buf += 2;
93 return 0;
97 * This routine writes the register (reg) to the demod bus
98 * then reads the data returned for (len) bytes.
101 static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
102 enum I2C_REG reg, u8* buf, int len)
104 u8 wr [] = { reg };
105 struct i2c_msg msg [] = {
106 { .addr = state->config->demod_address,
107 .flags = 0, .buf = wr, .len = 1 },
108 { .addr = state->config->demod_address,
109 .flags = I2C_M_RD, .buf = buf, .len = len },
111 int ret;
112 ret = i2c_transfer(state->i2c, msg, 2);
113 if (ret != 2) {
114 printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __FUNCTION__, state->config->demod_address, reg, ret);
115 } else {
116 ret = 0;
118 return ret;
121 /* Software reset */
122 static int lgdt3302_SwReset(struct lgdt330x_state* state)
124 u8 ret;
125 u8 reset[] = {
126 IRQ_MASK,
127 0x00 /* bit 6 is active low software reset
128 * bits 5-0 are 1 to mask interrupts */
131 ret = i2c_write_demod_bytes(state,
132 reset, sizeof(reset));
133 if (ret == 0) {
135 /* force reset high (inactive) and unmask interrupts */
136 reset[1] = 0x7f;
137 ret = i2c_write_demod_bytes(state,
138 reset, sizeof(reset));
140 return ret;
143 static int lgdt3303_SwReset(struct lgdt330x_state* state)
145 u8 ret;
146 u8 reset[] = {
147 0x02,
148 0x00 /* bit 0 is active low software reset */
151 ret = i2c_write_demod_bytes(state,
152 reset, sizeof(reset));
153 if (ret == 0) {
155 /* force reset high (inactive) */
156 reset[1] = 0x01;
157 ret = i2c_write_demod_bytes(state,
158 reset, sizeof(reset));
160 return ret;
163 static int lgdt330x_SwReset(struct lgdt330x_state* state)
165 switch (state->config->demod_chip) {
166 case LGDT3302:
167 return lgdt3302_SwReset(state);
168 case LGDT3303:
169 return lgdt3303_SwReset(state);
170 default:
171 return -ENODEV;
176 static int lgdt330x_init(struct dvb_frontend* fe)
178 /* Hardware reset is done using gpio[0] of cx23880x chip.
179 * I'd like to do it here, but don't know how to find chip address.
180 * cx88-cards.c arranges for the reset bit to be inactive (high).
181 * Maybe there needs to be a callable function in cx88-core or
182 * the caller of this function needs to do it. */
185 * Array of byte pairs <address, value>
186 * to initialize each different chip
188 static u8 lgdt3302_init_data[] = {
189 /* Use 50MHz parameter values from spec sheet since xtal is 50 */
190 /* Change the value of NCOCTFV[25:0] of carrier
191 recovery center frequency register */
192 VSB_CARRIER_FREQ0, 0x00,
193 VSB_CARRIER_FREQ1, 0x87,
194 VSB_CARRIER_FREQ2, 0x8e,
195 VSB_CARRIER_FREQ3, 0x01,
196 /* Change the TPCLK pin polarity
197 data is valid on falling clock */
198 DEMUX_CONTROL, 0xfb,
199 /* Change the value of IFBW[11:0] of
200 AGC IF/RF loop filter bandwidth register */
201 AGC_RF_BANDWIDTH0, 0x40,
202 AGC_RF_BANDWIDTH1, 0x93,
203 AGC_RF_BANDWIDTH2, 0x00,
204 /* Change the value of bit 6, 'nINAGCBY' and
205 'NSSEL[1:0] of ACG function control register 2 */
206 AGC_FUNC_CTRL2, 0xc6,
207 /* Change the value of bit 6 'RFFIX'
208 of AGC function control register 3 */
209 AGC_FUNC_CTRL3, 0x40,
210 /* Set the value of 'INLVTHD' register 0x2a/0x2c
211 to 0x7fe */
212 AGC_DELAY0, 0x07,
213 AGC_DELAY2, 0xfe,
214 /* Change the value of IAGCBW[15:8]
215 of inner AGC loop filter bandwith */
216 AGC_LOOP_BANDWIDTH0, 0x08,
217 AGC_LOOP_BANDWIDTH1, 0x9a
220 static u8 lgdt3303_init_data[] = {
221 0x4c, 0x14
224 struct lgdt330x_state* state = fe->demodulator_priv;
225 char *chip_name;
226 int err;
228 switch (state->config->demod_chip) {
229 case LGDT3302:
230 chip_name = "LGDT3302";
231 err = i2c_write_demod_bytes(state, lgdt3302_init_data,
232 sizeof(lgdt3302_init_data));
233 break;
234 case LGDT3303:
235 chip_name = "LGDT3303";
236 err = i2c_write_demod_bytes(state, lgdt3303_init_data,
237 sizeof(lgdt3303_init_data));
238 break;
239 default:
240 chip_name = "undefined";
241 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
242 err = -ENODEV;
244 dprintk("%s entered as %s\n", __FUNCTION__, chip_name);
245 if (err < 0)
246 return err;
247 return lgdt330x_SwReset(state);
250 static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
252 *ber = 0; /* Not supplied by the demod chips */
253 return 0;
256 static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
258 struct lgdt330x_state* state = fe->demodulator_priv;
259 int err;
260 u8 buf[2];
262 switch (state->config->demod_chip) {
263 case LGDT3302:
264 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
265 buf, sizeof(buf));
266 break;
267 case LGDT3303:
268 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
269 buf, sizeof(buf));
270 break;
271 default:
272 printk(KERN_WARNING
273 "Only LGDT3302 and LGDT3303 are supported chips.\n");
274 err = -ENODEV;
277 *ucblocks = (buf[0] << 8) | buf[1];
278 return 0;
281 static int lgdt330x_set_parameters(struct dvb_frontend* fe,
282 struct dvb_frontend_parameters *param)
285 * Array of byte pairs <address, value>
286 * to initialize 8VSB for lgdt3303 chip 50 MHz IF
288 static u8 lgdt3303_8vsb_44_data[] = {
289 0x04, 0x00,
290 0x0d, 0x40,
291 0x0e, 0x87,
292 0x0f, 0x8e,
293 0x10, 0x01,
294 0x47, 0x8b };
297 * Array of byte pairs <address, value>
298 * to initialize QAM for lgdt3303 chip
300 static u8 lgdt3303_qam_data[] = {
301 0x04, 0x00,
302 0x0d, 0x00,
303 0x0e, 0x00,
304 0x0f, 0x00,
305 0x10, 0x00,
306 0x51, 0x63,
307 0x47, 0x66,
308 0x48, 0x66,
309 0x4d, 0x1a,
310 0x49, 0x08,
311 0x4a, 0x9b };
313 struct lgdt330x_state* state = fe->demodulator_priv;
315 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
317 int err;
318 /* Change only if we are actually changing the modulation */
319 if (state->current_modulation != param->u.vsb.modulation) {
320 switch(param->u.vsb.modulation) {
321 case VSB_8:
322 dprintk("%s: VSB_8 MODE\n", __FUNCTION__);
324 /* Select VSB mode */
325 top_ctrl_cfg[1] = 0x03;
327 /* Select ANT connector if supported by card */
328 if (state->config->pll_rf_set)
329 state->config->pll_rf_set(fe, 1);
331 if (state->config->demod_chip == LGDT3303) {
332 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
333 sizeof(lgdt3303_8vsb_44_data));
335 break;
337 case QAM_64:
338 dprintk("%s: QAM_64 MODE\n", __FUNCTION__);
340 /* Select QAM_64 mode */
341 top_ctrl_cfg[1] = 0x00;
343 /* Select CABLE connector if supported by card */
344 if (state->config->pll_rf_set)
345 state->config->pll_rf_set(fe, 0);
347 if (state->config->demod_chip == LGDT3303) {
348 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
349 sizeof(lgdt3303_qam_data));
351 break;
353 case QAM_256:
354 dprintk("%s: QAM_256 MODE\n", __FUNCTION__);
356 /* Select QAM_256 mode */
357 top_ctrl_cfg[1] = 0x01;
359 /* Select CABLE connector if supported by card */
360 if (state->config->pll_rf_set)
361 state->config->pll_rf_set(fe, 0);
363 if (state->config->demod_chip == LGDT3303) {
364 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
365 sizeof(lgdt3303_qam_data));
367 break;
368 default:
369 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation);
370 return -1;
373 * select serial or parallel MPEG harware interface
374 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
375 * Parallel: 0x00
377 top_ctrl_cfg[1] |= state->config->serial_mpeg;
379 /* Select the requested mode */
380 i2c_write_demod_bytes(state, top_ctrl_cfg,
381 sizeof(top_ctrl_cfg));
382 state->config->set_ts_params(fe, 0);
383 state->current_modulation = param->u.vsb.modulation;
386 /* Change only if we are actually changing the channel */
387 if (state->current_frequency != param->frequency) {
388 /* Tune to the new frequency */
389 state->config->pll_set(fe, param);
390 /* Keep track of the new frequency */
391 state->current_frequency = param->frequency;
393 lgdt330x_SwReset(state);
394 return 0;
397 static int lgdt330x_get_frontend(struct dvb_frontend* fe,
398 struct dvb_frontend_parameters* param)
400 struct lgdt330x_state *state = fe->demodulator_priv;
401 param->frequency = state->current_frequency;
402 return 0;
405 static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
407 struct lgdt330x_state* state = fe->demodulator_priv;
408 u8 buf[3];
410 *status = 0; /* Reset status result */
412 /* AGC status register */
413 i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
414 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
415 if ((buf[0] & 0x0c) == 0x8){
416 /* Test signal does not exist flag */
417 /* as well as the AGC lock flag. */
418 *status |= FE_HAS_SIGNAL;
419 } else {
420 /* Without a signal all other status bits are meaningless */
421 return 0;
425 * You must set the Mask bits to 1 in the IRQ_MASK in order
426 * to see that status bit in the IRQ_STATUS register.
427 * This is done in SwReset();
429 /* signal status */
430 i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
431 dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]);
434 /* sync status */
435 if ((buf[2] & 0x03) == 0x01) {
436 *status |= FE_HAS_SYNC;
439 /* FEC error status */
440 if ((buf[2] & 0x0c) == 0x08) {
441 *status |= FE_HAS_LOCK;
442 *status |= FE_HAS_VITERBI;
445 /* Carrier Recovery Lock Status Register */
446 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
447 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
448 switch (state->current_modulation) {
449 case QAM_256:
450 case QAM_64:
451 /* Need to undestand why there are 3 lock levels here */
452 if ((buf[0] & 0x07) == 0x07)
453 *status |= FE_HAS_CARRIER;
454 break;
455 case VSB_8:
456 if ((buf[0] & 0x80) == 0x80)
457 *status |= FE_HAS_CARRIER;
458 break;
459 default:
460 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
463 return 0;
466 static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
468 struct lgdt330x_state* state = fe->demodulator_priv;
469 int err;
470 u8 buf[3];
472 *status = 0; /* Reset status result */
474 /* lgdt3303 AGC status register */
475 err = i2c_read_demod_bytes(state, 0x58, buf, 1);
476 if (err < 0)
477 return err;
479 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
480 if ((buf[0] & 0x21) == 0x01){
481 /* Test input signal does not exist flag */
482 /* as well as the AGC lock flag. */
483 *status |= FE_HAS_SIGNAL;
484 } else {
485 /* Without a signal all other status bits are meaningless */
486 return 0;
489 /* Carrier Recovery Lock Status Register */
490 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
491 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
492 switch (state->current_modulation) {
493 case QAM_256:
494 case QAM_64:
495 /* Need to undestand why there are 3 lock levels here */
496 if ((buf[0] & 0x07) == 0x07)
497 *status |= FE_HAS_CARRIER;
498 else
499 break;
500 i2c_read_demod_bytes(state, 0x8a, buf, 1);
501 if ((buf[0] & 0x04) == 0x04)
502 *status |= FE_HAS_SYNC;
503 if ((buf[0] & 0x01) == 0x01)
504 *status |= FE_HAS_LOCK;
505 if ((buf[0] & 0x08) == 0x08)
506 *status |= FE_HAS_VITERBI;
507 break;
508 case VSB_8:
509 if ((buf[0] & 0x80) == 0x80)
510 *status |= FE_HAS_CARRIER;
511 else
512 break;
513 i2c_read_demod_bytes(state, 0x38, buf, 1);
514 if ((buf[0] & 0x02) == 0x00)
515 *status |= FE_HAS_SYNC;
516 if ((buf[0] & 0x01) == 0x01) {
517 *status |= FE_HAS_LOCK;
518 *status |= FE_HAS_VITERBI;
520 break;
521 default:
522 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
524 return 0;
527 static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
529 /* not directly available. */
530 *strength = 0;
531 return 0;
534 static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
536 #ifdef SNR_IN_DB
538 * Spec sheet shows formula for SNR_EQ = 10 log10(25 * 24**2 / noise)
539 * and SNR_PH = 10 log10(25 * 32**2 / noise) for equalizer and phase tracker
540 * respectively. The following tables are built on these formulas.
541 * The usual definition is SNR = 20 log10(signal/noise)
542 * If the specification is wrong the value retuned is 1/2 the actual SNR in db.
544 * This table is a an ordered list of noise values computed by the
545 * formula from the spec sheet such that the index into the table
546 * starting at 43 or 45 is the SNR value in db. There are duplicate noise
547 * value entries at the beginning because the SNR varies more than
548 * 1 db for a change of 1 digit in noise at very small values of noise.
550 * Examples from SNR_EQ table:
551 * noise SNR
552 * 0 43
553 * 1 42
554 * 2 39
555 * 3 37
556 * 4 36
557 * 5 35
558 * 6 34
559 * 7 33
560 * 8 33
561 * 9 32
562 * 10 32
563 * 11 31
564 * 12 31
565 * 13 30
568 static const u32 SNR_EQ[] =
569 { 1, 2, 2, 2, 3, 3, 4, 4, 5, 7,
570 9, 11, 13, 17, 21, 26, 33, 41, 52, 65,
571 81, 102, 129, 162, 204, 257, 323, 406, 511, 644,
572 810, 1020, 1284, 1616, 2035, 2561, 3224, 4059, 5110, 6433,
573 8098, 10195, 12835, 16158, 20341, 25608, 32238, 40585, 51094, 64323,
574 80978, 101945, 128341, 161571, 203406, 256073, 0x40000
577 static const u32 SNR_PH[] =
578 { 1, 2, 2, 2, 3, 3, 4, 5, 6, 8,
579 10, 12, 15, 19, 23, 29, 37, 46, 58, 73,
580 91, 115, 144, 182, 229, 288, 362, 456, 574, 722,
581 909, 1144, 1440, 1813, 2282, 2873, 3617, 4553, 5732, 7216,
582 9084, 11436, 14396, 18124, 22817, 28724, 36161, 45524, 57312, 72151,
583 90833, 114351, 143960, 181235, 228161, 0x080000
586 static u8 buf[5];/* read data buffer */
587 static u32 noise; /* noise value */
588 static u32 snr_db; /* index into SNR_EQ[] */
589 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
591 /* read both equalizer and phase tracker noise data */
592 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
594 if (state->current_modulation == VSB_8) {
595 /* Equalizer Mean-Square Error Register for VSB */
596 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
599 * Look up noise value in table.
600 * A better search algorithm could be used...
601 * watch out there are duplicate entries.
603 for (snr_db = 0; snr_db < sizeof(SNR_EQ); snr_db++) {
604 if (noise < SNR_EQ[snr_db]) {
605 *snr = 43 - snr_db;
606 break;
609 } else {
610 /* Phase Tracker Mean-Square Error Register for QAM */
611 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
613 /* Look up noise value in table. */
614 for (snr_db = 0; snr_db < sizeof(SNR_PH); snr_db++) {
615 if (noise < SNR_PH[snr_db]) {
616 *snr = 45 - snr_db;
617 break;
621 #else
622 /* Return the raw noise value */
623 static u8 buf[5];/* read data buffer */
624 static u32 noise; /* noise value */
625 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
627 /* read both equalizer and pase tracker noise data */
628 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
630 if (state->current_modulation == VSB_8) {
631 /* Phase Tracker Mean-Square Error Register for VSB */
632 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
633 } else {
635 /* Carrier Recovery Mean-Square Error for QAM */
636 i2c_read_demod_bytes(state, 0x1a, buf, 2);
637 noise = ((buf[0] & 3) << 8) | buf[1];
640 /* Small values for noise mean signal is better so invert noise */
641 *snr = ~noise;
642 #endif
644 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
646 return 0;
649 static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
651 /* Return the raw noise value */
652 static u8 buf[5];/* read data buffer */
653 static u32 noise; /* noise value */
654 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
656 if (state->current_modulation == VSB_8) {
658 /* Phase Tracker Mean-Square Error Register for VSB */
659 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
660 } else {
662 /* Carrier Recovery Mean-Square Error for QAM */
663 i2c_read_demod_bytes(state, 0x1a, buf, 2);
664 noise = (buf[0] << 8) | buf[1];
667 /* Small values for noise mean signal is better so invert noise */
668 *snr = ~noise;
670 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
672 return 0;
675 static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
677 /* I have no idea about this - it may not be needed */
678 fe_tune_settings->min_delay_ms = 500;
679 fe_tune_settings->step_size = 0;
680 fe_tune_settings->max_drift = 0;
681 return 0;
684 static void lgdt330x_release(struct dvb_frontend* fe)
686 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
687 kfree(state);
690 static struct dvb_frontend_ops lgdt3302_ops;
691 static struct dvb_frontend_ops lgdt3303_ops;
693 struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
694 struct i2c_adapter* i2c)
696 struct lgdt330x_state* state = NULL;
697 u8 buf[1];
699 /* Allocate memory for the internal state */
700 state = (struct lgdt330x_state*) kmalloc(sizeof(struct lgdt330x_state), GFP_KERNEL);
701 if (state == NULL)
702 goto error;
703 memset(state,0,sizeof(*state));
705 /* Setup the state */
706 state->config = config;
707 state->i2c = i2c;
708 switch (config->demod_chip) {
709 case LGDT3302:
710 memcpy(&state->ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
711 break;
712 case LGDT3303:
713 memcpy(&state->ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
714 break;
715 default:
716 goto error;
719 /* Verify communication with demod chip */
720 if (i2c_read_demod_bytes(state, 2, buf, 1))
721 goto error;
723 state->current_frequency = -1;
724 state->current_modulation = -1;
726 /* Create dvb_frontend */
727 state->frontend.ops = &state->ops;
728 state->frontend.demodulator_priv = state;
729 return &state->frontend;
731 error:
732 if (state)
733 kfree(state);
734 dprintk("%s: ERROR\n",__FUNCTION__);
735 return NULL;
738 static struct dvb_frontend_ops lgdt3302_ops = {
739 .info = {
740 .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
741 .type = FE_ATSC,
742 .frequency_min= 54000000,
743 .frequency_max= 858000000,
744 .frequency_stepsize= 62500,
745 /* Symbol rate is for all VSB modes need to check QAM */
746 .symbol_rate_min = 10762000,
747 .symbol_rate_max = 10762000,
748 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
750 .init = lgdt330x_init,
751 .set_frontend = lgdt330x_set_parameters,
752 .get_frontend = lgdt330x_get_frontend,
753 .get_tune_settings = lgdt330x_get_tune_settings,
754 .read_status = lgdt3302_read_status,
755 .read_ber = lgdt330x_read_ber,
756 .read_signal_strength = lgdt330x_read_signal_strength,
757 .read_snr = lgdt3302_read_snr,
758 .read_ucblocks = lgdt330x_read_ucblocks,
759 .release = lgdt330x_release,
762 static struct dvb_frontend_ops lgdt3303_ops = {
763 .info = {
764 .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
765 .type = FE_ATSC,
766 .frequency_min= 54000000,
767 .frequency_max= 858000000,
768 .frequency_stepsize= 62500,
769 /* Symbol rate is for all VSB modes need to check QAM */
770 .symbol_rate_min = 10762000,
771 .symbol_rate_max = 10762000,
772 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
774 .init = lgdt330x_init,
775 .set_frontend = lgdt330x_set_parameters,
776 .get_frontend = lgdt330x_get_frontend,
777 .get_tune_settings = lgdt330x_get_tune_settings,
778 .read_status = lgdt3303_read_status,
779 .read_ber = lgdt330x_read_ber,
780 .read_signal_strength = lgdt330x_read_signal_strength,
781 .read_snr = lgdt3303_read_snr,
782 .read_ucblocks = lgdt330x_read_ucblocks,
783 .release = lgdt330x_release,
786 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
787 MODULE_AUTHOR("Wilson Michaels");
788 MODULE_LICENSE("GPL");
790 EXPORT_SYMBOL(lgdt330x_attach);
793 * Local variables:
794 * c-basic-offset: 8
795 * End: