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[SBUSFB]: implement ->compat_ioctl
[linux-2.6/verdex.git] / drivers / video / bw2.c
blobd3728f60961e75230a466aa94172bdb52a64cd42
1 /* bw2.c: BWTWO frame buffer driver
2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
7 *
8 * Driver layout based loosely on tgafb.c, see that file for credits.
9 */
10
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/errno.h>
14 #include <linux/string.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/init.h>
18 #include <linux/fb.h>
19 #include <linux/mm.h>
20
21 #include <asm/io.h>
22 #include <asm/sbus.h>
23 #include <asm/oplib.h>
24 #include <asm/fbio.h>
25
26 #ifdef CONFIG_SPARC32
27 #include <asm/sun4paddr.h>
28 #endif
29
30 #include "sbuslib.h"
31
32 /*
33 * Local functions.
34 */
35
36 static int bw2_blank(int, struct fb_info *);
37
38 static int bw2_mmap(struct fb_info *, struct file *, struct vm_area_struct *);
39 static int bw2_ioctl(struct inode *, struct file *, unsigned int,
40 unsigned long, struct fb_info *);
41
42 /*
43 * Frame buffer operations
44 */
45
46 static struct fb_ops bw2_ops = {
47 .owner = THIS_MODULE,
48 .fb_blank = bw2_blank,
49 .fb_fillrect = cfb_fillrect,
50 .fb_copyarea = cfb_copyarea,
51 .fb_imageblit = cfb_imageblit,
52 .fb_mmap = bw2_mmap,
53 .fb_ioctl = bw2_ioctl,
54 #ifdef CONFIG_COMPAT
55 .fb_compat_ioctl = sbusfb_compat_ioctl,
56 #endif
57 };
58
59 /* OBio addresses for the bwtwo registers */
60 #define BWTWO_REGISTER_OFFSET 0x400000
61
62 struct bt_regs {
63 volatile u32 addr;
64 volatile u32 color_map;
65 volatile u32 control;
66 volatile u32 cursor;
67 };
68
69 struct bw2_regs {
70 struct bt_regs cmap;
71 volatile u8 control;
72 volatile u8 status;
73 volatile u8 cursor_start;
74 volatile u8 cursor_end;
75 volatile u8 h_blank_start;
76 volatile u8 h_blank_end;
77 volatile u8 h_sync_start;
78 volatile u8 h_sync_end;
79 volatile u8 comp_sync_end;
80 volatile u8 v_blank_start_high;
81 volatile u8 v_blank_start_low;
82 volatile u8 v_blank_end;
83 volatile u8 v_sync_start;
84 volatile u8 v_sync_end;
85 volatile u8 xfer_holdoff_start;
86 volatile u8 xfer_holdoff_end;
87 };
88
89 /* Status Register Constants */
90 #define BWTWO_SR_RES_MASK 0x70
91 #define BWTWO_SR_1600_1280 0x50
92 #define BWTWO_SR_1152_900_76_A 0x40
93 #define BWTWO_SR_1152_900_76_B 0x60
94 #define BWTWO_SR_ID_MASK 0x0f
95 #define BWTWO_SR_ID_MONO 0x02
96 #define BWTWO_SR_ID_MONO_ECL 0x03
97 #define BWTWO_SR_ID_MSYNC 0x04
98 #define BWTWO_SR_ID_NOCONN 0x0a
99
100 /* Control Register Constants */
101 #define BWTWO_CTL_ENABLE_INTS 0x80
102 #define BWTWO_CTL_ENABLE_VIDEO 0x40
103 #define BWTWO_CTL_ENABLE_TIMING 0x20
104 #define BWTWO_CTL_ENABLE_CURCMP 0x10
105 #define BWTWO_CTL_XTAL_MASK 0x0C
106 #define BWTWO_CTL_DIVISOR_MASK 0x03
107
108 /* Status Register Constants */
109 #define BWTWO_STAT_PENDING_INT 0x80
110 #define BWTWO_STAT_MSENSE_MASK 0x70
111 #define BWTWO_STAT_ID_MASK 0x0f
112
113 struct bw2_par {
114 spinlock_t lock;
115 struct bw2_regs __iomem *regs;
116
117 u32 flags;
118 #define BW2_FLAG_BLANKED 0x00000001
119
120 unsigned long physbase;
121 unsigned long fbsize;
122
123 struct sbus_dev *sdev;
124 struct list_head list;
125 };
126
127 /**
128 * bw2_blank - Optional function. Blanks the display.
129 * @blank_mode: the blank mode we want.
130 * @info: frame buffer structure that represents a single frame buffer
131 */
132 static int
133 bw2_blank(int blank, struct fb_info *info)
134 {
135 struct bw2_par *par = (struct bw2_par *) info->par;
136 struct bw2_regs __iomem *regs = par->regs;
137 unsigned long flags;
138 u8 val;
139
140 spin_lock_irqsave(&par->lock, flags);
141
142 switch (blank) {
143 case FB_BLANK_UNBLANK: /* Unblanking */
144 val = sbus_readb(&regs->control);
145 val |= BWTWO_CTL_ENABLE_VIDEO;
146 sbus_writeb(val, &regs->control);
147 par->flags &= ~BW2_FLAG_BLANKED;
148 break;
149
150 case FB_BLANK_NORMAL: /* Normal blanking */
151 case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
152 case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
153 case FB_BLANK_POWERDOWN: /* Poweroff */
154 val = sbus_readb(&regs->control);
155 val &= ~BWTWO_CTL_ENABLE_VIDEO;
156 sbus_writeb(val, &regs->control);
157 par->flags |= BW2_FLAG_BLANKED;
158 break;
159 }
160
161 spin_unlock_irqrestore(&par->lock, flags);
162
163 return 0;
164 }
165
166 static struct sbus_mmap_map bw2_mmap_map[] = {
167 {
168 .size = SBUS_MMAP_FBSIZE(1)
169 },
170 { .size = 0 }
171 };
172
173 static int bw2_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma)
174 {
175 struct bw2_par *par = (struct bw2_par *)info->par;
176
177 return sbusfb_mmap_helper(bw2_mmap_map,
178 par->physbase, par->fbsize,
179 (par->sdev ?
180 par->sdev->reg_addrs[0].which_io :
181 0),
182 vma);
183 }
184
185 static int bw2_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
186 unsigned long arg, struct fb_info *info)
187 {
188 struct bw2_par *par = (struct bw2_par *) info->par;
189
190 return sbusfb_ioctl_helper(cmd, arg, info,
191 FBTYPE_SUN2BW, 1, par->fbsize);
192 }
193
194 /*
195 * Initialisation
196 */
197
198 static void
199 bw2_init_fix(struct fb_info *info, int linebytes)
200 {
201 strlcpy(info->fix.id, "bwtwo", sizeof(info->fix.id));
202
203 info->fix.type = FB_TYPE_PACKED_PIXELS;
204 info->fix.visual = FB_VISUAL_MONO01;
205
206 info->fix.line_length = linebytes;
207
208 info->fix.accel = FB_ACCEL_SUN_BWTWO;
209 }
210
211 static u8 bw2regs_1600[] __initdata = {
212 0x14, 0x8b, 0x15, 0x28, 0x16, 0x03, 0x17, 0x13,
213 0x18, 0x7b, 0x19, 0x05, 0x1a, 0x34, 0x1b, 0x2e,
214 0x1c, 0x00, 0x1d, 0x0a, 0x1e, 0xff, 0x1f, 0x01,
215 0x10, 0x21, 0
216 };
217
218 static u8 bw2regs_ecl[] __initdata = {
219 0x14, 0x65, 0x15, 0x1e, 0x16, 0x04, 0x17, 0x0c,
220 0x18, 0x5e, 0x19, 0x03, 0x1a, 0xa7, 0x1b, 0x23,
221 0x1c, 0x00, 0x1d, 0x08, 0x1e, 0xff, 0x1f, 0x01,
222 0x10, 0x20, 0
223 };
224
225 static u8 bw2regs_analog[] __initdata = {
226 0x14, 0xbb, 0x15, 0x2b, 0x16, 0x03, 0x17, 0x13,
227 0x18, 0xb0, 0x19, 0x03, 0x1a, 0xa6, 0x1b, 0x22,
228 0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01,
229 0x10, 0x20, 0
230 };
231
232 static u8 bw2regs_76hz[] __initdata = {
233 0x14, 0xb7, 0x15, 0x27, 0x16, 0x03, 0x17, 0x0f,
234 0x18, 0xae, 0x19, 0x03, 0x1a, 0xae, 0x1b, 0x2a,
235 0x1c, 0x01, 0x1d, 0x09, 0x1e, 0xff, 0x1f, 0x01,
236 0x10, 0x24, 0
237 };
238
239 static u8 bw2regs_66hz[] __initdata = {
240 0x14, 0xbb, 0x15, 0x2b, 0x16, 0x04, 0x17, 0x14,
241 0x18, 0xae, 0x19, 0x03, 0x1a, 0xa8, 0x1b, 0x24,
242 0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01,
243 0x10, 0x20, 0
244 };
245
246 static void bw2_do_default_mode(struct bw2_par *par, struct fb_info *info,
247 int *linebytes)
248 {
249 u8 status, mon;
250 u8 *p;
251
252 status = sbus_readb(&par->regs->status);
253 mon = status & BWTWO_SR_RES_MASK;
254 switch (status & BWTWO_SR_ID_MASK) {
255 case BWTWO_SR_ID_MONO_ECL:
256 if (mon == BWTWO_SR_1600_1280) {
257 p = bw2regs_1600;
258 info->var.xres = info->var.xres_virtual = 1600;
259 info->var.yres = info->var.yres_virtual = 1280;
260 *linebytes = 1600 / 8;
261 } else
262 p = bw2regs_ecl;
263 break;
264
265 case BWTWO_SR_ID_MONO:
266 p = bw2regs_analog;
267 break;
268
269 case BWTWO_SR_ID_MSYNC:
270 if (mon == BWTWO_SR_1152_900_76_A ||
271 mon == BWTWO_SR_1152_900_76_B)
272 p = bw2regs_76hz;
273 else
274 p = bw2regs_66hz;
275 break;
276
277 case BWTWO_SR_ID_NOCONN:
278 return;
279
280 default:
281 prom_printf("bw2: can't handle SR %02x\n",
282 status);
283 prom_halt();
284 }
285 for ( ; *p; p += 2) {
286 u8 __iomem *regp = &((u8 __iomem *)par->regs)[p[0]];
287 sbus_writeb(p[1], regp);
288 }
289 }
290
291 struct all_info {
292 struct fb_info info;
293 struct bw2_par par;
294 struct list_head list;
295 };
296 static LIST_HEAD(bw2_list);
297
298 static void bw2_init_one(struct sbus_dev *sdev)
299 {
300 struct all_info *all;
301 struct resource *resp;
302 #ifdef CONFIG_SUN4
303 struct resource res;
304 #endif
305 int linebytes;
306
307 all = kmalloc(sizeof(*all), GFP_KERNEL);
308 if (!all) {
309 printk(KERN_ERR "bw2: Cannot allocate memory.\n");
310 return;
311 }
312 memset(all, 0, sizeof(*all));
313
314 INIT_LIST_HEAD(&all->list);
315
316 spin_lock_init(&all->par.lock);
317 all->par.sdev = sdev;
318
319 #ifdef CONFIG_SUN4
320 if (!sdev) {
321 all->par.physbase = sun4_bwtwo_physaddr;
322 res.start = sun4_bwtwo_physaddr;
323 res.end = res.start + BWTWO_REGISTER_OFFSET + sizeof(struct bw2_regs) - 1;
324 res.flags = IORESOURCE_IO;
325 resp = &res;
326 all->info.var.xres = all->info.var.xres_virtual = 1152;
327 all->info.var.yres = all->info.var.yres_virtual = 900;
328 all->info.var.bits_per_pixel = 1;
329 linebytes = 1152 / 8;
330 } else
331 #else
332 {
333 if (!sdev)
334 BUG();
335 all->par.physbase = sdev->reg_addrs[0].phys_addr;
336 resp = &sdev->resource[0];
337 sbusfb_fill_var(&all->info.var, (sdev ? sdev->prom_node : 0), 1);
338 linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
339 all->info.var.xres);
340 }
341 #endif
342 all->info.var.red.length = all->info.var.green.length =
343 all->info.var.blue.length = all->info.var.bits_per_pixel;
344 all->info.var.red.offset = all->info.var.green.offset =
345 all->info.var.blue.offset = 0;
346
347 all->par.regs = sbus_ioremap(resp, BWTWO_REGISTER_OFFSET,
348 sizeof(struct bw2_regs), "bw2 regs");
349
350 if (sdev && !prom_getbool(sdev->prom_node, "width"))
351 bw2_do_default_mode(&all->par, &all->info, &linebytes);
352
353 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
354
355 all->info.flags = FBINFO_DEFAULT;
356 all->info.fbops = &bw2_ops;
357 #if defined(CONFIG_SPARC32)
358 if (sdev)
359 all->info.screen_base = (char __iomem *)
360 prom_getintdefault(sdev->prom_node, "address", 0);
361 #endif
362 if (!all->info.screen_base)
363 all->info.screen_base =
364 sbus_ioremap(resp, 0, all->par.fbsize, "bw2 ram");
365 all->info.par = &all->par;
366
367 bw2_blank(0, &all->info);
368
369 bw2_init_fix(&all->info, linebytes);
370
371 if (register_framebuffer(&all->info) < 0) {
372 printk(KERN_ERR "bw2: Could not register framebuffer.\n");
373 kfree(all);
374 return;
375 }
376
377 list_add(&all->list, &bw2_list);
378
379 printk("bw2: bwtwo at %lx:%lx\n",
380 (long) (sdev ? sdev->reg_addrs[0].which_io : 0),
381 (long) all->par.physbase);
382 }
383
384 int __init bw2_init(void)
385 {
386 struct sbus_bus *sbus;
387 struct sbus_dev *sdev;
388
389 if (fb_get_options("bw2fb", NULL))
390 return -ENODEV;
391
392 #ifdef CONFIG_SUN4
393 bw2_init_one(NULL);
394 #endif
395 for_all_sbusdev(sdev, sbus) {
396 if (!strcmp(sdev->prom_name, "bwtwo"))
397 bw2_init_one(sdev);
398 }
399
400 return 0;
401 }
402
403 void __exit bw2_exit(void)
404 {
405 struct list_head *pos, *tmp;
406
407 list_for_each_safe(pos, tmp, &bw2_list) {
408 struct all_info *all = list_entry(pos, typeof(*all), list);
409
410 unregister_framebuffer(&all->info);
411 kfree(all);
412 }
413 }
414
415 int __init
416 bw2_setup(char *arg)
417 {
418 /* No cmdline options yet... */
419 return 0;
420 }
421
422 module_init(bw2_init);
423
424 #ifdef MODULE
425 module_exit(bw2_exit);
426 #endif
427
428 MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets");
429 MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
430 MODULE_LICENSE("GPL");
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