?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
iwlwifi: do not clear GEO_CONFIGURED bit when calling _down
[linux-2.6/verdex.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blobb6f19a52b78332e0a7c8a9d86b97b1d10116d62c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/version.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/ieee80211_radiotap.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #include "iwl-3945.h"
50 #include "iwl-helpers.h"
51
52 #ifdef CONFIG_IWL3945_DEBUG
53 u32 iwl3945_debug_level;
54 #endif
55
56 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
57 struct iwl3945_tx_queue *txq);
58
59 /******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65 /* module parameters */
66 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
67 static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
68 static int iwl3945_param_disable; /* def: 0 = enable radio */
69 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
70 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
71 static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
72 int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 8 Tx queues */
73
74 /*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79 #define DRV_DESCRIPTION \
80 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
81
82 #ifdef CONFIG_IWL3945_DEBUG
83 #define VD "d"
84 #else
85 #define VD
86 #endif
87
88 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
89 #define VS "s"
90 #else
91 #define VS
92 #endif
93
94 #define IWLWIFI_VERSION "1.2.23k" VD VS
95 #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
96 #define DRV_VERSION IWLWIFI_VERSION
97
98 /* Change firmware file name, using "-" and incrementing number,
99 * *only* when uCode interface or architecture changes so that it
100 * is not compatible with earlier drivers.
101 * This number will also appear in << 8 position of 1st dword of uCode file */
102 #define IWL3945_UCODE_API "-1"
103
104 MODULE_DESCRIPTION(DRV_DESCRIPTION);
105 MODULE_VERSION(DRV_VERSION);
106 MODULE_AUTHOR(DRV_COPYRIGHT);
107 MODULE_LICENSE("GPL");
108
109 static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
110 {
111 u16 fc = le16_to_cpu(hdr->frame_control);
112 int hdr_len = ieee80211_get_hdrlen(fc);
113
114 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
115 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
116 return NULL;
117 }
118
119 static const struct ieee80211_hw_mode *iwl3945_get_hw_mode(
120 struct iwl3945_priv *priv, int mode)
121 {
122 int i;
123
124 for (i = 0; i < 3; i++)
125 if (priv->modes[i].mode == mode)
126 return &priv->modes[i];
127
128 return NULL;
129 }
130
131 static int iwl3945_is_empty_essid(const char *essid, int essid_len)
132 {
133 /* Single white space is for Linksys APs */
134 if (essid_len == 1 && essid[0] == ' ')
135 return 1;
136
137 /* Otherwise, if the entire essid is 0, we assume it is hidden */
138 while (essid_len) {
139 essid_len--;
140 if (essid[essid_len] != '\0')
141 return 0;
142 }
143
144 return 1;
145 }
146
147 static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
148 {
149 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
150 const char *s = essid;
151 char *d = escaped;
152
153 if (iwl3945_is_empty_essid(essid, essid_len)) {
154 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
155 return escaped;
156 }
157
158 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
159 while (essid_len--) {
160 if (*s == '\0') {
161 *d++ = '\\';
162 *d++ = '0';
163 s++;
164 } else
165 *d++ = *s++;
166 }
167 *d = '\0';
168 return escaped;
169 }
170
171 static void iwl3945_print_hex_dump(int level, void *p, u32 len)
172 {
173 #ifdef CONFIG_IWL3945_DEBUG
174 if (!(iwl3945_debug_level & level))
175 return;
176
177 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
178 p, len, 1);
179 #endif
180 }
181
182 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
183 * DMA services
184 *
185 * Theory of operation
186 *
187 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
188 * of buffer descriptors, each of which points to one or more data buffers for
189 * the device to read from or fill. Driver and device exchange status of each
190 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
191 * entries in each circular buffer, to protect against confusing empty and full
192 * queue states.
193 *
194 * The device reads or writes the data in the queues via the device's several
195 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
196 *
197 * For Tx queue, there are low mark and high mark limits. If, after queuing
198 * the packet for Tx, free space become < low mark, Tx queue stopped. When
199 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
200 * Tx queue resumed.
201 *
202 * The 3945 operates with six queues: One receive queue, one transmit queue
203 * (#4) for sending commands to the device firmware, and four transmit queues
204 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
205 ***************************************************/
206
207 static int iwl3945_queue_space(const struct iwl3945_queue *q)
208 {
209 int s = q->read_ptr - q->write_ptr;
210
211 if (q->read_ptr > q->write_ptr)
212 s -= q->n_bd;
213
214 if (s <= 0)
215 s += q->n_window;
216 /* keep some reserve to not confuse empty and full situations */
217 s -= 2;
218 if (s < 0)
219 s = 0;
220 return s;
221 }
222
223 /**
224 * iwl3945_queue_inc_wrap - increment queue index, wrap back to beginning
225 * @index -- current index
226 * @n_bd -- total number of entries in queue (must be power of 2)
227 */
228 static inline int iwl3945_queue_inc_wrap(int index, int n_bd)
229 {
230 return ++index & (n_bd - 1);
231 }
232
233 /**
234 * iwl3945_queue_dec_wrap - increment queue index, wrap back to end
235 * @index -- current index
236 * @n_bd -- total number of entries in queue (must be power of 2)
237 */
238 static inline int iwl3945_queue_dec_wrap(int index, int n_bd)
239 {
240 return --index & (n_bd - 1);
241 }
242
243 static inline int x2_queue_used(const struct iwl3945_queue *q, int i)
244 {
245 return q->write_ptr > q->read_ptr ?
246 (i >= q->read_ptr && i < q->write_ptr) :
247 !(i < q->read_ptr && i >= q->write_ptr);
248 }
249
250 static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
251 {
252 /* This is for scan command, the big buffer at end of command array */
253 if (is_huge)
254 return q->n_window; /* must be power of 2 */
255
256 /* Otherwise, use normal size buffers */
257 return index & (q->n_window - 1);
258 }
259
260 /**
261 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
262 */
263 static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
264 int count, int slots_num, u32 id)
265 {
266 q->n_bd = count;
267 q->n_window = slots_num;
268 q->id = id;
269
270 /* count must be power-of-two size, otherwise iwl3945_queue_inc_wrap
271 * and iwl3945_queue_dec_wrap are broken. */
272 BUG_ON(!is_power_of_2(count));
273
274 /* slots_num must be power-of-two size, otherwise
275 * get_cmd_index is broken. */
276 BUG_ON(!is_power_of_2(slots_num));
277
278 q->low_mark = q->n_window / 4;
279 if (q->low_mark < 4)
280 q->low_mark = 4;
281
282 q->high_mark = q->n_window / 8;
283 if (q->high_mark < 2)
284 q->high_mark = 2;
285
286 q->write_ptr = q->read_ptr = 0;
287
288 return 0;
289 }
290
291 /**
292 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
293 */
294 static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
295 struct iwl3945_tx_queue *txq, u32 id)
296 {
297 struct pci_dev *dev = priv->pci_dev;
298
299 /* Driver private data, only for Tx (not command) queues,
300 * not shared with device. */
301 if (id != IWL_CMD_QUEUE_NUM) {
302 txq->txb = kmalloc(sizeof(txq->txb[0]) *
303 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
304 if (!txq->txb) {
305 IWL_ERROR("kmalloc for auxiliary BD "
306 "structures failed\n");
307 goto error;
308 }
309 } else
310 txq->txb = NULL;
311
312 /* Circular buffer of transmit frame descriptors (TFDs),
313 * shared with device */
314 txq->bd = pci_alloc_consistent(dev,
315 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
316 &txq->q.dma_addr);
317
318 if (!txq->bd) {
319 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
320 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
321 goto error;
322 }
323 txq->q.id = id;
324
325 return 0;
326
327 error:
328 if (txq->txb) {
329 kfree(txq->txb);
330 txq->txb = NULL;
331 }
332
333 return -ENOMEM;
334 }
335
336 /**
337 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
338 */
339 int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
340 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
341 {
342 struct pci_dev *dev = priv->pci_dev;
343 int len;
344 int rc = 0;
345
346 /*
347 * Alloc buffer array for commands (Tx or other types of commands).
348 * For the command queue (#4), allocate command space + one big
349 * command for scan, since scan command is very huge; the system will
350 * not have two scans at the same time, so only one is needed.
351 * For data Tx queues (all other queues), no super-size command
352 * space is needed.
353 */
354 len = sizeof(struct iwl3945_cmd) * slots_num;
355 if (txq_id == IWL_CMD_QUEUE_NUM)
356 len += IWL_MAX_SCAN_SIZE;
357 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
358 if (!txq->cmd)
359 return -ENOMEM;
360
361 /* Alloc driver data array and TFD circular buffer */
362 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
363 if (rc) {
364 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
365
366 return -ENOMEM;
367 }
368 txq->need_update = 0;
369
370 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
371 * iwl3945_queue_inc_wrap and iwl3945_queue_dec_wrap are broken. */
372 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
373
374 /* Initialize queue high/low-water, head/tail indexes */
375 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
376
377 /* Tell device where to find queue, enable DMA channel. */
378 iwl3945_hw_tx_queue_init(priv, txq);
379
380 return 0;
381 }
382
383 /**
384 * iwl3945_tx_queue_free - Deallocate DMA queue.
385 * @txq: Transmit queue to deallocate.
386 *
387 * Empty queue by removing and destroying all BD's.
388 * Free all buffers.
389 * 0-fill, but do not free "txq" descriptor structure.
390 */
391 void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
392 {
393 struct iwl3945_queue *q = &txq->q;
394 struct pci_dev *dev = priv->pci_dev;
395 int len;
396
397 if (q->n_bd == 0)
398 return;
399
400 /* first, empty all BD's */
401 for (; q->write_ptr != q->read_ptr;
402 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd))
403 iwl3945_hw_txq_free_tfd(priv, txq);
404
405 len = sizeof(struct iwl3945_cmd) * q->n_window;
406 if (q->id == IWL_CMD_QUEUE_NUM)
407 len += IWL_MAX_SCAN_SIZE;
408
409 /* De-alloc array of command/tx buffers */
410 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
411
412 /* De-alloc circular buffer of TFDs */
413 if (txq->q.n_bd)
414 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
415 txq->q.n_bd, txq->bd, txq->q.dma_addr);
416
417 /* De-alloc array of per-TFD driver data */
418 if (txq->txb) {
419 kfree(txq->txb);
420 txq->txb = NULL;
421 }
422
423 /* 0-fill queue descriptor structure */
424 memset(txq, 0, sizeof(*txq));
425 }
426
427 const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
428
429 /*************** STATION TABLE MANAGEMENT ****
430 * mac80211 should be examined to determine if sta_info is duplicating
431 * the functionality provided here
432 */
433
434 /**************************************************************/
435 #if 0 /* temporary disable till we add real remove station */
436 /**
437 * iwl3945_remove_station - Remove driver's knowledge of station.
438 *
439 * NOTE: This does not remove station from device's station table.
440 */
441 static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
442 {
443 int index = IWL_INVALID_STATION;
444 int i;
445 unsigned long flags;
446
447 spin_lock_irqsave(&priv->sta_lock, flags);
448
449 if (is_ap)
450 index = IWL_AP_ID;
451 else if (is_broadcast_ether_addr(addr))
452 index = priv->hw_setting.bcast_sta_id;
453 else
454 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
455 if (priv->stations[i].used &&
456 !compare_ether_addr(priv->stations[i].sta.sta.addr,
457 addr)) {
458 index = i;
459 break;
460 }
461
462 if (unlikely(index == IWL_INVALID_STATION))
463 goto out;
464
465 if (priv->stations[index].used) {
466 priv->stations[index].used = 0;
467 priv->num_stations--;
468 }
469
470 BUG_ON(priv->num_stations < 0);
471
472 out:
473 spin_unlock_irqrestore(&priv->sta_lock, flags);
474 return 0;
475 }
476 #endif
477
478 /**
479 * iwl3945_clear_stations_table - Clear the driver's station table
480 *
481 * NOTE: This does not clear or otherwise alter the device's station table.
482 */
483 static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
484 {
485 unsigned long flags;
486
487 spin_lock_irqsave(&priv->sta_lock, flags);
488
489 priv->num_stations = 0;
490 memset(priv->stations, 0, sizeof(priv->stations));
491
492 spin_unlock_irqrestore(&priv->sta_lock, flags);
493 }
494
495 /**
496 * iwl3945_add_station - Add station to station tables in driver and device
497 */
498 u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
499 {
500 int i;
501 int index = IWL_INVALID_STATION;
502 struct iwl3945_station_entry *station;
503 unsigned long flags_spin;
504 DECLARE_MAC_BUF(mac);
505 u8 rate;
506
507 spin_lock_irqsave(&priv->sta_lock, flags_spin);
508 if (is_ap)
509 index = IWL_AP_ID;
510 else if (is_broadcast_ether_addr(addr))
511 index = priv->hw_setting.bcast_sta_id;
512 else
513 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
514 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
515 addr)) {
516 index = i;
517 break;
518 }
519
520 if (!priv->stations[i].used &&
521 index == IWL_INVALID_STATION)
522 index = i;
523 }
524
525 /* These two conditions has the same outcome but keep them separate
526 since they have different meaning */
527 if (unlikely(index == IWL_INVALID_STATION)) {
528 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
529 return index;
530 }
531
532 if (priv->stations[index].used &&
533 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
534 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
535 return index;
536 }
537
538 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
539 station = &priv->stations[index];
540 station->used = 1;
541 priv->num_stations++;
542
543 /* Set up the REPLY_ADD_STA command to send to device */
544 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
545 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
546 station->sta.mode = 0;
547 station->sta.sta.sta_id = index;
548 station->sta.station_flags = 0;
549
550 if (priv->phymode == MODE_IEEE80211A)
551 rate = IWL_RATE_6M_PLCP;
552 else
553 rate = IWL_RATE_1M_PLCP;
554
555 /* Turn on both antennas for the station... */
556 station->sta.rate_n_flags =
557 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
558 station->current_rate.rate_n_flags =
559 le16_to_cpu(station->sta.rate_n_flags);
560
561 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
562
563 /* Add station to device's station table */
564 iwl3945_send_add_station(priv, &station->sta, flags);
565 return index;
566
567 }
568
569 /*************** DRIVER STATUS FUNCTIONS *****/
570
571 static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
572 {
573 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
574 * set but EXIT_PENDING is not */
575 return test_bit(STATUS_READY, &priv->status) &&
576 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
577 !test_bit(STATUS_EXIT_PENDING, &priv->status);
578 }
579
580 static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
581 {
582 return test_bit(STATUS_ALIVE, &priv->status);
583 }
584
585 static inline int iwl3945_is_init(struct iwl3945_priv *priv)
586 {
587 return test_bit(STATUS_INIT, &priv->status);
588 }
589
590 static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
591 {
592 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
593 test_bit(STATUS_RF_KILL_SW, &priv->status);
594 }
595
596 static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
597 {
598
599 if (iwl3945_is_rfkill(priv))
600 return 0;
601
602 return iwl3945_is_ready(priv);
603 }
604
605 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
606
607 #define IWL_CMD(x) case x : return #x
608
609 static const char *get_cmd_string(u8 cmd)
610 {
611 switch (cmd) {
612 IWL_CMD(REPLY_ALIVE);
613 IWL_CMD(REPLY_ERROR);
614 IWL_CMD(REPLY_RXON);
615 IWL_CMD(REPLY_RXON_ASSOC);
616 IWL_CMD(REPLY_QOS_PARAM);
617 IWL_CMD(REPLY_RXON_TIMING);
618 IWL_CMD(REPLY_ADD_STA);
619 IWL_CMD(REPLY_REMOVE_STA);
620 IWL_CMD(REPLY_REMOVE_ALL_STA);
621 IWL_CMD(REPLY_3945_RX);
622 IWL_CMD(REPLY_TX);
623 IWL_CMD(REPLY_RATE_SCALE);
624 IWL_CMD(REPLY_LEDS_CMD);
625 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
626 IWL_CMD(RADAR_NOTIFICATION);
627 IWL_CMD(REPLY_QUIET_CMD);
628 IWL_CMD(REPLY_CHANNEL_SWITCH);
629 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
630 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
631 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
632 IWL_CMD(POWER_TABLE_CMD);
633 IWL_CMD(PM_SLEEP_NOTIFICATION);
634 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
635 IWL_CMD(REPLY_SCAN_CMD);
636 IWL_CMD(REPLY_SCAN_ABORT_CMD);
637 IWL_CMD(SCAN_START_NOTIFICATION);
638 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
639 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
640 IWL_CMD(BEACON_NOTIFICATION);
641 IWL_CMD(REPLY_TX_BEACON);
642 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
643 IWL_CMD(QUIET_NOTIFICATION);
644 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
645 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
646 IWL_CMD(REPLY_BT_CONFIG);
647 IWL_CMD(REPLY_STATISTICS_CMD);
648 IWL_CMD(STATISTICS_NOTIFICATION);
649 IWL_CMD(REPLY_CARD_STATE_CMD);
650 IWL_CMD(CARD_STATE_NOTIFICATION);
651 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
652 default:
653 return "UNKNOWN";
654
655 }
656 }
657
658 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
659
660 /**
661 * iwl3945_enqueue_hcmd - enqueue a uCode command
662 * @priv: device private data point
663 * @cmd: a point to the ucode command structure
664 *
665 * The function returns < 0 values to indicate the operation is
666 * failed. On success, it turns the index (> 0) of command in the
667 * command queue.
668 */
669 static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
670 {
671 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
672 struct iwl3945_queue *q = &txq->q;
673 struct iwl3945_tfd_frame *tfd;
674 u32 *control_flags;
675 struct iwl3945_cmd *out_cmd;
676 u32 idx;
677 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
678 dma_addr_t phys_addr;
679 int pad;
680 u16 count;
681 int ret;
682 unsigned long flags;
683
684 /* If any of the command structures end up being larger than
685 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
686 * we will need to increase the size of the TFD entries */
687 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
688 !(cmd->meta.flags & CMD_SIZE_HUGE));
689
690 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
691 IWL_ERROR("No space for Tx\n");
692 return -ENOSPC;
693 }
694
695 spin_lock_irqsave(&priv->hcmd_lock, flags);
696
697 tfd = &txq->bd[q->write_ptr];
698 memset(tfd, 0, sizeof(*tfd));
699
700 control_flags = (u32 *) tfd;
701
702 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
703 out_cmd = &txq->cmd[idx];
704
705 out_cmd->hdr.cmd = cmd->id;
706 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
707 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
708
709 /* At this point, the out_cmd now has all of the incoming cmd
710 * information */
711
712 out_cmd->hdr.flags = 0;
713 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
714 INDEX_TO_SEQ(q->write_ptr));
715 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
716 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
717
718 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
719 offsetof(struct iwl3945_cmd, hdr);
720 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
721
722 pad = U32_PAD(cmd->len);
723 count = TFD_CTL_COUNT_GET(*control_flags);
724 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
725
726 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
727 "%d bytes at %d[%d]:%d\n",
728 get_cmd_string(out_cmd->hdr.cmd),
729 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
730 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
731
732 txq->need_update = 1;
733
734 /* Increment and update queue's write index */
735 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
736 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
737
738 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
739 return ret ? ret : idx;
740 }
741
742 static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
743 {
744 int ret;
745
746 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
747
748 /* An asynchronous command can not expect an SKB to be set. */
749 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
750
751 /* An asynchronous command MUST have a callback. */
752 BUG_ON(!cmd->meta.u.callback);
753
754 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
755 return -EBUSY;
756
757 ret = iwl3945_enqueue_hcmd(priv, cmd);
758 if (ret < 0) {
759 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
760 get_cmd_string(cmd->id), ret);
761 return ret;
762 }
763 return 0;
764 }
765
766 static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
767 {
768 int cmd_idx;
769 int ret;
770 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
771
772 BUG_ON(cmd->meta.flags & CMD_ASYNC);
773
774 /* A synchronous command can not have a callback set. */
775 BUG_ON(cmd->meta.u.callback != NULL);
776
777 if (atomic_xchg(&entry, 1)) {
778 IWL_ERROR("Error sending %s: Already sending a host command\n",
779 get_cmd_string(cmd->id));
780 return -EBUSY;
781 }
782
783 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
784
785 if (cmd->meta.flags & CMD_WANT_SKB)
786 cmd->meta.source = &cmd->meta;
787
788 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
789 if (cmd_idx < 0) {
790 ret = cmd_idx;
791 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
792 get_cmd_string(cmd->id), ret);
793 goto out;
794 }
795
796 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
797 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
798 HOST_COMPLETE_TIMEOUT);
799 if (!ret) {
800 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
801 IWL_ERROR("Error sending %s: time out after %dms.\n",
802 get_cmd_string(cmd->id),
803 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
804
805 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
806 ret = -ETIMEDOUT;
807 goto cancel;
808 }
809 }
810
811 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
812 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
813 get_cmd_string(cmd->id));
814 ret = -ECANCELED;
815 goto fail;
816 }
817 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
818 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
819 get_cmd_string(cmd->id));
820 ret = -EIO;
821 goto fail;
822 }
823 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
824 IWL_ERROR("Error: Response NULL in '%s'\n",
825 get_cmd_string(cmd->id));
826 ret = -EIO;
827 goto out;
828 }
829
830 ret = 0;
831 goto out;
832
833 cancel:
834 if (cmd->meta.flags & CMD_WANT_SKB) {
835 struct iwl3945_cmd *qcmd;
836
837 /* Cancel the CMD_WANT_SKB flag for the cmd in the
838 * TX cmd queue. Otherwise in case the cmd comes
839 * in later, it will possibly set an invalid
840 * address (cmd->meta.source). */
841 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
842 qcmd->meta.flags &= ~CMD_WANT_SKB;
843 }
844 fail:
845 if (cmd->meta.u.skb) {
846 dev_kfree_skb_any(cmd->meta.u.skb);
847 cmd->meta.u.skb = NULL;
848 }
849 out:
850 atomic_set(&entry, 0);
851 return ret;
852 }
853
854 int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
855 {
856 if (cmd->meta.flags & CMD_ASYNC)
857 return iwl3945_send_cmd_async(priv, cmd);
858
859 return iwl3945_send_cmd_sync(priv, cmd);
860 }
861
862 int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
863 {
864 struct iwl3945_host_cmd cmd = {
865 .id = id,
866 .len = len,
867 .data = data,
868 };
869
870 return iwl3945_send_cmd_sync(priv, &cmd);
871 }
872
873 static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
874 {
875 struct iwl3945_host_cmd cmd = {
876 .id = id,
877 .len = sizeof(val),
878 .data = &val,
879 };
880
881 return iwl3945_send_cmd_sync(priv, &cmd);
882 }
883
884 int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
885 {
886 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
887 }
888
889 /**
890 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
891 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
892 * @channel: Any channel valid for the requested phymode
893
894 * In addition to setting the staging RXON, priv->phymode is also set.
895 *
896 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
897 * in the staging RXON flag structure based on the phymode
898 */
899 static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv, u8 phymode, u16 channel)
900 {
901 if (!iwl3945_get_channel_info(priv, phymode, channel)) {
902 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
903 channel, phymode);
904 return -EINVAL;
905 }
906
907 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
908 (priv->phymode == phymode))
909 return 0;
910
911 priv->staging_rxon.channel = cpu_to_le16(channel);
912 if (phymode == MODE_IEEE80211A)
913 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
914 else
915 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
916
917 priv->phymode = phymode;
918
919 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
920
921 return 0;
922 }
923
924 /**
925 * iwl3945_check_rxon_cmd - validate RXON structure is valid
926 *
927 * NOTE: This is really only useful during development and can eventually
928 * be #ifdef'd out once the driver is stable and folks aren't actively
929 * making changes
930 */
931 static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
932 {
933 int error = 0;
934 int counter = 1;
935
936 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
937 error |= le32_to_cpu(rxon->flags &
938 (RXON_FLG_TGJ_NARROW_BAND_MSK |
939 RXON_FLG_RADAR_DETECT_MSK));
940 if (error)
941 IWL_WARNING("check 24G fields %d | %d\n",
942 counter++, error);
943 } else {
944 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
945 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
946 if (error)
947 IWL_WARNING("check 52 fields %d | %d\n",
948 counter++, error);
949 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
950 if (error)
951 IWL_WARNING("check 52 CCK %d | %d\n",
952 counter++, error);
953 }
954 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
955 if (error)
956 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
957
958 /* make sure basic rates 6Mbps and 1Mbps are supported */
959 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
960 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
961 if (error)
962 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
963
964 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
965 if (error)
966 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
967
968 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
969 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
970 if (error)
971 IWL_WARNING("check CCK and short slot %d | %d\n",
972 counter++, error);
973
974 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
975 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
976 if (error)
977 IWL_WARNING("check CCK & auto detect %d | %d\n",
978 counter++, error);
979
980 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
981 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
982 if (error)
983 IWL_WARNING("check TGG and auto detect %d | %d\n",
984 counter++, error);
985
986 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
987 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
988 RXON_FLG_ANT_A_MSK)) == 0);
989 if (error)
990 IWL_WARNING("check antenna %d %d\n", counter++, error);
991
992 if (error)
993 IWL_WARNING("Tuning to channel %d\n",
994 le16_to_cpu(rxon->channel));
995
996 if (error) {
997 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
998 return -1;
999 }
1000 return 0;
1001 }
1002
1003 /**
1004 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
1005 * @priv: staging_rxon is compared to active_rxon
1006 *
1007 * If the RXON structure is changing enough to require a new tune,
1008 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1009 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
1010 */
1011 static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
1012 {
1013
1014 /* These items are only settable from the full RXON command */
1015 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1016 compare_ether_addr(priv->staging_rxon.bssid_addr,
1017 priv->active_rxon.bssid_addr) ||
1018 compare_ether_addr(priv->staging_rxon.node_addr,
1019 priv->active_rxon.node_addr) ||
1020 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1021 priv->active_rxon.wlap_bssid_addr) ||
1022 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1023 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1024 (priv->staging_rxon.air_propagation !=
1025 priv->active_rxon.air_propagation) ||
1026 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1027 return 1;
1028
1029 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1030 * be updated with the RXON_ASSOC command -- however only some
1031 * flag transitions are allowed using RXON_ASSOC */
1032
1033 /* Check if we are not switching bands */
1034 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1035 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1036 return 1;
1037
1038 /* Check if we are switching association toggle */
1039 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1040 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1041 return 1;
1042
1043 return 0;
1044 }
1045
1046 static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
1047 {
1048 int rc = 0;
1049 struct iwl3945_rx_packet *res = NULL;
1050 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1051 struct iwl3945_host_cmd cmd = {
1052 .id = REPLY_RXON_ASSOC,
1053 .len = sizeof(rxon_assoc),
1054 .meta.flags = CMD_WANT_SKB,
1055 .data = &rxon_assoc,
1056 };
1057 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1058 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
1059
1060 if ((rxon1->flags == rxon2->flags) &&
1061 (rxon1->filter_flags == rxon2->filter_flags) &&
1062 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1063 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1064 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1065 return 0;
1066 }
1067
1068 rxon_assoc.flags = priv->staging_rxon.flags;
1069 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1070 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1071 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1072 rxon_assoc.reserved = 0;
1073
1074 rc = iwl3945_send_cmd_sync(priv, &cmd);
1075 if (rc)
1076 return rc;
1077
1078 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1079 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1080 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1081 rc = -EIO;
1082 }
1083
1084 priv->alloc_rxb_skb--;
1085 dev_kfree_skb_any(cmd.meta.u.skb);
1086
1087 return rc;
1088 }
1089
1090 /**
1091 * iwl3945_commit_rxon - commit staging_rxon to hardware
1092 *
1093 * The RXON command in staging_rxon is committed to the hardware and
1094 * the active_rxon structure is updated with the new data. This
1095 * function correctly transitions out of the RXON_ASSOC_MSK state if
1096 * a HW tune is required based on the RXON structure changes.
1097 */
1098 static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1099 {
1100 /* cast away the const for active_rxon in this function */
1101 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1102 int rc = 0;
1103 DECLARE_MAC_BUF(mac);
1104
1105 if (!iwl3945_is_alive(priv))
1106 return -1;
1107
1108 /* always get timestamp with Rx frame */
1109 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1110
1111 /* select antenna */
1112 priv->staging_rxon.flags &=
1113 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1114 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1115
1116 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
1117 if (rc) {
1118 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1119 return -EINVAL;
1120 }
1121
1122 /* If we don't need to send a full RXON, we can use
1123 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1124 * and other flags for the current radio configuration. */
1125 if (!iwl3945_full_rxon_required(priv)) {
1126 rc = iwl3945_send_rxon_assoc(priv);
1127 if (rc) {
1128 IWL_ERROR("Error setting RXON_ASSOC "
1129 "configuration (%d).\n", rc);
1130 return rc;
1131 }
1132
1133 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1134
1135 return 0;
1136 }
1137
1138 /* If we are currently associated and the new config requires
1139 * an RXON_ASSOC and the new config wants the associated mask enabled,
1140 * we must clear the associated from the active configuration
1141 * before we apply the new config */
1142 if (iwl3945_is_associated(priv) &&
1143 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1144 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1145 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1146
1147 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1148 sizeof(struct iwl3945_rxon_cmd),
1149 &priv->active_rxon);
1150
1151 /* If the mask clearing failed then we set
1152 * active_rxon back to what it was previously */
1153 if (rc) {
1154 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1155 IWL_ERROR("Error clearing ASSOC_MSK on current "
1156 "configuration (%d).\n", rc);
1157 return rc;
1158 }
1159 }
1160
1161 IWL_DEBUG_INFO("Sending RXON\n"
1162 "* with%s RXON_FILTER_ASSOC_MSK\n"
1163 "* channel = %d\n"
1164 "* bssid = %s\n",
1165 ((priv->staging_rxon.filter_flags &
1166 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1167 le16_to_cpu(priv->staging_rxon.channel),
1168 print_mac(mac, priv->staging_rxon.bssid_addr));
1169
1170 /* Apply the new configuration */
1171 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1172 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1173 if (rc) {
1174 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1175 return rc;
1176 }
1177
1178 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1179
1180 iwl3945_clear_stations_table(priv);
1181
1182 /* If we issue a new RXON command which required a tune then we must
1183 * send a new TXPOWER command or we won't be able to Tx any frames */
1184 rc = iwl3945_hw_reg_send_txpower(priv);
1185 if (rc) {
1186 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1187 return rc;
1188 }
1189
1190 /* Add the broadcast address so we can send broadcast frames */
1191 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1192 IWL_INVALID_STATION) {
1193 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1194 return -EIO;
1195 }
1196
1197 /* If we have set the ASSOC_MSK and we are in BSS mode then
1198 * add the IWL_AP_ID to the station rate table */
1199 if (iwl3945_is_associated(priv) &&
1200 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
1201 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1202 == IWL_INVALID_STATION) {
1203 IWL_ERROR("Error adding AP address for transmit.\n");
1204 return -EIO;
1205 }
1206
1207 /* Init the hardware's rate fallback order based on the
1208 * phymode */
1209 rc = iwl3945_init_hw_rate_table(priv);
1210 if (rc) {
1211 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1212 return -EIO;
1213 }
1214
1215 return 0;
1216 }
1217
1218 static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1219 {
1220 struct iwl3945_bt_cmd bt_cmd = {
1221 .flags = 3,
1222 .lead_time = 0xAA,
1223 .max_kill = 1,
1224 .kill_ack_mask = 0,
1225 .kill_cts_mask = 0,
1226 };
1227
1228 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1229 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
1230 }
1231
1232 static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1233 {
1234 int rc = 0;
1235 struct iwl3945_rx_packet *res;
1236 struct iwl3945_host_cmd cmd = {
1237 .id = REPLY_SCAN_ABORT_CMD,
1238 .meta.flags = CMD_WANT_SKB,
1239 };
1240
1241 /* If there isn't a scan actively going on in the hardware
1242 * then we are in between scan bands and not actually
1243 * actively scanning, so don't send the abort command */
1244 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1245 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1246 return 0;
1247 }
1248
1249 rc = iwl3945_send_cmd_sync(priv, &cmd);
1250 if (rc) {
1251 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1252 return rc;
1253 }
1254
1255 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1256 if (res->u.status != CAN_ABORT_STATUS) {
1257 /* The scan abort will return 1 for success or
1258 * 2 for "failure". A failure condition can be
1259 * due to simply not being in an active scan which
1260 * can occur if we send the scan abort before we
1261 * the microcode has notified us that a scan is
1262 * completed. */
1263 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1264 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1265 clear_bit(STATUS_SCAN_HW, &priv->status);
1266 }
1267
1268 dev_kfree_skb_any(cmd.meta.u.skb);
1269
1270 return rc;
1271 }
1272
1273 static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1274 struct iwl3945_cmd *cmd,
1275 struct sk_buff *skb)
1276 {
1277 return 1;
1278 }
1279
1280 /*
1281 * CARD_STATE_CMD
1282 *
1283 * Use: Sets the device's internal card state to enable, disable, or halt
1284 *
1285 * When in the 'enable' state the card operates as normal.
1286 * When in the 'disable' state, the card enters into a low power mode.
1287 * When in the 'halt' state, the card is shut down and must be fully
1288 * restarted to come back on.
1289 */
1290 static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1291 {
1292 struct iwl3945_host_cmd cmd = {
1293 .id = REPLY_CARD_STATE_CMD,
1294 .len = sizeof(u32),
1295 .data = &flags,
1296 .meta.flags = meta_flag,
1297 };
1298
1299 if (meta_flag & CMD_ASYNC)
1300 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1301
1302 return iwl3945_send_cmd(priv, &cmd);
1303 }
1304
1305 static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1306 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1307 {
1308 struct iwl3945_rx_packet *res = NULL;
1309
1310 if (!skb) {
1311 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1312 return 1;
1313 }
1314
1315 res = (struct iwl3945_rx_packet *)skb->data;
1316 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1317 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1318 res->hdr.flags);
1319 return 1;
1320 }
1321
1322 switch (res->u.add_sta.status) {
1323 case ADD_STA_SUCCESS_MSK:
1324 break;
1325 default:
1326 break;
1327 }
1328
1329 /* We didn't cache the SKB; let the caller free it */
1330 return 1;
1331 }
1332
1333 int iwl3945_send_add_station(struct iwl3945_priv *priv,
1334 struct iwl3945_addsta_cmd *sta, u8 flags)
1335 {
1336 struct iwl3945_rx_packet *res = NULL;
1337 int rc = 0;
1338 struct iwl3945_host_cmd cmd = {
1339 .id = REPLY_ADD_STA,
1340 .len = sizeof(struct iwl3945_addsta_cmd),
1341 .meta.flags = flags,
1342 .data = sta,
1343 };
1344
1345 if (flags & CMD_ASYNC)
1346 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1347 else
1348 cmd.meta.flags |= CMD_WANT_SKB;
1349
1350 rc = iwl3945_send_cmd(priv, &cmd);
1351
1352 if (rc || (flags & CMD_ASYNC))
1353 return rc;
1354
1355 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1356 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1357 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1358 res->hdr.flags);
1359 rc = -EIO;
1360 }
1361
1362 if (rc == 0) {
1363 switch (res->u.add_sta.status) {
1364 case ADD_STA_SUCCESS_MSK:
1365 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1366 break;
1367 default:
1368 rc = -EIO;
1369 IWL_WARNING("REPLY_ADD_STA failed\n");
1370 break;
1371 }
1372 }
1373
1374 priv->alloc_rxb_skb--;
1375 dev_kfree_skb_any(cmd.meta.u.skb);
1376
1377 return rc;
1378 }
1379
1380 static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1381 struct ieee80211_key_conf *keyconf,
1382 u8 sta_id)
1383 {
1384 unsigned long flags;
1385 __le16 key_flags = 0;
1386
1387 switch (keyconf->alg) {
1388 case ALG_CCMP:
1389 key_flags |= STA_KEY_FLG_CCMP;
1390 key_flags |= cpu_to_le16(
1391 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1392 key_flags &= ~STA_KEY_FLG_INVALID;
1393 break;
1394 case ALG_TKIP:
1395 case ALG_WEP:
1396 default:
1397 return -EINVAL;
1398 }
1399 spin_lock_irqsave(&priv->sta_lock, flags);
1400 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1401 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1402 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1403 keyconf->keylen);
1404
1405 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1406 keyconf->keylen);
1407 priv->stations[sta_id].sta.key.key_flags = key_flags;
1408 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1409 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1410
1411 spin_unlock_irqrestore(&priv->sta_lock, flags);
1412
1413 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1414 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1415 return 0;
1416 }
1417
1418 static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1419 {
1420 unsigned long flags;
1421
1422 spin_lock_irqsave(&priv->sta_lock, flags);
1423 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1424 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
1425 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1426 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1427 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1428 spin_unlock_irqrestore(&priv->sta_lock, flags);
1429
1430 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1431 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1432 return 0;
1433 }
1434
1435 static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1436 {
1437 struct list_head *element;
1438
1439 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1440 priv->frames_count);
1441
1442 while (!list_empty(&priv->free_frames)) {
1443 element = priv->free_frames.next;
1444 list_del(element);
1445 kfree(list_entry(element, struct iwl3945_frame, list));
1446 priv->frames_count--;
1447 }
1448
1449 if (priv->frames_count) {
1450 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1451 priv->frames_count);
1452 priv->frames_count = 0;
1453 }
1454 }
1455
1456 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1457 {
1458 struct iwl3945_frame *frame;
1459 struct list_head *element;
1460 if (list_empty(&priv->free_frames)) {
1461 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1462 if (!frame) {
1463 IWL_ERROR("Could not allocate frame!\n");
1464 return NULL;
1465 }
1466
1467 priv->frames_count++;
1468 return frame;
1469 }
1470
1471 element = priv->free_frames.next;
1472 list_del(element);
1473 return list_entry(element, struct iwl3945_frame, list);
1474 }
1475
1476 static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1477 {
1478 memset(frame, 0, sizeof(*frame));
1479 list_add(&frame->list, &priv->free_frames);
1480 }
1481
1482 unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1483 struct ieee80211_hdr *hdr,
1484 const u8 *dest, int left)
1485 {
1486
1487 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1488 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1489 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1490 return 0;
1491
1492 if (priv->ibss_beacon->len > left)
1493 return 0;
1494
1495 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1496
1497 return priv->ibss_beacon->len;
1498 }
1499
1500 static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
1501 {
1502 u8 i;
1503
1504 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1505 i = iwl3945_rates[i].next_ieee) {
1506 if (rate_mask & (1 << i))
1507 return iwl3945_rates[i].plcp;
1508 }
1509
1510 return IWL_RATE_INVALID;
1511 }
1512
1513 static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1514 {
1515 struct iwl3945_frame *frame;
1516 unsigned int frame_size;
1517 int rc;
1518 u8 rate;
1519
1520 frame = iwl3945_get_free_frame(priv);
1521
1522 if (!frame) {
1523 IWL_ERROR("Could not obtain free frame buffer for beacon "
1524 "command.\n");
1525 return -ENOMEM;
1526 }
1527
1528 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1529 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
1530 0xFF0);
1531 if (rate == IWL_INVALID_RATE)
1532 rate = IWL_RATE_6M_PLCP;
1533 } else {
1534 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1535 if (rate == IWL_INVALID_RATE)
1536 rate = IWL_RATE_1M_PLCP;
1537 }
1538
1539 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1540
1541 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1542 &frame->u.cmd[0]);
1543
1544 iwl3945_free_frame(priv, frame);
1545
1546 return rc;
1547 }
1548
1549 /******************************************************************************
1550 *
1551 * EEPROM related functions
1552 *
1553 ******************************************************************************/
1554
1555 static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1556 {
1557 memcpy(mac, priv->eeprom.mac_address, 6);
1558 }
1559
1560 /*
1561 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1562 * embedded controller) as EEPROM reader; each read is a series of pulses
1563 * to/from the EEPROM chip, not a single event, so even reads could conflict
1564 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1565 * simply claims ownership, which should be safe when this function is called
1566 * (i.e. before loading uCode!).
1567 */
1568 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1569 {
1570 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1571 return 0;
1572 }
1573
1574 /**
1575 * iwl3945_eeprom_init - read EEPROM contents
1576 *
1577 * Load the EEPROM contents from adapter into priv->eeprom
1578 *
1579 * NOTE: This routine uses the non-debug IO access functions.
1580 */
1581 int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1582 {
1583 __le16 *e = (__le16 *)&priv->eeprom;
1584 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1585 u32 r;
1586 int sz = sizeof(priv->eeprom);
1587 int rc;
1588 int i;
1589 u16 addr;
1590
1591 /* The EEPROM structure has several padding buffers within it
1592 * and when adding new EEPROM maps is subject to programmer errors
1593 * which may be very difficult to identify without explicitly
1594 * checking the resulting size of the eeprom map. */
1595 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1596
1597 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1598 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1599 return -ENOENT;
1600 }
1601
1602 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1603 rc = iwl3945_eeprom_acquire_semaphore(priv);
1604 if (rc < 0) {
1605 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1606 return -ENOENT;
1607 }
1608
1609 /* eeprom is an array of 16bit values */
1610 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1611 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1612 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1613
1614 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1615 i += IWL_EEPROM_ACCESS_DELAY) {
1616 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1617 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1618 break;
1619 udelay(IWL_EEPROM_ACCESS_DELAY);
1620 }
1621
1622 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1623 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1624 return -ETIMEDOUT;
1625 }
1626 e[addr / 2] = cpu_to_le16(r >> 16);
1627 }
1628
1629 return 0;
1630 }
1631
1632 /******************************************************************************
1633 *
1634 * Misc. internal state and helper functions
1635 *
1636 ******************************************************************************/
1637 #ifdef CONFIG_IWL3945_DEBUG
1638
1639 /**
1640 * iwl3945_report_frame - dump frame to syslog during debug sessions
1641 *
1642 * You may hack this function to show different aspects of received frames,
1643 * including selective frame dumps.
1644 * group100 parameter selects whether to show 1 out of 100 good frames.
1645 */
1646 void iwl3945_report_frame(struct iwl3945_priv *priv,
1647 struct iwl3945_rx_packet *pkt,
1648 struct ieee80211_hdr *header, int group100)
1649 {
1650 u32 to_us;
1651 u32 print_summary = 0;
1652 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1653 u32 hundred = 0;
1654 u32 dataframe = 0;
1655 u16 fc;
1656 u16 seq_ctl;
1657 u16 channel;
1658 u16 phy_flags;
1659 int rate_sym;
1660 u16 length;
1661 u16 status;
1662 u16 bcn_tmr;
1663 u32 tsf_low;
1664 u64 tsf;
1665 u8 rssi;
1666 u8 agc;
1667 u16 sig_avg;
1668 u16 noise_diff;
1669 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1670 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1671 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
1672 u8 *data = IWL_RX_DATA(pkt);
1673
1674 /* MAC header */
1675 fc = le16_to_cpu(header->frame_control);
1676 seq_ctl = le16_to_cpu(header->seq_ctrl);
1677
1678 /* metadata */
1679 channel = le16_to_cpu(rx_hdr->channel);
1680 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1681 rate_sym = rx_hdr->rate;
1682 length = le16_to_cpu(rx_hdr->len);
1683
1684 /* end-of-frame status and timestamp */
1685 status = le32_to_cpu(rx_end->status);
1686 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1687 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1688 tsf = le64_to_cpu(rx_end->timestamp);
1689
1690 /* signal statistics */
1691 rssi = rx_stats->rssi;
1692 agc = rx_stats->agc;
1693 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1694 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1695
1696 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1697
1698 /* if data frame is to us and all is good,
1699 * (optionally) print summary for only 1 out of every 100 */
1700 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1701 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1702 dataframe = 1;
1703 if (!group100)
1704 print_summary = 1; /* print each frame */
1705 else if (priv->framecnt_to_us < 100) {
1706 priv->framecnt_to_us++;
1707 print_summary = 0;
1708 } else {
1709 priv->framecnt_to_us = 0;
1710 print_summary = 1;
1711 hundred = 1;
1712 }
1713 } else {
1714 /* print summary for all other frames */
1715 print_summary = 1;
1716 }
1717
1718 if (print_summary) {
1719 char *title;
1720 u32 rate;
1721
1722 if (hundred)
1723 title = "100Frames";
1724 else if (fc & IEEE80211_FCTL_RETRY)
1725 title = "Retry";
1726 else if (ieee80211_is_assoc_response(fc))
1727 title = "AscRsp";
1728 else if (ieee80211_is_reassoc_response(fc))
1729 title = "RasRsp";
1730 else if (ieee80211_is_probe_response(fc)) {
1731 title = "PrbRsp";
1732 print_dump = 1; /* dump frame contents */
1733 } else if (ieee80211_is_beacon(fc)) {
1734 title = "Beacon";
1735 print_dump = 1; /* dump frame contents */
1736 } else if (ieee80211_is_atim(fc))
1737 title = "ATIM";
1738 else if (ieee80211_is_auth(fc))
1739 title = "Auth";
1740 else if (ieee80211_is_deauth(fc))
1741 title = "DeAuth";
1742 else if (ieee80211_is_disassoc(fc))
1743 title = "DisAssoc";
1744 else
1745 title = "Frame";
1746
1747 rate = iwl3945_rate_index_from_plcp(rate_sym);
1748 if (rate == -1)
1749 rate = 0;
1750 else
1751 rate = iwl3945_rates[rate].ieee / 2;
1752
1753 /* print frame summary.
1754 * MAC addresses show just the last byte (for brevity),
1755 * but you can hack it to show more, if you'd like to. */
1756 if (dataframe)
1757 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1758 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1759 title, fc, header->addr1[5],
1760 length, rssi, channel, rate);
1761 else {
1762 /* src/dst addresses assume managed mode */
1763 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1764 "src=0x%02x, rssi=%u, tim=%lu usec, "
1765 "phy=0x%02x, chnl=%d\n",
1766 title, fc, header->addr1[5],
1767 header->addr3[5], rssi,
1768 tsf_low - priv->scan_start_tsf,
1769 phy_flags, channel);
1770 }
1771 }
1772 if (print_dump)
1773 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
1774 }
1775 #endif
1776
1777 static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1778 {
1779 if (priv->hw_setting.shared_virt)
1780 pci_free_consistent(priv->pci_dev,
1781 sizeof(struct iwl3945_shared),
1782 priv->hw_setting.shared_virt,
1783 priv->hw_setting.shared_phys);
1784 }
1785
1786 /**
1787 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1788 *
1789 * return : set the bit for each supported rate insert in ie
1790 */
1791 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1792 u16 basic_rate, int *left)
1793 {
1794 u16 ret_rates = 0, bit;
1795 int i;
1796 u8 *cnt = ie;
1797 u8 *rates = ie + 1;
1798
1799 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1800 if (bit & supported_rate) {
1801 ret_rates |= bit;
1802 rates[*cnt] = iwl3945_rates[i].ieee |
1803 ((bit & basic_rate) ? 0x80 : 0x00);
1804 (*cnt)++;
1805 (*left)--;
1806 if ((*left <= 0) ||
1807 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1808 break;
1809 }
1810 }
1811
1812 return ret_rates;
1813 }
1814
1815 /**
1816 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1817 */
1818 static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1819 struct ieee80211_mgmt *frame,
1820 int left, int is_direct)
1821 {
1822 int len = 0;
1823 u8 *pos = NULL;
1824 u16 active_rates, ret_rates, cck_rates;
1825
1826 /* Make sure there is enough space for the probe request,
1827 * two mandatory IEs and the data */
1828 left -= 24;
1829 if (left < 0)
1830 return 0;
1831 len += 24;
1832
1833 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1834 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1835 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1836 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1837 frame->seq_ctrl = 0;
1838
1839 /* fill in our indirect SSID IE */
1840 /* ...next IE... */
1841
1842 left -= 2;
1843 if (left < 0)
1844 return 0;
1845 len += 2;
1846 pos = &(frame->u.probe_req.variable[0]);
1847 *pos++ = WLAN_EID_SSID;
1848 *pos++ = 0;
1849
1850 /* fill in our direct SSID IE... */
1851 if (is_direct) {
1852 /* ...next IE... */
1853 left -= 2 + priv->essid_len;
1854 if (left < 0)
1855 return 0;
1856 /* ... fill it in... */
1857 *pos++ = WLAN_EID_SSID;
1858 *pos++ = priv->essid_len;
1859 memcpy(pos, priv->essid, priv->essid_len);
1860 pos += priv->essid_len;
1861 len += 2 + priv->essid_len;
1862 }
1863
1864 /* fill in supported rate */
1865 /* ...next IE... */
1866 left -= 2;
1867 if (left < 0)
1868 return 0;
1869
1870 /* ... fill it in... */
1871 *pos++ = WLAN_EID_SUPP_RATES;
1872 *pos = 0;
1873
1874 priv->active_rate = priv->rates_mask;
1875 active_rates = priv->active_rate;
1876 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1877
1878 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1879 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1880 priv->active_rate_basic, &left);
1881 active_rates &= ~ret_rates;
1882
1883 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1884 priv->active_rate_basic, &left);
1885 active_rates &= ~ret_rates;
1886
1887 len += 2 + *pos;
1888 pos += (*pos) + 1;
1889 if (active_rates == 0)
1890 goto fill_end;
1891
1892 /* fill in supported extended rate */
1893 /* ...next IE... */
1894 left -= 2;
1895 if (left < 0)
1896 return 0;
1897 /* ... fill it in... */
1898 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1899 *pos = 0;
1900 iwl3945_supported_rate_to_ie(pos, active_rates,
1901 priv->active_rate_basic, &left);
1902 if (*pos > 0)
1903 len += 2 + *pos;
1904
1905 fill_end:
1906 return (u16)len;
1907 }
1908
1909 /*
1910 * QoS support
1911 */
1912 #ifdef CONFIG_IWL3945_QOS
1913 static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1914 struct iwl3945_qosparam_cmd *qos)
1915 {
1916
1917 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1918 sizeof(struct iwl3945_qosparam_cmd), qos);
1919 }
1920
1921 static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1922 {
1923 u16 cw_min = 15;
1924 u16 cw_max = 1023;
1925 u8 aifs = 2;
1926 u8 is_legacy = 0;
1927 unsigned long flags;
1928 int i;
1929
1930 spin_lock_irqsave(&priv->lock, flags);
1931 priv->qos_data.qos_active = 0;
1932
1933 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1934 if (priv->qos_data.qos_enable)
1935 priv->qos_data.qos_active = 1;
1936 if (!(priv->active_rate & 0xfff0)) {
1937 cw_min = 31;
1938 is_legacy = 1;
1939 }
1940 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1941 if (priv->qos_data.qos_enable)
1942 priv->qos_data.qos_active = 1;
1943 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1944 cw_min = 31;
1945 is_legacy = 1;
1946 }
1947
1948 if (priv->qos_data.qos_active)
1949 aifs = 3;
1950
1951 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1952 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1953 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1954 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1955 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1956
1957 if (priv->qos_data.qos_active) {
1958 i = 1;
1959 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1960 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1961 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1962 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1963 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1964
1965 i = 2;
1966 priv->qos_data.def_qos_parm.ac[i].cw_min =
1967 cpu_to_le16((cw_min + 1) / 2 - 1);
1968 priv->qos_data.def_qos_parm.ac[i].cw_max =
1969 cpu_to_le16(cw_max);
1970 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1971 if (is_legacy)
1972 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1973 cpu_to_le16(6016);
1974 else
1975 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1976 cpu_to_le16(3008);
1977 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1978
1979 i = 3;
1980 priv->qos_data.def_qos_parm.ac[i].cw_min =
1981 cpu_to_le16((cw_min + 1) / 4 - 1);
1982 priv->qos_data.def_qos_parm.ac[i].cw_max =
1983 cpu_to_le16((cw_max + 1) / 2 - 1);
1984 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1985 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1986 if (is_legacy)
1987 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1988 cpu_to_le16(3264);
1989 else
1990 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1991 cpu_to_le16(1504);
1992 } else {
1993 for (i = 1; i < 4; i++) {
1994 priv->qos_data.def_qos_parm.ac[i].cw_min =
1995 cpu_to_le16(cw_min);
1996 priv->qos_data.def_qos_parm.ac[i].cw_max =
1997 cpu_to_le16(cw_max);
1998 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1999 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2000 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2001 }
2002 }
2003 IWL_DEBUG_QOS("set QoS to default \n");
2004
2005 spin_unlock_irqrestore(&priv->lock, flags);
2006 }
2007
2008 static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
2009 {
2010 unsigned long flags;
2011
2012 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2013 return;
2014
2015 if (!priv->qos_data.qos_enable)
2016 return;
2017
2018 spin_lock_irqsave(&priv->lock, flags);
2019 priv->qos_data.def_qos_parm.qos_flags = 0;
2020
2021 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2022 !priv->qos_data.qos_cap.q_AP.txop_request)
2023 priv->qos_data.def_qos_parm.qos_flags |=
2024 QOS_PARAM_FLG_TXOP_TYPE_MSK;
2025
2026 if (priv->qos_data.qos_active)
2027 priv->qos_data.def_qos_parm.qos_flags |=
2028 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2029
2030 spin_unlock_irqrestore(&priv->lock, flags);
2031
2032 if (force || iwl3945_is_associated(priv)) {
2033 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
2034 priv->qos_data.qos_active);
2035
2036 iwl3945_send_qos_params_command(priv,
2037 &(priv->qos_data.def_qos_parm));
2038 }
2039 }
2040
2041 #endif /* CONFIG_IWL3945_QOS */
2042 /*
2043 * Power management (not Tx power!) functions
2044 */
2045 #define MSEC_TO_USEC 1024
2046
2047 #define NOSLP __constant_cpu_to_le32(0)
2048 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
2049 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2050 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2051 __constant_cpu_to_le32(X1), \
2052 __constant_cpu_to_le32(X2), \
2053 __constant_cpu_to_le32(X3), \
2054 __constant_cpu_to_le32(X4)}
2055
2056
2057 /* default power management (not Tx power) table values */
2058 /* for tim 0-10 */
2059 static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
2060 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2061 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2062 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2063 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2064 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2065 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2066 };
2067
2068 /* for tim > 10 */
2069 static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
2070 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2071 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2072 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2073 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2074 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2075 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2076 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2077 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2078 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2079 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2080 };
2081
2082 int iwl3945_power_init_handle(struct iwl3945_priv *priv)
2083 {
2084 int rc = 0, i;
2085 struct iwl3945_power_mgr *pow_data;
2086 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
2087 u16 pci_pm;
2088
2089 IWL_DEBUG_POWER("Initialize power \n");
2090
2091 pow_data = &(priv->power_data);
2092
2093 memset(pow_data, 0, sizeof(*pow_data));
2094
2095 pow_data->active_index = IWL_POWER_RANGE_0;
2096 pow_data->dtim_val = 0xffff;
2097
2098 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2099 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2100
2101 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2102 if (rc != 0)
2103 return 0;
2104 else {
2105 struct iwl3945_powertable_cmd *cmd;
2106
2107 IWL_DEBUG_POWER("adjust power command flags\n");
2108
2109 for (i = 0; i < IWL_POWER_AC; i++) {
2110 cmd = &pow_data->pwr_range_0[i].cmd;
2111
2112 if (pci_pm & 0x1)
2113 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2114 else
2115 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2116 }
2117 }
2118 return rc;
2119 }
2120
2121 static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
2122 struct iwl3945_powertable_cmd *cmd, u32 mode)
2123 {
2124 int rc = 0, i;
2125 u8 skip;
2126 u32 max_sleep = 0;
2127 struct iwl3945_power_vec_entry *range;
2128 u8 period = 0;
2129 struct iwl3945_power_mgr *pow_data;
2130
2131 if (mode > IWL_POWER_INDEX_5) {
2132 IWL_DEBUG_POWER("Error invalid power mode \n");
2133 return -1;
2134 }
2135 pow_data = &(priv->power_data);
2136
2137 if (pow_data->active_index == IWL_POWER_RANGE_0)
2138 range = &pow_data->pwr_range_0[0];
2139 else
2140 range = &pow_data->pwr_range_1[1];
2141
2142 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
2143
2144 #ifdef IWL_MAC80211_DISABLE
2145 if (priv->assoc_network != NULL) {
2146 unsigned long flags;
2147
2148 period = priv->assoc_network->tim.tim_period;
2149 }
2150 #endif /*IWL_MAC80211_DISABLE */
2151 skip = range[mode].no_dtim;
2152
2153 if (period == 0) {
2154 period = 1;
2155 skip = 0;
2156 }
2157
2158 if (skip == 0) {
2159 max_sleep = period;
2160 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2161 } else {
2162 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2163 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2164 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2165 }
2166
2167 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2168 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2169 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2170 }
2171
2172 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2173 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2174 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2175 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2176 le32_to_cpu(cmd->sleep_interval[0]),
2177 le32_to_cpu(cmd->sleep_interval[1]),
2178 le32_to_cpu(cmd->sleep_interval[2]),
2179 le32_to_cpu(cmd->sleep_interval[3]),
2180 le32_to_cpu(cmd->sleep_interval[4]));
2181
2182 return rc;
2183 }
2184
2185 static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
2186 {
2187 u32 uninitialized_var(final_mode);
2188 int rc;
2189 struct iwl3945_powertable_cmd cmd;
2190
2191 /* If on battery, set to 3,
2192 * if plugged into AC power, set to CAM ("continuously aware mode"),
2193 * else user level */
2194 switch (mode) {
2195 case IWL_POWER_BATTERY:
2196 final_mode = IWL_POWER_INDEX_3;
2197 break;
2198 case IWL_POWER_AC:
2199 final_mode = IWL_POWER_MODE_CAM;
2200 break;
2201 default:
2202 final_mode = mode;
2203 break;
2204 }
2205
2206 iwl3945_update_power_cmd(priv, &cmd, final_mode);
2207
2208 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2209
2210 if (final_mode == IWL_POWER_MODE_CAM)
2211 clear_bit(STATUS_POWER_PMI, &priv->status);
2212 else
2213 set_bit(STATUS_POWER_PMI, &priv->status);
2214
2215 return rc;
2216 }
2217
2218 int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
2219 {
2220 /* Filter incoming packets to determine if they are targeted toward
2221 * this network, discarding packets coming from ourselves */
2222 switch (priv->iw_mode) {
2223 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2224 /* packets from our adapter are dropped (echo) */
2225 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2226 return 0;
2227 /* {broad,multi}cast packets to our IBSS go through */
2228 if (is_multicast_ether_addr(header->addr1))
2229 return !compare_ether_addr(header->addr3, priv->bssid);
2230 /* packets to our adapter go through */
2231 return !compare_ether_addr(header->addr1, priv->mac_addr);
2232 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2233 /* packets from our adapter are dropped (echo) */
2234 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2235 return 0;
2236 /* {broad,multi}cast packets to our BSS go through */
2237 if (is_multicast_ether_addr(header->addr1))
2238 return !compare_ether_addr(header->addr2, priv->bssid);
2239 /* packets to our adapter go through */
2240 return !compare_ether_addr(header->addr1, priv->mac_addr);
2241 }
2242
2243 return 1;
2244 }
2245
2246 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2247
2248 static const char *iwl3945_get_tx_fail_reason(u32 status)
2249 {
2250 switch (status & TX_STATUS_MSK) {
2251 case TX_STATUS_SUCCESS:
2252 return "SUCCESS";
2253 TX_STATUS_ENTRY(SHORT_LIMIT);
2254 TX_STATUS_ENTRY(LONG_LIMIT);
2255 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2256 TX_STATUS_ENTRY(MGMNT_ABORT);
2257 TX_STATUS_ENTRY(NEXT_FRAG);
2258 TX_STATUS_ENTRY(LIFE_EXPIRE);
2259 TX_STATUS_ENTRY(DEST_PS);
2260 TX_STATUS_ENTRY(ABORTED);
2261 TX_STATUS_ENTRY(BT_RETRY);
2262 TX_STATUS_ENTRY(STA_INVALID);
2263 TX_STATUS_ENTRY(FRAG_DROPPED);
2264 TX_STATUS_ENTRY(TID_DISABLE);
2265 TX_STATUS_ENTRY(FRAME_FLUSHED);
2266 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2267 TX_STATUS_ENTRY(TX_LOCKED);
2268 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2269 }
2270
2271 return "UNKNOWN";
2272 }
2273
2274 /**
2275 * iwl3945_scan_cancel - Cancel any currently executing HW scan
2276 *
2277 * NOTE: priv->mutex is not required before calling this function
2278 */
2279 static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
2280 {
2281 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2282 clear_bit(STATUS_SCANNING, &priv->status);
2283 return 0;
2284 }
2285
2286 if (test_bit(STATUS_SCANNING, &priv->status)) {
2287 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2288 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2289 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2290 queue_work(priv->workqueue, &priv->abort_scan);
2291
2292 } else
2293 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2294
2295 return test_bit(STATUS_SCANNING, &priv->status);
2296 }
2297
2298 return 0;
2299 }
2300
2301 /**
2302 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2303 * @ms: amount of time to wait (in milliseconds) for scan to abort
2304 *
2305 * NOTE: priv->mutex must be held before calling this function
2306 */
2307 static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2308 {
2309 unsigned long now = jiffies;
2310 int ret;
2311
2312 ret = iwl3945_scan_cancel(priv);
2313 if (ret && ms) {
2314 mutex_unlock(&priv->mutex);
2315 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2316 test_bit(STATUS_SCANNING, &priv->status))
2317 msleep(1);
2318 mutex_lock(&priv->mutex);
2319
2320 return test_bit(STATUS_SCANNING, &priv->status);
2321 }
2322
2323 return ret;
2324 }
2325
2326 static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
2327 {
2328 /* Reset ieee stats */
2329
2330 /* We don't reset the net_device_stats (ieee->stats) on
2331 * re-association */
2332
2333 priv->last_seq_num = -1;
2334 priv->last_frag_num = -1;
2335 priv->last_packet_time = 0;
2336
2337 iwl3945_scan_cancel(priv);
2338 }
2339
2340 #define MAX_UCODE_BEACON_INTERVAL 1024
2341 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2342
2343 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2344 {
2345 u16 new_val = 0;
2346 u16 beacon_factor = 0;
2347
2348 beacon_factor =
2349 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2350 / MAX_UCODE_BEACON_INTERVAL;
2351 new_val = beacon_val / beacon_factor;
2352
2353 return cpu_to_le16(new_val);
2354 }
2355
2356 static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2357 {
2358 u64 interval_tm_unit;
2359 u64 tsf, result;
2360 unsigned long flags;
2361 struct ieee80211_conf *conf = NULL;
2362 u16 beacon_int = 0;
2363
2364 conf = ieee80211_get_hw_conf(priv->hw);
2365
2366 spin_lock_irqsave(&priv->lock, flags);
2367 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2368 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2369
2370 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2371
2372 tsf = priv->timestamp1;
2373 tsf = ((tsf << 32) | priv->timestamp0);
2374
2375 beacon_int = priv->beacon_int;
2376 spin_unlock_irqrestore(&priv->lock, flags);
2377
2378 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2379 if (beacon_int == 0) {
2380 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2381 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2382 } else {
2383 priv->rxon_timing.beacon_interval =
2384 cpu_to_le16(beacon_int);
2385 priv->rxon_timing.beacon_interval =
2386 iwl3945_adjust_beacon_interval(
2387 le16_to_cpu(priv->rxon_timing.beacon_interval));
2388 }
2389
2390 priv->rxon_timing.atim_window = 0;
2391 } else {
2392 priv->rxon_timing.beacon_interval =
2393 iwl3945_adjust_beacon_interval(conf->beacon_int);
2394 /* TODO: we need to get atim_window from upper stack
2395 * for now we set to 0 */
2396 priv->rxon_timing.atim_window = 0;
2397 }
2398
2399 interval_tm_unit =
2400 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2401 result = do_div(tsf, interval_tm_unit);
2402 priv->rxon_timing.beacon_init_val =
2403 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2404
2405 IWL_DEBUG_ASSOC
2406 ("beacon interval %d beacon timer %d beacon tim %d\n",
2407 le16_to_cpu(priv->rxon_timing.beacon_interval),
2408 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2409 le16_to_cpu(priv->rxon_timing.atim_window));
2410 }
2411
2412 static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2413 {
2414 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2415 IWL_ERROR("APs don't scan.\n");
2416 return 0;
2417 }
2418
2419 if (!iwl3945_is_ready_rf(priv)) {
2420 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2421 return -EIO;
2422 }
2423
2424 if (test_bit(STATUS_SCANNING, &priv->status)) {
2425 IWL_DEBUG_SCAN("Scan already in progress.\n");
2426 return -EAGAIN;
2427 }
2428
2429 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2430 IWL_DEBUG_SCAN("Scan request while abort pending. "
2431 "Queuing.\n");
2432 return -EAGAIN;
2433 }
2434
2435 IWL_DEBUG_INFO("Starting scan...\n");
2436 priv->scan_bands = 2;
2437 set_bit(STATUS_SCANNING, &priv->status);
2438 priv->scan_start = jiffies;
2439 priv->scan_pass_start = priv->scan_start;
2440
2441 queue_work(priv->workqueue, &priv->request_scan);
2442
2443 return 0;
2444 }
2445
2446 static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2447 {
2448 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2449
2450 if (hw_decrypt)
2451 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2452 else
2453 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2454
2455 return 0;
2456 }
2457
2458 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode)
2459 {
2460 if (phymode == MODE_IEEE80211A) {
2461 priv->staging_rxon.flags &=
2462 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2463 | RXON_FLG_CCK_MSK);
2464 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2465 } else {
2466 /* Copied from iwl3945_bg_post_associate() */
2467 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2468 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2469 else
2470 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2471
2472 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2473 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2474
2475 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2476 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2477 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2478 }
2479 }
2480
2481 /*
2482 * initialize rxon structure with default values from eeprom
2483 */
2484 static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
2485 {
2486 const struct iwl3945_channel_info *ch_info;
2487
2488 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2489
2490 switch (priv->iw_mode) {
2491 case IEEE80211_IF_TYPE_AP:
2492 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2493 break;
2494
2495 case IEEE80211_IF_TYPE_STA:
2496 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2497 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2498 break;
2499
2500 case IEEE80211_IF_TYPE_IBSS:
2501 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2502 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2503 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2504 RXON_FILTER_ACCEPT_GRP_MSK;
2505 break;
2506
2507 case IEEE80211_IF_TYPE_MNTR:
2508 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2509 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2510 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2511 break;
2512 }
2513
2514 #if 0
2515 /* TODO: Figure out when short_preamble would be set and cache from
2516 * that */
2517 if (!hw_to_local(priv->hw)->short_preamble)
2518 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2519 else
2520 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2521 #endif
2522
2523 ch_info = iwl3945_get_channel_info(priv, priv->phymode,
2524 le16_to_cpu(priv->staging_rxon.channel));
2525
2526 if (!ch_info)
2527 ch_info = &priv->channel_info[0];
2528
2529 /*
2530 * in some case A channels are all non IBSS
2531 * in this case force B/G channel
2532 */
2533 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2534 !(is_channel_ibss(ch_info)))
2535 ch_info = &priv->channel_info[0];
2536
2537 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2538 if (is_channel_a_band(ch_info))
2539 priv->phymode = MODE_IEEE80211A;
2540 else
2541 priv->phymode = MODE_IEEE80211G;
2542
2543 iwl3945_set_flags_for_phymode(priv, priv->phymode);
2544
2545 priv->staging_rxon.ofdm_basic_rates =
2546 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2547 priv->staging_rxon.cck_basic_rates =
2548 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2549 }
2550
2551 static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2552 {
2553 if (mode == IEEE80211_IF_TYPE_IBSS) {
2554 const struct iwl3945_channel_info *ch_info;
2555
2556 ch_info = iwl3945_get_channel_info(priv,
2557 priv->phymode,
2558 le16_to_cpu(priv->staging_rxon.channel));
2559
2560 if (!ch_info || !is_channel_ibss(ch_info)) {
2561 IWL_ERROR("channel %d not IBSS channel\n",
2562 le16_to_cpu(priv->staging_rxon.channel));
2563 return -EINVAL;
2564 }
2565 }
2566
2567 priv->iw_mode = mode;
2568
2569 iwl3945_connection_init_rx_config(priv);
2570 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2571
2572 iwl3945_clear_stations_table(priv);
2573
2574 /* dont commit rxon if rf-kill is on*/
2575 if (!iwl3945_is_ready_rf(priv))
2576 return -EAGAIN;
2577
2578 cancel_delayed_work(&priv->scan_check);
2579 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2580 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2581 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2582 return -EAGAIN;
2583 }
2584
2585 iwl3945_commit_rxon(priv);
2586
2587 return 0;
2588 }
2589
2590 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2591 struct ieee80211_tx_control *ctl,
2592 struct iwl3945_cmd *cmd,
2593 struct sk_buff *skb_frag,
2594 int last_frag)
2595 {
2596 struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
2597
2598 switch (keyinfo->alg) {
2599 case ALG_CCMP:
2600 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2601 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2602 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2603 break;
2604
2605 case ALG_TKIP:
2606 #if 0
2607 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2608
2609 if (last_frag)
2610 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2611 8);
2612 else
2613 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2614 #endif
2615 break;
2616
2617 case ALG_WEP:
2618 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2619 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2620
2621 if (keyinfo->keylen == 13)
2622 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2623
2624 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2625
2626 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2627 "with key %d\n", ctl->key_idx);
2628 break;
2629
2630 default:
2631 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2632 break;
2633 }
2634 }
2635
2636 /*
2637 * handle build REPLY_TX command notification.
2638 */
2639 static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2640 struct iwl3945_cmd *cmd,
2641 struct ieee80211_tx_control *ctrl,
2642 struct ieee80211_hdr *hdr,
2643 int is_unicast, u8 std_id)
2644 {
2645 __le16 *qc;
2646 u16 fc = le16_to_cpu(hdr->frame_control);
2647 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2648
2649 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2650 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2651 tx_flags |= TX_CMD_FLG_ACK_MSK;
2652 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2653 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2654 if (ieee80211_is_probe_response(fc) &&
2655 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2656 tx_flags |= TX_CMD_FLG_TSF_MSK;
2657 } else {
2658 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2659 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2660 }
2661
2662 cmd->cmd.tx.sta_id = std_id;
2663 if (ieee80211_get_morefrag(hdr))
2664 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2665
2666 qc = ieee80211_get_qos_ctrl(hdr);
2667 if (qc) {
2668 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2669 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2670 } else
2671 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2672
2673 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2674 tx_flags |= TX_CMD_FLG_RTS_MSK;
2675 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2676 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2677 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2678 tx_flags |= TX_CMD_FLG_CTS_MSK;
2679 }
2680
2681 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2682 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2683
2684 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2685 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2686 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2687 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
2688 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2689 else
2690 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2691 } else
2692 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2693
2694 cmd->cmd.tx.driver_txop = 0;
2695 cmd->cmd.tx.tx_flags = tx_flags;
2696 cmd->cmd.tx.next_frame_len = 0;
2697 }
2698
2699 /**
2700 * iwl3945_get_sta_id - Find station's index within station table
2701 */
2702 static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2703 {
2704 int sta_id;
2705 u16 fc = le16_to_cpu(hdr->frame_control);
2706
2707 /* If this frame is broadcast or management, use broadcast station id */
2708 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2709 is_multicast_ether_addr(hdr->addr1))
2710 return priv->hw_setting.bcast_sta_id;
2711
2712 switch (priv->iw_mode) {
2713
2714 /* If we are a client station in a BSS network, use the special
2715 * AP station entry (that's the only station we communicate with) */
2716 case IEEE80211_IF_TYPE_STA:
2717 return IWL_AP_ID;
2718
2719 /* If we are an AP, then find the station, or use BCAST */
2720 case IEEE80211_IF_TYPE_AP:
2721 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2722 if (sta_id != IWL_INVALID_STATION)
2723 return sta_id;
2724 return priv->hw_setting.bcast_sta_id;
2725
2726 /* If this frame is going out to an IBSS network, find the station,
2727 * or create a new station table entry */
2728 case IEEE80211_IF_TYPE_IBSS: {
2729 DECLARE_MAC_BUF(mac);
2730
2731 /* Create new station table entry */
2732 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2733 if (sta_id != IWL_INVALID_STATION)
2734 return sta_id;
2735
2736 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2737
2738 if (sta_id != IWL_INVALID_STATION)
2739 return sta_id;
2740
2741 IWL_DEBUG_DROP("Station %s not in station map. "
2742 "Defaulting to broadcast...\n",
2743 print_mac(mac, hdr->addr1));
2744 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2745 return priv->hw_setting.bcast_sta_id;
2746 }
2747 default:
2748 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2749 return priv->hw_setting.bcast_sta_id;
2750 }
2751 }
2752
2753 /*
2754 * start REPLY_TX command process
2755 */
2756 static int iwl3945_tx_skb(struct iwl3945_priv *priv,
2757 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2758 {
2759 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2760 struct iwl3945_tfd_frame *tfd;
2761 u32 *control_flags;
2762 int txq_id = ctl->queue;
2763 struct iwl3945_tx_queue *txq = NULL;
2764 struct iwl3945_queue *q = NULL;
2765 dma_addr_t phys_addr;
2766 dma_addr_t txcmd_phys;
2767 struct iwl3945_cmd *out_cmd = NULL;
2768 u16 len, idx, len_org;
2769 u8 id, hdr_len, unicast;
2770 u8 sta_id;
2771 u16 seq_number = 0;
2772 u16 fc;
2773 __le16 *qc;
2774 u8 wait_write_ptr = 0;
2775 unsigned long flags;
2776 int rc;
2777
2778 spin_lock_irqsave(&priv->lock, flags);
2779 if (iwl3945_is_rfkill(priv)) {
2780 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2781 goto drop_unlock;
2782 }
2783
2784 if (!priv->vif) {
2785 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
2786 goto drop_unlock;
2787 }
2788
2789 if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2790 IWL_ERROR("ERROR: No TX rate available.\n");
2791 goto drop_unlock;
2792 }
2793
2794 unicast = !is_multicast_ether_addr(hdr->addr1);
2795 id = 0;
2796
2797 fc = le16_to_cpu(hdr->frame_control);
2798
2799 #ifdef CONFIG_IWL3945_DEBUG
2800 if (ieee80211_is_auth(fc))
2801 IWL_DEBUG_TX("Sending AUTH frame\n");
2802 else if (ieee80211_is_assoc_request(fc))
2803 IWL_DEBUG_TX("Sending ASSOC frame\n");
2804 else if (ieee80211_is_reassoc_request(fc))
2805 IWL_DEBUG_TX("Sending REASSOC frame\n");
2806 #endif
2807
2808 /* drop all data frame if we are not associated */
2809 if ((!iwl3945_is_associated(priv) || !priv->assoc_id) &&
2810 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
2811 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2812 goto drop_unlock;
2813 }
2814
2815 spin_unlock_irqrestore(&priv->lock, flags);
2816
2817 hdr_len = ieee80211_get_hdrlen(fc);
2818
2819 /* Find (or create) index into station table for destination station */
2820 sta_id = iwl3945_get_sta_id(priv, hdr);
2821 if (sta_id == IWL_INVALID_STATION) {
2822 DECLARE_MAC_BUF(mac);
2823
2824 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2825 print_mac(mac, hdr->addr1));
2826 goto drop;
2827 }
2828
2829 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2830
2831 qc = ieee80211_get_qos_ctrl(hdr);
2832 if (qc) {
2833 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2834 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2835 IEEE80211_SCTL_SEQ;
2836 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2837 (hdr->seq_ctrl &
2838 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2839 seq_number += 0x10;
2840 }
2841
2842 /* Descriptor for chosen Tx queue */
2843 txq = &priv->txq[txq_id];
2844 q = &txq->q;
2845
2846 spin_lock_irqsave(&priv->lock, flags);
2847
2848 /* Set up first empty TFD within this queue's circular TFD buffer */
2849 tfd = &txq->bd[q->write_ptr];
2850 memset(tfd, 0, sizeof(*tfd));
2851 control_flags = (u32 *) tfd;
2852 idx = get_cmd_index(q, q->write_ptr, 0);
2853
2854 /* Set up driver data for this TFD */
2855 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2856 txq->txb[q->write_ptr].skb[0] = skb;
2857 memcpy(&(txq->txb[q->write_ptr].status.control),
2858 ctl, sizeof(struct ieee80211_tx_control));
2859
2860 /* Init first empty entry in queue's array of Tx/cmd buffers */
2861 out_cmd = &txq->cmd[idx];
2862 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2863 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2864
2865 /*
2866 * Set up the Tx-command (not MAC!) header.
2867 * Store the chosen Tx queue and TFD index within the sequence field;
2868 * after Tx, uCode's Tx response will return this value so driver can
2869 * locate the frame within the tx queue and do post-tx processing.
2870 */
2871 out_cmd->hdr.cmd = REPLY_TX;
2872 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2873 INDEX_TO_SEQ(q->write_ptr)));
2874
2875 /* Copy MAC header from skb into command buffer */
2876 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2877
2878 /*
2879 * Use the first empty entry in this queue's command buffer array
2880 * to contain the Tx command and MAC header concatenated together
2881 * (payload data will be in another buffer).
2882 * Size of this varies, due to varying MAC header length.
2883 * If end is not dword aligned, we'll have 2 extra bytes at the end
2884 * of the MAC header (device reads on dword boundaries).
2885 * We'll tell device about this padding later.
2886 */
2887 len = priv->hw_setting.tx_cmd_len +
2888 sizeof(struct iwl3945_cmd_header) + hdr_len;
2889
2890 len_org = len;
2891 len = (len + 3) & ~3;
2892
2893 if (len_org != len)
2894 len_org = 1;
2895 else
2896 len_org = 0;
2897
2898 /* Physical address of this Tx command's header (not MAC header!),
2899 * within command buffer array. */
2900 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2901 offsetof(struct iwl3945_cmd, hdr);
2902
2903 /* Add buffer containing Tx command and MAC(!) header to TFD's
2904 * first entry */
2905 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2906
2907 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
2908 iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
2909
2910 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2911 * if any (802.11 null frames have no payload). */
2912 len = skb->len - hdr_len;
2913 if (len) {
2914 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2915 len, PCI_DMA_TODEVICE);
2916 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2917 }
2918
2919 if (!len)
2920 /* If there is no payload, then we use only one Tx buffer */
2921 *control_flags = TFD_CTL_COUNT_SET(1);
2922 else
2923 /* Else use 2 buffers.
2924 * Tell 3945 about any padding after MAC header */
2925 *control_flags = TFD_CTL_COUNT_SET(2) |
2926 TFD_CTL_PAD_SET(U32_PAD(len));
2927
2928 /* Total # bytes to be transmitted */
2929 len = (u16)skb->len;
2930 out_cmd->cmd.tx.len = cpu_to_le16(len);
2931
2932 /* TODO need this for burst mode later on */
2933 iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
2934
2935 /* set is_hcca to 0; it probably will never be implemented */
2936 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
2937
2938 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2939 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2940
2941 if (!ieee80211_get_morefrag(hdr)) {
2942 txq->need_update = 1;
2943 if (qc) {
2944 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2945 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2946 }
2947 } else {
2948 wait_write_ptr = 1;
2949 txq->need_update = 0;
2950 }
2951
2952 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
2953 sizeof(out_cmd->cmd.tx));
2954
2955 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2956 ieee80211_get_hdrlen(fc));
2957
2958 /* Tell device the write index *just past* this latest filled TFD */
2959 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
2960 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2961 spin_unlock_irqrestore(&priv->lock, flags);
2962
2963 if (rc)
2964 return rc;
2965
2966 if ((iwl3945_queue_space(q) < q->high_mark)
2967 && priv->mac80211_registered) {
2968 if (wait_write_ptr) {
2969 spin_lock_irqsave(&priv->lock, flags);
2970 txq->need_update = 1;
2971 iwl3945_tx_queue_update_write_ptr(priv, txq);
2972 spin_unlock_irqrestore(&priv->lock, flags);
2973 }
2974
2975 ieee80211_stop_queue(priv->hw, ctl->queue);
2976 }
2977
2978 return 0;
2979
2980 drop_unlock:
2981 spin_unlock_irqrestore(&priv->lock, flags);
2982 drop:
2983 return -1;
2984 }
2985
2986 static void iwl3945_set_rate(struct iwl3945_priv *priv)
2987 {
2988 const struct ieee80211_hw_mode *hw = NULL;
2989 struct ieee80211_rate *rate;
2990 int i;
2991
2992 hw = iwl3945_get_hw_mode(priv, priv->phymode);
2993 if (!hw) {
2994 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2995 return;
2996 }
2997
2998 priv->active_rate = 0;
2999 priv->active_rate_basic = 0;
3000
3001 IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
3002 hw->mode == MODE_IEEE80211A ?
3003 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
3004
3005 for (i = 0; i < hw->num_rates; i++) {
3006 rate = &(hw->rates[i]);
3007 if ((rate->val < IWL_RATE_COUNT) &&
3008 (rate->flags & IEEE80211_RATE_SUPPORTED)) {
3009 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
3010 rate->val, iwl3945_rates[rate->val].plcp,
3011 (rate->flags & IEEE80211_RATE_BASIC) ?
3012 "*" : "");
3013 priv->active_rate |= (1 << rate->val);
3014 if (rate->flags & IEEE80211_RATE_BASIC)
3015 priv->active_rate_basic |= (1 << rate->val);
3016 } else
3017 IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
3018 rate->val, iwl3945_rates[rate->val].plcp);
3019 }
3020
3021 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3022 priv->active_rate, priv->active_rate_basic);
3023
3024 /*
3025 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3026 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3027 * OFDM
3028 */
3029 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3030 priv->staging_rxon.cck_basic_rates =
3031 ((priv->active_rate_basic &
3032 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3033 else
3034 priv->staging_rxon.cck_basic_rates =
3035 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3036
3037 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3038 priv->staging_rxon.ofdm_basic_rates =
3039 ((priv->active_rate_basic &
3040 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3041 IWL_FIRST_OFDM_RATE) & 0xFF;
3042 else
3043 priv->staging_rxon.ofdm_basic_rates =
3044 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3045 }
3046
3047 static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
3048 {
3049 unsigned long flags;
3050
3051 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3052 return;
3053
3054 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3055 disable_radio ? "OFF" : "ON");
3056
3057 if (disable_radio) {
3058 iwl3945_scan_cancel(priv);
3059 /* FIXME: This is a workaround for AP */
3060 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3061 spin_lock_irqsave(&priv->lock, flags);
3062 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3063 CSR_UCODE_SW_BIT_RFKILL);
3064 spin_unlock_irqrestore(&priv->lock, flags);
3065 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
3066 set_bit(STATUS_RF_KILL_SW, &priv->status);
3067 }
3068 return;
3069 }
3070
3071 spin_lock_irqsave(&priv->lock, flags);
3072 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3073
3074 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3075 spin_unlock_irqrestore(&priv->lock, flags);
3076
3077 /* wake up ucode */
3078 msleep(10);
3079
3080 spin_lock_irqsave(&priv->lock, flags);
3081 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3082 if (!iwl3945_grab_nic_access(priv))
3083 iwl3945_release_nic_access(priv);
3084 spin_unlock_irqrestore(&priv->lock, flags);
3085
3086 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3087 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3088 "disabled by HW switch\n");
3089 return;
3090 }
3091
3092 queue_work(priv->workqueue, &priv->restart);
3093 return;
3094 }
3095
3096 void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
3097 u32 decrypt_res, struct ieee80211_rx_status *stats)
3098 {
3099 u16 fc =
3100 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3101
3102 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3103 return;
3104
3105 if (!(fc & IEEE80211_FCTL_PROTECTED))
3106 return;
3107
3108 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3109 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3110 case RX_RES_STATUS_SEC_TYPE_TKIP:
3111 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3112 RX_RES_STATUS_BAD_ICV_MIC)
3113 stats->flag |= RX_FLAG_MMIC_ERROR;
3114 case RX_RES_STATUS_SEC_TYPE_WEP:
3115 case RX_RES_STATUS_SEC_TYPE_CCMP:
3116 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3117 RX_RES_STATUS_DECRYPT_OK) {
3118 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3119 stats->flag |= RX_FLAG_DECRYPTED;
3120 }
3121 break;
3122
3123 default:
3124 break;
3125 }
3126 }
3127
3128 #define IWL_PACKET_RETRY_TIME HZ
3129
3130 int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
3131 {
3132 u16 sc = le16_to_cpu(header->seq_ctrl);
3133 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3134 u16 frag = sc & IEEE80211_SCTL_FRAG;
3135 u16 *last_seq, *last_frag;
3136 unsigned long *last_time;
3137
3138 switch (priv->iw_mode) {
3139 case IEEE80211_IF_TYPE_IBSS:{
3140 struct list_head *p;
3141 struct iwl3945_ibss_seq *entry = NULL;
3142 u8 *mac = header->addr2;
3143 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3144
3145 __list_for_each(p, &priv->ibss_mac_hash[index]) {
3146 entry = list_entry(p, struct iwl3945_ibss_seq, list);
3147 if (!compare_ether_addr(entry->mac, mac))
3148 break;
3149 }
3150 if (p == &priv->ibss_mac_hash[index]) {
3151 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3152 if (!entry) {
3153 IWL_ERROR("Cannot malloc new mac entry\n");
3154 return 0;
3155 }
3156 memcpy(entry->mac, mac, ETH_ALEN);
3157 entry->seq_num = seq;
3158 entry->frag_num = frag;
3159 entry->packet_time = jiffies;
3160 list_add(&entry->list, &priv->ibss_mac_hash[index]);
3161 return 0;
3162 }
3163 last_seq = &entry->seq_num;
3164 last_frag = &entry->frag_num;
3165 last_time = &entry->packet_time;
3166 break;
3167 }
3168 case IEEE80211_IF_TYPE_STA:
3169 last_seq = &priv->last_seq_num;
3170 last_frag = &priv->last_frag_num;
3171 last_time = &priv->last_packet_time;
3172 break;
3173 default:
3174 return 0;
3175 }
3176 if ((*last_seq == seq) &&
3177 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3178 if (*last_frag == frag)
3179 goto drop;
3180 if (*last_frag + 1 != frag)
3181 /* out-of-order fragment */
3182 goto drop;
3183 } else
3184 *last_seq = seq;
3185
3186 *last_frag = frag;
3187 *last_time = jiffies;
3188 return 0;
3189
3190 drop:
3191 return 1;
3192 }
3193
3194 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3195
3196 #include "iwl-spectrum.h"
3197
3198 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
3199 #define BEACON_TIME_MASK_HIGH 0xFF000000
3200 #define TIME_UNIT 1024
3201
3202 /*
3203 * extended beacon time format
3204 * time in usec will be changed into a 32-bit value in 8:24 format
3205 * the high 1 byte is the beacon counts
3206 * the lower 3 bytes is the time in usec within one beacon interval
3207 */
3208
3209 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
3210 {
3211 u32 quot;
3212 u32 rem;
3213 u32 interval = beacon_interval * 1024;
3214
3215 if (!interval || !usec)
3216 return 0;
3217
3218 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3219 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3220
3221 return (quot << 24) + rem;
3222 }
3223
3224 /* base is usually what we get from ucode with each received frame,
3225 * the same as HW timer counter counting down
3226 */
3227
3228 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
3229 {
3230 u32 base_low = base & BEACON_TIME_MASK_LOW;
3231 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3232 u32 interval = beacon_interval * TIME_UNIT;
3233 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3234 (addon & BEACON_TIME_MASK_HIGH);
3235
3236 if (base_low > addon_low)
3237 res += base_low - addon_low;
3238 else if (base_low < addon_low) {
3239 res += interval + base_low - addon_low;
3240 res += (1 << 24);
3241 } else
3242 res += (1 << 24);
3243
3244 return cpu_to_le32(res);
3245 }
3246
3247 static int iwl3945_get_measurement(struct iwl3945_priv *priv,
3248 struct ieee80211_measurement_params *params,
3249 u8 type)
3250 {
3251 struct iwl3945_spectrum_cmd spectrum;
3252 struct iwl3945_rx_packet *res;
3253 struct iwl3945_host_cmd cmd = {
3254 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3255 .data = (void *)&spectrum,
3256 .meta.flags = CMD_WANT_SKB,
3257 };
3258 u32 add_time = le64_to_cpu(params->start_time);
3259 int rc;
3260 int spectrum_resp_status;
3261 int duration = le16_to_cpu(params->duration);
3262
3263 if (iwl3945_is_associated(priv))
3264 add_time =
3265 iwl3945_usecs_to_beacons(
3266 le64_to_cpu(params->start_time) - priv->last_tsf,
3267 le16_to_cpu(priv->rxon_timing.beacon_interval));
3268
3269 memset(&spectrum, 0, sizeof(spectrum));
3270
3271 spectrum.channel_count = cpu_to_le16(1);
3272 spectrum.flags =
3273 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3274 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3275 cmd.len = sizeof(spectrum);
3276 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3277
3278 if (iwl3945_is_associated(priv))
3279 spectrum.start_time =
3280 iwl3945_add_beacon_time(priv->last_beacon_time,
3281 add_time,
3282 le16_to_cpu(priv->rxon_timing.beacon_interval));
3283 else
3284 spectrum.start_time = 0;
3285
3286 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3287 spectrum.channels[0].channel = params->channel;
3288 spectrum.channels[0].type = type;
3289 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3290 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3291 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3292
3293 rc = iwl3945_send_cmd_sync(priv, &cmd);
3294 if (rc)
3295 return rc;
3296
3297 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
3298 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3299 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3300 rc = -EIO;
3301 }
3302
3303 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3304 switch (spectrum_resp_status) {
3305 case 0: /* Command will be handled */
3306 if (res->u.spectrum.id != 0xff) {
3307 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3308 res->u.spectrum.id);
3309 priv->measurement_status &= ~MEASUREMENT_READY;
3310 }
3311 priv->measurement_status |= MEASUREMENT_ACTIVE;
3312 rc = 0;
3313 break;
3314
3315 case 1: /* Command will not be handled */
3316 rc = -EAGAIN;
3317 break;
3318 }
3319
3320 dev_kfree_skb_any(cmd.meta.u.skb);
3321
3322 return rc;
3323 }
3324 #endif
3325
3326 static void iwl3945_txstatus_to_ieee(struct iwl3945_priv *priv,
3327 struct iwl3945_tx_info *tx_sta)
3328 {
3329
3330 tx_sta->status.ack_signal = 0;
3331 tx_sta->status.excessive_retries = 0;
3332 tx_sta->status.queue_length = 0;
3333 tx_sta->status.queue_number = 0;
3334
3335 if (in_interrupt())
3336 ieee80211_tx_status_irqsafe(priv->hw,
3337 tx_sta->skb[0], &(tx_sta->status));
3338 else
3339 ieee80211_tx_status(priv->hw,
3340 tx_sta->skb[0], &(tx_sta->status));
3341
3342 tx_sta->skb[0] = NULL;
3343 }
3344
3345 /**
3346 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
3347 *
3348 * When FW advances 'R' index, all entries between old and new 'R' index
3349 * need to be reclaimed. As result, some free space forms. If there is
3350 * enough free space (> low mark), wake the stack that feeds us.
3351 */
3352 static int iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, int txq_id, int index)
3353 {
3354 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3355 struct iwl3945_queue *q = &txq->q;
3356 int nfreed = 0;
3357
3358 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3359 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3360 "is out of range [0-%d] %d %d.\n", txq_id,
3361 index, q->n_bd, q->write_ptr, q->read_ptr);
3362 return 0;
3363 }
3364
3365 for (index = iwl3945_queue_inc_wrap(index, q->n_bd);
3366 q->read_ptr != index;
3367 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3368 if (txq_id != IWL_CMD_QUEUE_NUM) {
3369 iwl3945_txstatus_to_ieee(priv,
3370 &(txq->txb[txq->q.read_ptr]));
3371 iwl3945_hw_txq_free_tfd(priv, txq);
3372 } else if (nfreed > 1) {
3373 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3374 q->write_ptr, q->read_ptr);
3375 queue_work(priv->workqueue, &priv->restart);
3376 }
3377 nfreed++;
3378 }
3379
3380 if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
3381 (txq_id != IWL_CMD_QUEUE_NUM) &&
3382 priv->mac80211_registered)
3383 ieee80211_wake_queue(priv->hw, txq_id);
3384
3385
3386 return nfreed;
3387 }
3388
3389 static int iwl3945_is_tx_success(u32 status)
3390 {
3391 return (status & 0xFF) == 0x1;
3392 }
3393
3394 /******************************************************************************
3395 *
3396 * Generic RX handler implementations
3397 *
3398 ******************************************************************************/
3399 /**
3400 * iwl3945_rx_reply_tx - Handle Tx response
3401 */
3402 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
3403 struct iwl3945_rx_mem_buffer *rxb)
3404 {
3405 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3406 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3407 int txq_id = SEQ_TO_QUEUE(sequence);
3408 int index = SEQ_TO_INDEX(sequence);
3409 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3410 struct ieee80211_tx_status *tx_status;
3411 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3412 u32 status = le32_to_cpu(tx_resp->status);
3413
3414 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3415 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3416 "is out of range [0-%d] %d %d\n", txq_id,
3417 index, txq->q.n_bd, txq->q.write_ptr,
3418 txq->q.read_ptr);
3419 return;
3420 }
3421
3422 tx_status = &(txq->txb[txq->q.read_ptr].status);
3423
3424 tx_status->retry_count = tx_resp->failure_frame;
3425 tx_status->queue_number = status;
3426 tx_status->queue_length = tx_resp->bt_kill_count;
3427 tx_status->queue_length |= tx_resp->failure_rts;
3428
3429 tx_status->flags =
3430 iwl3945_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
3431
3432 tx_status->control.tx_rate = iwl3945_rate_index_from_plcp(tx_resp->rate);
3433
3434 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
3435 txq_id, iwl3945_get_tx_fail_reason(status), status,
3436 tx_resp->rate, tx_resp->failure_frame);
3437
3438 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3439 if (index != -1)
3440 iwl3945_tx_queue_reclaim(priv, txq_id, index);
3441
3442 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3443 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3444 }
3445
3446
3447 static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3448 struct iwl3945_rx_mem_buffer *rxb)
3449 {
3450 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3451 struct iwl3945_alive_resp *palive;
3452 struct delayed_work *pwork;
3453
3454 palive = &pkt->u.alive_frame;
3455
3456 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3457 "0x%01X 0x%01X\n",
3458 palive->is_valid, palive->ver_type,
3459 palive->ver_subtype);
3460
3461 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3462 IWL_DEBUG_INFO("Initialization Alive received.\n");
3463 memcpy(&priv->card_alive_init,
3464 &pkt->u.alive_frame,
3465 sizeof(struct iwl3945_init_alive_resp));
3466 pwork = &priv->init_alive_start;
3467 } else {
3468 IWL_DEBUG_INFO("Runtime Alive received.\n");
3469 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3470 sizeof(struct iwl3945_alive_resp));
3471 pwork = &priv->alive_start;
3472 iwl3945_disable_events(priv);
3473 }
3474
3475 /* We delay the ALIVE response by 5ms to
3476 * give the HW RF Kill time to activate... */
3477 if (palive->is_valid == UCODE_VALID_OK)
3478 queue_delayed_work(priv->workqueue, pwork,
3479 msecs_to_jiffies(5));
3480 else
3481 IWL_WARNING("uCode did not respond OK.\n");
3482 }
3483
3484 static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3485 struct iwl3945_rx_mem_buffer *rxb)
3486 {
3487 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3488
3489 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3490 return;
3491 }
3492
3493 static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3494 struct iwl3945_rx_mem_buffer *rxb)
3495 {
3496 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3497
3498 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3499 "seq 0x%04X ser 0x%08X\n",
3500 le32_to_cpu(pkt->u.err_resp.error_type),
3501 get_cmd_string(pkt->u.err_resp.cmd_id),
3502 pkt->u.err_resp.cmd_id,
3503 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3504 le32_to_cpu(pkt->u.err_resp.error_info));
3505 }
3506
3507 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3508
3509 static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3510 {
3511 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3512 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3513 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
3514 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3515 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3516 rxon->channel = csa->channel;
3517 priv->staging_rxon.channel = csa->channel;
3518 }
3519
3520 static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3521 struct iwl3945_rx_mem_buffer *rxb)
3522 {
3523 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3524 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3525 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
3526
3527 if (!report->state) {
3528 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3529 "Spectrum Measure Notification: Start\n");
3530 return;
3531 }
3532
3533 memcpy(&priv->measure_report, report, sizeof(*report));
3534 priv->measurement_status |= MEASUREMENT_READY;
3535 #endif
3536 }
3537
3538 static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3539 struct iwl3945_rx_mem_buffer *rxb)
3540 {
3541 #ifdef CONFIG_IWL3945_DEBUG
3542 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3543 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
3544 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3545 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3546 #endif
3547 }
3548
3549 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3550 struct iwl3945_rx_mem_buffer *rxb)
3551 {
3552 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3553 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3554 "notification for %s:\n",
3555 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3556 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3557 }
3558
3559 static void iwl3945_bg_beacon_update(struct work_struct *work)
3560 {
3561 struct iwl3945_priv *priv =
3562 container_of(work, struct iwl3945_priv, beacon_update);
3563 struct sk_buff *beacon;
3564
3565 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3566 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
3567
3568 if (!beacon) {
3569 IWL_ERROR("update beacon failed\n");
3570 return;
3571 }
3572
3573 mutex_lock(&priv->mutex);
3574 /* new beacon skb is allocated every time; dispose previous.*/
3575 if (priv->ibss_beacon)
3576 dev_kfree_skb(priv->ibss_beacon);
3577
3578 priv->ibss_beacon = beacon;
3579 mutex_unlock(&priv->mutex);
3580
3581 iwl3945_send_beacon_cmd(priv);
3582 }
3583
3584 static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3585 struct iwl3945_rx_mem_buffer *rxb)
3586 {
3587 #ifdef CONFIG_IWL3945_DEBUG
3588 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3589 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3590 u8 rate = beacon->beacon_notify_hdr.rate;
3591
3592 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3593 "tsf %d %d rate %d\n",
3594 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3595 beacon->beacon_notify_hdr.failure_frame,
3596 le32_to_cpu(beacon->ibss_mgr_status),
3597 le32_to_cpu(beacon->high_tsf),
3598 le32_to_cpu(beacon->low_tsf), rate);
3599 #endif
3600
3601 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3602 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3603 queue_work(priv->workqueue, &priv->beacon_update);
3604 }
3605
3606 /* Service response to REPLY_SCAN_CMD (0x80) */
3607 static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3608 struct iwl3945_rx_mem_buffer *rxb)
3609 {
3610 #ifdef CONFIG_IWL3945_DEBUG
3611 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3612 struct iwl3945_scanreq_notification *notif =
3613 (struct iwl3945_scanreq_notification *)pkt->u.raw;
3614
3615 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3616 #endif
3617 }
3618
3619 /* Service SCAN_START_NOTIFICATION (0x82) */
3620 static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3621 struct iwl3945_rx_mem_buffer *rxb)
3622 {
3623 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3624 struct iwl3945_scanstart_notification *notif =
3625 (struct iwl3945_scanstart_notification *)pkt->u.raw;
3626 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3627 IWL_DEBUG_SCAN("Scan start: "
3628 "%d [802.11%s] "
3629 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3630 notif->channel,
3631 notif->band ? "bg" : "a",
3632 notif->tsf_high,
3633 notif->tsf_low, notif->status, notif->beacon_timer);
3634 }
3635
3636 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3637 static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3638 struct iwl3945_rx_mem_buffer *rxb)
3639 {
3640 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3641 struct iwl3945_scanresults_notification *notif =
3642 (struct iwl3945_scanresults_notification *)pkt->u.raw;
3643
3644 IWL_DEBUG_SCAN("Scan ch.res: "
3645 "%d [802.11%s] "
3646 "(TSF: 0x%08X:%08X) - %d "
3647 "elapsed=%lu usec (%dms since last)\n",
3648 notif->channel,
3649 notif->band ? "bg" : "a",
3650 le32_to_cpu(notif->tsf_high),
3651 le32_to_cpu(notif->tsf_low),
3652 le32_to_cpu(notif->statistics[0]),
3653 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3654 jiffies_to_msecs(elapsed_jiffies
3655 (priv->last_scan_jiffies, jiffies)));
3656
3657 priv->last_scan_jiffies = jiffies;
3658 priv->next_scan_jiffies = 0;
3659 }
3660
3661 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3662 static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3663 struct iwl3945_rx_mem_buffer *rxb)
3664 {
3665 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3666 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3667
3668 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3669 scan_notif->scanned_channels,
3670 scan_notif->tsf_low,
3671 scan_notif->tsf_high, scan_notif->status);
3672
3673 /* The HW is no longer scanning */
3674 clear_bit(STATUS_SCAN_HW, &priv->status);
3675
3676 /* The scan completion notification came in, so kill that timer... */
3677 cancel_delayed_work(&priv->scan_check);
3678
3679 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3680 (priv->scan_bands == 2) ? "2.4" : "5.2",
3681 jiffies_to_msecs(elapsed_jiffies
3682 (priv->scan_pass_start, jiffies)));
3683
3684 /* Remove this scanned band from the list
3685 * of pending bands to scan */
3686 priv->scan_bands--;
3687
3688 /* If a request to abort was given, or the scan did not succeed
3689 * then we reset the scan state machine and terminate,
3690 * re-queuing another scan if one has been requested */
3691 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3692 IWL_DEBUG_INFO("Aborted scan completed.\n");
3693 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3694 } else {
3695 /* If there are more bands on this scan pass reschedule */
3696 if (priv->scan_bands > 0)
3697 goto reschedule;
3698 }
3699
3700 priv->last_scan_jiffies = jiffies;
3701 priv->next_scan_jiffies = 0;
3702 IWL_DEBUG_INFO("Setting scan to off\n");
3703
3704 clear_bit(STATUS_SCANNING, &priv->status);
3705
3706 IWL_DEBUG_INFO("Scan took %dms\n",
3707 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3708
3709 queue_work(priv->workqueue, &priv->scan_completed);
3710
3711 return;
3712
3713 reschedule:
3714 priv->scan_pass_start = jiffies;
3715 queue_work(priv->workqueue, &priv->request_scan);
3716 }
3717
3718 /* Handle notification from uCode that card's power state is changing
3719 * due to software, hardware, or critical temperature RFKILL */
3720 static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3721 struct iwl3945_rx_mem_buffer *rxb)
3722 {
3723 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3724 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3725 unsigned long status = priv->status;
3726
3727 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3728 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3729 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3730
3731 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3732 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3733
3734 if (flags & HW_CARD_DISABLED)
3735 set_bit(STATUS_RF_KILL_HW, &priv->status);
3736 else
3737 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3738
3739
3740 if (flags & SW_CARD_DISABLED)
3741 set_bit(STATUS_RF_KILL_SW, &priv->status);
3742 else
3743 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3744
3745 iwl3945_scan_cancel(priv);
3746
3747 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3748 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3749 (test_bit(STATUS_RF_KILL_SW, &status) !=
3750 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3751 queue_work(priv->workqueue, &priv->rf_kill);
3752 else
3753 wake_up_interruptible(&priv->wait_command_queue);
3754 }
3755
3756 /**
3757 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3758 *
3759 * Setup the RX handlers for each of the reply types sent from the uCode
3760 * to the host.
3761 *
3762 * This function chains into the hardware specific files for them to setup
3763 * any hardware specific handlers as well.
3764 */
3765 static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3766 {
3767 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3768 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3769 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3770 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3771 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3772 iwl3945_rx_spectrum_measure_notif;
3773 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3774 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3775 iwl3945_rx_pm_debug_statistics_notif;
3776 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3777
3778 /*
3779 * The same handler is used for both the REPLY to a discrete
3780 * statistics request from the host as well as for the periodic
3781 * statistics notifications (after received beacons) from the uCode.
3782 */
3783 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3784 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3785
3786 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3787 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3788 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3789 iwl3945_rx_scan_results_notif;
3790 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3791 iwl3945_rx_scan_complete_notif;
3792 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3793 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
3794
3795 /* Set up hardware specific Rx handlers */
3796 iwl3945_hw_rx_handler_setup(priv);
3797 }
3798
3799 /**
3800 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3801 * @rxb: Rx buffer to reclaim
3802 *
3803 * If an Rx buffer has an async callback associated with it the callback
3804 * will be executed. The attached skb (if present) will only be freed
3805 * if the callback returns 1
3806 */
3807 static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3808 struct iwl3945_rx_mem_buffer *rxb)
3809 {
3810 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3811 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3812 int txq_id = SEQ_TO_QUEUE(sequence);
3813 int index = SEQ_TO_INDEX(sequence);
3814 int huge = sequence & SEQ_HUGE_FRAME;
3815 int cmd_index;
3816 struct iwl3945_cmd *cmd;
3817
3818 /* If a Tx command is being handled and it isn't in the actual
3819 * command queue then there a command routing bug has been introduced
3820 * in the queue management code. */
3821 if (txq_id != IWL_CMD_QUEUE_NUM)
3822 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3823 txq_id, pkt->hdr.cmd);
3824 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3825
3826 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3827 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3828
3829 /* Input error checking is done when commands are added to queue. */
3830 if (cmd->meta.flags & CMD_WANT_SKB) {
3831 cmd->meta.source->u.skb = rxb->skb;
3832 rxb->skb = NULL;
3833 } else if (cmd->meta.u.callback &&
3834 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3835 rxb->skb = NULL;
3836
3837 iwl3945_tx_queue_reclaim(priv, txq_id, index);
3838
3839 if (!(cmd->meta.flags & CMD_ASYNC)) {
3840 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3841 wake_up_interruptible(&priv->wait_command_queue);
3842 }
3843 }
3844
3845 /************************** RX-FUNCTIONS ****************************/
3846 /*
3847 * Rx theory of operation
3848 *
3849 * The host allocates 32 DMA target addresses and passes the host address
3850 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3851 * 0 to 31
3852 *
3853 * Rx Queue Indexes
3854 * The host/firmware share two index registers for managing the Rx buffers.
3855 *
3856 * The READ index maps to the first position that the firmware may be writing
3857 * to -- the driver can read up to (but not including) this position and get
3858 * good data.
3859 * The READ index is managed by the firmware once the card is enabled.
3860 *
3861 * The WRITE index maps to the last position the driver has read from -- the
3862 * position preceding WRITE is the last slot the firmware can place a packet.
3863 *
3864 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3865 * WRITE = READ.
3866 *
3867 * During initialization, the host sets up the READ queue position to the first
3868 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3869 *
3870 * When the firmware places a packet in a buffer, it will advance the READ index
3871 * and fire the RX interrupt. The driver can then query the READ index and
3872 * process as many packets as possible, moving the WRITE index forward as it
3873 * resets the Rx queue buffers with new memory.
3874 *
3875 * The management in the driver is as follows:
3876 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3877 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3878 * to replenish the iwl->rxq->rx_free.
3879 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3880 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3881 * 'processed' and 'read' driver indexes as well)
3882 * + A received packet is processed and handed to the kernel network stack,
3883 * detached from the iwl->rxq. The driver 'processed' index is updated.
3884 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3885 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3886 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3887 * were enough free buffers and RX_STALLED is set it is cleared.
3888 *
3889 *
3890 * Driver sequence:
3891 *
3892 * iwl3945_rx_queue_alloc() Allocates rx_free
3893 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3894 * iwl3945_rx_queue_restock
3895 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3896 * queue, updates firmware pointers, and updates
3897 * the WRITE index. If insufficient rx_free buffers
3898 * are available, schedules iwl3945_rx_replenish
3899 *
3900 * -- enable interrupts --
3901 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
3902 * READ INDEX, detaching the SKB from the pool.
3903 * Moves the packet buffer from queue to rx_used.
3904 * Calls iwl3945_rx_queue_restock to refill any empty
3905 * slots.
3906 * ...
3907 *
3908 */
3909
3910 /**
3911 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3912 */
3913 static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
3914 {
3915 int s = q->read - q->write;
3916 if (s <= 0)
3917 s += RX_QUEUE_SIZE;
3918 /* keep some buffer to not confuse full and empty queue */
3919 s -= 2;
3920 if (s < 0)
3921 s = 0;
3922 return s;
3923 }
3924
3925 /**
3926 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3927 */
3928 int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
3929 {
3930 u32 reg = 0;
3931 int rc = 0;
3932 unsigned long flags;
3933
3934 spin_lock_irqsave(&q->lock, flags);
3935
3936 if (q->need_update == 0)
3937 goto exit_unlock;
3938
3939 /* If power-saving is in use, make sure device is awake */
3940 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3941 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3942
3943 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3944 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3945 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3946 goto exit_unlock;
3947 }
3948
3949 rc = iwl3945_grab_nic_access(priv);
3950 if (rc)
3951 goto exit_unlock;
3952
3953 /* Device expects a multiple of 8 */
3954 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
3955 q->write & ~0x7);
3956 iwl3945_release_nic_access(priv);
3957
3958 /* Else device is assumed to be awake */
3959 } else
3960 /* Device expects a multiple of 8 */
3961 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3962
3963
3964 q->need_update = 0;
3965
3966 exit_unlock:
3967 spin_unlock_irqrestore(&q->lock, flags);
3968 return rc;
3969 }
3970
3971 /**
3972 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3973 */
3974 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
3975 dma_addr_t dma_addr)
3976 {
3977 return cpu_to_le32((u32)dma_addr);
3978 }
3979
3980 /**
3981 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3982 *
3983 * If there are slots in the RX queue that need to be restocked,
3984 * and we have free pre-allocated buffers, fill the ranks as much
3985 * as we can, pulling from rx_free.
3986 *
3987 * This moves the 'write' index forward to catch up with 'processed', and
3988 * also updates the memory address in the firmware to reference the new
3989 * target buffer.
3990 */
3991 static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
3992 {
3993 struct iwl3945_rx_queue *rxq = &priv->rxq;
3994 struct list_head *element;
3995 struct iwl3945_rx_mem_buffer *rxb;
3996 unsigned long flags;
3997 int write, rc;
3998
3999 spin_lock_irqsave(&rxq->lock, flags);
4000 write = rxq->write & ~0x7;
4001 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
4002 /* Get next free Rx buffer, remove from free list */
4003 element = rxq->rx_free.next;
4004 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
4005 list_del(element);
4006
4007 /* Point to Rx buffer via next RBD in circular buffer */
4008 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
4009 rxq->queue[rxq->write] = rxb;
4010 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4011 rxq->free_count--;
4012 }
4013 spin_unlock_irqrestore(&rxq->lock, flags);
4014 /* If the pre-allocated buffer pool is dropping low, schedule to
4015 * refill it */
4016 if (rxq->free_count <= RX_LOW_WATERMARK)
4017 queue_work(priv->workqueue, &priv->rx_replenish);
4018
4019
4020 /* If we've added more space for the firmware to place data, tell it.
4021 * Increment device's write pointer in multiples of 8. */
4022 if ((write != (rxq->write & ~0x7))
4023 || (abs(rxq->write - rxq->read) > 7)) {
4024 spin_lock_irqsave(&rxq->lock, flags);
4025 rxq->need_update = 1;
4026 spin_unlock_irqrestore(&rxq->lock, flags);
4027 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
4028 if (rc)
4029 return rc;
4030 }
4031
4032 return 0;
4033 }
4034
4035 /**
4036 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
4037 *
4038 * When moving to rx_free an SKB is allocated for the slot.
4039 *
4040 * Also restock the Rx queue via iwl3945_rx_queue_restock.
4041 * This is called as a scheduled work item (except for during initialization)
4042 */
4043 static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
4044 {
4045 struct iwl3945_rx_queue *rxq = &priv->rxq;
4046 struct list_head *element;
4047 struct iwl3945_rx_mem_buffer *rxb;
4048 unsigned long flags;
4049 spin_lock_irqsave(&rxq->lock, flags);
4050 while (!list_empty(&rxq->rx_used)) {
4051 element = rxq->rx_used.next;
4052 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
4053
4054 /* Alloc a new receive buffer */
4055 rxb->skb =
4056 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
4057 if (!rxb->skb) {
4058 if (net_ratelimit())
4059 printk(KERN_CRIT DRV_NAME
4060 ": Can not allocate SKB buffers\n");
4061 /* We don't reschedule replenish work here -- we will
4062 * call the restock method and if it still needs
4063 * more buffers it will schedule replenish */
4064 break;
4065 }
4066
4067 /* If radiotap head is required, reserve some headroom here.
4068 * The physical head count is a variable rx_stats->phy_count.
4069 * We reserve 4 bytes here. Plus these extra bytes, the
4070 * headroom of the physical head should be enough for the
4071 * radiotap head that iwl3945 supported. See iwl3945_rt.
4072 */
4073 skb_reserve(rxb->skb, 4);
4074
4075 priv->alloc_rxb_skb++;
4076 list_del(element);
4077
4078 /* Get physical address of RB/SKB */
4079 rxb->dma_addr =
4080 pci_map_single(priv->pci_dev, rxb->skb->data,
4081 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4082 list_add_tail(&rxb->list, &rxq->rx_free);
4083 rxq->free_count++;
4084 }
4085 spin_unlock_irqrestore(&rxq->lock, flags);
4086 }
4087
4088 /*
4089 * this should be called while priv->lock is locked
4090 */
4091 static void __iwl3945_rx_replenish(void *data)
4092 {
4093 struct iwl3945_priv *priv = data;
4094
4095 iwl3945_rx_allocate(priv);
4096 iwl3945_rx_queue_restock(priv);
4097 }
4098
4099
4100 void iwl3945_rx_replenish(void *data)
4101 {
4102 struct iwl3945_priv *priv = data;
4103 unsigned long flags;
4104
4105 iwl3945_rx_allocate(priv);
4106
4107 spin_lock_irqsave(&priv->lock, flags);
4108 iwl3945_rx_queue_restock(priv);
4109 spin_unlock_irqrestore(&priv->lock, flags);
4110 }
4111
4112 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
4113 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
4114 * This free routine walks the list of POOL entries and if SKB is set to
4115 * non NULL it is unmapped and freed
4116 */
4117 static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
4118 {
4119 int i;
4120 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4121 if (rxq->pool[i].skb != NULL) {
4122 pci_unmap_single(priv->pci_dev,
4123 rxq->pool[i].dma_addr,
4124 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4125 dev_kfree_skb(rxq->pool[i].skb);
4126 }
4127 }
4128
4129 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4130 rxq->dma_addr);
4131 rxq->bd = NULL;
4132 }
4133
4134 int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
4135 {
4136 struct iwl3945_rx_queue *rxq = &priv->rxq;
4137 struct pci_dev *dev = priv->pci_dev;
4138 int i;
4139
4140 spin_lock_init(&rxq->lock);
4141 INIT_LIST_HEAD(&rxq->rx_free);
4142 INIT_LIST_HEAD(&rxq->rx_used);
4143
4144 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
4145 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4146 if (!rxq->bd)
4147 return -ENOMEM;
4148
4149 /* Fill the rx_used queue with _all_ of the Rx buffers */
4150 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4151 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4152
4153 /* Set us so that we have processed and used all buffers, but have
4154 * not restocked the Rx queue with fresh buffers */
4155 rxq->read = rxq->write = 0;
4156 rxq->free_count = 0;
4157 rxq->need_update = 0;
4158 return 0;
4159 }
4160
4161 void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
4162 {
4163 unsigned long flags;
4164 int i;
4165 spin_lock_irqsave(&rxq->lock, flags);
4166 INIT_LIST_HEAD(&rxq->rx_free);
4167 INIT_LIST_HEAD(&rxq->rx_used);
4168 /* Fill the rx_used queue with _all_ of the Rx buffers */
4169 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4170 /* In the reset function, these buffers may have been allocated
4171 * to an SKB, so we need to unmap and free potential storage */
4172 if (rxq->pool[i].skb != NULL) {
4173 pci_unmap_single(priv->pci_dev,
4174 rxq->pool[i].dma_addr,
4175 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4176 priv->alloc_rxb_skb--;
4177 dev_kfree_skb(rxq->pool[i].skb);
4178 rxq->pool[i].skb = NULL;
4179 }
4180 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4181 }
4182
4183 /* Set us so that we have processed and used all buffers, but have
4184 * not restocked the Rx queue with fresh buffers */
4185 rxq->read = rxq->write = 0;
4186 rxq->free_count = 0;
4187 spin_unlock_irqrestore(&rxq->lock, flags);
4188 }
4189
4190 /* Convert linear signal-to-noise ratio into dB */
4191 static u8 ratio2dB[100] = {
4192 /* 0 1 2 3 4 5 6 7 8 9 */
4193 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4194 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4195 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4196 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4197 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4198 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4199 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4200 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4201 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4202 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4203 };
4204
4205 /* Calculates a relative dB value from a ratio of linear
4206 * (i.e. not dB) signal levels.
4207 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
4208 int iwl3945_calc_db_from_ratio(int sig_ratio)
4209 {
4210 /* 1000:1 or higher just report as 60 dB */
4211 if (sig_ratio >= 1000)
4212 return 60;
4213
4214 /* 100:1 or higher, divide by 10 and use table,
4215 * add 20 dB to make up for divide by 10 */
4216 if (sig_ratio >= 100)
4217 return (20 + (int)ratio2dB[sig_ratio/10]);
4218
4219 /* We shouldn't see this */
4220 if (sig_ratio < 1)
4221 return 0;
4222
4223 /* Use table for ratios 1:1 - 99:1 */
4224 return (int)ratio2dB[sig_ratio];
4225 }
4226
4227 #define PERFECT_RSSI (-20) /* dBm */
4228 #define WORST_RSSI (-95) /* dBm */
4229 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4230
4231 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
4232 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4233 * about formulas used below. */
4234 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
4235 {
4236 int sig_qual;
4237 int degradation = PERFECT_RSSI - rssi_dbm;
4238
4239 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4240 * as indicator; formula is (signal dbm - noise dbm).
4241 * SNR at or above 40 is a great signal (100%).
4242 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4243 * Weakest usable signal is usually 10 - 15 dB SNR. */
4244 if (noise_dbm) {
4245 if (rssi_dbm - noise_dbm >= 40)
4246 return 100;
4247 else if (rssi_dbm < noise_dbm)
4248 return 0;
4249 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4250
4251 /* Else use just the signal level.
4252 * This formula is a least squares fit of data points collected and
4253 * compared with a reference system that had a percentage (%) display
4254 * for signal quality. */
4255 } else
4256 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4257 (15 * RSSI_RANGE + 62 * degradation)) /
4258 (RSSI_RANGE * RSSI_RANGE);
4259
4260 if (sig_qual > 100)
4261 sig_qual = 100;
4262 else if (sig_qual < 1)
4263 sig_qual = 0;
4264
4265 return sig_qual;
4266 }
4267
4268 /**
4269 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
4270 *
4271 * Uses the priv->rx_handlers callback function array to invoke
4272 * the appropriate handlers, including command responses,
4273 * frame-received notifications, and other notifications.
4274 */
4275 static void iwl3945_rx_handle(struct iwl3945_priv *priv)
4276 {
4277 struct iwl3945_rx_mem_buffer *rxb;
4278 struct iwl3945_rx_packet *pkt;
4279 struct iwl3945_rx_queue *rxq = &priv->rxq;
4280 u32 r, i;
4281 int reclaim;
4282 unsigned long flags;
4283 u8 fill_rx = 0;
4284 u32 count = 0;
4285
4286 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4287 * buffer that the driver may process (last buffer filled by ucode). */
4288 r = iwl3945_hw_get_rx_read(priv);
4289 i = rxq->read;
4290
4291 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4292 fill_rx = 1;
4293 /* Rx interrupt, but nothing sent from uCode */
4294 if (i == r)
4295 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4296
4297 while (i != r) {
4298 rxb = rxq->queue[i];
4299
4300 /* If an RXB doesn't have a Rx queue slot associated with it,
4301 * then a bug has been introduced in the queue refilling
4302 * routines -- catch it here */
4303 BUG_ON(rxb == NULL);
4304
4305 rxq->queue[i] = NULL;
4306
4307 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4308 IWL_RX_BUF_SIZE,
4309 PCI_DMA_FROMDEVICE);
4310 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
4311
4312 /* Reclaim a command buffer only if this packet is a response
4313 * to a (driver-originated) command.
4314 * If the packet (e.g. Rx frame) originated from uCode,
4315 * there is no command buffer to reclaim.
4316 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4317 * but apparently a few don't get set; catch them here. */
4318 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4319 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4320 (pkt->hdr.cmd != REPLY_TX);
4321
4322 /* Based on type of command response or notification,
4323 * handle those that need handling via function in
4324 * rx_handlers table. See iwl3945_setup_rx_handlers() */
4325 if (priv->rx_handlers[pkt->hdr.cmd]) {
4326 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4327 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4328 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4329 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4330 } else {
4331 /* No handling needed */
4332 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4333 "r %d i %d No handler needed for %s, 0x%02x\n",
4334 r, i, get_cmd_string(pkt->hdr.cmd),
4335 pkt->hdr.cmd);
4336 }
4337
4338 if (reclaim) {
4339 /* Invoke any callbacks, transfer the skb to caller, and
4340 * fire off the (possibly) blocking iwl3945_send_cmd()
4341 * as we reclaim the driver command queue */
4342 if (rxb && rxb->skb)
4343 iwl3945_tx_cmd_complete(priv, rxb);
4344 else
4345 IWL_WARNING("Claim null rxb?\n");
4346 }
4347
4348 /* For now we just don't re-use anything. We can tweak this
4349 * later to try and re-use notification packets and SKBs that
4350 * fail to Rx correctly */
4351 if (rxb->skb != NULL) {
4352 priv->alloc_rxb_skb--;
4353 dev_kfree_skb_any(rxb->skb);
4354 rxb->skb = NULL;
4355 }
4356
4357 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4358 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4359 spin_lock_irqsave(&rxq->lock, flags);
4360 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4361 spin_unlock_irqrestore(&rxq->lock, flags);
4362 i = (i + 1) & RX_QUEUE_MASK;
4363 /* If there are a lot of unused frames,
4364 * restock the Rx queue so ucode won't assert. */
4365 if (fill_rx) {
4366 count++;
4367 if (count >= 8) {
4368 priv->rxq.read = i;
4369 __iwl3945_rx_replenish(priv);
4370 count = 0;
4371 }
4372 }
4373 }
4374
4375 /* Backtrack one entry */
4376 priv->rxq.read = i;
4377 iwl3945_rx_queue_restock(priv);
4378 }
4379
4380 /**
4381 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4382 */
4383 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4384 struct iwl3945_tx_queue *txq)
4385 {
4386 u32 reg = 0;
4387 int rc = 0;
4388 int txq_id = txq->q.id;
4389
4390 if (txq->need_update == 0)
4391 return rc;
4392
4393 /* if we're trying to save power */
4394 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4395 /* wake up nic if it's powered down ...
4396 * uCode will wake up, and interrupt us again, so next
4397 * time we'll skip this part. */
4398 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
4399
4400 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4401 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4402 iwl3945_set_bit(priv, CSR_GP_CNTRL,
4403 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4404 return rc;
4405 }
4406
4407 /* restore this queue's parameters in nic hardware. */
4408 rc = iwl3945_grab_nic_access(priv);
4409 if (rc)
4410 return rc;
4411 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
4412 txq->q.write_ptr | (txq_id << 8));
4413 iwl3945_release_nic_access(priv);
4414
4415 /* else not in power-save mode, uCode will never sleep when we're
4416 * trying to tx (during RFKILL, we're not trying to tx). */
4417 } else
4418 iwl3945_write32(priv, HBUS_TARG_WRPTR,
4419 txq->q.write_ptr | (txq_id << 8));
4420
4421 txq->need_update = 0;
4422
4423 return rc;
4424 }
4425
4426 #ifdef CONFIG_IWL3945_DEBUG
4427 static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
4428 {
4429 DECLARE_MAC_BUF(mac);
4430
4431 IWL_DEBUG_RADIO("RX CONFIG:\n");
4432 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4433 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4434 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4435 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4436 le32_to_cpu(rxon->filter_flags));
4437 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4438 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4439 rxon->ofdm_basic_rates);
4440 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4441 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4442 print_mac(mac, rxon->node_addr));
4443 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4444 print_mac(mac, rxon->bssid_addr));
4445 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4446 }
4447 #endif
4448
4449 static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
4450 {
4451 IWL_DEBUG_ISR("Enabling interrupts\n");
4452 set_bit(STATUS_INT_ENABLED, &priv->status);
4453 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4454 }
4455
4456 static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
4457 {
4458 clear_bit(STATUS_INT_ENABLED, &priv->status);
4459
4460 /* disable interrupts from uCode/NIC to host */
4461 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4462
4463 /* acknowledge/clear/reset any interrupts still pending
4464 * from uCode or flow handler (Rx/Tx DMA) */
4465 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4466 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4467 IWL_DEBUG_ISR("Disabled interrupts\n");
4468 }
4469
4470 static const char *desc_lookup(int i)
4471 {
4472 switch (i) {
4473 case 1:
4474 return "FAIL";
4475 case 2:
4476 return "BAD_PARAM";
4477 case 3:
4478 return "BAD_CHECKSUM";
4479 case 4:
4480 return "NMI_INTERRUPT";
4481 case 5:
4482 return "SYSASSERT";
4483 case 6:
4484 return "FATAL_ERROR";
4485 }
4486
4487 return "UNKNOWN";
4488 }
4489
4490 #define ERROR_START_OFFSET (1 * sizeof(u32))
4491 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4492
4493 static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4494 {
4495 u32 i;
4496 u32 desc, time, count, base, data1;
4497 u32 blink1, blink2, ilink1, ilink2;
4498 int rc;
4499
4500 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4501
4502 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4503 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4504 return;
4505 }
4506
4507 rc = iwl3945_grab_nic_access(priv);
4508 if (rc) {
4509 IWL_WARNING("Can not read from adapter at this time.\n");
4510 return;
4511 }
4512
4513 count = iwl3945_read_targ_mem(priv, base);
4514
4515 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4516 IWL_ERROR("Start IWL Error Log Dump:\n");
4517 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4518 priv->status, priv->config, count);
4519 }
4520
4521 IWL_ERROR("Desc Time asrtPC blink2 "
4522 "ilink1 nmiPC Line\n");
4523 for (i = ERROR_START_OFFSET;
4524 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4525 i += ERROR_ELEM_SIZE) {
4526 desc = iwl3945_read_targ_mem(priv, base + i);
4527 time =
4528 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4529 blink1 =
4530 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4531 blink2 =
4532 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4533 ilink1 =
4534 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4535 ilink2 =
4536 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4537 data1 =
4538 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4539
4540 IWL_ERROR
4541 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4542 desc_lookup(desc), desc, time, blink1, blink2,
4543 ilink1, ilink2, data1);
4544 }
4545
4546 iwl3945_release_nic_access(priv);
4547
4548 }
4549
4550 #define EVENT_START_OFFSET (6 * sizeof(u32))
4551
4552 /**
4553 * iwl3945_print_event_log - Dump error event log to syslog
4554 *
4555 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4556 */
4557 static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4558 u32 num_events, u32 mode)
4559 {
4560 u32 i;
4561 u32 base; /* SRAM byte address of event log header */
4562 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4563 u32 ptr; /* SRAM byte address of log data */
4564 u32 ev, time, data; /* event log data */
4565
4566 if (num_events == 0)
4567 return;
4568
4569 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4570
4571 if (mode == 0)
4572 event_size = 2 * sizeof(u32);
4573 else
4574 event_size = 3 * sizeof(u32);
4575
4576 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4577
4578 /* "time" is actually "data" for mode 0 (no timestamp).
4579 * place event id # at far right for easier visual parsing. */
4580 for (i = 0; i < num_events; i++) {
4581 ev = iwl3945_read_targ_mem(priv, ptr);
4582 ptr += sizeof(u32);
4583 time = iwl3945_read_targ_mem(priv, ptr);
4584 ptr += sizeof(u32);
4585 if (mode == 0)
4586 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4587 else {
4588 data = iwl3945_read_targ_mem(priv, ptr);
4589 ptr += sizeof(u32);
4590 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4591 }
4592 }
4593 }
4594
4595 static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4596 {
4597 int rc;
4598 u32 base; /* SRAM byte address of event log header */
4599 u32 capacity; /* event log capacity in # entries */
4600 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4601 u32 num_wraps; /* # times uCode wrapped to top of log */
4602 u32 next_entry; /* index of next entry to be written by uCode */
4603 u32 size; /* # entries that we'll print */
4604
4605 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4606 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4607 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4608 return;
4609 }
4610
4611 rc = iwl3945_grab_nic_access(priv);
4612 if (rc) {
4613 IWL_WARNING("Can not read from adapter at this time.\n");
4614 return;
4615 }
4616
4617 /* event log header */
4618 capacity = iwl3945_read_targ_mem(priv, base);
4619 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4620 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4621 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4622
4623 size = num_wraps ? capacity : next_entry;
4624
4625 /* bail out if nothing in log */
4626 if (size == 0) {
4627 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4628 iwl3945_release_nic_access(priv);
4629 return;
4630 }
4631
4632 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4633 size, num_wraps);
4634
4635 /* if uCode has wrapped back to top of log, start at the oldest entry,
4636 * i.e the next one that uCode would fill. */
4637 if (num_wraps)
4638 iwl3945_print_event_log(priv, next_entry,
4639 capacity - next_entry, mode);
4640
4641 /* (then/else) start at top of log */
4642 iwl3945_print_event_log(priv, 0, next_entry, mode);
4643
4644 iwl3945_release_nic_access(priv);
4645 }
4646
4647 /**
4648 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4649 */
4650 static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4651 {
4652 /* Set the FW error flag -- cleared on iwl3945_down */
4653 set_bit(STATUS_FW_ERROR, &priv->status);
4654
4655 /* Cancel currently queued command. */
4656 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4657
4658 #ifdef CONFIG_IWL3945_DEBUG
4659 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4660 iwl3945_dump_nic_error_log(priv);
4661 iwl3945_dump_nic_event_log(priv);
4662 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
4663 }
4664 #endif
4665
4666 wake_up_interruptible(&priv->wait_command_queue);
4667
4668 /* Keep the restart process from trying to send host
4669 * commands by clearing the INIT status bit */
4670 clear_bit(STATUS_READY, &priv->status);
4671
4672 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4673 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4674 "Restarting adapter due to uCode error.\n");
4675
4676 if (iwl3945_is_associated(priv)) {
4677 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4678 sizeof(priv->recovery_rxon));
4679 priv->error_recovering = 1;
4680 }
4681 queue_work(priv->workqueue, &priv->restart);
4682 }
4683 }
4684
4685 static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4686 {
4687 unsigned long flags;
4688
4689 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4690 sizeof(priv->staging_rxon));
4691 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4692 iwl3945_commit_rxon(priv);
4693
4694 iwl3945_add_station(priv, priv->bssid, 1, 0);
4695
4696 spin_lock_irqsave(&priv->lock, flags);
4697 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4698 priv->error_recovering = 0;
4699 spin_unlock_irqrestore(&priv->lock, flags);
4700 }
4701
4702 static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4703 {
4704 u32 inta, handled = 0;
4705 u32 inta_fh;
4706 unsigned long flags;
4707 #ifdef CONFIG_IWL3945_DEBUG
4708 u32 inta_mask;
4709 #endif
4710
4711 spin_lock_irqsave(&priv->lock, flags);
4712
4713 /* Ack/clear/reset pending uCode interrupts.
4714 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4715 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4716 inta = iwl3945_read32(priv, CSR_INT);
4717 iwl3945_write32(priv, CSR_INT, inta);
4718
4719 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4720 * Any new interrupts that happen after this, either while we're
4721 * in this tasklet, or later, will show up in next ISR/tasklet. */
4722 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4723 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4724
4725 #ifdef CONFIG_IWL3945_DEBUG
4726 if (iwl3945_debug_level & IWL_DL_ISR) {
4727 /* just for debug */
4728 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4729 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4730 inta, inta_mask, inta_fh);
4731 }
4732 #endif
4733
4734 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4735 * atomic, make sure that inta covers all the interrupts that
4736 * we've discovered, even if FH interrupt came in just after
4737 * reading CSR_INT. */
4738 if (inta_fh & CSR_FH_INT_RX_MASK)
4739 inta |= CSR_INT_BIT_FH_RX;
4740 if (inta_fh & CSR_FH_INT_TX_MASK)
4741 inta |= CSR_INT_BIT_FH_TX;
4742
4743 /* Now service all interrupt bits discovered above. */
4744 if (inta & CSR_INT_BIT_HW_ERR) {
4745 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4746
4747 /* Tell the device to stop sending interrupts */
4748 iwl3945_disable_interrupts(priv);
4749
4750 iwl3945_irq_handle_error(priv);
4751
4752 handled |= CSR_INT_BIT_HW_ERR;
4753
4754 spin_unlock_irqrestore(&priv->lock, flags);
4755
4756 return;
4757 }
4758
4759 #ifdef CONFIG_IWL3945_DEBUG
4760 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4761 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4762 if (inta & CSR_INT_BIT_SCD)
4763 IWL_DEBUG_ISR("Scheduler finished to transmit "
4764 "the frame/frames.\n");
4765
4766 /* Alive notification via Rx interrupt will do the real work */
4767 if (inta & CSR_INT_BIT_ALIVE)
4768 IWL_DEBUG_ISR("Alive interrupt\n");
4769 }
4770 #endif
4771 /* Safely ignore these bits for debug checks below */
4772 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4773
4774 /* HW RF KILL switch toggled (4965 only) */
4775 if (inta & CSR_INT_BIT_RF_KILL) {
4776 int hw_rf_kill = 0;
4777 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
4778 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4779 hw_rf_kill = 1;
4780
4781 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4782 "RF_KILL bit toggled to %s.\n",
4783 hw_rf_kill ? "disable radio":"enable radio");
4784
4785 /* Queue restart only if RF_KILL switch was set to "kill"
4786 * when we loaded driver, and is now set to "enable".
4787 * After we're Alive, RF_KILL gets handled by
4788 * iwl_rx_card_state_notif() */
4789 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4790 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4791 queue_work(priv->workqueue, &priv->restart);
4792 }
4793
4794 handled |= CSR_INT_BIT_RF_KILL;
4795 }
4796
4797 /* Chip got too hot and stopped itself (4965 only) */
4798 if (inta & CSR_INT_BIT_CT_KILL) {
4799 IWL_ERROR("Microcode CT kill error detected.\n");
4800 handled |= CSR_INT_BIT_CT_KILL;
4801 }
4802
4803 /* Error detected by uCode */
4804 if (inta & CSR_INT_BIT_SW_ERR) {
4805 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4806 inta);
4807 iwl3945_irq_handle_error(priv);
4808 handled |= CSR_INT_BIT_SW_ERR;
4809 }
4810
4811 /* uCode wakes up after power-down sleep */
4812 if (inta & CSR_INT_BIT_WAKEUP) {
4813 IWL_DEBUG_ISR("Wakeup interrupt\n");
4814 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4815 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4816 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4817 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4818 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4819 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4820 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4821
4822 handled |= CSR_INT_BIT_WAKEUP;
4823 }
4824
4825 /* All uCode command responses, including Tx command responses,
4826 * Rx "responses" (frame-received notification), and other
4827 * notifications from uCode come through here*/
4828 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4829 iwl3945_rx_handle(priv);
4830 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4831 }
4832
4833 if (inta & CSR_INT_BIT_FH_TX) {
4834 IWL_DEBUG_ISR("Tx interrupt\n");
4835
4836 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4837 if (!iwl3945_grab_nic_access(priv)) {
4838 iwl3945_write_direct32(priv,
4839 FH_TCSR_CREDIT
4840 (ALM_FH_SRVC_CHNL), 0x0);
4841 iwl3945_release_nic_access(priv);
4842 }
4843 handled |= CSR_INT_BIT_FH_TX;
4844 }
4845
4846 if (inta & ~handled)
4847 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4848
4849 if (inta & ~CSR_INI_SET_MASK) {
4850 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4851 inta & ~CSR_INI_SET_MASK);
4852 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4853 }
4854
4855 /* Re-enable all interrupts */
4856 iwl3945_enable_interrupts(priv);
4857
4858 #ifdef CONFIG_IWL3945_DEBUG
4859 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4860 inta = iwl3945_read32(priv, CSR_INT);
4861 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4862 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4863 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4864 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4865 }
4866 #endif
4867 spin_unlock_irqrestore(&priv->lock, flags);
4868 }
4869
4870 static irqreturn_t iwl3945_isr(int irq, void *data)
4871 {
4872 struct iwl3945_priv *priv = data;
4873 u32 inta, inta_mask;
4874 u32 inta_fh;
4875 if (!priv)
4876 return IRQ_NONE;
4877
4878 spin_lock(&priv->lock);
4879
4880 /* Disable (but don't clear!) interrupts here to avoid
4881 * back-to-back ISRs and sporadic interrupts from our NIC.
4882 * If we have something to service, the tasklet will re-enable ints.
4883 * If we *don't* have something, we'll re-enable before leaving here. */
4884 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4885 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4886
4887 /* Discover which interrupts are active/pending */
4888 inta = iwl3945_read32(priv, CSR_INT);
4889 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4890
4891 /* Ignore interrupt if there's nothing in NIC to service.
4892 * This may be due to IRQ shared with another device,
4893 * or due to sporadic interrupts thrown from our NIC. */
4894 if (!inta && !inta_fh) {
4895 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4896 goto none;
4897 }
4898
4899 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4900 /* Hardware disappeared */
4901 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
4902 goto unplugged;
4903 }
4904
4905 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4906 inta, inta_mask, inta_fh);
4907
4908 inta &= ~CSR_INT_BIT_SCD;
4909
4910 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4911 if (likely(inta || inta_fh))
4912 tasklet_schedule(&priv->irq_tasklet);
4913 unplugged:
4914 spin_unlock(&priv->lock);
4915
4916 return IRQ_HANDLED;
4917
4918 none:
4919 /* re-enable interrupts here since we don't have anything to service. */
4920 iwl3945_enable_interrupts(priv);
4921 spin_unlock(&priv->lock);
4922 return IRQ_NONE;
4923 }
4924
4925 /************************** EEPROM BANDS ****************************
4926 *
4927 * The iwl3945_eeprom_band definitions below provide the mapping from the
4928 * EEPROM contents to the specific channel number supported for each
4929 * band.
4930 *
4931 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
4932 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4933 * The specific geography and calibration information for that channel
4934 * is contained in the eeprom map itself.
4935 *
4936 * During init, we copy the eeprom information and channel map
4937 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4938 *
4939 * channel_map_24/52 provides the index in the channel_info array for a
4940 * given channel. We have to have two separate maps as there is channel
4941 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4942 * band_2
4943 *
4944 * A value of 0xff stored in the channel_map indicates that the channel
4945 * is not supported by the hardware at all.
4946 *
4947 * A value of 0xfe in the channel_map indicates that the channel is not
4948 * valid for Tx with the current hardware. This means that
4949 * while the system can tune and receive on a given channel, it may not
4950 * be able to associate or transmit any frames on that
4951 * channel. There is no corresponding channel information for that
4952 * entry.
4953 *
4954 *********************************************************************/
4955
4956 /* 2.4 GHz */
4957 static const u8 iwl3945_eeprom_band_1[14] = {
4958 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4959 };
4960
4961 /* 5.2 GHz bands */
4962 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4963 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4964 };
4965
4966 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4967 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4968 };
4969
4970 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4971 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4972 };
4973
4974 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4975 145, 149, 153, 157, 161, 165
4976 };
4977
4978 static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
4979 int *eeprom_ch_count,
4980 const struct iwl3945_eeprom_channel
4981 **eeprom_ch_info,
4982 const u8 **eeprom_ch_index)
4983 {
4984 switch (band) {
4985 case 1: /* 2.4GHz band */
4986 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4987 *eeprom_ch_info = priv->eeprom.band_1_channels;
4988 *eeprom_ch_index = iwl3945_eeprom_band_1;
4989 break;
4990 case 2: /* 4.9GHz band */
4991 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4992 *eeprom_ch_info = priv->eeprom.band_2_channels;
4993 *eeprom_ch_index = iwl3945_eeprom_band_2;
4994 break;
4995 case 3: /* 5.2GHz band */
4996 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4997 *eeprom_ch_info = priv->eeprom.band_3_channels;
4998 *eeprom_ch_index = iwl3945_eeprom_band_3;
4999 break;
5000 case 4: /* 5.5GHz band */
5001 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
5002 *eeprom_ch_info = priv->eeprom.band_4_channels;
5003 *eeprom_ch_index = iwl3945_eeprom_band_4;
5004 break;
5005 case 5: /* 5.7GHz band */
5006 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
5007 *eeprom_ch_info = priv->eeprom.band_5_channels;
5008 *eeprom_ch_index = iwl3945_eeprom_band_5;
5009 break;
5010 default:
5011 BUG();
5012 return;
5013 }
5014 }
5015
5016 /**
5017 * iwl3945_get_channel_info - Find driver's private channel info
5018 *
5019 * Based on band and channel number.
5020 */
5021 const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
5022 int phymode, u16 channel)
5023 {
5024 int i;
5025
5026 switch (phymode) {
5027 case MODE_IEEE80211A:
5028 for (i = 14; i < priv->channel_count; i++) {
5029 if (priv->channel_info[i].channel == channel)
5030 return &priv->channel_info[i];
5031 }
5032 break;
5033
5034 case MODE_IEEE80211B:
5035 case MODE_IEEE80211G:
5036 if (channel >= 1 && channel <= 14)
5037 return &priv->channel_info[channel - 1];
5038 break;
5039
5040 }
5041
5042 return NULL;
5043 }
5044
5045 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5046 ? # x " " : "")
5047
5048 /**
5049 * iwl3945_init_channel_map - Set up driver's info for all possible channels
5050 */
5051 static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
5052 {
5053 int eeprom_ch_count = 0;
5054 const u8 *eeprom_ch_index = NULL;
5055 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
5056 int band, ch;
5057 struct iwl3945_channel_info *ch_info;
5058
5059 if (priv->channel_count) {
5060 IWL_DEBUG_INFO("Channel map already initialized.\n");
5061 return 0;
5062 }
5063
5064 if (priv->eeprom.version < 0x2f) {
5065 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5066 priv->eeprom.version);
5067 return -EINVAL;
5068 }
5069
5070 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5071
5072 priv->channel_count =
5073 ARRAY_SIZE(iwl3945_eeprom_band_1) +
5074 ARRAY_SIZE(iwl3945_eeprom_band_2) +
5075 ARRAY_SIZE(iwl3945_eeprom_band_3) +
5076 ARRAY_SIZE(iwl3945_eeprom_band_4) +
5077 ARRAY_SIZE(iwl3945_eeprom_band_5);
5078
5079 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5080
5081 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
5082 priv->channel_count, GFP_KERNEL);
5083 if (!priv->channel_info) {
5084 IWL_ERROR("Could not allocate channel_info\n");
5085 priv->channel_count = 0;
5086 return -ENOMEM;
5087 }
5088
5089 ch_info = priv->channel_info;
5090
5091 /* Loop through the 5 EEPROM bands adding them in order to the
5092 * channel map we maintain (that contains additional information than
5093 * what just in the EEPROM) */
5094 for (band = 1; band <= 5; band++) {
5095
5096 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
5097 &eeprom_ch_info, &eeprom_ch_index);
5098
5099 /* Loop through each band adding each of the channels */
5100 for (ch = 0; ch < eeprom_ch_count; ch++) {
5101 ch_info->channel = eeprom_ch_index[ch];
5102 ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5103 MODE_IEEE80211A;
5104
5105 /* permanently store EEPROM's channel regulatory flags
5106 * and max power in channel info database. */
5107 ch_info->eeprom = eeprom_ch_info[ch];
5108
5109 /* Copy the run-time flags so they are there even on
5110 * invalid channels */
5111 ch_info->flags = eeprom_ch_info[ch].flags;
5112
5113 if (!(is_channel_valid(ch_info))) {
5114 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5115 "No traffic\n",
5116 ch_info->channel,
5117 ch_info->flags,
5118 is_channel_a_band(ch_info) ?
5119 "5.2" : "2.4");
5120 ch_info++;
5121 continue;
5122 }
5123
5124 /* Initialize regulatory-based run-time data */
5125 ch_info->max_power_avg = ch_info->curr_txpow =
5126 eeprom_ch_info[ch].max_power_avg;
5127 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5128 ch_info->min_power = 0;
5129
5130 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5131 " %ddBm): Ad-Hoc %ssupported\n",
5132 ch_info->channel,
5133 is_channel_a_band(ch_info) ?
5134 "5.2" : "2.4",
5135 CHECK_AND_PRINT(IBSS),
5136 CHECK_AND_PRINT(ACTIVE),
5137 CHECK_AND_PRINT(RADAR),
5138 CHECK_AND_PRINT(WIDE),
5139 CHECK_AND_PRINT(NARROW),
5140 CHECK_AND_PRINT(DFS),
5141 eeprom_ch_info[ch].flags,
5142 eeprom_ch_info[ch].max_power_avg,
5143 ((eeprom_ch_info[ch].
5144 flags & EEPROM_CHANNEL_IBSS)
5145 && !(eeprom_ch_info[ch].
5146 flags & EEPROM_CHANNEL_RADAR))
5147 ? "" : "not ");
5148
5149 /* Set the user_txpower_limit to the highest power
5150 * supported by any channel */
5151 if (eeprom_ch_info[ch].max_power_avg >
5152 priv->user_txpower_limit)
5153 priv->user_txpower_limit =
5154 eeprom_ch_info[ch].max_power_avg;
5155
5156 ch_info++;
5157 }
5158 }
5159
5160 /* Set up txpower settings in driver for all channels */
5161 if (iwl3945_txpower_set_from_eeprom(priv))
5162 return -EIO;
5163
5164 return 0;
5165 }
5166
5167 /*
5168 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
5169 */
5170 static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
5171 {
5172 kfree(priv->channel_info);
5173 priv->channel_count = 0;
5174 }
5175
5176 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5177 * sending probe req. This should be set long enough to hear probe responses
5178 * from more than one AP. */
5179 #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5180 #define IWL_ACTIVE_DWELL_TIME_52 (10)
5181
5182 /* For faster active scanning, scan will move to the next channel if fewer than
5183 * PLCP_QUIET_THRESH packets are heard on this channel within
5184 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5185 * time if it's a quiet channel (nothing responded to our probe, and there's
5186 * no other traffic).
5187 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5188 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5189 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5190
5191 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5192 * Must be set longer than active dwell time.
5193 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5194 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5195 #define IWL_PASSIVE_DWELL_TIME_52 (10)
5196 #define IWL_PASSIVE_DWELL_BASE (100)
5197 #define IWL_CHANNEL_TUNE_TIME 5
5198
5199 static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv, int phymode)
5200 {
5201 if (phymode == MODE_IEEE80211A)
5202 return IWL_ACTIVE_DWELL_TIME_52;
5203 else
5204 return IWL_ACTIVE_DWELL_TIME_24;
5205 }
5206
5207 static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv, int phymode)
5208 {
5209 u16 active = iwl3945_get_active_dwell_time(priv, phymode);
5210 u16 passive = (phymode != MODE_IEEE80211A) ?
5211 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5212 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5213
5214 if (iwl3945_is_associated(priv)) {
5215 /* If we're associated, we clamp the maximum passive
5216 * dwell time to be 98% of the beacon interval (minus
5217 * 2 * channel tune time) */
5218 passive = priv->beacon_int;
5219 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5220 passive = IWL_PASSIVE_DWELL_BASE;
5221 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5222 }
5223
5224 if (passive <= active)
5225 passive = active + 1;
5226
5227 return passive;
5228 }
5229
5230 static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, int phymode,
5231 u8 is_active, u8 direct_mask,
5232 struct iwl3945_scan_channel *scan_ch)
5233 {
5234 const struct ieee80211_channel *channels = NULL;
5235 const struct ieee80211_hw_mode *hw_mode;
5236 const struct iwl3945_channel_info *ch_info;
5237 u16 passive_dwell = 0;
5238 u16 active_dwell = 0;
5239 int added, i;
5240
5241 hw_mode = iwl3945_get_hw_mode(priv, phymode);
5242 if (!hw_mode)
5243 return 0;
5244
5245 channels = hw_mode->channels;
5246
5247 active_dwell = iwl3945_get_active_dwell_time(priv, phymode);
5248 passive_dwell = iwl3945_get_passive_dwell_time(priv, phymode);
5249
5250 for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5251 if (channels[i].chan ==
5252 le16_to_cpu(priv->active_rxon.channel)) {
5253 if (iwl3945_is_associated(priv)) {
5254 IWL_DEBUG_SCAN
5255 ("Skipping current channel %d\n",
5256 le16_to_cpu(priv->active_rxon.channel));
5257 continue;
5258 }
5259 } else if (priv->only_active_channel)
5260 continue;
5261
5262 scan_ch->channel = channels[i].chan;
5263
5264 ch_info = iwl3945_get_channel_info(priv, phymode, scan_ch->channel);
5265 if (!is_channel_valid(ch_info)) {
5266 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5267 scan_ch->channel);
5268 continue;
5269 }
5270
5271 if (!is_active || is_channel_passive(ch_info) ||
5272 !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5273 scan_ch->type = 0; /* passive */
5274 else
5275 scan_ch->type = 1; /* active */
5276
5277 if (scan_ch->type & 1)
5278 scan_ch->type |= (direct_mask << 1);
5279
5280 if (is_channel_narrow(ch_info))
5281 scan_ch->type |= (1 << 7);
5282
5283 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5284 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5285
5286 /* Set txpower levels to defaults */
5287 scan_ch->tpc.dsp_atten = 110;
5288 /* scan_pwr_info->tpc.dsp_atten; */
5289
5290 /*scan_pwr_info->tpc.tx_gain; */
5291 if (phymode == MODE_IEEE80211A)
5292 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5293 else {
5294 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5295 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
5296 * power level:
5297 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
5298 */
5299 }
5300
5301 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5302 scan_ch->channel,
5303 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5304 (scan_ch->type & 1) ?
5305 active_dwell : passive_dwell);
5306
5307 scan_ch++;
5308 added++;
5309 }
5310
5311 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5312 return added;
5313 }
5314
5315 static void iwl3945_reset_channel_flag(struct iwl3945_priv *priv)
5316 {
5317 int i, j;
5318 for (i = 0; i < 3; i++) {
5319 struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5320 for (j = 0; j < hw_mode->num_channels; j++)
5321 hw_mode->channels[j].flag = hw_mode->channels[j].val;
5322 }
5323 }
5324
5325 static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
5326 struct ieee80211_rate *rates)
5327 {
5328 int i;
5329
5330 for (i = 0; i < IWL_RATE_COUNT; i++) {
5331 rates[i].rate = iwl3945_rates[i].ieee * 5;
5332 rates[i].val = i; /* Rate scaling will work on indexes */
5333 rates[i].val2 = i;
5334 rates[i].flags = IEEE80211_RATE_SUPPORTED;
5335 /* Only OFDM have the bits-per-symbol set */
5336 if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5337 rates[i].flags |= IEEE80211_RATE_OFDM;
5338 else {
5339 /*
5340 * If CCK 1M then set rate flag to CCK else CCK_2
5341 * which is CCK | PREAMBLE2
5342 */
5343 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
5344 IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5345 }
5346
5347 /* Set up which ones are basic rates... */
5348 if (IWL_BASIC_RATES_MASK & (1 << i))
5349 rates[i].flags |= IEEE80211_RATE_BASIC;
5350 }
5351 }
5352
5353 /**
5354 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
5355 */
5356 static int iwl3945_init_geos(struct iwl3945_priv *priv)
5357 {
5358 struct iwl3945_channel_info *ch;
5359 struct ieee80211_hw_mode *modes;
5360 struct ieee80211_channel *channels;
5361 struct ieee80211_channel *geo_ch;
5362 struct ieee80211_rate *rates;
5363 int i = 0;
5364 enum {
5365 A = 0,
5366 B = 1,
5367 G = 2,
5368 };
5369 int mode_count = 3;
5370
5371 if (priv->modes) {
5372 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5373 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5374 return 0;
5375 }
5376
5377 modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5378 GFP_KERNEL);
5379 if (!modes)
5380 return -ENOMEM;
5381
5382 channels = kzalloc(sizeof(struct ieee80211_channel) *
5383 priv->channel_count, GFP_KERNEL);
5384 if (!channels) {
5385 kfree(modes);
5386 return -ENOMEM;
5387 }
5388
5389 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5390 GFP_KERNEL);
5391 if (!rates) {
5392 kfree(modes);
5393 kfree(channels);
5394 return -ENOMEM;
5395 }
5396
5397 /* 0 = 802.11a
5398 * 1 = 802.11b
5399 * 2 = 802.11g
5400 */
5401
5402 /* 5.2GHz channels start after the 2.4GHz channels */
5403 modes[A].mode = MODE_IEEE80211A;
5404 modes[A].channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5405 modes[A].rates = &rates[4];
5406 modes[A].num_rates = 8; /* just OFDM */
5407 modes[A].num_channels = 0;
5408
5409 modes[B].mode = MODE_IEEE80211B;
5410 modes[B].channels = channels;
5411 modes[B].rates = rates;
5412 modes[B].num_rates = 4; /* just CCK */
5413 modes[B].num_channels = 0;
5414
5415 modes[G].mode = MODE_IEEE80211G;
5416 modes[G].channels = channels;
5417 modes[G].rates = rates;
5418 modes[G].num_rates = 12; /* OFDM & CCK */
5419 modes[G].num_channels = 0;
5420
5421 priv->ieee_channels = channels;
5422 priv->ieee_rates = rates;
5423
5424 iwl3945_init_hw_rates(priv, rates);
5425
5426 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5427 ch = &priv->channel_info[i];
5428
5429 if (!is_channel_valid(ch)) {
5430 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5431 "skipping.\n",
5432 ch->channel, is_channel_a_band(ch) ?
5433 "5.2" : "2.4");
5434 continue;
5435 }
5436
5437 if (is_channel_a_band(ch))
5438 geo_ch = &modes[A].channels[modes[A].num_channels++];
5439 else {
5440 geo_ch = &modes[B].channels[modes[B].num_channels++];
5441 modes[G].num_channels++;
5442 }
5443
5444 geo_ch->freq = ieee80211chan2mhz(ch->channel);
5445 geo_ch->chan = ch->channel;
5446 geo_ch->power_level = ch->max_power_avg;
5447 geo_ch->antenna_max = 0xff;
5448
5449 if (is_channel_valid(ch)) {
5450 geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5451 if (ch->flags & EEPROM_CHANNEL_IBSS)
5452 geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5453
5454 if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5455 geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5456
5457 if (ch->flags & EEPROM_CHANNEL_RADAR)
5458 geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5459
5460 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5461 priv->max_channel_txpower_limit =
5462 ch->max_power_avg;
5463 }
5464
5465 geo_ch->val = geo_ch->flag;
5466 }
5467
5468 if ((modes[A].num_channels == 0) && priv->is_abg) {
5469 printk(KERN_INFO DRV_NAME
5470 ": Incorrectly detected BG card as ABG. Please send "
5471 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5472 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5473 priv->is_abg = 0;
5474 }
5475
5476 printk(KERN_INFO DRV_NAME
5477 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5478 modes[G].num_channels, modes[A].num_channels);
5479
5480 /*
5481 * NOTE: We register these in preference of order -- the
5482 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5483 * a phymode based on rates or AP capabilities but seems to
5484 * configure it purely on if the channel being configured
5485 * is supported by a mode -- and the first match is taken
5486 */
5487
5488 if (modes[G].num_channels)
5489 ieee80211_register_hwmode(priv->hw, &modes[G]);
5490 if (modes[B].num_channels)
5491 ieee80211_register_hwmode(priv->hw, &modes[B]);
5492 if (modes[A].num_channels)
5493 ieee80211_register_hwmode(priv->hw, &modes[A]);
5494
5495 priv->modes = modes;
5496 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5497
5498 return 0;
5499 }
5500
5501 /*
5502 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5503 */
5504 static void iwl3945_free_geos(struct iwl3945_priv *priv)
5505 {
5506 kfree(priv->modes);
5507 kfree(priv->ieee_channels);
5508 kfree(priv->ieee_rates);
5509 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5510 }
5511
5512 /******************************************************************************
5513 *
5514 * uCode download functions
5515 *
5516 ******************************************************************************/
5517
5518 static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
5519 {
5520 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5521 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5522 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5523 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5524 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5525 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5526 }
5527
5528 /**
5529 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5530 * looking at all data.
5531 */
5532 static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
5533 {
5534 u32 val;
5535 u32 save_len = len;
5536 int rc = 0;
5537 u32 errcnt;
5538
5539 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5540
5541 rc = iwl3945_grab_nic_access(priv);
5542 if (rc)
5543 return rc;
5544
5545 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5546
5547 errcnt = 0;
5548 for (; len > 0; len -= sizeof(u32), image++) {
5549 /* read data comes through single port, auto-incr addr */
5550 /* NOTE: Use the debugless read so we don't flood kernel log
5551 * if IWL_DL_IO is set */
5552 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5553 if (val != le32_to_cpu(*image)) {
5554 IWL_ERROR("uCode INST section is invalid at "
5555 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5556 save_len - len, val, le32_to_cpu(*image));
5557 rc = -EIO;
5558 errcnt++;
5559 if (errcnt >= 20)
5560 break;
5561 }
5562 }
5563
5564 iwl3945_release_nic_access(priv);
5565
5566 if (!errcnt)
5567 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5568
5569 return rc;
5570 }
5571
5572
5573 /**
5574 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5575 * using sample data 100 bytes apart. If these sample points are good,
5576 * it's a pretty good bet that everything between them is good, too.
5577 */
5578 static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5579 {
5580 u32 val;
5581 int rc = 0;
5582 u32 errcnt = 0;
5583 u32 i;
5584
5585 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5586
5587 rc = iwl3945_grab_nic_access(priv);
5588 if (rc)
5589 return rc;
5590
5591 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5592 /* read data comes through single port, auto-incr addr */
5593 /* NOTE: Use the debugless read so we don't flood kernel log
5594 * if IWL_DL_IO is set */
5595 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5596 i + RTC_INST_LOWER_BOUND);
5597 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5598 if (val != le32_to_cpu(*image)) {
5599 #if 0 /* Enable this if you want to see details */
5600 IWL_ERROR("uCode INST section is invalid at "
5601 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5602 i, val, *image);
5603 #endif
5604 rc = -EIO;
5605 errcnt++;
5606 if (errcnt >= 3)
5607 break;
5608 }
5609 }
5610
5611 iwl3945_release_nic_access(priv);
5612
5613 return rc;
5614 }
5615
5616
5617 /**
5618 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5619 * and verify its contents
5620 */
5621 static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5622 {
5623 __le32 *image;
5624 u32 len;
5625 int rc = 0;
5626
5627 /* Try bootstrap */
5628 image = (__le32 *)priv->ucode_boot.v_addr;
5629 len = priv->ucode_boot.len;
5630 rc = iwl3945_verify_inst_sparse(priv, image, len);
5631 if (rc == 0) {
5632 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5633 return 0;
5634 }
5635
5636 /* Try initialize */
5637 image = (__le32 *)priv->ucode_init.v_addr;
5638 len = priv->ucode_init.len;
5639 rc = iwl3945_verify_inst_sparse(priv, image, len);
5640 if (rc == 0) {
5641 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5642 return 0;
5643 }
5644
5645 /* Try runtime/protocol */
5646 image = (__le32 *)priv->ucode_code.v_addr;
5647 len = priv->ucode_code.len;
5648 rc = iwl3945_verify_inst_sparse(priv, image, len);
5649 if (rc == 0) {
5650 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5651 return 0;
5652 }
5653
5654 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5655
5656 /* Since nothing seems to match, show first several data entries in
5657 * instruction SRAM, so maybe visual inspection will give a clue.
5658 * Selection of bootstrap image (vs. other images) is arbitrary. */
5659 image = (__le32 *)priv->ucode_boot.v_addr;
5660 len = priv->ucode_boot.len;
5661 rc = iwl3945_verify_inst_full(priv, image, len);
5662
5663 return rc;
5664 }
5665
5666
5667 /* check contents of special bootstrap uCode SRAM */
5668 static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5669 {
5670 __le32 *image = priv->ucode_boot.v_addr;
5671 u32 len = priv->ucode_boot.len;
5672 u32 reg;
5673 u32 val;
5674
5675 IWL_DEBUG_INFO("Begin verify bsm\n");
5676
5677 /* verify BSM SRAM contents */
5678 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5679 for (reg = BSM_SRAM_LOWER_BOUND;
5680 reg < BSM_SRAM_LOWER_BOUND + len;
5681 reg += sizeof(u32), image ++) {
5682 val = iwl3945_read_prph(priv, reg);
5683 if (val != le32_to_cpu(*image)) {
5684 IWL_ERROR("BSM uCode verification failed at "
5685 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5686 BSM_SRAM_LOWER_BOUND,
5687 reg - BSM_SRAM_LOWER_BOUND, len,
5688 val, le32_to_cpu(*image));
5689 return -EIO;
5690 }
5691 }
5692
5693 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5694
5695 return 0;
5696 }
5697
5698 /**
5699 * iwl3945_load_bsm - Load bootstrap instructions
5700 *
5701 * BSM operation:
5702 *
5703 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5704 * in special SRAM that does not power down during RFKILL. When powering back
5705 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5706 * the bootstrap program into the on-board processor, and starts it.
5707 *
5708 * The bootstrap program loads (via DMA) instructions and data for a new
5709 * program from host DRAM locations indicated by the host driver in the
5710 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5711 * automatically.
5712 *
5713 * When initializing the NIC, the host driver points the BSM to the
5714 * "initialize" uCode image. This uCode sets up some internal data, then
5715 * notifies host via "initialize alive" that it is complete.
5716 *
5717 * The host then replaces the BSM_DRAM_* pointer values to point to the
5718 * normal runtime uCode instructions and a backup uCode data cache buffer
5719 * (filled initially with starting data values for the on-board processor),
5720 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5721 * which begins normal operation.
5722 *
5723 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5724 * the backup data cache in DRAM before SRAM is powered down.
5725 *
5726 * When powering back up, the BSM loads the bootstrap program. This reloads
5727 * the runtime uCode instructions and the backup data cache into SRAM,
5728 * and re-launches the runtime uCode from where it left off.
5729 */
5730 static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5731 {
5732 __le32 *image = priv->ucode_boot.v_addr;
5733 u32 len = priv->ucode_boot.len;
5734 dma_addr_t pinst;
5735 dma_addr_t pdata;
5736 u32 inst_len;
5737 u32 data_len;
5738 int rc;
5739 int i;
5740 u32 done;
5741 u32 reg_offset;
5742
5743 IWL_DEBUG_INFO("Begin load bsm\n");
5744
5745 /* make sure bootstrap program is no larger than BSM's SRAM size */
5746 if (len > IWL_MAX_BSM_SIZE)
5747 return -EINVAL;
5748
5749 /* Tell bootstrap uCode where to find the "Initialize" uCode
5750 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5751 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5752 * after the "initialize" uCode has run, to point to
5753 * runtime/protocol instructions and backup data cache. */
5754 pinst = priv->ucode_init.p_addr;
5755 pdata = priv->ucode_init_data.p_addr;
5756 inst_len = priv->ucode_init.len;
5757 data_len = priv->ucode_init_data.len;
5758
5759 rc = iwl3945_grab_nic_access(priv);
5760 if (rc)
5761 return rc;
5762
5763 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5764 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5765 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5766 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5767
5768 /* Fill BSM memory with bootstrap instructions */
5769 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5770 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5771 reg_offset += sizeof(u32), image++)
5772 _iwl3945_write_prph(priv, reg_offset,
5773 le32_to_cpu(*image));
5774
5775 rc = iwl3945_verify_bsm(priv);
5776 if (rc) {
5777 iwl3945_release_nic_access(priv);
5778 return rc;
5779 }
5780
5781 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5782 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5783 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5784 RTC_INST_LOWER_BOUND);
5785 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5786
5787 /* Load bootstrap code into instruction SRAM now,
5788 * to prepare to load "initialize" uCode */
5789 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5790 BSM_WR_CTRL_REG_BIT_START);
5791
5792 /* Wait for load of bootstrap uCode to finish */
5793 for (i = 0; i < 100; i++) {
5794 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5795 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5796 break;
5797 udelay(10);
5798 }
5799 if (i < 100)
5800 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5801 else {
5802 IWL_ERROR("BSM write did not complete!\n");
5803 return -EIO;
5804 }
5805
5806 /* Enable future boot loads whenever power management unit triggers it
5807 * (e.g. when powering back up after power-save shutdown) */
5808 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5809 BSM_WR_CTRL_REG_BIT_START_EN);
5810
5811 iwl3945_release_nic_access(priv);
5812
5813 return 0;
5814 }
5815
5816 static void iwl3945_nic_start(struct iwl3945_priv *priv)
5817 {
5818 /* Remove all resets to allow NIC to operate */
5819 iwl3945_write32(priv, CSR_RESET, 0);
5820 }
5821
5822 /**
5823 * iwl3945_read_ucode - Read uCode images from disk file.
5824 *
5825 * Copy into buffers for card to fetch via bus-mastering
5826 */
5827 static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5828 {
5829 struct iwl3945_ucode *ucode;
5830 int ret = 0;
5831 const struct firmware *ucode_raw;
5832 /* firmware file name contains uCode/driver compatibility version */
5833 const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
5834 u8 *src;
5835 size_t len;
5836 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5837
5838 /* Ask kernel firmware_class module to get the boot firmware off disk.
5839 * request_firmware() is synchronous, file is in memory on return. */
5840 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5841 if (ret < 0) {
5842 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5843 name, ret);
5844 goto error;
5845 }
5846
5847 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5848 name, ucode_raw->size);
5849
5850 /* Make sure that we got at least our header! */
5851 if (ucode_raw->size < sizeof(*ucode)) {
5852 IWL_ERROR("File size way too small!\n");
5853 ret = -EINVAL;
5854 goto err_release;
5855 }
5856
5857 /* Data from ucode file: header followed by uCode images */
5858 ucode = (void *)ucode_raw->data;
5859
5860 ver = le32_to_cpu(ucode->ver);
5861 inst_size = le32_to_cpu(ucode->inst_size);
5862 data_size = le32_to_cpu(ucode->data_size);
5863 init_size = le32_to_cpu(ucode->init_size);
5864 init_data_size = le32_to_cpu(ucode->init_data_size);
5865 boot_size = le32_to_cpu(ucode->boot_size);
5866
5867 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5868 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5869 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5870 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5871 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5872 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5873
5874 /* Verify size of file vs. image size info in file's header */
5875 if (ucode_raw->size < sizeof(*ucode) +
5876 inst_size + data_size + init_size +
5877 init_data_size + boot_size) {
5878
5879 IWL_DEBUG_INFO("uCode file size %d too small\n",
5880 (int)ucode_raw->size);
5881 ret = -EINVAL;
5882 goto err_release;
5883 }
5884
5885 /* Verify that uCode images will fit in card's SRAM */
5886 if (inst_size > IWL_MAX_INST_SIZE) {
5887 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5888 inst_size);
5889 ret = -EINVAL;
5890 goto err_release;
5891 }
5892
5893 if (data_size > IWL_MAX_DATA_SIZE) {
5894 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5895 data_size);
5896 ret = -EINVAL;
5897 goto err_release;
5898 }
5899 if (init_size > IWL_MAX_INST_SIZE) {
5900 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5901 init_size);
5902 ret = -EINVAL;
5903 goto err_release;
5904 }
5905 if (init_data_size > IWL_MAX_DATA_SIZE) {
5906 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5907 init_data_size);
5908 ret = -EINVAL;
5909 goto err_release;
5910 }
5911 if (boot_size > IWL_MAX_BSM_SIZE) {
5912 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5913 boot_size);
5914 ret = -EINVAL;
5915 goto err_release;
5916 }
5917
5918 /* Allocate ucode buffers for card's bus-master loading ... */
5919
5920 /* Runtime instructions and 2 copies of data:
5921 * 1) unmodified from disk
5922 * 2) backup cache for save/restore during power-downs */
5923 priv->ucode_code.len = inst_size;
5924 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5925
5926 priv->ucode_data.len = data_size;
5927 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5928
5929 priv->ucode_data_backup.len = data_size;
5930 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5931
5932 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5933 !priv->ucode_data_backup.v_addr)
5934 goto err_pci_alloc;
5935
5936 /* Initialization instructions and data */
5937 if (init_size && init_data_size) {
5938 priv->ucode_init.len = init_size;
5939 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5940
5941 priv->ucode_init_data.len = init_data_size;
5942 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5943
5944 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5945 goto err_pci_alloc;
5946 }
5947
5948 /* Bootstrap (instructions only, no data) */
5949 if (boot_size) {
5950 priv->ucode_boot.len = boot_size;
5951 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5952
5953 if (!priv->ucode_boot.v_addr)
5954 goto err_pci_alloc;
5955 }
5956
5957 /* Copy images into buffers for card's bus-master reads ... */
5958
5959 /* Runtime instructions (first block of data in file) */
5960 src = &ucode->data[0];
5961 len = priv->ucode_code.len;
5962 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5963 memcpy(priv->ucode_code.v_addr, src, len);
5964 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5965 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5966
5967 /* Runtime data (2nd block)
5968 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5969 src = &ucode->data[inst_size];
5970 len = priv->ucode_data.len;
5971 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5972 memcpy(priv->ucode_data.v_addr, src, len);
5973 memcpy(priv->ucode_data_backup.v_addr, src, len);
5974
5975 /* Initialization instructions (3rd block) */
5976 if (init_size) {
5977 src = &ucode->data[inst_size + data_size];
5978 len = priv->ucode_init.len;
5979 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5980 len);
5981 memcpy(priv->ucode_init.v_addr, src, len);
5982 }
5983
5984 /* Initialization data (4th block) */
5985 if (init_data_size) {
5986 src = &ucode->data[inst_size + data_size + init_size];
5987 len = priv->ucode_init_data.len;
5988 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5989 (int)len);
5990 memcpy(priv->ucode_init_data.v_addr, src, len);
5991 }
5992
5993 /* Bootstrap instructions (5th block) */
5994 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5995 len = priv->ucode_boot.len;
5996 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5997 (int)len);
5998 memcpy(priv->ucode_boot.v_addr, src, len);
5999
6000 /* We have our copies now, allow OS release its copies */
6001 release_firmware(ucode_raw);
6002 return 0;
6003
6004 err_pci_alloc:
6005 IWL_ERROR("failed to allocate pci memory\n");
6006 ret = -ENOMEM;
6007 iwl3945_dealloc_ucode_pci(priv);
6008
6009 err_release:
6010 release_firmware(ucode_raw);
6011
6012 error:
6013 return ret;
6014 }
6015
6016
6017 /**
6018 * iwl3945_set_ucode_ptrs - Set uCode address location
6019 *
6020 * Tell initialization uCode where to find runtime uCode.
6021 *
6022 * BSM registers initially contain pointers to initialization uCode.
6023 * We need to replace them to load runtime uCode inst and data,
6024 * and to save runtime data when powering down.
6025 */
6026 static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
6027 {
6028 dma_addr_t pinst;
6029 dma_addr_t pdata;
6030 int rc = 0;
6031 unsigned long flags;
6032
6033 /* bits 31:0 for 3945 */
6034 pinst = priv->ucode_code.p_addr;
6035 pdata = priv->ucode_data_backup.p_addr;
6036
6037 spin_lock_irqsave(&priv->lock, flags);
6038 rc = iwl3945_grab_nic_access(priv);
6039 if (rc) {
6040 spin_unlock_irqrestore(&priv->lock, flags);
6041 return rc;
6042 }
6043
6044 /* Tell bootstrap uCode where to find image to load */
6045 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6046 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6047 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
6048 priv->ucode_data.len);
6049
6050 /* Inst bytecount must be last to set up, bit 31 signals uCode
6051 * that all new ptr/size info is in place */
6052 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
6053 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6054
6055 iwl3945_release_nic_access(priv);
6056
6057 spin_unlock_irqrestore(&priv->lock, flags);
6058
6059 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6060
6061 return rc;
6062 }
6063
6064 /**
6065 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
6066 *
6067 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6068 *
6069 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6070 */
6071 static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
6072 {
6073 /* Check alive response for "valid" sign from uCode */
6074 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6075 /* We had an error bringing up the hardware, so take it
6076 * all the way back down so we can try again */
6077 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6078 goto restart;
6079 }
6080
6081 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6082 * This is a paranoid check, because we would not have gotten the
6083 * "initialize" alive if code weren't properly loaded. */
6084 if (iwl3945_verify_ucode(priv)) {
6085 /* Runtime instruction load was bad;
6086 * take it all the way back down so we can try again */
6087 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6088 goto restart;
6089 }
6090
6091 /* Send pointers to protocol/runtime uCode image ... init code will
6092 * load and launch runtime uCode, which will send us another "Alive"
6093 * notification. */
6094 IWL_DEBUG_INFO("Initialization Alive received.\n");
6095 if (iwl3945_set_ucode_ptrs(priv)) {
6096 /* Runtime instruction load won't happen;
6097 * take it all the way back down so we can try again */
6098 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6099 goto restart;
6100 }
6101 return;
6102
6103 restart:
6104 queue_work(priv->workqueue, &priv->restart);
6105 }
6106
6107
6108 /**
6109 * iwl3945_alive_start - called after REPLY_ALIVE notification received
6110 * from protocol/runtime uCode (initialization uCode's
6111 * Alive gets handled by iwl3945_init_alive_start()).
6112 */
6113 static void iwl3945_alive_start(struct iwl3945_priv *priv)
6114 {
6115 int rc = 0;
6116 int thermal_spin = 0;
6117 u32 rfkill;
6118
6119 IWL_DEBUG_INFO("Runtime Alive received.\n");
6120
6121 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6122 /* We had an error bringing up the hardware, so take it
6123 * all the way back down so we can try again */
6124 IWL_DEBUG_INFO("Alive failed.\n");
6125 goto restart;
6126 }
6127
6128 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6129 * This is a paranoid check, because we would not have gotten the
6130 * "runtime" alive if code weren't properly loaded. */
6131 if (iwl3945_verify_ucode(priv)) {
6132 /* Runtime instruction load was bad;
6133 * take it all the way back down so we can try again */
6134 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6135 goto restart;
6136 }
6137
6138 iwl3945_clear_stations_table(priv);
6139
6140 rc = iwl3945_grab_nic_access(priv);
6141 if (rc) {
6142 IWL_WARNING("Can not read rfkill status from adapter\n");
6143 return;
6144 }
6145
6146 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
6147 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
6148 iwl3945_release_nic_access(priv);
6149
6150 if (rfkill & 0x1) {
6151 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6152 /* if rfkill is not on, then wait for thermal
6153 * sensor in adapter to kick in */
6154 while (iwl3945_hw_get_temperature(priv) == 0) {
6155 thermal_spin++;
6156 udelay(10);
6157 }
6158
6159 if (thermal_spin)
6160 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
6161 thermal_spin * 10);
6162 } else
6163 set_bit(STATUS_RF_KILL_HW, &priv->status);
6164
6165 /* After the ALIVE response, we can send commands to 3945 uCode */
6166 set_bit(STATUS_ALIVE, &priv->status);
6167
6168 /* Clear out the uCode error bit if it is set */
6169 clear_bit(STATUS_FW_ERROR, &priv->status);
6170
6171 if (iwl3945_is_rfkill(priv))
6172 return;
6173
6174 ieee80211_start_queues(priv->hw);
6175
6176 priv->active_rate = priv->rates_mask;
6177 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6178
6179 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
6180
6181 if (iwl3945_is_associated(priv)) {
6182 struct iwl3945_rxon_cmd *active_rxon =
6183 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
6184
6185 memcpy(&priv->staging_rxon, &priv->active_rxon,
6186 sizeof(priv->staging_rxon));
6187 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6188 } else {
6189 /* Initialize our rx_config data */
6190 iwl3945_connection_init_rx_config(priv);
6191 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6192 }
6193
6194 /* Configure Bluetooth device coexistence support */
6195 iwl3945_send_bt_config(priv);
6196
6197 /* Configure the adapter for unassociated operation */
6198 iwl3945_commit_rxon(priv);
6199
6200 /* At this point, the NIC is initialized and operational */
6201 priv->notif_missed_beacons = 0;
6202 set_bit(STATUS_READY, &priv->status);
6203
6204 iwl3945_reg_txpower_periodic(priv);
6205
6206 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6207 wake_up_interruptible(&priv->wait_command_queue);
6208
6209 if (priv->error_recovering)
6210 iwl3945_error_recovery(priv);
6211
6212 return;
6213
6214 restart:
6215 queue_work(priv->workqueue, &priv->restart);
6216 }
6217
6218 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
6219
6220 static void __iwl3945_down(struct iwl3945_priv *priv)
6221 {
6222 unsigned long flags;
6223 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6224 struct ieee80211_conf *conf = NULL;
6225
6226 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6227
6228 conf = ieee80211_get_hw_conf(priv->hw);
6229
6230 if (!exit_pending)
6231 set_bit(STATUS_EXIT_PENDING, &priv->status);
6232
6233 iwl3945_clear_stations_table(priv);
6234
6235 /* Unblock any waiting calls */
6236 wake_up_interruptible_all(&priv->wait_command_queue);
6237
6238 /* Wipe out the EXIT_PENDING status bit if we are not actually
6239 * exiting the module */
6240 if (!exit_pending)
6241 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6242
6243 /* stop and reset the on-board processor */
6244 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6245
6246 /* tell the device to stop sending interrupts */
6247 iwl3945_disable_interrupts(priv);
6248
6249 if (priv->mac80211_registered)
6250 ieee80211_stop_queues(priv->hw);
6251
6252 /* If we have not previously called iwl3945_init() then
6253 * clear all bits but the RF Kill and SUSPEND bits and return */
6254 if (!iwl3945_is_init(priv)) {
6255 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6256 STATUS_RF_KILL_HW |
6257 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6258 STATUS_RF_KILL_SW |
6259 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6260 STATUS_GEO_CONFIGURED |
6261 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6262 STATUS_IN_SUSPEND;
6263 goto exit;
6264 }
6265
6266 /* ...otherwise clear out all the status bits but the RF Kill and
6267 * SUSPEND bits and continue taking the NIC down. */
6268 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6269 STATUS_RF_KILL_HW |
6270 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6271 STATUS_RF_KILL_SW |
6272 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6273 STATUS_GEO_CONFIGURED |
6274 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6275 STATUS_IN_SUSPEND |
6276 test_bit(STATUS_FW_ERROR, &priv->status) <<
6277 STATUS_FW_ERROR;
6278
6279 spin_lock_irqsave(&priv->lock, flags);
6280 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
6281 spin_unlock_irqrestore(&priv->lock, flags);
6282
6283 iwl3945_hw_txq_ctx_stop(priv);
6284 iwl3945_hw_rxq_stop(priv);
6285
6286 spin_lock_irqsave(&priv->lock, flags);
6287 if (!iwl3945_grab_nic_access(priv)) {
6288 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
6289 APMG_CLK_VAL_DMA_CLK_RQT);
6290 iwl3945_release_nic_access(priv);
6291 }
6292 spin_unlock_irqrestore(&priv->lock, flags);
6293
6294 udelay(5);
6295
6296 iwl3945_hw_nic_stop_master(priv);
6297 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6298 iwl3945_hw_nic_reset(priv);
6299
6300 exit:
6301 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
6302
6303 if (priv->ibss_beacon)
6304 dev_kfree_skb(priv->ibss_beacon);
6305 priv->ibss_beacon = NULL;
6306
6307 /* clear out any free frames */
6308 iwl3945_clear_free_frames(priv);
6309 }
6310
6311 static void iwl3945_down(struct iwl3945_priv *priv)
6312 {
6313 mutex_lock(&priv->mutex);
6314 __iwl3945_down(priv);
6315 mutex_unlock(&priv->mutex);
6316
6317 iwl3945_cancel_deferred_work(priv);
6318 }
6319
6320 #define MAX_HW_RESTARTS 5
6321
6322 static int __iwl3945_up(struct iwl3945_priv *priv)
6323 {
6324 int rc, i;
6325
6326 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6327 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6328 return -EIO;
6329 }
6330
6331 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6332 IWL_WARNING("Radio disabled by SW RF kill (module "
6333 "parameter)\n");
6334 return -ENODEV;
6335 }
6336
6337 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6338 IWL_ERROR("ucode not available for device bringup\n");
6339 return -EIO;
6340 }
6341
6342 /* If platform's RF_KILL switch is NOT set to KILL */
6343 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
6344 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6345 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6346 else {
6347 set_bit(STATUS_RF_KILL_HW, &priv->status);
6348 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6349 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6350 return -ENODEV;
6351 }
6352 }
6353
6354 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6355
6356 rc = iwl3945_hw_nic_init(priv);
6357 if (rc) {
6358 IWL_ERROR("Unable to int nic\n");
6359 return rc;
6360 }
6361
6362 /* make sure rfkill handshake bits are cleared */
6363 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6364 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
6365 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6366
6367 /* clear (again), then enable host interrupts */
6368 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6369 iwl3945_enable_interrupts(priv);
6370
6371 /* really make sure rfkill handshake bits are cleared */
6372 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6373 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6374
6375 /* Copy original ucode data image from disk into backup cache.
6376 * This will be used to initialize the on-board processor's
6377 * data SRAM for a clean start when the runtime program first loads. */
6378 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6379 priv->ucode_data.len);
6380
6381 /* We return success when we resume from suspend and rf_kill is on. */
6382 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6383 return 0;
6384
6385 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6386
6387 iwl3945_clear_stations_table(priv);
6388
6389 /* load bootstrap state machine,
6390 * load bootstrap program into processor's memory,
6391 * prepare to load the "initialize" uCode */
6392 rc = iwl3945_load_bsm(priv);
6393
6394 if (rc) {
6395 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6396 continue;
6397 }
6398
6399 /* start card; "initialize" will load runtime ucode */
6400 iwl3945_nic_start(priv);
6401
6402 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6403
6404 return 0;
6405 }
6406
6407 set_bit(STATUS_EXIT_PENDING, &priv->status);
6408 __iwl3945_down(priv);
6409
6410 /* tried to restart and config the device for as long as our
6411 * patience could withstand */
6412 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6413 return -EIO;
6414 }
6415
6416
6417 /*****************************************************************************
6418 *
6419 * Workqueue callbacks
6420 *
6421 *****************************************************************************/
6422
6423 static void iwl3945_bg_init_alive_start(struct work_struct *data)
6424 {
6425 struct iwl3945_priv *priv =
6426 container_of(data, struct iwl3945_priv, init_alive_start.work);
6427
6428 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6429 return;
6430
6431 mutex_lock(&priv->mutex);
6432 iwl3945_init_alive_start(priv);
6433 mutex_unlock(&priv->mutex);
6434 }
6435
6436 static void iwl3945_bg_alive_start(struct work_struct *data)
6437 {
6438 struct iwl3945_priv *priv =
6439 container_of(data, struct iwl3945_priv, alive_start.work);
6440
6441 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6442 return;
6443
6444 mutex_lock(&priv->mutex);
6445 iwl3945_alive_start(priv);
6446 mutex_unlock(&priv->mutex);
6447 }
6448
6449 static void iwl3945_bg_rf_kill(struct work_struct *work)
6450 {
6451 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
6452
6453 wake_up_interruptible(&priv->wait_command_queue);
6454
6455 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6456 return;
6457
6458 mutex_lock(&priv->mutex);
6459
6460 if (!iwl3945_is_rfkill(priv)) {
6461 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6462 "HW and/or SW RF Kill no longer active, restarting "
6463 "device\n");
6464 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6465 queue_work(priv->workqueue, &priv->restart);
6466 } else {
6467
6468 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6469 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6470 "disabled by SW switch\n");
6471 else
6472 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6473 "Kill switch must be turned off for "
6474 "wireless networking to work.\n");
6475 }
6476 mutex_unlock(&priv->mutex);
6477 }
6478
6479 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6480
6481 static void iwl3945_bg_scan_check(struct work_struct *data)
6482 {
6483 struct iwl3945_priv *priv =
6484 container_of(data, struct iwl3945_priv, scan_check.work);
6485
6486 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6487 return;
6488
6489 mutex_lock(&priv->mutex);
6490 if (test_bit(STATUS_SCANNING, &priv->status) ||
6491 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6492 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6493 "Scan completion watchdog resetting adapter (%dms)\n",
6494 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6495
6496 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6497 iwl3945_send_scan_abort(priv);
6498 }
6499 mutex_unlock(&priv->mutex);
6500 }
6501
6502 static void iwl3945_bg_request_scan(struct work_struct *data)
6503 {
6504 struct iwl3945_priv *priv =
6505 container_of(data, struct iwl3945_priv, request_scan);
6506 struct iwl3945_host_cmd cmd = {
6507 .id = REPLY_SCAN_CMD,
6508 .len = sizeof(struct iwl3945_scan_cmd),
6509 .meta.flags = CMD_SIZE_HUGE,
6510 };
6511 int rc = 0;
6512 struct iwl3945_scan_cmd *scan;
6513 struct ieee80211_conf *conf = NULL;
6514 u8 direct_mask;
6515 int phymode;
6516
6517 conf = ieee80211_get_hw_conf(priv->hw);
6518
6519 mutex_lock(&priv->mutex);
6520
6521 if (!iwl3945_is_ready(priv)) {
6522 IWL_WARNING("request scan called when driver not ready.\n");
6523 goto done;
6524 }
6525
6526 /* Make sure the scan wasn't cancelled before this queued work
6527 * was given the chance to run... */
6528 if (!test_bit(STATUS_SCANNING, &priv->status))
6529 goto done;
6530
6531 /* This should never be called or scheduled if there is currently
6532 * a scan active in the hardware. */
6533 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6534 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6535 "Ignoring second request.\n");
6536 rc = -EIO;
6537 goto done;
6538 }
6539
6540 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6541 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6542 goto done;
6543 }
6544
6545 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6546 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6547 goto done;
6548 }
6549
6550 if (iwl3945_is_rfkill(priv)) {
6551 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6552 goto done;
6553 }
6554
6555 if (!test_bit(STATUS_READY, &priv->status)) {
6556 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6557 goto done;
6558 }
6559
6560 if (!priv->scan_bands) {
6561 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6562 goto done;
6563 }
6564
6565 if (!priv->scan) {
6566 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6567 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6568 if (!priv->scan) {
6569 rc = -ENOMEM;
6570 goto done;
6571 }
6572 }
6573 scan = priv->scan;
6574 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6575
6576 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6577 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6578
6579 if (iwl3945_is_associated(priv)) {
6580 u16 interval = 0;
6581 u32 extra;
6582 u32 suspend_time = 100;
6583 u32 scan_suspend_time = 100;
6584 unsigned long flags;
6585
6586 IWL_DEBUG_INFO("Scanning while associated...\n");
6587
6588 spin_lock_irqsave(&priv->lock, flags);
6589 interval = priv->beacon_int;
6590 spin_unlock_irqrestore(&priv->lock, flags);
6591
6592 scan->suspend_time = 0;
6593 scan->max_out_time = cpu_to_le32(200 * 1024);
6594 if (!interval)
6595 interval = suspend_time;
6596 /*
6597 * suspend time format:
6598 * 0-19: beacon interval in usec (time before exec.)
6599 * 20-23: 0
6600 * 24-31: number of beacons (suspend between channels)
6601 */
6602
6603 extra = (suspend_time / interval) << 24;
6604 scan_suspend_time = 0xFF0FFFFF &
6605 (extra | ((suspend_time % interval) * 1024));
6606
6607 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6608 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6609 scan_suspend_time, interval);
6610 }
6611
6612 /* We should add the ability for user to lock to PASSIVE ONLY */
6613 if (priv->one_direct_scan) {
6614 IWL_DEBUG_SCAN
6615 ("Kicking off one direct scan for '%s'\n",
6616 iwl3945_escape_essid(priv->direct_ssid,
6617 priv->direct_ssid_len));
6618 scan->direct_scan[0].id = WLAN_EID_SSID;
6619 scan->direct_scan[0].len = priv->direct_ssid_len;
6620 memcpy(scan->direct_scan[0].ssid,
6621 priv->direct_ssid, priv->direct_ssid_len);
6622 direct_mask = 1;
6623 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
6624 scan->direct_scan[0].id = WLAN_EID_SSID;
6625 scan->direct_scan[0].len = priv->essid_len;
6626 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6627 direct_mask = 1;
6628 } else
6629 direct_mask = 0;
6630
6631 /* We don't build a direct scan probe request; the uCode will do
6632 * that based on the direct_mask added to each channel entry */
6633 scan->tx_cmd.len = cpu_to_le16(
6634 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6635 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
6636 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6637 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6638 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6639
6640 /* flags + rate selection */
6641
6642 switch (priv->scan_bands) {
6643 case 2:
6644 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6645 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6646 scan->good_CRC_th = 0;
6647 phymode = MODE_IEEE80211G;
6648 break;
6649
6650 case 1:
6651 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6652 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6653 phymode = MODE_IEEE80211A;
6654 break;
6655
6656 default:
6657 IWL_WARNING("Invalid scan band count\n");
6658 goto done;
6659 }
6660
6661 /* select Rx antennas */
6662 scan->flags |= iwl3945_get_antenna_flags(priv);
6663
6664 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6665 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6666
6667 if (direct_mask)
6668 IWL_DEBUG_SCAN
6669 ("Initiating direct scan for %s.\n",
6670 iwl3945_escape_essid(priv->essid, priv->essid_len));
6671 else
6672 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
6673
6674 scan->channel_count =
6675 iwl3945_get_channels_for_scan(
6676 priv, phymode, 1, /* active */
6677 direct_mask,
6678 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6679
6680 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6681 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6682 cmd.data = scan;
6683 scan->len = cpu_to_le16(cmd.len);
6684
6685 set_bit(STATUS_SCAN_HW, &priv->status);
6686 rc = iwl3945_send_cmd_sync(priv, &cmd);
6687 if (rc)
6688 goto done;
6689
6690 queue_delayed_work(priv->workqueue, &priv->scan_check,
6691 IWL_SCAN_CHECK_WATCHDOG);
6692
6693 mutex_unlock(&priv->mutex);
6694 return;
6695
6696 done:
6697 /* inform mac80211 scan aborted */
6698 queue_work(priv->workqueue, &priv->scan_completed);
6699 mutex_unlock(&priv->mutex);
6700 }
6701
6702 static void iwl3945_bg_up(struct work_struct *data)
6703 {
6704 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6705
6706 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6707 return;
6708
6709 mutex_lock(&priv->mutex);
6710 __iwl3945_up(priv);
6711 mutex_unlock(&priv->mutex);
6712 }
6713
6714 static void iwl3945_bg_restart(struct work_struct *data)
6715 {
6716 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6717
6718 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6719 return;
6720
6721 iwl3945_down(priv);
6722 queue_work(priv->workqueue, &priv->up);
6723 }
6724
6725 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6726 {
6727 struct iwl3945_priv *priv =
6728 container_of(data, struct iwl3945_priv, rx_replenish);
6729
6730 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6731 return;
6732
6733 mutex_lock(&priv->mutex);
6734 iwl3945_rx_replenish(priv);
6735 mutex_unlock(&priv->mutex);
6736 }
6737
6738 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6739
6740 static void iwl3945_bg_post_associate(struct work_struct *data)
6741 {
6742 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
6743 post_associate.work);
6744
6745 int rc = 0;
6746 struct ieee80211_conf *conf = NULL;
6747 DECLARE_MAC_BUF(mac);
6748
6749 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6750 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6751 return;
6752 }
6753
6754
6755 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6756 priv->assoc_id,
6757 print_mac(mac, priv->active_rxon.bssid_addr));
6758
6759 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6760 return;
6761
6762 mutex_lock(&priv->mutex);
6763
6764 if (!priv->vif || !priv->is_open) {
6765 mutex_unlock(&priv->mutex);
6766 return;
6767 }
6768 iwl3945_scan_cancel_timeout(priv, 200);
6769
6770 conf = ieee80211_get_hw_conf(priv->hw);
6771
6772 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6773 iwl3945_commit_rxon(priv);
6774
6775 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6776 iwl3945_setup_rxon_timing(priv);
6777 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6778 sizeof(priv->rxon_timing), &priv->rxon_timing);
6779 if (rc)
6780 IWL_WARNING("REPLY_RXON_TIMING failed - "
6781 "Attempting to continue.\n");
6782
6783 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6784
6785 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6786
6787 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6788 priv->assoc_id, priv->beacon_int);
6789
6790 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6791 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6792 else
6793 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6794
6795 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6796 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6797 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6798 else
6799 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6800
6801 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6802 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6803
6804 }
6805
6806 iwl3945_commit_rxon(priv);
6807
6808 switch (priv->iw_mode) {
6809 case IEEE80211_IF_TYPE_STA:
6810 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6811 break;
6812
6813 case IEEE80211_IF_TYPE_IBSS:
6814
6815 /* clear out the station table */
6816 iwl3945_clear_stations_table(priv);
6817
6818 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6819 iwl3945_add_station(priv, priv->bssid, 0, 0);
6820 iwl3945_sync_sta(priv, IWL_STA_ID,
6821 (priv->phymode == MODE_IEEE80211A)?
6822 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6823 CMD_ASYNC);
6824 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6825 iwl3945_send_beacon_cmd(priv);
6826
6827 break;
6828
6829 default:
6830 IWL_ERROR("%s Should not be called in %d mode\n",
6831 __FUNCTION__, priv->iw_mode);
6832 break;
6833 }
6834
6835 iwl3945_sequence_reset(priv);
6836
6837 #ifdef CONFIG_IWL3945_QOS
6838 iwl3945_activate_qos(priv, 0);
6839 #endif /* CONFIG_IWL3945_QOS */
6840 /* we have just associated, don't start scan too early */
6841 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6842 mutex_unlock(&priv->mutex);
6843 }
6844
6845 static void iwl3945_bg_abort_scan(struct work_struct *work)
6846 {
6847 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6848
6849 if (!iwl3945_is_ready(priv))
6850 return;
6851
6852 mutex_lock(&priv->mutex);
6853
6854 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6855 iwl3945_send_scan_abort(priv);
6856
6857 mutex_unlock(&priv->mutex);
6858 }
6859
6860 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6861
6862 static void iwl3945_bg_scan_completed(struct work_struct *work)
6863 {
6864 struct iwl3945_priv *priv =
6865 container_of(work, struct iwl3945_priv, scan_completed);
6866
6867 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6868
6869 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6870 return;
6871
6872 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6873 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
6874
6875 ieee80211_scan_completed(priv->hw);
6876
6877 /* Since setting the TXPOWER may have been deferred while
6878 * performing the scan, fire one off */
6879 mutex_lock(&priv->mutex);
6880 iwl3945_hw_reg_send_txpower(priv);
6881 mutex_unlock(&priv->mutex);
6882 }
6883
6884 /*****************************************************************************
6885 *
6886 * mac80211 entry point functions
6887 *
6888 *****************************************************************************/
6889
6890 #define UCODE_READY_TIMEOUT (2 * HZ)
6891
6892 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6893 {
6894 struct iwl3945_priv *priv = hw->priv;
6895 int ret;
6896
6897 IWL_DEBUG_MAC80211("enter\n");
6898
6899 if (pci_enable_device(priv->pci_dev)) {
6900 IWL_ERROR("Fail to pci_enable_device\n");
6901 return -ENODEV;
6902 }
6903 pci_restore_state(priv->pci_dev);
6904 pci_enable_msi(priv->pci_dev);
6905
6906 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6907 DRV_NAME, priv);
6908 if (ret) {
6909 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6910 goto out_disable_msi;
6911 }
6912
6913 /* we should be verifying the device is ready to be opened */
6914 mutex_lock(&priv->mutex);
6915
6916 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6917 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6918 * ucode filename and max sizes are card-specific. */
6919
6920 if (!priv->ucode_code.len) {
6921 ret = iwl3945_read_ucode(priv);
6922 if (ret) {
6923 IWL_ERROR("Could not read microcode: %d\n", ret);
6924 mutex_unlock(&priv->mutex);
6925 goto out_release_irq;
6926 }
6927 }
6928
6929 ret = __iwl3945_up(priv);
6930
6931 mutex_unlock(&priv->mutex);
6932
6933 if (ret)
6934 goto out_release_irq;
6935
6936 IWL_DEBUG_INFO("Start UP work.\n");
6937
6938 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6939 return 0;
6940
6941 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6942 * mac80211 will not be run successfully. */
6943 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6944 test_bit(STATUS_READY, &priv->status),
6945 UCODE_READY_TIMEOUT);
6946 if (!ret) {
6947 if (!test_bit(STATUS_READY, &priv->status)) {
6948 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6949 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6950 ret = -ETIMEDOUT;
6951 goto out_release_irq;
6952 }
6953 }
6954
6955 priv->is_open = 1;
6956 IWL_DEBUG_MAC80211("leave\n");
6957 return 0;
6958
6959 out_release_irq:
6960 free_irq(priv->pci_dev->irq, priv);
6961 out_disable_msi:
6962 pci_disable_msi(priv->pci_dev);
6963 pci_disable_device(priv->pci_dev);
6964 priv->is_open = 0;
6965 IWL_DEBUG_MAC80211("leave - failed\n");
6966 return ret;
6967 }
6968
6969 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6970 {
6971 struct iwl3945_priv *priv = hw->priv;
6972
6973 IWL_DEBUG_MAC80211("enter\n");
6974
6975 if (!priv->is_open) {
6976 IWL_DEBUG_MAC80211("leave - skip\n");
6977 return;
6978 }
6979
6980 priv->is_open = 0;
6981
6982 if (iwl3945_is_ready_rf(priv)) {
6983 /* stop mac, cancel any scan request and clear
6984 * RXON_FILTER_ASSOC_MSK BIT
6985 */
6986 mutex_lock(&priv->mutex);
6987 iwl3945_scan_cancel_timeout(priv, 100);
6988 cancel_delayed_work(&priv->post_associate);
6989 mutex_unlock(&priv->mutex);
6990 }
6991
6992 iwl3945_down(priv);
6993
6994 flush_workqueue(priv->workqueue);
6995 free_irq(priv->pci_dev->irq, priv);
6996 pci_disable_msi(priv->pci_dev);
6997 pci_save_state(priv->pci_dev);
6998 pci_disable_device(priv->pci_dev);
6999
7000 IWL_DEBUG_MAC80211("leave\n");
7001 }
7002
7003 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
7004 struct ieee80211_tx_control *ctl)
7005 {
7006 struct iwl3945_priv *priv = hw->priv;
7007
7008 IWL_DEBUG_MAC80211("enter\n");
7009
7010 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7011 IWL_DEBUG_MAC80211("leave - monitor\n");
7012 return -1;
7013 }
7014
7015 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7016 ctl->tx_rate);
7017
7018 if (iwl3945_tx_skb(priv, skb, ctl))
7019 dev_kfree_skb_any(skb);
7020
7021 IWL_DEBUG_MAC80211("leave\n");
7022 return 0;
7023 }
7024
7025 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
7026 struct ieee80211_if_init_conf *conf)
7027 {
7028 struct iwl3945_priv *priv = hw->priv;
7029 unsigned long flags;
7030 DECLARE_MAC_BUF(mac);
7031
7032 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
7033
7034 if (priv->vif) {
7035 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
7036 return -EOPNOTSUPP;
7037 }
7038
7039 spin_lock_irqsave(&priv->lock, flags);
7040 priv->vif = conf->vif;
7041
7042 spin_unlock_irqrestore(&priv->lock, flags);
7043
7044 mutex_lock(&priv->mutex);
7045
7046 if (conf->mac_addr) {
7047 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
7048 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7049 }
7050
7051 if (iwl3945_is_ready(priv))
7052 iwl3945_set_mode(priv, conf->type);
7053
7054 mutex_unlock(&priv->mutex);
7055
7056 IWL_DEBUG_MAC80211("leave\n");
7057 return 0;
7058 }
7059
7060 /**
7061 * iwl3945_mac_config - mac80211 config callback
7062 *
7063 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7064 * be set inappropriately and the driver currently sets the hardware up to
7065 * use it whenever needed.
7066 */
7067 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
7068 {
7069 struct iwl3945_priv *priv = hw->priv;
7070 const struct iwl3945_channel_info *ch_info;
7071 unsigned long flags;
7072 int ret = 0;
7073
7074 mutex_lock(&priv->mutex);
7075 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7076
7077 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7078
7079 if (!iwl3945_is_ready(priv)) {
7080 IWL_DEBUG_MAC80211("leave - not ready\n");
7081 ret = -EIO;
7082 goto out;
7083 }
7084
7085 if (unlikely(!iwl3945_param_disable_hw_scan &&
7086 test_bit(STATUS_SCANNING, &priv->status))) {
7087 IWL_DEBUG_MAC80211("leave - scanning\n");
7088 set_bit(STATUS_CONF_PENDING, &priv->status);
7089 mutex_unlock(&priv->mutex);
7090 return 0;
7091 }
7092
7093 spin_lock_irqsave(&priv->lock, flags);
7094
7095 ch_info = iwl3945_get_channel_info(priv, conf->phymode, conf->channel);
7096 if (!is_channel_valid(ch_info)) {
7097 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7098 conf->channel, conf->phymode);
7099 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7100 spin_unlock_irqrestore(&priv->lock, flags);
7101 ret = -EINVAL;
7102 goto out;
7103 }
7104
7105 iwl3945_set_rxon_channel(priv, conf->phymode, conf->channel);
7106
7107 iwl3945_set_flags_for_phymode(priv, conf->phymode);
7108
7109 /* The list of supported rates and rate mask can be different
7110 * for each phymode; since the phymode may have changed, reset
7111 * the rate mask to what mac80211 lists */
7112 iwl3945_set_rate(priv);
7113
7114 spin_unlock_irqrestore(&priv->lock, flags);
7115
7116 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7117 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
7118 iwl3945_hw_channel_switch(priv, conf->channel);
7119 goto out;
7120 }
7121 #endif
7122
7123 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
7124
7125 if (!conf->radio_enabled) {
7126 IWL_DEBUG_MAC80211("leave - radio disabled\n");
7127 goto out;
7128 }
7129
7130 if (iwl3945_is_rfkill(priv)) {
7131 IWL_DEBUG_MAC80211("leave - RF kill\n");
7132 ret = -EIO;
7133 goto out;
7134 }
7135
7136 iwl3945_set_rate(priv);
7137
7138 if (memcmp(&priv->active_rxon,
7139 &priv->staging_rxon, sizeof(priv->staging_rxon)))
7140 iwl3945_commit_rxon(priv);
7141 else
7142 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7143
7144 IWL_DEBUG_MAC80211("leave\n");
7145
7146 out:
7147 clear_bit(STATUS_CONF_PENDING, &priv->status);
7148 mutex_unlock(&priv->mutex);
7149 return ret;
7150 }
7151
7152 static void iwl3945_config_ap(struct iwl3945_priv *priv)
7153 {
7154 int rc = 0;
7155
7156 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7157 return;
7158
7159 /* The following should be done only at AP bring up */
7160 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7161
7162 /* RXON - unassoc (to set timing command) */
7163 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7164 iwl3945_commit_rxon(priv);
7165
7166 /* RXON Timing */
7167 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
7168 iwl3945_setup_rxon_timing(priv);
7169 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7170 sizeof(priv->rxon_timing), &priv->rxon_timing);
7171 if (rc)
7172 IWL_WARNING("REPLY_RXON_TIMING failed - "
7173 "Attempting to continue.\n");
7174
7175 /* FIXME: what should be the assoc_id for AP? */
7176 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7177 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7178 priv->staging_rxon.flags |=
7179 RXON_FLG_SHORT_PREAMBLE_MSK;
7180 else
7181 priv->staging_rxon.flags &=
7182 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7183
7184 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7185 if (priv->assoc_capability &
7186 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7187 priv->staging_rxon.flags |=
7188 RXON_FLG_SHORT_SLOT_MSK;
7189 else
7190 priv->staging_rxon.flags &=
7191 ~RXON_FLG_SHORT_SLOT_MSK;
7192
7193 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7194 priv->staging_rxon.flags &=
7195 ~RXON_FLG_SHORT_SLOT_MSK;
7196 }
7197 /* restore RXON assoc */
7198 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7199 iwl3945_commit_rxon(priv);
7200 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
7201 }
7202 iwl3945_send_beacon_cmd(priv);
7203
7204 /* FIXME - we need to add code here to detect a totally new
7205 * configuration, reset the AP, unassoc, rxon timing, assoc,
7206 * clear sta table, add BCAST sta... */
7207 }
7208
7209 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
7210 struct ieee80211_vif *vif,
7211 struct ieee80211_if_conf *conf)
7212 {
7213 struct iwl3945_priv *priv = hw->priv;
7214 DECLARE_MAC_BUF(mac);
7215 unsigned long flags;
7216 int rc;
7217
7218 if (conf == NULL)
7219 return -EIO;
7220
7221 /* XXX: this MUST use conf->mac_addr */
7222
7223 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7224 (!conf->beacon || !conf->ssid_len)) {
7225 IWL_DEBUG_MAC80211
7226 ("Leaving in AP mode because HostAPD is not ready.\n");
7227 return 0;
7228 }
7229
7230 if (!iwl3945_is_alive(priv))
7231 return -EAGAIN;
7232
7233 mutex_lock(&priv->mutex);
7234
7235 if (conf->bssid)
7236 IWL_DEBUG_MAC80211("bssid: %s\n",
7237 print_mac(mac, conf->bssid));
7238
7239 /*
7240 * very dubious code was here; the probe filtering flag is never set:
7241 *
7242 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7243 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
7244 */
7245 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
7246 IWL_DEBUG_MAC80211("leave - scanning\n");
7247 mutex_unlock(&priv->mutex);
7248 return 0;
7249 }
7250
7251 if (priv->vif != vif) {
7252 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
7253 mutex_unlock(&priv->mutex);
7254 return 0;
7255 }
7256
7257 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7258 if (!conf->bssid) {
7259 conf->bssid = priv->mac_addr;
7260 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
7261 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7262 print_mac(mac, conf->bssid));
7263 }
7264 if (priv->ibss_beacon)
7265 dev_kfree_skb(priv->ibss_beacon);
7266
7267 priv->ibss_beacon = conf->beacon;
7268 }
7269
7270 if (iwl3945_is_rfkill(priv))
7271 goto done;
7272
7273 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7274 !is_multicast_ether_addr(conf->bssid)) {
7275 /* If there is currently a HW scan going on in the background
7276 * then we need to cancel it else the RXON below will fail. */
7277 if (iwl3945_scan_cancel_timeout(priv, 100)) {
7278 IWL_WARNING("Aborted scan still in progress "
7279 "after 100ms\n");
7280 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7281 mutex_unlock(&priv->mutex);
7282 return -EAGAIN;
7283 }
7284 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7285
7286 /* TODO: Audit driver for usage of these members and see
7287 * if mac80211 deprecates them (priv->bssid looks like it
7288 * shouldn't be there, but I haven't scanned the IBSS code
7289 * to verify) - jpk */
7290 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7291
7292 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7293 iwl3945_config_ap(priv);
7294 else {
7295 rc = iwl3945_commit_rxon(priv);
7296 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
7297 iwl3945_add_station(priv,
7298 priv->active_rxon.bssid_addr, 1, 0);
7299 }
7300
7301 } else {
7302 iwl3945_scan_cancel_timeout(priv, 100);
7303 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7304 iwl3945_commit_rxon(priv);
7305 }
7306
7307 done:
7308 spin_lock_irqsave(&priv->lock, flags);
7309 if (!conf->ssid_len)
7310 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7311 else
7312 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7313
7314 priv->essid_len = conf->ssid_len;
7315 spin_unlock_irqrestore(&priv->lock, flags);
7316
7317 IWL_DEBUG_MAC80211("leave\n");
7318 mutex_unlock(&priv->mutex);
7319
7320 return 0;
7321 }
7322
7323 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
7324 unsigned int changed_flags,
7325 unsigned int *total_flags,
7326 int mc_count, struct dev_addr_list *mc_list)
7327 {
7328 /*
7329 * XXX: dummy
7330 * see also iwl3945_connection_init_rx_config
7331 */
7332 *total_flags = 0;
7333 }
7334
7335 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
7336 struct ieee80211_if_init_conf *conf)
7337 {
7338 struct iwl3945_priv *priv = hw->priv;
7339
7340 IWL_DEBUG_MAC80211("enter\n");
7341
7342 mutex_lock(&priv->mutex);
7343
7344 if (iwl3945_is_ready_rf(priv)) {
7345 iwl3945_scan_cancel_timeout(priv, 100);
7346 cancel_delayed_work(&priv->post_associate);
7347 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7348 iwl3945_commit_rxon(priv);
7349 }
7350 if (priv->vif == conf->vif) {
7351 priv->vif = NULL;
7352 memset(priv->bssid, 0, ETH_ALEN);
7353 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7354 priv->essid_len = 0;
7355 }
7356 mutex_unlock(&priv->mutex);
7357
7358 IWL_DEBUG_MAC80211("leave\n");
7359 }
7360
7361 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
7362 {
7363 int rc = 0;
7364 unsigned long flags;
7365 struct iwl3945_priv *priv = hw->priv;
7366
7367 IWL_DEBUG_MAC80211("enter\n");
7368
7369 mutex_lock(&priv->mutex);
7370 spin_lock_irqsave(&priv->lock, flags);
7371
7372 if (!iwl3945_is_ready_rf(priv)) {
7373 rc = -EIO;
7374 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7375 goto out_unlock;
7376 }
7377
7378 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7379 rc = -EIO;
7380 IWL_ERROR("ERROR: APs don't scan\n");
7381 goto out_unlock;
7382 }
7383
7384 /* we don't schedule scan within next_scan_jiffies period */
7385 if (priv->next_scan_jiffies &&
7386 time_after(priv->next_scan_jiffies, jiffies)) {
7387 rc = -EAGAIN;
7388 goto out_unlock;
7389 }
7390 /* if we just finished scan ask for delay */
7391 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7392 IWL_DELAY_NEXT_SCAN, jiffies)) {
7393 rc = -EAGAIN;
7394 goto out_unlock;
7395 }
7396 if (len) {
7397 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
7398 iwl3945_escape_essid(ssid, len), (int)len);
7399
7400 priv->one_direct_scan = 1;
7401 priv->direct_ssid_len = (u8)
7402 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7403 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7404 } else
7405 priv->one_direct_scan = 0;
7406
7407 rc = iwl3945_scan_initiate(priv);
7408
7409 IWL_DEBUG_MAC80211("leave\n");
7410
7411 out_unlock:
7412 spin_unlock_irqrestore(&priv->lock, flags);
7413 mutex_unlock(&priv->mutex);
7414
7415 return rc;
7416 }
7417
7418 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7419 const u8 *local_addr, const u8 *addr,
7420 struct ieee80211_key_conf *key)
7421 {
7422 struct iwl3945_priv *priv = hw->priv;
7423 int rc = 0;
7424 u8 sta_id;
7425
7426 IWL_DEBUG_MAC80211("enter\n");
7427
7428 if (!iwl3945_param_hwcrypto) {
7429 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7430 return -EOPNOTSUPP;
7431 }
7432
7433 if (is_zero_ether_addr(addr))
7434 /* only support pairwise keys */
7435 return -EOPNOTSUPP;
7436
7437 sta_id = iwl3945_hw_find_station(priv, addr);
7438 if (sta_id == IWL_INVALID_STATION) {
7439 DECLARE_MAC_BUF(mac);
7440
7441 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7442 print_mac(mac, addr));
7443 return -EINVAL;
7444 }
7445
7446 mutex_lock(&priv->mutex);
7447
7448 iwl3945_scan_cancel_timeout(priv, 100);
7449
7450 switch (cmd) {
7451 case SET_KEY:
7452 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7453 if (!rc) {
7454 iwl3945_set_rxon_hwcrypto(priv, 1);
7455 iwl3945_commit_rxon(priv);
7456 key->hw_key_idx = sta_id;
7457 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7458 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7459 }
7460 break;
7461 case DISABLE_KEY:
7462 rc = iwl3945_clear_sta_key_info(priv, sta_id);
7463 if (!rc) {
7464 iwl3945_set_rxon_hwcrypto(priv, 0);
7465 iwl3945_commit_rxon(priv);
7466 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7467 }
7468 break;
7469 default:
7470 rc = -EINVAL;
7471 }
7472
7473 IWL_DEBUG_MAC80211("leave\n");
7474 mutex_unlock(&priv->mutex);
7475
7476 return rc;
7477 }
7478
7479 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
7480 const struct ieee80211_tx_queue_params *params)
7481 {
7482 struct iwl3945_priv *priv = hw->priv;
7483 #ifdef CONFIG_IWL3945_QOS
7484 unsigned long flags;
7485 int q;
7486 #endif /* CONFIG_IWL3945_QOS */
7487
7488 IWL_DEBUG_MAC80211("enter\n");
7489
7490 if (!iwl3945_is_ready_rf(priv)) {
7491 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7492 return -EIO;
7493 }
7494
7495 if (queue >= AC_NUM) {
7496 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7497 return 0;
7498 }
7499
7500 #ifdef CONFIG_IWL3945_QOS
7501 if (!priv->qos_data.qos_enable) {
7502 priv->qos_data.qos_active = 0;
7503 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7504 return 0;
7505 }
7506 q = AC_NUM - 1 - queue;
7507
7508 spin_lock_irqsave(&priv->lock, flags);
7509
7510 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7511 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7512 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7513 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7514 cpu_to_le16((params->burst_time * 100));
7515
7516 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7517 priv->qos_data.qos_active = 1;
7518
7519 spin_unlock_irqrestore(&priv->lock, flags);
7520
7521 mutex_lock(&priv->mutex);
7522 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7523 iwl3945_activate_qos(priv, 1);
7524 else if (priv->assoc_id && iwl3945_is_associated(priv))
7525 iwl3945_activate_qos(priv, 0);
7526
7527 mutex_unlock(&priv->mutex);
7528
7529 #endif /*CONFIG_IWL3945_QOS */
7530
7531 IWL_DEBUG_MAC80211("leave\n");
7532 return 0;
7533 }
7534
7535 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7536 struct ieee80211_tx_queue_stats *stats)
7537 {
7538 struct iwl3945_priv *priv = hw->priv;
7539 int i, avail;
7540 struct iwl3945_tx_queue *txq;
7541 struct iwl3945_queue *q;
7542 unsigned long flags;
7543
7544 IWL_DEBUG_MAC80211("enter\n");
7545
7546 if (!iwl3945_is_ready_rf(priv)) {
7547 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7548 return -EIO;
7549 }
7550
7551 spin_lock_irqsave(&priv->lock, flags);
7552
7553 for (i = 0; i < AC_NUM; i++) {
7554 txq = &priv->txq[i];
7555 q = &txq->q;
7556 avail = iwl3945_queue_space(q);
7557
7558 stats->data[i].len = q->n_window - avail;
7559 stats->data[i].limit = q->n_window - q->high_mark;
7560 stats->data[i].count = q->n_window;
7561
7562 }
7563 spin_unlock_irqrestore(&priv->lock, flags);
7564
7565 IWL_DEBUG_MAC80211("leave\n");
7566
7567 return 0;
7568 }
7569
7570 static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7571 struct ieee80211_low_level_stats *stats)
7572 {
7573 IWL_DEBUG_MAC80211("enter\n");
7574 IWL_DEBUG_MAC80211("leave\n");
7575
7576 return 0;
7577 }
7578
7579 static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
7580 {
7581 IWL_DEBUG_MAC80211("enter\n");
7582 IWL_DEBUG_MAC80211("leave\n");
7583
7584 return 0;
7585 }
7586
7587 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7588 {
7589 struct iwl3945_priv *priv = hw->priv;
7590 unsigned long flags;
7591
7592 mutex_lock(&priv->mutex);
7593 IWL_DEBUG_MAC80211("enter\n");
7594
7595 #ifdef CONFIG_IWL3945_QOS
7596 iwl3945_reset_qos(priv);
7597 #endif
7598 cancel_delayed_work(&priv->post_associate);
7599
7600 spin_lock_irqsave(&priv->lock, flags);
7601 priv->assoc_id = 0;
7602 priv->assoc_capability = 0;
7603 priv->call_post_assoc_from_beacon = 0;
7604
7605 /* new association get rid of ibss beacon skb */
7606 if (priv->ibss_beacon)
7607 dev_kfree_skb(priv->ibss_beacon);
7608
7609 priv->ibss_beacon = NULL;
7610
7611 priv->beacon_int = priv->hw->conf.beacon_int;
7612 priv->timestamp1 = 0;
7613 priv->timestamp0 = 0;
7614 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7615 priv->beacon_int = 0;
7616
7617 spin_unlock_irqrestore(&priv->lock, flags);
7618
7619 if (!iwl3945_is_ready_rf(priv)) {
7620 IWL_DEBUG_MAC80211("leave - not ready\n");
7621 mutex_unlock(&priv->mutex);
7622 return;
7623 }
7624
7625 /* we are restarting association process
7626 * clear RXON_FILTER_ASSOC_MSK bit
7627 */
7628 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
7629 iwl3945_scan_cancel_timeout(priv, 100);
7630 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7631 iwl3945_commit_rxon(priv);
7632 }
7633
7634 /* Per mac80211.h: This is only used in IBSS mode... */
7635 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7636
7637 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7638 mutex_unlock(&priv->mutex);
7639 return;
7640 }
7641
7642 priv->only_active_channel = 0;
7643
7644 iwl3945_set_rate(priv);
7645
7646 mutex_unlock(&priv->mutex);
7647
7648 IWL_DEBUG_MAC80211("leave\n");
7649
7650 }
7651
7652 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
7653 struct ieee80211_tx_control *control)
7654 {
7655 struct iwl3945_priv *priv = hw->priv;
7656 unsigned long flags;
7657
7658 mutex_lock(&priv->mutex);
7659 IWL_DEBUG_MAC80211("enter\n");
7660
7661 if (!iwl3945_is_ready_rf(priv)) {
7662 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7663 mutex_unlock(&priv->mutex);
7664 return -EIO;
7665 }
7666
7667 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7668 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7669 mutex_unlock(&priv->mutex);
7670 return -EIO;
7671 }
7672
7673 spin_lock_irqsave(&priv->lock, flags);
7674
7675 if (priv->ibss_beacon)
7676 dev_kfree_skb(priv->ibss_beacon);
7677
7678 priv->ibss_beacon = skb;
7679
7680 priv->assoc_id = 0;
7681
7682 IWL_DEBUG_MAC80211("leave\n");
7683 spin_unlock_irqrestore(&priv->lock, flags);
7684
7685 #ifdef CONFIG_IWL3945_QOS
7686 iwl3945_reset_qos(priv);
7687 #endif
7688
7689 queue_work(priv->workqueue, &priv->post_associate.work);
7690
7691 mutex_unlock(&priv->mutex);
7692
7693 return 0;
7694 }
7695
7696 /*****************************************************************************
7697 *
7698 * sysfs attributes
7699 *
7700 *****************************************************************************/
7701
7702 #ifdef CONFIG_IWL3945_DEBUG
7703
7704 /*
7705 * The following adds a new attribute to the sysfs representation
7706 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7707 * used for controlling the debug level.
7708 *
7709 * See the level definitions in iwl for details.
7710 */
7711
7712 static ssize_t show_debug_level(struct device_driver *d, char *buf)
7713 {
7714 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
7715 }
7716 static ssize_t store_debug_level(struct device_driver *d,
7717 const char *buf, size_t count)
7718 {
7719 char *p = (char *)buf;
7720 u32 val;
7721
7722 val = simple_strtoul(p, &p, 0);
7723 if (p == buf)
7724 printk(KERN_INFO DRV_NAME
7725 ": %s is not in hex or decimal form.\n", buf);
7726 else
7727 iwl3945_debug_level = val;
7728
7729 return strnlen(buf, count);
7730 }
7731
7732 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7733 show_debug_level, store_debug_level);
7734
7735 #endif /* CONFIG_IWL3945_DEBUG */
7736
7737 static ssize_t show_rf_kill(struct device *d,
7738 struct device_attribute *attr, char *buf)
7739 {
7740 /*
7741 * 0 - RF kill not enabled
7742 * 1 - SW based RF kill active (sysfs)
7743 * 2 - HW based RF kill active
7744 * 3 - Both HW and SW based RF kill active
7745 */
7746 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7747 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7748 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7749
7750 return sprintf(buf, "%i\n", val);
7751 }
7752
7753 static ssize_t store_rf_kill(struct device *d,
7754 struct device_attribute *attr,
7755 const char *buf, size_t count)
7756 {
7757 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7758
7759 mutex_lock(&priv->mutex);
7760 iwl3945_radio_kill_sw(priv, buf[0] == '1');
7761 mutex_unlock(&priv->mutex);
7762
7763 return count;
7764 }
7765
7766 static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7767
7768 static ssize_t show_temperature(struct device *d,
7769 struct device_attribute *attr, char *buf)
7770 {
7771 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7772
7773 if (!iwl3945_is_alive(priv))
7774 return -EAGAIN;
7775
7776 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7777 }
7778
7779 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7780
7781 static ssize_t show_rs_window(struct device *d,
7782 struct device_attribute *attr,
7783 char *buf)
7784 {
7785 struct iwl3945_priv *priv = d->driver_data;
7786 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
7787 }
7788 static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7789
7790 static ssize_t show_tx_power(struct device *d,
7791 struct device_attribute *attr, char *buf)
7792 {
7793 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7794 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7795 }
7796
7797 static ssize_t store_tx_power(struct device *d,
7798 struct device_attribute *attr,
7799 const char *buf, size_t count)
7800 {
7801 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7802 char *p = (char *)buf;
7803 u32 val;
7804
7805 val = simple_strtoul(p, &p, 10);
7806 if (p == buf)
7807 printk(KERN_INFO DRV_NAME
7808 ": %s is not in decimal form.\n", buf);
7809 else
7810 iwl3945_hw_reg_set_txpower(priv, val);
7811
7812 return count;
7813 }
7814
7815 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7816
7817 static ssize_t show_flags(struct device *d,
7818 struct device_attribute *attr, char *buf)
7819 {
7820 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7821
7822 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7823 }
7824
7825 static ssize_t store_flags(struct device *d,
7826 struct device_attribute *attr,
7827 const char *buf, size_t count)
7828 {
7829 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7830 u32 flags = simple_strtoul(buf, NULL, 0);
7831
7832 mutex_lock(&priv->mutex);
7833 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7834 /* Cancel any currently running scans... */
7835 if (iwl3945_scan_cancel_timeout(priv, 100))
7836 IWL_WARNING("Could not cancel scan.\n");
7837 else {
7838 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7839 flags);
7840 priv->staging_rxon.flags = cpu_to_le32(flags);
7841 iwl3945_commit_rxon(priv);
7842 }
7843 }
7844 mutex_unlock(&priv->mutex);
7845
7846 return count;
7847 }
7848
7849 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7850
7851 static ssize_t show_filter_flags(struct device *d,
7852 struct device_attribute *attr, char *buf)
7853 {
7854 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7855
7856 return sprintf(buf, "0x%04X\n",
7857 le32_to_cpu(priv->active_rxon.filter_flags));
7858 }
7859
7860 static ssize_t store_filter_flags(struct device *d,
7861 struct device_attribute *attr,
7862 const char *buf, size_t count)
7863 {
7864 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7865 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7866
7867 mutex_lock(&priv->mutex);
7868 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7869 /* Cancel any currently running scans... */
7870 if (iwl3945_scan_cancel_timeout(priv, 100))
7871 IWL_WARNING("Could not cancel scan.\n");
7872 else {
7873 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7874 "0x%04X\n", filter_flags);
7875 priv->staging_rxon.filter_flags =
7876 cpu_to_le32(filter_flags);
7877 iwl3945_commit_rxon(priv);
7878 }
7879 }
7880 mutex_unlock(&priv->mutex);
7881
7882 return count;
7883 }
7884
7885 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7886 store_filter_flags);
7887
7888 static ssize_t show_tune(struct device *d,
7889 struct device_attribute *attr, char *buf)
7890 {
7891 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7892
7893 return sprintf(buf, "0x%04X\n",
7894 (priv->phymode << 8) |
7895 le16_to_cpu(priv->active_rxon.channel));
7896 }
7897
7898 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode);
7899
7900 static ssize_t store_tune(struct device *d,
7901 struct device_attribute *attr,
7902 const char *buf, size_t count)
7903 {
7904 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7905 char *p = (char *)buf;
7906 u16 tune = simple_strtoul(p, &p, 0);
7907 u8 phymode = (tune >> 8) & 0xff;
7908 u16 channel = tune & 0xff;
7909
7910 IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
7911
7912 mutex_lock(&priv->mutex);
7913 if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
7914 (priv->phymode != phymode)) {
7915 const struct iwl3945_channel_info *ch_info;
7916
7917 ch_info = iwl3945_get_channel_info(priv, phymode, channel);
7918 if (!ch_info) {
7919 IWL_WARNING("Requested invalid phymode/channel "
7920 "combination: %d %d\n", phymode, channel);
7921 mutex_unlock(&priv->mutex);
7922 return -EINVAL;
7923 }
7924
7925 /* Cancel any currently running scans... */
7926 if (iwl3945_scan_cancel_timeout(priv, 100))
7927 IWL_WARNING("Could not cancel scan.\n");
7928 else {
7929 IWL_DEBUG_INFO("Committing phymode and "
7930 "rxon.channel = %d %d\n",
7931 phymode, channel);
7932
7933 iwl3945_set_rxon_channel(priv, phymode, channel);
7934 iwl3945_set_flags_for_phymode(priv, phymode);
7935
7936 iwl3945_set_rate(priv);
7937 iwl3945_commit_rxon(priv);
7938 }
7939 }
7940 mutex_unlock(&priv->mutex);
7941
7942 return count;
7943 }
7944
7945 static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
7946
7947 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7948
7949 static ssize_t show_measurement(struct device *d,
7950 struct device_attribute *attr, char *buf)
7951 {
7952 struct iwl3945_priv *priv = dev_get_drvdata(d);
7953 struct iwl3945_spectrum_notification measure_report;
7954 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7955 u8 *data = (u8 *) & measure_report;
7956 unsigned long flags;
7957
7958 spin_lock_irqsave(&priv->lock, flags);
7959 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7960 spin_unlock_irqrestore(&priv->lock, flags);
7961 return 0;
7962 }
7963 memcpy(&measure_report, &priv->measure_report, size);
7964 priv->measurement_status = 0;
7965 spin_unlock_irqrestore(&priv->lock, flags);
7966
7967 while (size && (PAGE_SIZE - len)) {
7968 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7969 PAGE_SIZE - len, 1);
7970 len = strlen(buf);
7971 if (PAGE_SIZE - len)
7972 buf[len++] = '\n';
7973
7974 ofs += 16;
7975 size -= min(size, 16U);
7976 }
7977
7978 return len;
7979 }
7980
7981 static ssize_t store_measurement(struct device *d,
7982 struct device_attribute *attr,
7983 const char *buf, size_t count)
7984 {
7985 struct iwl3945_priv *priv = dev_get_drvdata(d);
7986 struct ieee80211_measurement_params params = {
7987 .channel = le16_to_cpu(priv->active_rxon.channel),
7988 .start_time = cpu_to_le64(priv->last_tsf),
7989 .duration = cpu_to_le16(1),
7990 };
7991 u8 type = IWL_MEASURE_BASIC;
7992 u8 buffer[32];
7993 u8 channel;
7994
7995 if (count) {
7996 char *p = buffer;
7997 strncpy(buffer, buf, min(sizeof(buffer), count));
7998 channel = simple_strtoul(p, NULL, 0);
7999 if (channel)
8000 params.channel = channel;
8001
8002 p = buffer;
8003 while (*p && *p != ' ')
8004 p++;
8005 if (*p)
8006 type = simple_strtoul(p + 1, NULL, 0);
8007 }
8008
8009 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8010 "channel %d (for '%s')\n", type, params.channel, buf);
8011 iwl3945_get_measurement(priv, &params, type);
8012
8013 return count;
8014 }
8015
8016 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8017 show_measurement, store_measurement);
8018 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
8019
8020 static ssize_t show_rate(struct device *d,
8021 struct device_attribute *attr, char *buf)
8022 {
8023 struct iwl3945_priv *priv = dev_get_drvdata(d);
8024 unsigned long flags;
8025 int i;
8026
8027 spin_lock_irqsave(&priv->sta_lock, flags);
8028 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
8029 i = priv->stations[IWL_AP_ID].current_rate.s.rate;
8030 else
8031 i = priv->stations[IWL_STA_ID].current_rate.s.rate;
8032 spin_unlock_irqrestore(&priv->sta_lock, flags);
8033
8034 i = iwl3945_rate_index_from_plcp(i);
8035 if (i == -1)
8036 return sprintf(buf, "0\n");
8037
8038 return sprintf(buf, "%d%s\n",
8039 (iwl3945_rates[i].ieee >> 1),
8040 (iwl3945_rates[i].ieee & 0x1) ? ".5" : "");
8041 }
8042
8043 static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
8044
8045 static ssize_t store_retry_rate(struct device *d,
8046 struct device_attribute *attr,
8047 const char *buf, size_t count)
8048 {
8049 struct iwl3945_priv *priv = dev_get_drvdata(d);
8050
8051 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8052 if (priv->retry_rate <= 0)
8053 priv->retry_rate = 1;
8054
8055 return count;
8056 }
8057
8058 static ssize_t show_retry_rate(struct device *d,
8059 struct device_attribute *attr, char *buf)
8060 {
8061 struct iwl3945_priv *priv = dev_get_drvdata(d);
8062 return sprintf(buf, "%d", priv->retry_rate);
8063 }
8064
8065 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8066 store_retry_rate);
8067
8068 static ssize_t store_power_level(struct device *d,
8069 struct device_attribute *attr,
8070 const char *buf, size_t count)
8071 {
8072 struct iwl3945_priv *priv = dev_get_drvdata(d);
8073 int rc;
8074 int mode;
8075
8076 mode = simple_strtoul(buf, NULL, 0);
8077 mutex_lock(&priv->mutex);
8078
8079 if (!iwl3945_is_ready(priv)) {
8080 rc = -EAGAIN;
8081 goto out;
8082 }
8083
8084 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8085 mode = IWL_POWER_AC;
8086 else
8087 mode |= IWL_POWER_ENABLED;
8088
8089 if (mode != priv->power_mode) {
8090 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
8091 if (rc) {
8092 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8093 goto out;
8094 }
8095 priv->power_mode = mode;
8096 }
8097
8098 rc = count;
8099
8100 out:
8101 mutex_unlock(&priv->mutex);
8102 return rc;
8103 }
8104
8105 #define MAX_WX_STRING 80
8106
8107 /* Values are in microsecond */
8108 static const s32 timeout_duration[] = {
8109 350000,
8110 250000,
8111 75000,
8112 37000,
8113 25000,
8114 };
8115 static const s32 period_duration[] = {
8116 400000,
8117 700000,
8118 1000000,
8119 1000000,
8120 1000000
8121 };
8122
8123 static ssize_t show_power_level(struct device *d,
8124 struct device_attribute *attr, char *buf)
8125 {
8126 struct iwl3945_priv *priv = dev_get_drvdata(d);
8127 int level = IWL_POWER_LEVEL(priv->power_mode);
8128 char *p = buf;
8129
8130 p += sprintf(p, "%d ", level);
8131 switch (level) {
8132 case IWL_POWER_MODE_CAM:
8133 case IWL_POWER_AC:
8134 p += sprintf(p, "(AC)");
8135 break;
8136 case IWL_POWER_BATTERY:
8137 p += sprintf(p, "(BATTERY)");
8138 break;
8139 default:
8140 p += sprintf(p,
8141 "(Timeout %dms, Period %dms)",
8142 timeout_duration[level - 1] / 1000,
8143 period_duration[level - 1] / 1000);
8144 }
8145
8146 if (!(priv->power_mode & IWL_POWER_ENABLED))
8147 p += sprintf(p, " OFF\n");
8148 else
8149 p += sprintf(p, " \n");
8150
8151 return (p - buf + 1);
8152
8153 }
8154
8155 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8156 store_power_level);
8157
8158 static ssize_t show_channels(struct device *d,
8159 struct device_attribute *attr, char *buf)
8160 {
8161 struct iwl3945_priv *priv = dev_get_drvdata(d);
8162 int len = 0, i;
8163 struct ieee80211_channel *channels = NULL;
8164 const struct ieee80211_hw_mode *hw_mode = NULL;
8165 int count = 0;
8166
8167 if (!iwl3945_is_ready(priv))
8168 return -EAGAIN;
8169
8170 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211G);
8171 if (!hw_mode)
8172 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211B);
8173 if (hw_mode) {
8174 channels = hw_mode->channels;
8175 count = hw_mode->num_channels;
8176 }
8177
8178 len +=
8179 sprintf(&buf[len],
8180 "Displaying %d channels in 2.4GHz band "
8181 "(802.11bg):\n", count);
8182
8183 for (i = 0; i < count; i++)
8184 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8185 channels[i].chan,
8186 channels[i].power_level,
8187 channels[i].
8188 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8189 " (IEEE 802.11h required)" : "",
8190 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8191 || (channels[i].
8192 flag &
8193 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8194 ", IBSS",
8195 channels[i].
8196 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8197 "active/passive" : "passive only");
8198
8199 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211A);
8200 if (hw_mode) {
8201 channels = hw_mode->channels;
8202 count = hw_mode->num_channels;
8203 } else {
8204 channels = NULL;
8205 count = 0;
8206 }
8207
8208 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8209 "(802.11a):\n", count);
8210
8211 for (i = 0; i < count; i++)
8212 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8213 channels[i].chan,
8214 channels[i].power_level,
8215 channels[i].
8216 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8217 " (IEEE 802.11h required)" : "",
8218 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8219 || (channels[i].
8220 flag &
8221 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8222 ", IBSS",
8223 channels[i].
8224 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8225 "active/passive" : "passive only");
8226
8227 return len;
8228 }
8229
8230 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8231
8232 static ssize_t show_statistics(struct device *d,
8233 struct device_attribute *attr, char *buf)
8234 {
8235 struct iwl3945_priv *priv = dev_get_drvdata(d);
8236 u32 size = sizeof(struct iwl3945_notif_statistics);
8237 u32 len = 0, ofs = 0;
8238 u8 *data = (u8 *) & priv->statistics;
8239 int rc = 0;
8240
8241 if (!iwl3945_is_alive(priv))
8242 return -EAGAIN;
8243
8244 mutex_lock(&priv->mutex);
8245 rc = iwl3945_send_statistics_request(priv);
8246 mutex_unlock(&priv->mutex);
8247
8248 if (rc) {
8249 len = sprintf(buf,
8250 "Error sending statistics request: 0x%08X\n", rc);
8251 return len;
8252 }
8253
8254 while (size && (PAGE_SIZE - len)) {
8255 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8256 PAGE_SIZE - len, 1);
8257 len = strlen(buf);
8258 if (PAGE_SIZE - len)
8259 buf[len++] = '\n';
8260
8261 ofs += 16;
8262 size -= min(size, 16U);
8263 }
8264
8265 return len;
8266 }
8267
8268 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8269
8270 static ssize_t show_antenna(struct device *d,
8271 struct device_attribute *attr, char *buf)
8272 {
8273 struct iwl3945_priv *priv = dev_get_drvdata(d);
8274
8275 if (!iwl3945_is_alive(priv))
8276 return -EAGAIN;
8277
8278 return sprintf(buf, "%d\n", priv->antenna);
8279 }
8280
8281 static ssize_t store_antenna(struct device *d,
8282 struct device_attribute *attr,
8283 const char *buf, size_t count)
8284 {
8285 int ant;
8286 struct iwl3945_priv *priv = dev_get_drvdata(d);
8287
8288 if (count == 0)
8289 return 0;
8290
8291 if (sscanf(buf, "%1i", &ant) != 1) {
8292 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8293 return count;
8294 }
8295
8296 if ((ant >= 0) && (ant <= 2)) {
8297 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
8298 priv->antenna = (enum iwl3945_antenna)ant;
8299 } else
8300 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8301
8302
8303 return count;
8304 }
8305
8306 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8307
8308 static ssize_t show_status(struct device *d,
8309 struct device_attribute *attr, char *buf)
8310 {
8311 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
8312 if (!iwl3945_is_alive(priv))
8313 return -EAGAIN;
8314 return sprintf(buf, "0x%08x\n", (int)priv->status);
8315 }
8316
8317 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8318
8319 static ssize_t dump_error_log(struct device *d,
8320 struct device_attribute *attr,
8321 const char *buf, size_t count)
8322 {
8323 char *p = (char *)buf;
8324
8325 if (p[0] == '1')
8326 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
8327
8328 return strnlen(buf, count);
8329 }
8330
8331 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8332
8333 static ssize_t dump_event_log(struct device *d,
8334 struct device_attribute *attr,
8335 const char *buf, size_t count)
8336 {
8337 char *p = (char *)buf;
8338
8339 if (p[0] == '1')
8340 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
8341
8342 return strnlen(buf, count);
8343 }
8344
8345 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8346
8347 /*****************************************************************************
8348 *
8349 * driver setup and teardown
8350 *
8351 *****************************************************************************/
8352
8353 static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
8354 {
8355 priv->workqueue = create_workqueue(DRV_NAME);
8356
8357 init_waitqueue_head(&priv->wait_command_queue);
8358
8359 INIT_WORK(&priv->up, iwl3945_bg_up);
8360 INIT_WORK(&priv->restart, iwl3945_bg_restart);
8361 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
8362 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
8363 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
8364 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
8365 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
8366 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
8367 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
8368 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
8369 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
8370 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
8371
8372 iwl3945_hw_setup_deferred_work(priv);
8373
8374 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
8375 iwl3945_irq_tasklet, (unsigned long)priv);
8376 }
8377
8378 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
8379 {
8380 iwl3945_hw_cancel_deferred_work(priv);
8381
8382 cancel_delayed_work_sync(&priv->init_alive_start);
8383 cancel_delayed_work(&priv->scan_check);
8384 cancel_delayed_work(&priv->alive_start);
8385 cancel_delayed_work(&priv->post_associate);
8386 cancel_work_sync(&priv->beacon_update);
8387 }
8388
8389 static struct attribute *iwl3945_sysfs_entries[] = {
8390 &dev_attr_antenna.attr,
8391 &dev_attr_channels.attr,
8392 &dev_attr_dump_errors.attr,
8393 &dev_attr_dump_events.attr,
8394 &dev_attr_flags.attr,
8395 &dev_attr_filter_flags.attr,
8396 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
8397 &dev_attr_measurement.attr,
8398 #endif
8399 &dev_attr_power_level.attr,
8400 &dev_attr_rate.attr,
8401 &dev_attr_retry_rate.attr,
8402 &dev_attr_rf_kill.attr,
8403 &dev_attr_rs_window.attr,
8404 &dev_attr_statistics.attr,
8405 &dev_attr_status.attr,
8406 &dev_attr_temperature.attr,
8407 &dev_attr_tune.attr,
8408 &dev_attr_tx_power.attr,
8409
8410 NULL
8411 };
8412
8413 static struct attribute_group iwl3945_attribute_group = {
8414 .name = NULL, /* put in device directory */
8415 .attrs = iwl3945_sysfs_entries,
8416 };
8417
8418 static struct ieee80211_ops iwl3945_hw_ops = {
8419 .tx = iwl3945_mac_tx,
8420 .start = iwl3945_mac_start,
8421 .stop = iwl3945_mac_stop,
8422 .add_interface = iwl3945_mac_add_interface,
8423 .remove_interface = iwl3945_mac_remove_interface,
8424 .config = iwl3945_mac_config,
8425 .config_interface = iwl3945_mac_config_interface,
8426 .configure_filter = iwl3945_configure_filter,
8427 .set_key = iwl3945_mac_set_key,
8428 .get_stats = iwl3945_mac_get_stats,
8429 .get_tx_stats = iwl3945_mac_get_tx_stats,
8430 .conf_tx = iwl3945_mac_conf_tx,
8431 .get_tsf = iwl3945_mac_get_tsf,
8432 .reset_tsf = iwl3945_mac_reset_tsf,
8433 .beacon_update = iwl3945_mac_beacon_update,
8434 .hw_scan = iwl3945_mac_hw_scan
8435 };
8436
8437 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8438 {
8439 int err = 0;
8440 u32 pci_id;
8441 struct iwl3945_priv *priv;
8442 struct ieee80211_hw *hw;
8443 int i;
8444 DECLARE_MAC_BUF(mac);
8445
8446 /* Disabling hardware scan means that mac80211 will perform scans
8447 * "the hard way", rather than using device's scan. */
8448 if (iwl3945_param_disable_hw_scan) {
8449 IWL_DEBUG_INFO("Disabling hw_scan\n");
8450 iwl3945_hw_ops.hw_scan = NULL;
8451 }
8452
8453 if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8454 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
8455 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8456 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8457 err = -EINVAL;
8458 goto out;
8459 }
8460
8461 /* mac80211 allocates memory for this device instance, including
8462 * space for this driver's private structure */
8463 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
8464 if (hw == NULL) {
8465 IWL_ERROR("Can not allocate network device\n");
8466 err = -ENOMEM;
8467 goto out;
8468 }
8469 SET_IEEE80211_DEV(hw, &pdev->dev);
8470
8471 hw->rate_control_algorithm = "iwl-3945-rs";
8472
8473 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8474 priv = hw->priv;
8475 priv->hw = hw;
8476
8477 priv->pci_dev = pdev;
8478
8479 /* Select antenna (may be helpful if only one antenna is connected) */
8480 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
8481 #ifdef CONFIG_IWL3945_DEBUG
8482 iwl3945_debug_level = iwl3945_param_debug;
8483 atomic_set(&priv->restrict_refcnt, 0);
8484 #endif
8485 priv->retry_rate = 1;
8486
8487 priv->ibss_beacon = NULL;
8488
8489 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8490 * the range of signal quality values that we'll provide.
8491 * Negative values for level/noise indicate that we'll provide dBm.
8492 * For WE, at least, non-0 values here *enable* display of values
8493 * in app (iwconfig). */
8494 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8495 hw->max_noise = -20; /* noise level, negative indicates dBm */
8496 hw->max_signal = 100; /* link quality indication (%) */
8497
8498 /* Tell mac80211 our Tx characteristics */
8499 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8500
8501 /* 4 EDCA QOS priorities */
8502 hw->queues = 4;
8503
8504 spin_lock_init(&priv->lock);
8505 spin_lock_init(&priv->power_data.lock);
8506 spin_lock_init(&priv->sta_lock);
8507 spin_lock_init(&priv->hcmd_lock);
8508
8509 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8510 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8511
8512 INIT_LIST_HEAD(&priv->free_frames);
8513
8514 mutex_init(&priv->mutex);
8515 if (pci_enable_device(pdev)) {
8516 err = -ENODEV;
8517 goto out_ieee80211_free_hw;
8518 }
8519
8520 pci_set_master(pdev);
8521
8522 /* Clear the driver's (not device's) station table */
8523 iwl3945_clear_stations_table(priv);
8524
8525 priv->data_retry_limit = -1;
8526 priv->ieee_channels = NULL;
8527 priv->ieee_rates = NULL;
8528 priv->phymode = -1;
8529
8530 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8531 if (!err)
8532 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8533 if (err) {
8534 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8535 goto out_pci_disable_device;
8536 }
8537
8538 pci_set_drvdata(pdev, priv);
8539 err = pci_request_regions(pdev, DRV_NAME);
8540 if (err)
8541 goto out_pci_disable_device;
8542
8543 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8544 * PCI Tx retries from interfering with C3 CPU state */
8545 pci_write_config_byte(pdev, 0x41, 0x00);
8546
8547 priv->hw_base = pci_iomap(pdev, 0, 0);
8548 if (!priv->hw_base) {
8549 err = -ENODEV;
8550 goto out_pci_release_regions;
8551 }
8552
8553 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8554 (unsigned long long) pci_resource_len(pdev, 0));
8555 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8556
8557 /* Initialize module parameter values here */
8558
8559 /* Disable radio (SW RF KILL) via parameter when loading driver */
8560 if (iwl3945_param_disable) {
8561 set_bit(STATUS_RF_KILL_SW, &priv->status);
8562 IWL_DEBUG_INFO("Radio disabled.\n");
8563 }
8564
8565 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8566
8567 pci_id =
8568 (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
8569
8570 switch (pci_id) {
8571 case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
8572 case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
8573 case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
8574 case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
8575 priv->is_abg = 0;
8576 break;
8577
8578 /*
8579 * Rest are assumed ABG SKU -- if this is not the
8580 * case then the card will get the wrong 'Detected'
8581 * line in the kernel log however the code that
8582 * initializes the GEO table will detect no A-band
8583 * channels and remove the is_abg mask.
8584 */
8585 default:
8586 priv->is_abg = 1;
8587 break;
8588 }
8589
8590 printk(KERN_INFO DRV_NAME
8591 ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
8592 priv->is_abg ? "A" : "");
8593
8594 /* Device-specific setup */
8595 if (iwl3945_hw_set_hw_setting(priv)) {
8596 IWL_ERROR("failed to set hw settings\n");
8597 goto out_iounmap;
8598 }
8599
8600 #ifdef CONFIG_IWL3945_QOS
8601 if (iwl3945_param_qos_enable)
8602 priv->qos_data.qos_enable = 1;
8603
8604 iwl3945_reset_qos(priv);
8605
8606 priv->qos_data.qos_active = 0;
8607 priv->qos_data.qos_cap.val = 0;
8608 #endif /* CONFIG_IWL3945_QOS */
8609
8610 iwl3945_set_rxon_channel(priv, MODE_IEEE80211G, 6);
8611 iwl3945_setup_deferred_work(priv);
8612 iwl3945_setup_rx_handlers(priv);
8613
8614 priv->rates_mask = IWL_RATES_MASK;
8615 /* If power management is turned on, default to AC mode */
8616 priv->power_mode = IWL_POWER_AC;
8617 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8618
8619 iwl3945_disable_interrupts(priv);
8620
8621 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8622 if (err) {
8623 IWL_ERROR("failed to create sysfs device attributes\n");
8624 goto out_release_irq;
8625 }
8626
8627 /* nic init */
8628 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8629 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8630
8631 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8632 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8633 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8634 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8635 if (err < 0) {
8636 IWL_DEBUG_INFO("Failed to init the card\n");
8637 goto out_remove_sysfs;
8638 }
8639 /* Read the EEPROM */
8640 err = iwl3945_eeprom_init(priv);
8641 if (err) {
8642 IWL_ERROR("Unable to init EEPROM\n");
8643 goto out_remove_sysfs;
8644 }
8645 /* MAC Address location in EEPROM same for 3945/4965 */
8646 get_eeprom_mac(priv, priv->mac_addr);
8647 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8648 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8649
8650 err = iwl3945_init_channel_map(priv);
8651 if (err) {
8652 IWL_ERROR("initializing regulatory failed: %d\n", err);
8653 goto out_remove_sysfs;
8654 }
8655
8656 err = iwl3945_init_geos(priv);
8657 if (err) {
8658 IWL_ERROR("initializing geos failed: %d\n", err);
8659 goto out_free_channel_map;
8660 }
8661 iwl3945_reset_channel_flag(priv);
8662
8663 iwl3945_rate_control_register(priv->hw);
8664 err = ieee80211_register_hw(priv->hw);
8665 if (err) {
8666 IWL_ERROR("Failed to register network device (error %d)\n", err);
8667 goto out_free_geos;
8668 }
8669
8670 priv->hw->conf.beacon_int = 100;
8671 priv->mac80211_registered = 1;
8672 pci_save_state(pdev);
8673 pci_disable_device(pdev);
8674
8675 return 0;
8676
8677 out_free_geos:
8678 iwl3945_free_geos(priv);
8679 out_free_channel_map:
8680 iwl3945_free_channel_map(priv);
8681 out_remove_sysfs:
8682 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8683
8684 out_release_irq:
8685 destroy_workqueue(priv->workqueue);
8686 priv->workqueue = NULL;
8687 iwl3945_unset_hw_setting(priv);
8688
8689 out_iounmap:
8690 pci_iounmap(pdev, priv->hw_base);
8691 out_pci_release_regions:
8692 pci_release_regions(pdev);
8693 out_pci_disable_device:
8694 pci_disable_device(pdev);
8695 pci_set_drvdata(pdev, NULL);
8696 out_ieee80211_free_hw:
8697 ieee80211_free_hw(priv->hw);
8698 out:
8699 return err;
8700 }
8701
8702 static void iwl3945_pci_remove(struct pci_dev *pdev)
8703 {
8704 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8705 struct list_head *p, *q;
8706 int i;
8707
8708 if (!priv)
8709 return;
8710
8711 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8712
8713 set_bit(STATUS_EXIT_PENDING, &priv->status);
8714
8715 iwl3945_down(priv);
8716
8717 /* Free MAC hash list for ADHOC */
8718 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8719 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8720 list_del(p);
8721 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
8722 }
8723 }
8724
8725 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8726
8727 iwl3945_dealloc_ucode_pci(priv);
8728
8729 if (priv->rxq.bd)
8730 iwl3945_rx_queue_free(priv, &priv->rxq);
8731 iwl3945_hw_txq_ctx_free(priv);
8732
8733 iwl3945_unset_hw_setting(priv);
8734 iwl3945_clear_stations_table(priv);
8735
8736 if (priv->mac80211_registered) {
8737 ieee80211_unregister_hw(priv->hw);
8738 iwl3945_rate_control_unregister(priv->hw);
8739 }
8740
8741 /*netif_stop_queue(dev); */
8742 flush_workqueue(priv->workqueue);
8743
8744 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8745 * priv->workqueue... so we can't take down the workqueue
8746 * until now... */
8747 destroy_workqueue(priv->workqueue);
8748 priv->workqueue = NULL;
8749
8750 pci_iounmap(pdev, priv->hw_base);
8751 pci_release_regions(pdev);
8752 pci_disable_device(pdev);
8753 pci_set_drvdata(pdev, NULL);
8754
8755 iwl3945_free_channel_map(priv);
8756 iwl3945_free_geos(priv);
8757
8758 if (priv->ibss_beacon)
8759 dev_kfree_skb(priv->ibss_beacon);
8760
8761 ieee80211_free_hw(priv->hw);
8762 }
8763
8764 #ifdef CONFIG_PM
8765
8766 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8767 {
8768 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8769
8770 if (priv->is_open) {
8771 set_bit(STATUS_IN_SUSPEND, &priv->status);
8772 iwl3945_mac_stop(priv->hw);
8773 priv->is_open = 1;
8774 }
8775
8776 pci_set_power_state(pdev, PCI_D3hot);
8777
8778 return 0;
8779 }
8780
8781 static int iwl3945_pci_resume(struct pci_dev *pdev)
8782 {
8783 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8784
8785 pci_set_power_state(pdev, PCI_D0);
8786
8787 if (priv->is_open)
8788 iwl3945_mac_start(priv->hw);
8789
8790 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8791 return 0;
8792 }
8793
8794 #endif /* CONFIG_PM */
8795
8796 /*****************************************************************************
8797 *
8798 * driver and module entry point
8799 *
8800 *****************************************************************************/
8801
8802 static struct pci_driver iwl3945_driver = {
8803 .name = DRV_NAME,
8804 .id_table = iwl3945_hw_card_ids,
8805 .probe = iwl3945_pci_probe,
8806 .remove = __devexit_p(iwl3945_pci_remove),
8807 #ifdef CONFIG_PM
8808 .suspend = iwl3945_pci_suspend,
8809 .resume = iwl3945_pci_resume,
8810 #endif
8811 };
8812
8813 static int __init iwl3945_init(void)
8814 {
8815
8816 int ret;
8817 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8818 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8819 ret = pci_register_driver(&iwl3945_driver);
8820 if (ret) {
8821 IWL_ERROR("Unable to initialize PCI module\n");
8822 return ret;
8823 }
8824 #ifdef CONFIG_IWL3945_DEBUG
8825 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8826 if (ret) {
8827 IWL_ERROR("Unable to create driver sysfs file\n");
8828 pci_unregister_driver(&iwl3945_driver);
8829 return ret;
8830 }
8831 #endif
8832
8833 return ret;
8834 }
8835
8836 static void __exit iwl3945_exit(void)
8837 {
8838 #ifdef CONFIG_IWL3945_DEBUG
8839 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8840 #endif
8841 pci_unregister_driver(&iwl3945_driver);
8842 }
8843
8844 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8845 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8846 module_param_named(disable, iwl3945_param_disable, int, 0444);
8847 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8848 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8849 MODULE_PARM_DESC(hwcrypto,
8850 "using hardware crypto engine (default 0 [software])\n");
8851 module_param_named(debug, iwl3945_param_debug, int, 0444);
8852 MODULE_PARM_DESC(debug, "debug output mask");
8853 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8854 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8855
8856 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8857 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8858
8859 /* QoS */
8860 module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
8861 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8862
8863 module_exit(iwl3945_exit);
8864 module_init(iwl3945_init);
Verdex Pro support