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qeth: set lan_online flag after a received STARTLAN
[linux-2.6/verdex.git] / drivers / s390 / net / qeth_core_main.c
blobce27c0f3c4d343cfb5c5cd65d65fad1224981a07
1 /*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/string.h>
14 #include <linux/errno.h>
15 #include <linux/kernel.h>
16 #include <linux/ip.h>
17 #include <linux/ipv6.h>
18 #include <linux/tcp.h>
19 #include <linux/mii.h>
20 #include <linux/kthread.h>
21
22 #include <asm-s390/ebcdic.h>
23 #include <asm-s390/io.h>
24 #include <asm/s390_rdev.h>
25
26 #include "qeth_core.h"
27 #include "qeth_core_offl.h"
28
29 #define QETH_DBF_TEXT_(name, level, text...) \
30 do { \
31 if (qeth_dbf_passes(qeth_dbf_##name, level)) { \
32 char *dbf_txt_buf = \
33 get_cpu_var(qeth_core_dbf_txt_buf); \
34 sprintf(dbf_txt_buf, text); \
35 debug_text_event(qeth_dbf_##name, level, dbf_txt_buf); \
36 put_cpu_var(qeth_core_dbf_txt_buf); \
37 } \
38 } while (0)
39
40 struct qeth_card_list_struct qeth_core_card_list;
41 EXPORT_SYMBOL_GPL(qeth_core_card_list);
42 debug_info_t *qeth_dbf_setup;
43 EXPORT_SYMBOL_GPL(qeth_dbf_setup);
44 debug_info_t *qeth_dbf_data;
45 EXPORT_SYMBOL_GPL(qeth_dbf_data);
46 debug_info_t *qeth_dbf_misc;
47 EXPORT_SYMBOL_GPL(qeth_dbf_misc);
48 debug_info_t *qeth_dbf_control;
49 EXPORT_SYMBOL_GPL(qeth_dbf_control);
50 debug_info_t *qeth_dbf_trace;
51 EXPORT_SYMBOL_GPL(qeth_dbf_trace);
52 debug_info_t *qeth_dbf_sense;
53 EXPORT_SYMBOL_GPL(qeth_dbf_sense);
54 debug_info_t *qeth_dbf_qerr;
55 EXPORT_SYMBOL_GPL(qeth_dbf_qerr);
56
57 static struct device *qeth_core_root_dev;
58 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
59 static struct lock_class_key qdio_out_skb_queue_key;
60 static DEFINE_PER_CPU(char[256], qeth_core_dbf_txt_buf);
61
62 static void qeth_send_control_data_cb(struct qeth_channel *,
63 struct qeth_cmd_buffer *);
64 static int qeth_issue_next_read(struct qeth_card *);
65 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
66 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
67 static void qeth_free_buffer_pool(struct qeth_card *);
68 static int qeth_qdio_establish(struct qeth_card *);
69
70
71 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
72 struct qdio_buffer *buffer, int is_tso,
73 int *next_element_to_fill)
74 {
75 struct skb_frag_struct *frag;
76 int fragno;
77 unsigned long addr;
78 int element, cnt, dlen;
79
80 fragno = skb_shinfo(skb)->nr_frags;
81 element = *next_element_to_fill;
82 dlen = 0;
83
84 if (is_tso)
85 buffer->element[element].flags =
86 SBAL_FLAGS_MIDDLE_FRAG;
87 else
88 buffer->element[element].flags =
89 SBAL_FLAGS_FIRST_FRAG;
90 dlen = skb->len - skb->data_len;
91 if (dlen) {
92 buffer->element[element].addr = skb->data;
93 buffer->element[element].length = dlen;
94 element++;
95 }
96 for (cnt = 0; cnt < fragno; cnt++) {
97 frag = &skb_shinfo(skb)->frags[cnt];
98 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
99 frag->page_offset;
100 buffer->element[element].addr = (char *)addr;
101 buffer->element[element].length = frag->size;
102 if (cnt < (fragno - 1))
103 buffer->element[element].flags =
104 SBAL_FLAGS_MIDDLE_FRAG;
105 else
106 buffer->element[element].flags =
107 SBAL_FLAGS_LAST_FRAG;
108 element++;
109 }
110 *next_element_to_fill = element;
111 }
112
113 static inline const char *qeth_get_cardname(struct qeth_card *card)
114 {
115 if (card->info.guestlan) {
116 switch (card->info.type) {
117 case QETH_CARD_TYPE_OSAE:
118 return " Guest LAN QDIO";
119 case QETH_CARD_TYPE_IQD:
120 return " Guest LAN Hiper";
121 default:
122 return " unknown";
123 }
124 } else {
125 switch (card->info.type) {
126 case QETH_CARD_TYPE_OSAE:
127 return " OSD Express";
128 case QETH_CARD_TYPE_IQD:
129 return " HiperSockets";
130 case QETH_CARD_TYPE_OSN:
131 return " OSN QDIO";
132 default:
133 return " unknown";
134 }
135 }
136 return " n/a";
137 }
138
139 /* max length to be returned: 14 */
140 const char *qeth_get_cardname_short(struct qeth_card *card)
141 {
142 if (card->info.guestlan) {
143 switch (card->info.type) {
144 case QETH_CARD_TYPE_OSAE:
145 return "GuestLAN QDIO";
146 case QETH_CARD_TYPE_IQD:
147 return "GuestLAN Hiper";
148 default:
149 return "unknown";
150 }
151 } else {
152 switch (card->info.type) {
153 case QETH_CARD_TYPE_OSAE:
154 switch (card->info.link_type) {
155 case QETH_LINK_TYPE_FAST_ETH:
156 return "OSD_100";
157 case QETH_LINK_TYPE_HSTR:
158 return "HSTR";
159 case QETH_LINK_TYPE_GBIT_ETH:
160 return "OSD_1000";
161 case QETH_LINK_TYPE_10GBIT_ETH:
162 return "OSD_10GIG";
163 case QETH_LINK_TYPE_LANE_ETH100:
164 return "OSD_FE_LANE";
165 case QETH_LINK_TYPE_LANE_TR:
166 return "OSD_TR_LANE";
167 case QETH_LINK_TYPE_LANE_ETH1000:
168 return "OSD_GbE_LANE";
169 case QETH_LINK_TYPE_LANE:
170 return "OSD_ATM_LANE";
171 default:
172 return "OSD_Express";
173 }
174 case QETH_CARD_TYPE_IQD:
175 return "HiperSockets";
176 case QETH_CARD_TYPE_OSN:
177 return "OSN";
178 default:
179 return "unknown";
180 }
181 }
182 return "n/a";
183 }
184
185 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
186 int clear_start_mask)
187 {
188 unsigned long flags;
189
190 spin_lock_irqsave(&card->thread_mask_lock, flags);
191 card->thread_allowed_mask = threads;
192 if (clear_start_mask)
193 card->thread_start_mask &= threads;
194 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
195 wake_up(&card->wait_q);
196 }
197 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
198
199 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
200 {
201 unsigned long flags;
202 int rc = 0;
203
204 spin_lock_irqsave(&card->thread_mask_lock, flags);
205 rc = (card->thread_running_mask & threads);
206 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
207 return rc;
208 }
209 EXPORT_SYMBOL_GPL(qeth_threads_running);
210
211 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
212 {
213 return wait_event_interruptible(card->wait_q,
214 qeth_threads_running(card, threads) == 0);
215 }
216 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
217
218 void qeth_clear_working_pool_list(struct qeth_card *card)
219 {
220 struct qeth_buffer_pool_entry *pool_entry, *tmp;
221
222 QETH_DBF_TEXT(trace, 5, "clwrklst");
223 list_for_each_entry_safe(pool_entry, tmp,
224 &card->qdio.in_buf_pool.entry_list, list){
225 list_del(&pool_entry->list);
226 }
227 }
228 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
229
230 static int qeth_alloc_buffer_pool(struct qeth_card *card)
231 {
232 struct qeth_buffer_pool_entry *pool_entry;
233 void *ptr;
234 int i, j;
235
236 QETH_DBF_TEXT(trace, 5, "alocpool");
237 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
238 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
239 if (!pool_entry) {
240 qeth_free_buffer_pool(card);
241 return -ENOMEM;
242 }
243 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
244 ptr = (void *) __get_free_page(GFP_KERNEL);
245 if (!ptr) {
246 while (j > 0)
247 free_page((unsigned long)
248 pool_entry->elements[--j]);
249 kfree(pool_entry);
250 qeth_free_buffer_pool(card);
251 return -ENOMEM;
252 }
253 pool_entry->elements[j] = ptr;
254 }
255 list_add(&pool_entry->init_list,
256 &card->qdio.init_pool.entry_list);
257 }
258 return 0;
259 }
260
261 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
262 {
263 QETH_DBF_TEXT(trace, 2, "realcbp");
264
265 if ((card->state != CARD_STATE_DOWN) &&
266 (card->state != CARD_STATE_RECOVER))
267 return -EPERM;
268
269 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
270 qeth_clear_working_pool_list(card);
271 qeth_free_buffer_pool(card);
272 card->qdio.in_buf_pool.buf_count = bufcnt;
273 card->qdio.init_pool.buf_count = bufcnt;
274 return qeth_alloc_buffer_pool(card);
275 }
276
277 int qeth_set_large_send(struct qeth_card *card,
278 enum qeth_large_send_types type)
279 {
280 int rc = 0;
281
282 if (card->dev == NULL) {
283 card->options.large_send = type;
284 return 0;
285 }
286 if (card->state == CARD_STATE_UP)
287 netif_tx_disable(card->dev);
288 card->options.large_send = type;
289 switch (card->options.large_send) {
290 case QETH_LARGE_SEND_EDDP:
291 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
292 NETIF_F_HW_CSUM;
293 break;
294 case QETH_LARGE_SEND_TSO:
295 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
296 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
297 NETIF_F_HW_CSUM;
298 } else {
299 PRINT_WARN("TSO not supported on %s. "
300 "large_send set to 'no'.\n",
301 card->dev->name);
302 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
303 NETIF_F_HW_CSUM);
304 card->options.large_send = QETH_LARGE_SEND_NO;
305 rc = -EOPNOTSUPP;
306 }
307 break;
308 default: /* includes QETH_LARGE_SEND_NO */
309 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
310 NETIF_F_HW_CSUM);
311 break;
312 }
313 if (card->state == CARD_STATE_UP)
314 netif_wake_queue(card->dev);
315 return rc;
316 }
317 EXPORT_SYMBOL_GPL(qeth_set_large_send);
318
319 static int qeth_issue_next_read(struct qeth_card *card)
320 {
321 int rc;
322 struct qeth_cmd_buffer *iob;
323
324 QETH_DBF_TEXT(trace, 5, "issnxrd");
325 if (card->read.state != CH_STATE_UP)
326 return -EIO;
327 iob = qeth_get_buffer(&card->read);
328 if (!iob) {
329 PRINT_WARN("issue_next_read failed: no iob available!\n");
330 return -ENOMEM;
331 }
332 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
333 QETH_DBF_TEXT(trace, 6, "noirqpnd");
334 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
335 (addr_t) iob, 0, 0);
336 if (rc) {
337 PRINT_ERR("Error in starting next read ccw! rc=%i\n", rc);
338 atomic_set(&card->read.irq_pending, 0);
339 qeth_schedule_recovery(card);
340 wake_up(&card->wait_q);
341 }
342 return rc;
343 }
344
345 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
346 {
347 struct qeth_reply *reply;
348
349 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
350 if (reply) {
351 atomic_set(&reply->refcnt, 1);
352 atomic_set(&reply->received, 0);
353 reply->card = card;
354 };
355 return reply;
356 }
357
358 static void qeth_get_reply(struct qeth_reply *reply)
359 {
360 WARN_ON(atomic_read(&reply->refcnt) <= 0);
361 atomic_inc(&reply->refcnt);
362 }
363
364 static void qeth_put_reply(struct qeth_reply *reply)
365 {
366 WARN_ON(atomic_read(&reply->refcnt) <= 0);
367 if (atomic_dec_and_test(&reply->refcnt))
368 kfree(reply);
369 }
370
371 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd,
372 struct qeth_card *card)
373 {
374 int rc;
375 int com;
376 char *ipa_name;
377
378 com = cmd->hdr.command;
379 rc = cmd->hdr.return_code;
380 ipa_name = qeth_get_ipa_cmd_name(com);
381
382 PRINT_ERR("%s(x%X) for %s returned x%X \"%s\"\n", ipa_name, com,
383 QETH_CARD_IFNAME(card), rc, qeth_get_ipa_msg(rc));
384 }
385
386 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
387 struct qeth_cmd_buffer *iob)
388 {
389 struct qeth_ipa_cmd *cmd = NULL;
390
391 QETH_DBF_TEXT(trace, 5, "chkipad");
392 if (IS_IPA(iob->data)) {
393 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
394 if (IS_IPA_REPLY(cmd)) {
395 if (cmd->hdr.return_code &&
396 (cmd->hdr.command < IPA_CMD_SETCCID ||
397 cmd->hdr.command > IPA_CMD_MODCCID))
398 qeth_issue_ipa_msg(cmd, card);
399 return cmd;
400 } else {
401 switch (cmd->hdr.command) {
402 case IPA_CMD_STOPLAN:
403 PRINT_WARN("Link failure on %s (CHPID 0x%X) - "
404 "there is a network problem or "
405 "someone pulled the cable or "
406 "disabled the port.\n",
407 QETH_CARD_IFNAME(card),
408 card->info.chpid);
409 card->lan_online = 0;
410 if (card->dev && netif_carrier_ok(card->dev))
411 netif_carrier_off(card->dev);
412 return NULL;
413 case IPA_CMD_STARTLAN:
414 PRINT_INFO("Link reestablished on %s "
415 "(CHPID 0x%X). Scheduling "
416 "IP address reset.\n",
417 QETH_CARD_IFNAME(card),
418 card->info.chpid);
419 netif_carrier_on(card->dev);
420 card->lan_online = 1;
421 qeth_schedule_recovery(card);
422 return NULL;
423 case IPA_CMD_MODCCID:
424 return cmd;
425 case IPA_CMD_REGISTER_LOCAL_ADDR:
426 QETH_DBF_TEXT(trace, 3, "irla");
427 break;
428 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
429 QETH_DBF_TEXT(trace, 3, "urla");
430 break;
431 default:
432 PRINT_WARN("Received data is IPA "
433 "but not a reply!\n");
434 break;
435 }
436 }
437 }
438 return cmd;
439 }
440
441 void qeth_clear_ipacmd_list(struct qeth_card *card)
442 {
443 struct qeth_reply *reply, *r;
444 unsigned long flags;
445
446 QETH_DBF_TEXT(trace, 4, "clipalst");
447
448 spin_lock_irqsave(&card->lock, flags);
449 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
450 qeth_get_reply(reply);
451 reply->rc = -EIO;
452 atomic_inc(&reply->received);
453 list_del_init(&reply->list);
454 wake_up(&reply->wait_q);
455 qeth_put_reply(reply);
456 }
457 spin_unlock_irqrestore(&card->lock, flags);
458 }
459 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
460
461 static int qeth_check_idx_response(unsigned char *buffer)
462 {
463 if (!buffer)
464 return 0;
465
466 QETH_DBF_HEX(control, 2, buffer, QETH_DBF_CONTROL_LEN);
467 if ((buffer[2] & 0xc0) == 0xc0) {
468 PRINT_WARN("received an IDX TERMINATE "
469 "with cause code 0x%02x%s\n",
470 buffer[4],
471 ((buffer[4] == 0x22) ?
472 " -- try another portname" : ""));
473 QETH_DBF_TEXT(trace, 2, "ckidxres");
474 QETH_DBF_TEXT(trace, 2, " idxterm");
475 QETH_DBF_TEXT_(trace, 2, " rc%d", -EIO);
476 return -EIO;
477 }
478 return 0;
479 }
480
481 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
482 __u32 len)
483 {
484 struct qeth_card *card;
485
486 QETH_DBF_TEXT(trace, 4, "setupccw");
487 card = CARD_FROM_CDEV(channel->ccwdev);
488 if (channel == &card->read)
489 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
490 else
491 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
492 channel->ccw.count = len;
493 channel->ccw.cda = (__u32) __pa(iob);
494 }
495
496 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
497 {
498 __u8 index;
499
500 QETH_DBF_TEXT(trace, 6, "getbuff");
501 index = channel->io_buf_no;
502 do {
503 if (channel->iob[index].state == BUF_STATE_FREE) {
504 channel->iob[index].state = BUF_STATE_LOCKED;
505 channel->io_buf_no = (channel->io_buf_no + 1) %
506 QETH_CMD_BUFFER_NO;
507 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
508 return channel->iob + index;
509 }
510 index = (index + 1) % QETH_CMD_BUFFER_NO;
511 } while (index != channel->io_buf_no);
512
513 return NULL;
514 }
515
516 void qeth_release_buffer(struct qeth_channel *channel,
517 struct qeth_cmd_buffer *iob)
518 {
519 unsigned long flags;
520
521 QETH_DBF_TEXT(trace, 6, "relbuff");
522 spin_lock_irqsave(&channel->iob_lock, flags);
523 memset(iob->data, 0, QETH_BUFSIZE);
524 iob->state = BUF_STATE_FREE;
525 iob->callback = qeth_send_control_data_cb;
526 iob->rc = 0;
527 spin_unlock_irqrestore(&channel->iob_lock, flags);
528 }
529 EXPORT_SYMBOL_GPL(qeth_release_buffer);
530
531 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
532 {
533 struct qeth_cmd_buffer *buffer = NULL;
534 unsigned long flags;
535
536 spin_lock_irqsave(&channel->iob_lock, flags);
537 buffer = __qeth_get_buffer(channel);
538 spin_unlock_irqrestore(&channel->iob_lock, flags);
539 return buffer;
540 }
541
542 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
543 {
544 struct qeth_cmd_buffer *buffer;
545 wait_event(channel->wait_q,
546 ((buffer = qeth_get_buffer(channel)) != NULL));
547 return buffer;
548 }
549 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
550
551 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
552 {
553 int cnt;
554
555 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
556 qeth_release_buffer(channel, &channel->iob[cnt]);
557 channel->buf_no = 0;
558 channel->io_buf_no = 0;
559 }
560 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
561
562 static void qeth_send_control_data_cb(struct qeth_channel *channel,
563 struct qeth_cmd_buffer *iob)
564 {
565 struct qeth_card *card;
566 struct qeth_reply *reply, *r;
567 struct qeth_ipa_cmd *cmd;
568 unsigned long flags;
569 int keep_reply;
570
571 QETH_DBF_TEXT(trace, 4, "sndctlcb");
572
573 card = CARD_FROM_CDEV(channel->ccwdev);
574 if (qeth_check_idx_response(iob->data)) {
575 qeth_clear_ipacmd_list(card);
576 qeth_schedule_recovery(card);
577 goto out;
578 }
579
580 cmd = qeth_check_ipa_data(card, iob);
581 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
582 goto out;
583 /*in case of OSN : check if cmd is set */
584 if (card->info.type == QETH_CARD_TYPE_OSN &&
585 cmd &&
586 cmd->hdr.command != IPA_CMD_STARTLAN &&
587 card->osn_info.assist_cb != NULL) {
588 card->osn_info.assist_cb(card->dev, cmd);
589 goto out;
590 }
591
592 spin_lock_irqsave(&card->lock, flags);
593 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
594 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
595 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
596 qeth_get_reply(reply);
597 list_del_init(&reply->list);
598 spin_unlock_irqrestore(&card->lock, flags);
599 keep_reply = 0;
600 if (reply->callback != NULL) {
601 if (cmd) {
602 reply->offset = (__u16)((char *)cmd -
603 (char *)iob->data);
604 keep_reply = reply->callback(card,
605 reply,
606 (unsigned long)cmd);
607 } else
608 keep_reply = reply->callback(card,
609 reply,
610 (unsigned long)iob);
611 }
612 if (cmd)
613 reply->rc = (u16) cmd->hdr.return_code;
614 else if (iob->rc)
615 reply->rc = iob->rc;
616 if (keep_reply) {
617 spin_lock_irqsave(&card->lock, flags);
618 list_add_tail(&reply->list,
619 &card->cmd_waiter_list);
620 spin_unlock_irqrestore(&card->lock, flags);
621 } else {
622 atomic_inc(&reply->received);
623 wake_up(&reply->wait_q);
624 }
625 qeth_put_reply(reply);
626 goto out;
627 }
628 }
629 spin_unlock_irqrestore(&card->lock, flags);
630 out:
631 memcpy(&card->seqno.pdu_hdr_ack,
632 QETH_PDU_HEADER_SEQ_NO(iob->data),
633 QETH_SEQ_NO_LENGTH);
634 qeth_release_buffer(channel, iob);
635 }
636
637 static int qeth_setup_channel(struct qeth_channel *channel)
638 {
639 int cnt;
640
641 QETH_DBF_TEXT(setup, 2, "setupch");
642 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
643 channel->iob[cnt].data = (char *)
644 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
645 if (channel->iob[cnt].data == NULL)
646 break;
647 channel->iob[cnt].state = BUF_STATE_FREE;
648 channel->iob[cnt].channel = channel;
649 channel->iob[cnt].callback = qeth_send_control_data_cb;
650 channel->iob[cnt].rc = 0;
651 }
652 if (cnt < QETH_CMD_BUFFER_NO) {
653 while (cnt-- > 0)
654 kfree(channel->iob[cnt].data);
655 return -ENOMEM;
656 }
657 channel->buf_no = 0;
658 channel->io_buf_no = 0;
659 atomic_set(&channel->irq_pending, 0);
660 spin_lock_init(&channel->iob_lock);
661
662 init_waitqueue_head(&channel->wait_q);
663 return 0;
664 }
665
666 static int qeth_set_thread_start_bit(struct qeth_card *card,
667 unsigned long thread)
668 {
669 unsigned long flags;
670
671 spin_lock_irqsave(&card->thread_mask_lock, flags);
672 if (!(card->thread_allowed_mask & thread) ||
673 (card->thread_start_mask & thread)) {
674 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
675 return -EPERM;
676 }
677 card->thread_start_mask |= thread;
678 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
679 return 0;
680 }
681
682 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
683 {
684 unsigned long flags;
685
686 spin_lock_irqsave(&card->thread_mask_lock, flags);
687 card->thread_start_mask &= ~thread;
688 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
689 wake_up(&card->wait_q);
690 }
691 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
692
693 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
694 {
695 unsigned long flags;
696
697 spin_lock_irqsave(&card->thread_mask_lock, flags);
698 card->thread_running_mask &= ~thread;
699 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
700 wake_up(&card->wait_q);
701 }
702 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
703
704 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
705 {
706 unsigned long flags;
707 int rc = 0;
708
709 spin_lock_irqsave(&card->thread_mask_lock, flags);
710 if (card->thread_start_mask & thread) {
711 if ((card->thread_allowed_mask & thread) &&
712 !(card->thread_running_mask & thread)) {
713 rc = 1;
714 card->thread_start_mask &= ~thread;
715 card->thread_running_mask |= thread;
716 } else
717 rc = -EPERM;
718 }
719 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
720 return rc;
721 }
722
723 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
724 {
725 int rc = 0;
726
727 wait_event(card->wait_q,
728 (rc = __qeth_do_run_thread(card, thread)) >= 0);
729 return rc;
730 }
731 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
732
733 void qeth_schedule_recovery(struct qeth_card *card)
734 {
735 QETH_DBF_TEXT(trace, 2, "startrec");
736 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
737 schedule_work(&card->kernel_thread_starter);
738 }
739 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
740
741 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
742 {
743 int dstat, cstat;
744 char *sense;
745
746 sense = (char *) irb->ecw;
747 cstat = irb->scsw.cstat;
748 dstat = irb->scsw.dstat;
749
750 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
751 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
752 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
753 QETH_DBF_TEXT(trace, 2, "CGENCHK");
754 PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ",
755 cdev->dev.bus_id, dstat, cstat);
756 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
757 16, 1, irb, 64, 1);
758 return 1;
759 }
760
761 if (dstat & DEV_STAT_UNIT_CHECK) {
762 if (sense[SENSE_RESETTING_EVENT_BYTE] &
763 SENSE_RESETTING_EVENT_FLAG) {
764 QETH_DBF_TEXT(trace, 2, "REVIND");
765 return 1;
766 }
767 if (sense[SENSE_COMMAND_REJECT_BYTE] &
768 SENSE_COMMAND_REJECT_FLAG) {
769 QETH_DBF_TEXT(trace, 2, "CMDREJi");
770 return 0;
771 }
772 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
773 QETH_DBF_TEXT(trace, 2, "AFFE");
774 return 1;
775 }
776 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
777 QETH_DBF_TEXT(trace, 2, "ZEROSEN");
778 return 0;
779 }
780 QETH_DBF_TEXT(trace, 2, "DGENCHK");
781 return 1;
782 }
783 return 0;
784 }
785
786 static long __qeth_check_irb_error(struct ccw_device *cdev,
787 unsigned long intparm, struct irb *irb)
788 {
789 if (!IS_ERR(irb))
790 return 0;
791
792 switch (PTR_ERR(irb)) {
793 case -EIO:
794 PRINT_WARN("i/o-error on device %s\n", cdev->dev.bus_id);
795 QETH_DBF_TEXT(trace, 2, "ckirberr");
796 QETH_DBF_TEXT_(trace, 2, " rc%d", -EIO);
797 break;
798 case -ETIMEDOUT:
799 PRINT_WARN("timeout on device %s\n", cdev->dev.bus_id);
800 QETH_DBF_TEXT(trace, 2, "ckirberr");
801 QETH_DBF_TEXT_(trace, 2, " rc%d", -ETIMEDOUT);
802 if (intparm == QETH_RCD_PARM) {
803 struct qeth_card *card = CARD_FROM_CDEV(cdev);
804
805 if (card && (card->data.ccwdev == cdev)) {
806 card->data.state = CH_STATE_DOWN;
807 wake_up(&card->wait_q);
808 }
809 }
810 break;
811 default:
812 PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb),
813 cdev->dev.bus_id);
814 QETH_DBF_TEXT(trace, 2, "ckirberr");
815 QETH_DBF_TEXT(trace, 2, " rc???");
816 }
817 return PTR_ERR(irb);
818 }
819
820 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
821 struct irb *irb)
822 {
823 int rc;
824 int cstat, dstat;
825 struct qeth_cmd_buffer *buffer;
826 struct qeth_channel *channel;
827 struct qeth_card *card;
828 struct qeth_cmd_buffer *iob;
829 __u8 index;
830
831 QETH_DBF_TEXT(trace, 5, "irq");
832
833 if (__qeth_check_irb_error(cdev, intparm, irb))
834 return;
835 cstat = irb->scsw.cstat;
836 dstat = irb->scsw.dstat;
837
838 card = CARD_FROM_CDEV(cdev);
839 if (!card)
840 return;
841
842 if (card->read.ccwdev == cdev) {
843 channel = &card->read;
844 QETH_DBF_TEXT(trace, 5, "read");
845 } else if (card->write.ccwdev == cdev) {
846 channel = &card->write;
847 QETH_DBF_TEXT(trace, 5, "write");
848 } else {
849 channel = &card->data;
850 QETH_DBF_TEXT(trace, 5, "data");
851 }
852 atomic_set(&channel->irq_pending, 0);
853
854 if (irb->scsw.fctl & (SCSW_FCTL_CLEAR_FUNC))
855 channel->state = CH_STATE_STOPPED;
856
857 if (irb->scsw.fctl & (SCSW_FCTL_HALT_FUNC))
858 channel->state = CH_STATE_HALTED;
859
860 /*let's wake up immediately on data channel*/
861 if ((channel == &card->data) && (intparm != 0) &&
862 (intparm != QETH_RCD_PARM))
863 goto out;
864
865 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
866 QETH_DBF_TEXT(trace, 6, "clrchpar");
867 /* we don't have to handle this further */
868 intparm = 0;
869 }
870 if (intparm == QETH_HALT_CHANNEL_PARM) {
871 QETH_DBF_TEXT(trace, 6, "hltchpar");
872 /* we don't have to handle this further */
873 intparm = 0;
874 }
875 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
876 (dstat & DEV_STAT_UNIT_CHECK) ||
877 (cstat)) {
878 if (irb->esw.esw0.erw.cons) {
879 /* TODO: we should make this s390dbf */
880 PRINT_WARN("sense data available on channel %s.\n",
881 CHANNEL_ID(channel));
882 PRINT_WARN(" cstat 0x%X\n dstat 0x%X\n", cstat, dstat);
883 print_hex_dump(KERN_WARNING, "qeth: irb ",
884 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
885 print_hex_dump(KERN_WARNING, "qeth: sense data ",
886 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
887 }
888 if (intparm == QETH_RCD_PARM) {
889 channel->state = CH_STATE_DOWN;
890 goto out;
891 }
892 rc = qeth_get_problem(cdev, irb);
893 if (rc) {
894 qeth_schedule_recovery(card);
895 goto out;
896 }
897 }
898
899 if (intparm == QETH_RCD_PARM) {
900 channel->state = CH_STATE_RCD_DONE;
901 goto out;
902 }
903 if (intparm) {
904 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
905 buffer->state = BUF_STATE_PROCESSED;
906 }
907 if (channel == &card->data)
908 return;
909 if (channel == &card->read &&
910 channel->state == CH_STATE_UP)
911 qeth_issue_next_read(card);
912
913 iob = channel->iob;
914 index = channel->buf_no;
915 while (iob[index].state == BUF_STATE_PROCESSED) {
916 if (iob[index].callback != NULL)
917 iob[index].callback(channel, iob + index);
918
919 index = (index + 1) % QETH_CMD_BUFFER_NO;
920 }
921 channel->buf_no = index;
922 out:
923 wake_up(&card->wait_q);
924 return;
925 }
926
927 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
928 struct qeth_qdio_out_buffer *buf)
929 {
930 int i;
931 struct sk_buff *skb;
932
933 /* is PCI flag set on buffer? */
934 if (buf->buffer->element[0].flags & 0x40)
935 atomic_dec(&queue->set_pci_flags_count);
936
937 skb = skb_dequeue(&buf->skb_list);
938 while (skb) {
939 atomic_dec(&skb->users);
940 dev_kfree_skb_any(skb);
941 skb = skb_dequeue(&buf->skb_list);
942 }
943 qeth_eddp_buf_release_contexts(buf);
944 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
945 buf->buffer->element[i].length = 0;
946 buf->buffer->element[i].addr = NULL;
947 buf->buffer->element[i].flags = 0;
948 }
949 buf->next_element_to_fill = 0;
950 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
951 }
952
953 void qeth_clear_qdio_buffers(struct qeth_card *card)
954 {
955 int i, j;
956
957 QETH_DBF_TEXT(trace, 2, "clearqdbf");
958 /* clear outbound buffers to free skbs */
959 for (i = 0; i < card->qdio.no_out_queues; ++i)
960 if (card->qdio.out_qs[i]) {
961 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
962 qeth_clear_output_buffer(card->qdio.out_qs[i],
963 &card->qdio.out_qs[i]->bufs[j]);
964 }
965 }
966 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
967
968 static void qeth_free_buffer_pool(struct qeth_card *card)
969 {
970 struct qeth_buffer_pool_entry *pool_entry, *tmp;
971 int i = 0;
972 QETH_DBF_TEXT(trace, 5, "freepool");
973 list_for_each_entry_safe(pool_entry, tmp,
974 &card->qdio.init_pool.entry_list, init_list){
975 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
976 free_page((unsigned long)pool_entry->elements[i]);
977 list_del(&pool_entry->init_list);
978 kfree(pool_entry);
979 }
980 }
981
982 static void qeth_free_qdio_buffers(struct qeth_card *card)
983 {
984 int i, j;
985
986 QETH_DBF_TEXT(trace, 2, "freeqdbf");
987 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
988 QETH_QDIO_UNINITIALIZED)
989 return;
990 kfree(card->qdio.in_q);
991 card->qdio.in_q = NULL;
992 /* inbound buffer pool */
993 qeth_free_buffer_pool(card);
994 /* free outbound qdio_qs */
995 if (card->qdio.out_qs) {
996 for (i = 0; i < card->qdio.no_out_queues; ++i) {
997 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
998 qeth_clear_output_buffer(card->qdio.out_qs[i],
999 &card->qdio.out_qs[i]->bufs[j]);
1000 kfree(card->qdio.out_qs[i]);
1001 }
1002 kfree(card->qdio.out_qs);
1003 card->qdio.out_qs = NULL;
1004 }
1005 }
1006
1007 static void qeth_clean_channel(struct qeth_channel *channel)
1008 {
1009 int cnt;
1010
1011 QETH_DBF_TEXT(setup, 2, "freech");
1012 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1013 kfree(channel->iob[cnt].data);
1014 }
1015
1016 static int qeth_is_1920_device(struct qeth_card *card)
1017 {
1018 int single_queue = 0;
1019 struct ccw_device *ccwdev;
1020 struct channelPath_dsc {
1021 u8 flags;
1022 u8 lsn;
1023 u8 desc;
1024 u8 chpid;
1025 u8 swla;
1026 u8 zeroes;
1027 u8 chla;
1028 u8 chpp;
1029 } *chp_dsc;
1030
1031 QETH_DBF_TEXT(setup, 2, "chk_1920");
1032
1033 ccwdev = card->data.ccwdev;
1034 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1035 if (chp_dsc != NULL) {
1036 /* CHPP field bit 6 == 1 -> single queue */
1037 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1038 kfree(chp_dsc);
1039 }
1040 QETH_DBF_TEXT_(setup, 2, "rc:%x", single_queue);
1041 return single_queue;
1042 }
1043
1044 static void qeth_init_qdio_info(struct qeth_card *card)
1045 {
1046 QETH_DBF_TEXT(setup, 4, "intqdinf");
1047 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1048 /* inbound */
1049 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1050 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1051 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1052 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1053 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1054 }
1055
1056 static void qeth_set_intial_options(struct qeth_card *card)
1057 {
1058 card->options.route4.type = NO_ROUTER;
1059 card->options.route6.type = NO_ROUTER;
1060 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1061 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1062 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1063 card->options.fake_broadcast = 0;
1064 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1065 card->options.fake_ll = 0;
1066 card->options.performance_stats = 0;
1067 card->options.rx_sg_cb = QETH_RX_SG_CB;
1068 }
1069
1070 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1071 {
1072 unsigned long flags;
1073 int rc = 0;
1074
1075 spin_lock_irqsave(&card->thread_mask_lock, flags);
1076 QETH_DBF_TEXT_(trace, 4, " %02x%02x%02x",
1077 (u8) card->thread_start_mask,
1078 (u8) card->thread_allowed_mask,
1079 (u8) card->thread_running_mask);
1080 rc = (card->thread_start_mask & thread);
1081 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1082 return rc;
1083 }
1084
1085 static void qeth_start_kernel_thread(struct work_struct *work)
1086 {
1087 struct qeth_card *card = container_of(work, struct qeth_card,
1088 kernel_thread_starter);
1089 QETH_DBF_TEXT(trace , 2, "strthrd");
1090
1091 if (card->read.state != CH_STATE_UP &&
1092 card->write.state != CH_STATE_UP)
1093 return;
1094 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1095 kthread_run(card->discipline.recover, (void *) card,
1096 "qeth_recover");
1097 }
1098
1099 static int qeth_setup_card(struct qeth_card *card)
1100 {
1101
1102 QETH_DBF_TEXT(setup, 2, "setupcrd");
1103 QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
1104
1105 card->read.state = CH_STATE_DOWN;
1106 card->write.state = CH_STATE_DOWN;
1107 card->data.state = CH_STATE_DOWN;
1108 card->state = CARD_STATE_DOWN;
1109 card->lan_online = 0;
1110 card->use_hard_stop = 0;
1111 card->dev = NULL;
1112 spin_lock_init(&card->vlanlock);
1113 spin_lock_init(&card->mclock);
1114 card->vlangrp = NULL;
1115 spin_lock_init(&card->lock);
1116 spin_lock_init(&card->ip_lock);
1117 spin_lock_init(&card->thread_mask_lock);
1118 card->thread_start_mask = 0;
1119 card->thread_allowed_mask = 0;
1120 card->thread_running_mask = 0;
1121 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1122 INIT_LIST_HEAD(&card->ip_list);
1123 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1124 if (!card->ip_tbd_list) {
1125 QETH_DBF_TEXT(setup, 0, "iptbdnom");
1126 return -ENOMEM;
1127 }
1128 INIT_LIST_HEAD(card->ip_tbd_list);
1129 INIT_LIST_HEAD(&card->cmd_waiter_list);
1130 init_waitqueue_head(&card->wait_q);
1131 /* intial options */
1132 qeth_set_intial_options(card);
1133 /* IP address takeover */
1134 INIT_LIST_HEAD(&card->ipato.entries);
1135 card->ipato.enabled = 0;
1136 card->ipato.invert4 = 0;
1137 card->ipato.invert6 = 0;
1138 /* init QDIO stuff */
1139 qeth_init_qdio_info(card);
1140 return 0;
1141 }
1142
1143 static struct qeth_card *qeth_alloc_card(void)
1144 {
1145 struct qeth_card *card;
1146
1147 QETH_DBF_TEXT(setup, 2, "alloccrd");
1148 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1149 if (!card)
1150 return NULL;
1151 QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
1152 if (qeth_setup_channel(&card->read)) {
1153 kfree(card);
1154 return NULL;
1155 }
1156 if (qeth_setup_channel(&card->write)) {
1157 qeth_clean_channel(&card->read);
1158 kfree(card);
1159 return NULL;
1160 }
1161 card->options.layer2 = -1;
1162 return card;
1163 }
1164
1165 static int qeth_determine_card_type(struct qeth_card *card)
1166 {
1167 int i = 0;
1168
1169 QETH_DBF_TEXT(setup, 2, "detcdtyp");
1170
1171 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1172 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1173 while (known_devices[i][4]) {
1174 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1175 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1176 card->info.type = known_devices[i][4];
1177 card->qdio.no_out_queues = known_devices[i][8];
1178 card->info.is_multicast_different = known_devices[i][9];
1179 if (qeth_is_1920_device(card)) {
1180 PRINT_INFO("Priority Queueing not able "
1181 "due to hardware limitations!\n");
1182 card->qdio.no_out_queues = 1;
1183 card->qdio.default_out_queue = 0;
1184 }
1185 return 0;
1186 }
1187 i++;
1188 }
1189 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1190 PRINT_ERR("unknown card type on device %s\n", CARD_BUS_ID(card));
1191 return -ENOENT;
1192 }
1193
1194 static int qeth_clear_channel(struct qeth_channel *channel)
1195 {
1196 unsigned long flags;
1197 struct qeth_card *card;
1198 int rc;
1199
1200 QETH_DBF_TEXT(trace, 3, "clearch");
1201 card = CARD_FROM_CDEV(channel->ccwdev);
1202 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1203 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1204 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1205
1206 if (rc)
1207 return rc;
1208 rc = wait_event_interruptible_timeout(card->wait_q,
1209 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1210 if (rc == -ERESTARTSYS)
1211 return rc;
1212 if (channel->state != CH_STATE_STOPPED)
1213 return -ETIME;
1214 channel->state = CH_STATE_DOWN;
1215 return 0;
1216 }
1217
1218 static int qeth_halt_channel(struct qeth_channel *channel)
1219 {
1220 unsigned long flags;
1221 struct qeth_card *card;
1222 int rc;
1223
1224 QETH_DBF_TEXT(trace, 3, "haltch");
1225 card = CARD_FROM_CDEV(channel->ccwdev);
1226 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1227 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1228 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1229
1230 if (rc)
1231 return rc;
1232 rc = wait_event_interruptible_timeout(card->wait_q,
1233 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1234 if (rc == -ERESTARTSYS)
1235 return rc;
1236 if (channel->state != CH_STATE_HALTED)
1237 return -ETIME;
1238 return 0;
1239 }
1240
1241 static int qeth_halt_channels(struct qeth_card *card)
1242 {
1243 int rc1 = 0, rc2 = 0, rc3 = 0;
1244
1245 QETH_DBF_TEXT(trace, 3, "haltchs");
1246 rc1 = qeth_halt_channel(&card->read);
1247 rc2 = qeth_halt_channel(&card->write);
1248 rc3 = qeth_halt_channel(&card->data);
1249 if (rc1)
1250 return rc1;
1251 if (rc2)
1252 return rc2;
1253 return rc3;
1254 }
1255
1256 static int qeth_clear_channels(struct qeth_card *card)
1257 {
1258 int rc1 = 0, rc2 = 0, rc3 = 0;
1259
1260 QETH_DBF_TEXT(trace, 3, "clearchs");
1261 rc1 = qeth_clear_channel(&card->read);
1262 rc2 = qeth_clear_channel(&card->write);
1263 rc3 = qeth_clear_channel(&card->data);
1264 if (rc1)
1265 return rc1;
1266 if (rc2)
1267 return rc2;
1268 return rc3;
1269 }
1270
1271 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1272 {
1273 int rc = 0;
1274
1275 QETH_DBF_TEXT(trace, 3, "clhacrd");
1276 QETH_DBF_HEX(trace, 3, &card, sizeof(void *));
1277
1278 if (halt)
1279 rc = qeth_halt_channels(card);
1280 if (rc)
1281 return rc;
1282 return qeth_clear_channels(card);
1283 }
1284
1285 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1286 {
1287 int rc = 0;
1288
1289 QETH_DBF_TEXT(trace, 3, "qdioclr");
1290 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1291 QETH_QDIO_CLEANING)) {
1292 case QETH_QDIO_ESTABLISHED:
1293 if (card->info.type == QETH_CARD_TYPE_IQD)
1294 rc = qdio_cleanup(CARD_DDEV(card),
1295 QDIO_FLAG_CLEANUP_USING_HALT);
1296 else
1297 rc = qdio_cleanup(CARD_DDEV(card),
1298 QDIO_FLAG_CLEANUP_USING_CLEAR);
1299 if (rc)
1300 QETH_DBF_TEXT_(trace, 3, "1err%d", rc);
1301 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1302 break;
1303 case QETH_QDIO_CLEANING:
1304 return rc;
1305 default:
1306 break;
1307 }
1308 rc = qeth_clear_halt_card(card, use_halt);
1309 if (rc)
1310 QETH_DBF_TEXT_(trace, 3, "2err%d", rc);
1311 card->state = CARD_STATE_DOWN;
1312 return rc;
1313 }
1314 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1315
1316 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1317 int *length)
1318 {
1319 struct ciw *ciw;
1320 char *rcd_buf;
1321 int ret;
1322 struct qeth_channel *channel = &card->data;
1323 unsigned long flags;
1324
1325 /*
1326 * scan for RCD command in extended SenseID data
1327 */
1328 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1329 if (!ciw || ciw->cmd == 0)
1330 return -EOPNOTSUPP;
1331 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1332 if (!rcd_buf)
1333 return -ENOMEM;
1334
1335 channel->ccw.cmd_code = ciw->cmd;
1336 channel->ccw.cda = (__u32) __pa(rcd_buf);
1337 channel->ccw.count = ciw->count;
1338 channel->ccw.flags = CCW_FLAG_SLI;
1339 channel->state = CH_STATE_RCD;
1340 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1341 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1342 QETH_RCD_PARM, LPM_ANYPATH, 0,
1343 QETH_RCD_TIMEOUT);
1344 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1345 if (!ret)
1346 wait_event(card->wait_q,
1347 (channel->state == CH_STATE_RCD_DONE ||
1348 channel->state == CH_STATE_DOWN));
1349 if (channel->state == CH_STATE_DOWN)
1350 ret = -EIO;
1351 else
1352 channel->state = CH_STATE_DOWN;
1353 if (ret) {
1354 kfree(rcd_buf);
1355 *buffer = NULL;
1356 *length = 0;
1357 } else {
1358 *length = ciw->count;
1359 *buffer = rcd_buf;
1360 }
1361 return ret;
1362 }
1363
1364 static int qeth_get_unitaddr(struct qeth_card *card)
1365 {
1366 int length;
1367 char *prcd;
1368 int rc;
1369
1370 QETH_DBF_TEXT(setup, 2, "getunit");
1371 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1372 if (rc) {
1373 PRINT_ERR("qeth_read_conf_data for device %s returned %i\n",
1374 CARD_DDEV_ID(card), rc);
1375 return rc;
1376 }
1377 card->info.chpid = prcd[30];
1378 card->info.unit_addr2 = prcd[31];
1379 card->info.cula = prcd[63];
1380 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1381 (prcd[0x11] == _ascebc['M']));
1382 kfree(prcd);
1383 return 0;
1384 }
1385
1386 static void qeth_init_tokens(struct qeth_card *card)
1387 {
1388 card->token.issuer_rm_w = 0x00010103UL;
1389 card->token.cm_filter_w = 0x00010108UL;
1390 card->token.cm_connection_w = 0x0001010aUL;
1391 card->token.ulp_filter_w = 0x0001010bUL;
1392 card->token.ulp_connection_w = 0x0001010dUL;
1393 }
1394
1395 static void qeth_init_func_level(struct qeth_card *card)
1396 {
1397 if (card->ipato.enabled) {
1398 if (card->info.type == QETH_CARD_TYPE_IQD)
1399 card->info.func_level =
1400 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1401 else
1402 card->info.func_level =
1403 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1404 } else {
1405 if (card->info.type == QETH_CARD_TYPE_IQD)
1406 /*FIXME:why do we have same values for dis and ena for
1407 osae??? */
1408 card->info.func_level =
1409 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1410 else
1411 card->info.func_level =
1412 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1413 }
1414 }
1415
1416 static inline __u16 qeth_raw_devno_from_bus_id(char *id)
1417 {
1418 id += (strlen(id) - 4);
1419 return (__u16) simple_strtoul(id, &id, 16);
1420 }
1421
1422 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1423 void (*idx_reply_cb)(struct qeth_channel *,
1424 struct qeth_cmd_buffer *))
1425 {
1426 struct qeth_cmd_buffer *iob;
1427 unsigned long flags;
1428 int rc;
1429 struct qeth_card *card;
1430
1431 QETH_DBF_TEXT(setup, 2, "idxanswr");
1432 card = CARD_FROM_CDEV(channel->ccwdev);
1433 iob = qeth_get_buffer(channel);
1434 iob->callback = idx_reply_cb;
1435 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1436 channel->ccw.count = QETH_BUFSIZE;
1437 channel->ccw.cda = (__u32) __pa(iob->data);
1438
1439 wait_event(card->wait_q,
1440 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1441 QETH_DBF_TEXT(setup, 6, "noirqpnd");
1442 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1443 rc = ccw_device_start(channel->ccwdev,
1444 &channel->ccw, (addr_t) iob, 0, 0);
1445 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1446
1447 if (rc) {
1448 PRINT_ERR("Error2 in activating channel rc=%d\n", rc);
1449 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
1450 atomic_set(&channel->irq_pending, 0);
1451 wake_up(&card->wait_q);
1452 return rc;
1453 }
1454 rc = wait_event_interruptible_timeout(card->wait_q,
1455 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1456 if (rc == -ERESTARTSYS)
1457 return rc;
1458 if (channel->state != CH_STATE_UP) {
1459 rc = -ETIME;
1460 QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
1461 qeth_clear_cmd_buffers(channel);
1462 } else
1463 rc = 0;
1464 return rc;
1465 }
1466
1467 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1468 void (*idx_reply_cb)(struct qeth_channel *,
1469 struct qeth_cmd_buffer *))
1470 {
1471 struct qeth_card *card;
1472 struct qeth_cmd_buffer *iob;
1473 unsigned long flags;
1474 __u16 temp;
1475 __u8 tmp;
1476 int rc;
1477
1478 card = CARD_FROM_CDEV(channel->ccwdev);
1479
1480 QETH_DBF_TEXT(setup, 2, "idxactch");
1481
1482 iob = qeth_get_buffer(channel);
1483 iob->callback = idx_reply_cb;
1484 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1485 channel->ccw.count = IDX_ACTIVATE_SIZE;
1486 channel->ccw.cda = (__u32) __pa(iob->data);
1487 if (channel == &card->write) {
1488 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1489 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1490 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1491 card->seqno.trans_hdr++;
1492 } else {
1493 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1494 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1495 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1496 }
1497 tmp = ((__u8)card->info.portno) | 0x80;
1498 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1499 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1500 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1501 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1502 &card->info.func_level, sizeof(__u16));
1503 temp = qeth_raw_devno_from_bus_id(CARD_DDEV_ID(card));
1504 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp, 2);
1505 temp = (card->info.cula << 8) + card->info.unit_addr2;
1506 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1507
1508 wait_event(card->wait_q,
1509 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1510 QETH_DBF_TEXT(setup, 6, "noirqpnd");
1511 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1512 rc = ccw_device_start(channel->ccwdev,
1513 &channel->ccw, (addr_t) iob, 0, 0);
1514 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1515
1516 if (rc) {
1517 PRINT_ERR("Error1 in activating channel. rc=%d\n", rc);
1518 QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
1519 atomic_set(&channel->irq_pending, 0);
1520 wake_up(&card->wait_q);
1521 return rc;
1522 }
1523 rc = wait_event_interruptible_timeout(card->wait_q,
1524 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1525 if (rc == -ERESTARTSYS)
1526 return rc;
1527 if (channel->state != CH_STATE_ACTIVATING) {
1528 PRINT_WARN("IDX activate timed out!\n");
1529 QETH_DBF_TEXT_(setup, 2, "2err%d", -ETIME);
1530 qeth_clear_cmd_buffers(channel);
1531 return -ETIME;
1532 }
1533 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1534 }
1535
1536 static int qeth_peer_func_level(int level)
1537 {
1538 if ((level & 0xff) == 8)
1539 return (level & 0xff) + 0x400;
1540 if (((level >> 8) & 3) == 1)
1541 return (level & 0xff) + 0x200;
1542 return level;
1543 }
1544
1545 static void qeth_idx_write_cb(struct qeth_channel *channel,
1546 struct qeth_cmd_buffer *iob)
1547 {
1548 struct qeth_card *card;
1549 __u16 temp;
1550
1551 QETH_DBF_TEXT(setup , 2, "idxwrcb");
1552
1553 if (channel->state == CH_STATE_DOWN) {
1554 channel->state = CH_STATE_ACTIVATING;
1555 goto out;
1556 }
1557 card = CARD_FROM_CDEV(channel->ccwdev);
1558
1559 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1560 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1561 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1562 "adapter exclusively used by another host\n",
1563 CARD_WDEV_ID(card));
1564 else
1565 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1566 "negative reply\n", CARD_WDEV_ID(card));
1567 goto out;
1568 }
1569 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1570 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1571 PRINT_WARN("IDX_ACTIVATE on write channel device %s: "
1572 "function level mismatch "
1573 "(sent: 0x%x, received: 0x%x)\n",
1574 CARD_WDEV_ID(card), card->info.func_level, temp);
1575 goto out;
1576 }
1577 channel->state = CH_STATE_UP;
1578 out:
1579 qeth_release_buffer(channel, iob);
1580 }
1581
1582 static void qeth_idx_read_cb(struct qeth_channel *channel,
1583 struct qeth_cmd_buffer *iob)
1584 {
1585 struct qeth_card *card;
1586 __u16 temp;
1587
1588 QETH_DBF_TEXT(setup , 2, "idxrdcb");
1589 if (channel->state == CH_STATE_DOWN) {
1590 channel->state = CH_STATE_ACTIVATING;
1591 goto out;
1592 }
1593
1594 card = CARD_FROM_CDEV(channel->ccwdev);
1595 if (qeth_check_idx_response(iob->data))
1596 goto out;
1597
1598 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1599 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1600 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1601 "adapter exclusively used by another host\n",
1602 CARD_RDEV_ID(card));
1603 else
1604 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1605 "negative reply\n", CARD_RDEV_ID(card));
1606 goto out;
1607 }
1608
1609 /**
1610 * temporary fix for microcode bug
1611 * to revert it,replace OR by AND
1612 */
1613 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1614 (card->info.type == QETH_CARD_TYPE_OSAE))
1615 card->info.portname_required = 1;
1616
1617 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1618 if (temp != qeth_peer_func_level(card->info.func_level)) {
1619 PRINT_WARN("IDX_ACTIVATE on read channel device %s: function "
1620 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1621 CARD_RDEV_ID(card), card->info.func_level, temp);
1622 goto out;
1623 }
1624 memcpy(&card->token.issuer_rm_r,
1625 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1626 QETH_MPC_TOKEN_LENGTH);
1627 memcpy(&card->info.mcl_level[0],
1628 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1629 channel->state = CH_STATE_UP;
1630 out:
1631 qeth_release_buffer(channel, iob);
1632 }
1633
1634 void qeth_prepare_control_data(struct qeth_card *card, int len,
1635 struct qeth_cmd_buffer *iob)
1636 {
1637 qeth_setup_ccw(&card->write, iob->data, len);
1638 iob->callback = qeth_release_buffer;
1639
1640 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1641 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1642 card->seqno.trans_hdr++;
1643 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1644 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1645 card->seqno.pdu_hdr++;
1646 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1647 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1648 QETH_DBF_HEX(control, 2, iob->data, QETH_DBF_CONTROL_LEN);
1649 }
1650 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1651
1652 int qeth_send_control_data(struct qeth_card *card, int len,
1653 struct qeth_cmd_buffer *iob,
1654 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1655 unsigned long),
1656 void *reply_param)
1657 {
1658 int rc;
1659 unsigned long flags;
1660 struct qeth_reply *reply = NULL;
1661 unsigned long timeout;
1662
1663 QETH_DBF_TEXT(trace, 2, "sendctl");
1664
1665 reply = qeth_alloc_reply(card);
1666 if (!reply) {
1667 PRINT_WARN("Could no alloc qeth_reply!\n");
1668 return -ENOMEM;
1669 }
1670 reply->callback = reply_cb;
1671 reply->param = reply_param;
1672 if (card->state == CARD_STATE_DOWN)
1673 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1674 else
1675 reply->seqno = card->seqno.ipa++;
1676 init_waitqueue_head(&reply->wait_q);
1677 spin_lock_irqsave(&card->lock, flags);
1678 list_add_tail(&reply->list, &card->cmd_waiter_list);
1679 spin_unlock_irqrestore(&card->lock, flags);
1680 QETH_DBF_HEX(control, 2, iob->data, QETH_DBF_CONTROL_LEN);
1681
1682 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1683 qeth_prepare_control_data(card, len, iob);
1684
1685 if (IS_IPA(iob->data))
1686 timeout = jiffies + QETH_IPA_TIMEOUT;
1687 else
1688 timeout = jiffies + QETH_TIMEOUT;
1689
1690 QETH_DBF_TEXT(trace, 6, "noirqpnd");
1691 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1692 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1693 (addr_t) iob, 0, 0);
1694 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1695 if (rc) {
1696 PRINT_WARN("qeth_send_control_data: "
1697 "ccw_device_start rc = %i\n", rc);
1698 QETH_DBF_TEXT_(trace, 2, " err%d", rc);
1699 spin_lock_irqsave(&card->lock, flags);
1700 list_del_init(&reply->list);
1701 qeth_put_reply(reply);
1702 spin_unlock_irqrestore(&card->lock, flags);
1703 qeth_release_buffer(iob->channel, iob);
1704 atomic_set(&card->write.irq_pending, 0);
1705 wake_up(&card->wait_q);
1706 return rc;
1707 }
1708 while (!atomic_read(&reply->received)) {
1709 if (time_after(jiffies, timeout)) {
1710 spin_lock_irqsave(&reply->card->lock, flags);
1711 list_del_init(&reply->list);
1712 spin_unlock_irqrestore(&reply->card->lock, flags);
1713 reply->rc = -ETIME;
1714 atomic_inc(&reply->received);
1715 wake_up(&reply->wait_q);
1716 }
1717 cpu_relax();
1718 };
1719 rc = reply->rc;
1720 qeth_put_reply(reply);
1721 return rc;
1722 }
1723 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1724
1725 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1726 unsigned long data)
1727 {
1728 struct qeth_cmd_buffer *iob;
1729
1730 QETH_DBF_TEXT(setup, 2, "cmenblcb");
1731
1732 iob = (struct qeth_cmd_buffer *) data;
1733 memcpy(&card->token.cm_filter_r,
1734 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1735 QETH_MPC_TOKEN_LENGTH);
1736 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
1737 return 0;
1738 }
1739
1740 static int qeth_cm_enable(struct qeth_card *card)
1741 {
1742 int rc;
1743 struct qeth_cmd_buffer *iob;
1744
1745 QETH_DBF_TEXT(setup, 2, "cmenable");
1746
1747 iob = qeth_wait_for_buffer(&card->write);
1748 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1749 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1750 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1751 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1752 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1753
1754 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1755 qeth_cm_enable_cb, NULL);
1756 return rc;
1757 }
1758
1759 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1760 unsigned long data)
1761 {
1762
1763 struct qeth_cmd_buffer *iob;
1764
1765 QETH_DBF_TEXT(setup, 2, "cmsetpcb");
1766
1767 iob = (struct qeth_cmd_buffer *) data;
1768 memcpy(&card->token.cm_connection_r,
1769 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1770 QETH_MPC_TOKEN_LENGTH);
1771 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
1772 return 0;
1773 }
1774
1775 static int qeth_cm_setup(struct qeth_card *card)
1776 {
1777 int rc;
1778 struct qeth_cmd_buffer *iob;
1779
1780 QETH_DBF_TEXT(setup, 2, "cmsetup");
1781
1782 iob = qeth_wait_for_buffer(&card->write);
1783 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1784 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1785 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1786 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1787 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1788 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1789 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1790 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1791 qeth_cm_setup_cb, NULL);
1792 return rc;
1793
1794 }
1795
1796 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1797 {
1798 switch (card->info.type) {
1799 case QETH_CARD_TYPE_UNKNOWN:
1800 return 1500;
1801 case QETH_CARD_TYPE_IQD:
1802 return card->info.max_mtu;
1803 case QETH_CARD_TYPE_OSAE:
1804 switch (card->info.link_type) {
1805 case QETH_LINK_TYPE_HSTR:
1806 case QETH_LINK_TYPE_LANE_TR:
1807 return 2000;
1808 default:
1809 return 1492;
1810 }
1811 default:
1812 return 1500;
1813 }
1814 }
1815
1816 static inline int qeth_get_max_mtu_for_card(int cardtype)
1817 {
1818 switch (cardtype) {
1819
1820 case QETH_CARD_TYPE_UNKNOWN:
1821 case QETH_CARD_TYPE_OSAE:
1822 case QETH_CARD_TYPE_OSN:
1823 return 61440;
1824 case QETH_CARD_TYPE_IQD:
1825 return 57344;
1826 default:
1827 return 1500;
1828 }
1829 }
1830
1831 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1832 {
1833 switch (cardtype) {
1834 case QETH_CARD_TYPE_IQD:
1835 return 1;
1836 default:
1837 return 0;
1838 }
1839 }
1840
1841 static inline int qeth_get_mtu_outof_framesize(int framesize)
1842 {
1843 switch (framesize) {
1844 case 0x4000:
1845 return 8192;
1846 case 0x6000:
1847 return 16384;
1848 case 0xa000:
1849 return 32768;
1850 case 0xffff:
1851 return 57344;
1852 default:
1853 return 0;
1854 }
1855 }
1856
1857 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1858 {
1859 switch (card->info.type) {
1860 case QETH_CARD_TYPE_OSAE:
1861 return ((mtu >= 576) && (mtu <= 61440));
1862 case QETH_CARD_TYPE_IQD:
1863 return ((mtu >= 576) &&
1864 (mtu <= card->info.max_mtu + 4096 - 32));
1865 case QETH_CARD_TYPE_OSN:
1866 case QETH_CARD_TYPE_UNKNOWN:
1867 default:
1868 return 1;
1869 }
1870 }
1871
1872 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1873 unsigned long data)
1874 {
1875
1876 __u16 mtu, framesize;
1877 __u16 len;
1878 __u8 link_type;
1879 struct qeth_cmd_buffer *iob;
1880
1881 QETH_DBF_TEXT(setup, 2, "ulpenacb");
1882
1883 iob = (struct qeth_cmd_buffer *) data;
1884 memcpy(&card->token.ulp_filter_r,
1885 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1886 QETH_MPC_TOKEN_LENGTH);
1887 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1888 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1889 mtu = qeth_get_mtu_outof_framesize(framesize);
1890 if (!mtu) {
1891 iob->rc = -EINVAL;
1892 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
1893 return 0;
1894 }
1895 card->info.max_mtu = mtu;
1896 card->info.initial_mtu = mtu;
1897 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1898 } else {
1899 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1900 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1901 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1902 }
1903
1904 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1905 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1906 memcpy(&link_type,
1907 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1908 card->info.link_type = link_type;
1909 } else
1910 card->info.link_type = 0;
1911 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
1912 return 0;
1913 }
1914
1915 static int qeth_ulp_enable(struct qeth_card *card)
1916 {
1917 int rc;
1918 char prot_type;
1919 struct qeth_cmd_buffer *iob;
1920
1921 /*FIXME: trace view callbacks*/
1922 QETH_DBF_TEXT(setup, 2, "ulpenabl");
1923
1924 iob = qeth_wait_for_buffer(&card->write);
1925 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1926
1927 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1928 (__u8) card->info.portno;
1929 if (card->options.layer2)
1930 if (card->info.type == QETH_CARD_TYPE_OSN)
1931 prot_type = QETH_PROT_OSN2;
1932 else
1933 prot_type = QETH_PROT_LAYER2;
1934 else
1935 prot_type = QETH_PROT_TCPIP;
1936
1937 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1938 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1939 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1940 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1941 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1942 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1943 card->info.portname, 9);
1944 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1945 qeth_ulp_enable_cb, NULL);
1946 return rc;
1947
1948 }
1949
1950 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1951 unsigned long data)
1952 {
1953 struct qeth_cmd_buffer *iob;
1954
1955 QETH_DBF_TEXT(setup, 2, "ulpstpcb");
1956
1957 iob = (struct qeth_cmd_buffer *) data;
1958 memcpy(&card->token.ulp_connection_r,
1959 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1960 QETH_MPC_TOKEN_LENGTH);
1961 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
1962 return 0;
1963 }
1964
1965 static int qeth_ulp_setup(struct qeth_card *card)
1966 {
1967 int rc;
1968 __u16 temp;
1969 struct qeth_cmd_buffer *iob;
1970 struct ccw_dev_id dev_id;
1971
1972 QETH_DBF_TEXT(setup, 2, "ulpsetup");
1973
1974 iob = qeth_wait_for_buffer(&card->write);
1975 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
1976
1977 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
1978 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1979 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
1980 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
1981 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
1982 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
1983
1984 ccw_device_get_id(CARD_DDEV(card), &dev_id);
1985 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
1986 temp = (card->info.cula << 8) + card->info.unit_addr2;
1987 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
1988 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
1989 qeth_ulp_setup_cb, NULL);
1990 return rc;
1991 }
1992
1993 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
1994 {
1995 int i, j;
1996
1997 QETH_DBF_TEXT(setup, 2, "allcqdbf");
1998
1999 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2000 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2001 return 0;
2002
2003 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2004 GFP_KERNEL);
2005 if (!card->qdio.in_q)
2006 goto out_nomem;
2007 QETH_DBF_TEXT(setup, 2, "inq");
2008 QETH_DBF_HEX(setup, 2, &card->qdio.in_q, sizeof(void *));
2009 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2010 /* give inbound qeth_qdio_buffers their qdio_buffers */
2011 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2012 card->qdio.in_q->bufs[i].buffer =
2013 &card->qdio.in_q->qdio_bufs[i];
2014 /* inbound buffer pool */
2015 if (qeth_alloc_buffer_pool(card))
2016 goto out_freeinq;
2017 /* outbound */
2018 card->qdio.out_qs =
2019 kmalloc(card->qdio.no_out_queues *
2020 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2021 if (!card->qdio.out_qs)
2022 goto out_freepool;
2023 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2024 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2025 GFP_KERNEL);
2026 if (!card->qdio.out_qs[i])
2027 goto out_freeoutq;
2028 QETH_DBF_TEXT_(setup, 2, "outq %i", i);
2029 QETH_DBF_HEX(setup, 2, &card->qdio.out_qs[i], sizeof(void *));
2030 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2031 card->qdio.out_qs[i]->queue_no = i;
2032 /* give outbound qeth_qdio_buffers their qdio_buffers */
2033 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2034 card->qdio.out_qs[i]->bufs[j].buffer =
2035 &card->qdio.out_qs[i]->qdio_bufs[j];
2036 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2037 skb_list);
2038 lockdep_set_class(
2039 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2040 &qdio_out_skb_queue_key);
2041 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2042 }
2043 }
2044 return 0;
2045
2046 out_freeoutq:
2047 while (i > 0)
2048 kfree(card->qdio.out_qs[--i]);
2049 kfree(card->qdio.out_qs);
2050 card->qdio.out_qs = NULL;
2051 out_freepool:
2052 qeth_free_buffer_pool(card);
2053 out_freeinq:
2054 kfree(card->qdio.in_q);
2055 card->qdio.in_q = NULL;
2056 out_nomem:
2057 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2058 return -ENOMEM;
2059 }
2060
2061 static void qeth_create_qib_param_field(struct qeth_card *card,
2062 char *param_field)
2063 {
2064
2065 param_field[0] = _ascebc['P'];
2066 param_field[1] = _ascebc['C'];
2067 param_field[2] = _ascebc['I'];
2068 param_field[3] = _ascebc['T'];
2069 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2070 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2071 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2072 }
2073
2074 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2075 char *param_field)
2076 {
2077 param_field[16] = _ascebc['B'];
2078 param_field[17] = _ascebc['L'];
2079 param_field[18] = _ascebc['K'];
2080 param_field[19] = _ascebc['T'];
2081 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2082 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2083 *((unsigned int *) (&param_field[28])) =
2084 card->info.blkt.inter_packet_jumbo;
2085 }
2086
2087 static int qeth_qdio_activate(struct qeth_card *card)
2088 {
2089 QETH_DBF_TEXT(setup, 3, "qdioact");
2090 return qdio_activate(CARD_DDEV(card), 0);
2091 }
2092
2093 static int qeth_dm_act(struct qeth_card *card)
2094 {
2095 int rc;
2096 struct qeth_cmd_buffer *iob;
2097
2098 QETH_DBF_TEXT(setup, 2, "dmact");
2099
2100 iob = qeth_wait_for_buffer(&card->write);
2101 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2102
2103 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2104 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2105 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2106 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2107 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2108 return rc;
2109 }
2110
2111 static int qeth_mpc_initialize(struct qeth_card *card)
2112 {
2113 int rc;
2114
2115 QETH_DBF_TEXT(setup, 2, "mpcinit");
2116
2117 rc = qeth_issue_next_read(card);
2118 if (rc) {
2119 QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
2120 return rc;
2121 }
2122 rc = qeth_cm_enable(card);
2123 if (rc) {
2124 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
2125 goto out_qdio;
2126 }
2127 rc = qeth_cm_setup(card);
2128 if (rc) {
2129 QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
2130 goto out_qdio;
2131 }
2132 rc = qeth_ulp_enable(card);
2133 if (rc) {
2134 QETH_DBF_TEXT_(setup, 2, "4err%d", rc);
2135 goto out_qdio;
2136 }
2137 rc = qeth_ulp_setup(card);
2138 if (rc) {
2139 QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
2140 goto out_qdio;
2141 }
2142 rc = qeth_alloc_qdio_buffers(card);
2143 if (rc) {
2144 QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
2145 goto out_qdio;
2146 }
2147 rc = qeth_qdio_establish(card);
2148 if (rc) {
2149 QETH_DBF_TEXT_(setup, 2, "6err%d", rc);
2150 qeth_free_qdio_buffers(card);
2151 goto out_qdio;
2152 }
2153 rc = qeth_qdio_activate(card);
2154 if (rc) {
2155 QETH_DBF_TEXT_(setup, 2, "7err%d", rc);
2156 goto out_qdio;
2157 }
2158 rc = qeth_dm_act(card);
2159 if (rc) {
2160 QETH_DBF_TEXT_(setup, 2, "8err%d", rc);
2161 goto out_qdio;
2162 }
2163
2164 return 0;
2165 out_qdio:
2166 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2167 return rc;
2168 }
2169
2170 static void qeth_print_status_with_portname(struct qeth_card *card)
2171 {
2172 char dbf_text[15];
2173 int i;
2174
2175 sprintf(dbf_text, "%s", card->info.portname + 1);
2176 for (i = 0; i < 8; i++)
2177 dbf_text[i] =
2178 (char) _ebcasc[(__u8) dbf_text[i]];
2179 dbf_text[8] = 0;
2180 PRINT_INFO("Device %s/%s/%s is a%s card%s%s%s\n"
2181 "with link type %s (portname: %s)\n",
2182 CARD_RDEV_ID(card),
2183 CARD_WDEV_ID(card),
2184 CARD_DDEV_ID(card),
2185 qeth_get_cardname(card),
2186 (card->info.mcl_level[0]) ? " (level: " : "",
2187 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2188 (card->info.mcl_level[0]) ? ")" : "",
2189 qeth_get_cardname_short(card),
2190 dbf_text);
2191
2192 }
2193
2194 static void qeth_print_status_no_portname(struct qeth_card *card)
2195 {
2196 if (card->info.portname[0])
2197 PRINT_INFO("Device %s/%s/%s is a%s "
2198 "card%s%s%s\nwith link type %s "
2199 "(no portname needed by interface).\n",
2200 CARD_RDEV_ID(card),
2201 CARD_WDEV_ID(card),
2202 CARD_DDEV_ID(card),
2203 qeth_get_cardname(card),
2204 (card->info.mcl_level[0]) ? " (level: " : "",
2205 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2206 (card->info.mcl_level[0]) ? ")" : "",
2207 qeth_get_cardname_short(card));
2208 else
2209 PRINT_INFO("Device %s/%s/%s is a%s "
2210 "card%s%s%s\nwith link type %s.\n",
2211 CARD_RDEV_ID(card),
2212 CARD_WDEV_ID(card),
2213 CARD_DDEV_ID(card),
2214 qeth_get_cardname(card),
2215 (card->info.mcl_level[0]) ? " (level: " : "",
2216 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2217 (card->info.mcl_level[0]) ? ")" : "",
2218 qeth_get_cardname_short(card));
2219 }
2220
2221 void qeth_print_status_message(struct qeth_card *card)
2222 {
2223 switch (card->info.type) {
2224 case QETH_CARD_TYPE_OSAE:
2225 /* VM will use a non-zero first character
2226 * to indicate a HiperSockets like reporting
2227 * of the level OSA sets the first character to zero
2228 * */
2229 if (!card->info.mcl_level[0]) {
2230 sprintf(card->info.mcl_level, "%02x%02x",
2231 card->info.mcl_level[2],
2232 card->info.mcl_level[3]);
2233
2234 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2235 break;
2236 }
2237 /* fallthrough */
2238 case QETH_CARD_TYPE_IQD:
2239 if (card->info.guestlan) {
2240 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2241 card->info.mcl_level[0]];
2242 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2243 card->info.mcl_level[1]];
2244 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2245 card->info.mcl_level[2]];
2246 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2247 card->info.mcl_level[3]];
2248 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2249 }
2250 break;
2251 default:
2252 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2253 }
2254 if (card->info.portname_required)
2255 qeth_print_status_with_portname(card);
2256 else
2257 qeth_print_status_no_portname(card);
2258 }
2259 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2260
2261 void qeth_put_buffer_pool_entry(struct qeth_card *card,
2262 struct qeth_buffer_pool_entry *entry)
2263 {
2264 QETH_DBF_TEXT(trace, 6, "ptbfplen");
2265 list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
2266 }
2267 EXPORT_SYMBOL_GPL(qeth_put_buffer_pool_entry);
2268
2269 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2270 {
2271 struct qeth_buffer_pool_entry *entry;
2272
2273 QETH_DBF_TEXT(trace, 5, "inwrklst");
2274
2275 list_for_each_entry(entry,
2276 &card->qdio.init_pool.entry_list, init_list) {
2277 qeth_put_buffer_pool_entry(card, entry);
2278 }
2279 }
2280
2281 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2282 struct qeth_card *card)
2283 {
2284 struct list_head *plh;
2285 struct qeth_buffer_pool_entry *entry;
2286 int i, free;
2287 struct page *page;
2288
2289 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2290 return NULL;
2291
2292 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2293 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2294 free = 1;
2295 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2296 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2297 free = 0;
2298 break;
2299 }
2300 }
2301 if (free) {
2302 list_del_init(&entry->list);
2303 return entry;
2304 }
2305 }
2306
2307 /* no free buffer in pool so take first one and swap pages */
2308 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2309 struct qeth_buffer_pool_entry, list);
2310 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2311 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2312 page = alloc_page(GFP_ATOMIC);
2313 if (!page) {
2314 return NULL;
2315 } else {
2316 free_page((unsigned long)entry->elements[i]);
2317 entry->elements[i] = page_address(page);
2318 if (card->options.performance_stats)
2319 card->perf_stats.sg_alloc_page_rx++;
2320 }
2321 }
2322 }
2323 list_del_init(&entry->list);
2324 return entry;
2325 }
2326
2327 static int qeth_init_input_buffer(struct qeth_card *card,
2328 struct qeth_qdio_buffer *buf)
2329 {
2330 struct qeth_buffer_pool_entry *pool_entry;
2331 int i;
2332
2333 pool_entry = qeth_find_free_buffer_pool_entry(card);
2334 if (!pool_entry)
2335 return 1;
2336
2337 /*
2338 * since the buffer is accessed only from the input_tasklet
2339 * there shouldn't be a need to synchronize; also, since we use
2340 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2341 * buffers
2342 */
2343 BUG_ON(!pool_entry);
2344
2345 buf->pool_entry = pool_entry;
2346 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2347 buf->buffer->element[i].length = PAGE_SIZE;
2348 buf->buffer->element[i].addr = pool_entry->elements[i];
2349 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2350 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2351 else
2352 buf->buffer->element[i].flags = 0;
2353 }
2354 return 0;
2355 }
2356
2357 int qeth_init_qdio_queues(struct qeth_card *card)
2358 {
2359 int i, j;
2360 int rc;
2361
2362 QETH_DBF_TEXT(setup, 2, "initqdqs");
2363
2364 /* inbound queue */
2365 memset(card->qdio.in_q->qdio_bufs, 0,
2366 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2367 qeth_initialize_working_pool_list(card);
2368 /*give only as many buffers to hardware as we have buffer pool entries*/
2369 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2370 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2371 card->qdio.in_q->next_buf_to_init =
2372 card->qdio.in_buf_pool.buf_count - 1;
2373 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2374 card->qdio.in_buf_pool.buf_count - 1, NULL);
2375 if (rc) {
2376 QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
2377 return rc;
2378 }
2379 rc = qdio_synchronize(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0);
2380 if (rc) {
2381 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
2382 return rc;
2383 }
2384 /* outbound queue */
2385 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2386 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2387 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2388 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2389 qeth_clear_output_buffer(card->qdio.out_qs[i],
2390 &card->qdio.out_qs[i]->bufs[j]);
2391 }
2392 card->qdio.out_qs[i]->card = card;
2393 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2394 card->qdio.out_qs[i]->do_pack = 0;
2395 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2396 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2397 atomic_set(&card->qdio.out_qs[i]->state,
2398 QETH_OUT_Q_UNLOCKED);
2399 }
2400 return 0;
2401 }
2402 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2403
2404 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2405 {
2406 switch (link_type) {
2407 case QETH_LINK_TYPE_HSTR:
2408 return 2;
2409 default:
2410 return 1;
2411 }
2412 }
2413
2414 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2415 struct qeth_ipa_cmd *cmd, __u8 command,
2416 enum qeth_prot_versions prot)
2417 {
2418 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2419 cmd->hdr.command = command;
2420 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2421 cmd->hdr.seqno = card->seqno.ipa;
2422 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2423 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2424 if (card->options.layer2)
2425 cmd->hdr.prim_version_no = 2;
2426 else
2427 cmd->hdr.prim_version_no = 1;
2428 cmd->hdr.param_count = 1;
2429 cmd->hdr.prot_version = prot;
2430 cmd->hdr.ipa_supported = 0;
2431 cmd->hdr.ipa_enabled = 0;
2432 }
2433
2434 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2435 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2436 {
2437 struct qeth_cmd_buffer *iob;
2438 struct qeth_ipa_cmd *cmd;
2439
2440 iob = qeth_wait_for_buffer(&card->write);
2441 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2442 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2443
2444 return iob;
2445 }
2446 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2447
2448 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2449 char prot_type)
2450 {
2451 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2452 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2453 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2454 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2455 }
2456 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2457
2458 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2459 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2460 unsigned long),
2461 void *reply_param)
2462 {
2463 int rc;
2464 char prot_type;
2465 int cmd;
2466 cmd = ((struct qeth_ipa_cmd *)
2467 (iob->data+IPA_PDU_HEADER_SIZE))->hdr.command;
2468
2469 QETH_DBF_TEXT(trace, 4, "sendipa");
2470
2471 if (card->options.layer2)
2472 if (card->info.type == QETH_CARD_TYPE_OSN)
2473 prot_type = QETH_PROT_OSN2;
2474 else
2475 prot_type = QETH_PROT_LAYER2;
2476 else
2477 prot_type = QETH_PROT_TCPIP;
2478 qeth_prepare_ipa_cmd(card, iob, prot_type);
2479 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, iob,
2480 reply_cb, reply_param);
2481 if (rc != 0) {
2482 char *ipa_cmd_name;
2483 ipa_cmd_name = qeth_get_ipa_cmd_name(cmd);
2484 PRINT_ERR("%s %s(%x) returned %s(%x)\n", __FUNCTION__,
2485 ipa_cmd_name, cmd, qeth_get_ipa_msg(rc), rc);
2486 }
2487 return rc;
2488 }
2489 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2490
2491 static int qeth_send_startstoplan(struct qeth_card *card,
2492 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2493 {
2494 int rc;
2495 struct qeth_cmd_buffer *iob;
2496
2497 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2498 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2499
2500 return rc;
2501 }
2502
2503 int qeth_send_startlan(struct qeth_card *card)
2504 {
2505 int rc;
2506
2507 QETH_DBF_TEXT(setup, 2, "strtlan");
2508
2509 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2510 return rc;
2511 }
2512 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2513
2514 int qeth_send_stoplan(struct qeth_card *card)
2515 {
2516 int rc = 0;
2517
2518 /*
2519 * TODO: according to the IPA format document page 14,
2520 * TCP/IP (we!) never issue a STOPLAN
2521 * is this right ?!?
2522 */
2523 QETH_DBF_TEXT(setup, 2, "stoplan");
2524
2525 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2526 return rc;
2527 }
2528 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2529
2530 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2531 struct qeth_reply *reply, unsigned long data)
2532 {
2533 struct qeth_ipa_cmd *cmd;
2534
2535 QETH_DBF_TEXT(trace, 4, "defadpcb");
2536
2537 cmd = (struct qeth_ipa_cmd *) data;
2538 if (cmd->hdr.return_code == 0)
2539 cmd->hdr.return_code =
2540 cmd->data.setadapterparms.hdr.return_code;
2541 return 0;
2542 }
2543 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2544
2545 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2546 struct qeth_reply *reply, unsigned long data)
2547 {
2548 struct qeth_ipa_cmd *cmd;
2549
2550 QETH_DBF_TEXT(trace, 3, "quyadpcb");
2551
2552 cmd = (struct qeth_ipa_cmd *) data;
2553 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2554 card->info.link_type =
2555 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2556 card->options.adp.supported_funcs =
2557 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2558 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2559 }
2560
2561 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2562 __u32 command, __u32 cmdlen)
2563 {
2564 struct qeth_cmd_buffer *iob;
2565 struct qeth_ipa_cmd *cmd;
2566
2567 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2568 QETH_PROT_IPV4);
2569 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2570 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2571 cmd->data.setadapterparms.hdr.command_code = command;
2572 cmd->data.setadapterparms.hdr.used_total = 1;
2573 cmd->data.setadapterparms.hdr.seq_no = 1;
2574
2575 return iob;
2576 }
2577 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2578
2579 int qeth_query_setadapterparms(struct qeth_card *card)
2580 {
2581 int rc;
2582 struct qeth_cmd_buffer *iob;
2583
2584 QETH_DBF_TEXT(trace, 3, "queryadp");
2585 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2586 sizeof(struct qeth_ipacmd_setadpparms));
2587 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2588 return rc;
2589 }
2590 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2591
2592 int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2593 unsigned int siga_error, const char *dbftext)
2594 {
2595 if (qdio_error || siga_error) {
2596 QETH_DBF_TEXT(trace, 2, dbftext);
2597 QETH_DBF_TEXT(qerr, 2, dbftext);
2598 QETH_DBF_TEXT_(qerr, 2, " F15=%02X",
2599 buf->element[15].flags & 0xff);
2600 QETH_DBF_TEXT_(qerr, 2, " F14=%02X",
2601 buf->element[14].flags & 0xff);
2602 QETH_DBF_TEXT_(qerr, 2, " qerr=%X", qdio_error);
2603 QETH_DBF_TEXT_(qerr, 2, " serr=%X", siga_error);
2604 return 1;
2605 }
2606 return 0;
2607 }
2608 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2609
2610 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2611 {
2612 struct qeth_qdio_q *queue = card->qdio.in_q;
2613 int count;
2614 int i;
2615 int rc;
2616 int newcount = 0;
2617
2618 QETH_DBF_TEXT(trace, 6, "queinbuf");
2619 count = (index < queue->next_buf_to_init)?
2620 card->qdio.in_buf_pool.buf_count -
2621 (queue->next_buf_to_init - index) :
2622 card->qdio.in_buf_pool.buf_count -
2623 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2624 /* only requeue at a certain threshold to avoid SIGAs */
2625 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2626 for (i = queue->next_buf_to_init;
2627 i < queue->next_buf_to_init + count; ++i) {
2628 if (qeth_init_input_buffer(card,
2629 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2630 break;
2631 } else {
2632 newcount++;
2633 }
2634 }
2635
2636 if (newcount < count) {
2637 /* we are in memory shortage so we switch back to
2638 traditional skb allocation and drop packages */
2639 if (!atomic_read(&card->force_alloc_skb) &&
2640 net_ratelimit())
2641 PRINT_WARN("Switch to alloc skb\n");
2642 atomic_set(&card->force_alloc_skb, 3);
2643 count = newcount;
2644 } else {
2645 if ((atomic_read(&card->force_alloc_skb) == 1) &&
2646 net_ratelimit())
2647 PRINT_WARN("Switch to sg\n");
2648 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2649 }
2650
2651 /*
2652 * according to old code it should be avoided to requeue all
2653 * 128 buffers in order to benefit from PCI avoidance.
2654 * this function keeps at least one buffer (the buffer at
2655 * 'index') un-requeued -> this buffer is the first buffer that
2656 * will be requeued the next time
2657 */
2658 if (card->options.performance_stats) {
2659 card->perf_stats.inbound_do_qdio_cnt++;
2660 card->perf_stats.inbound_do_qdio_start_time =
2661 qeth_get_micros();
2662 }
2663 rc = do_QDIO(CARD_DDEV(card),
2664 QDIO_FLAG_SYNC_INPUT | QDIO_FLAG_UNDER_INTERRUPT,
2665 0, queue->next_buf_to_init, count, NULL);
2666 if (card->options.performance_stats)
2667 card->perf_stats.inbound_do_qdio_time +=
2668 qeth_get_micros() -
2669 card->perf_stats.inbound_do_qdio_start_time;
2670 if (rc) {
2671 PRINT_WARN("qeth_queue_input_buffer's do_QDIO "
2672 "return %i (device %s).\n",
2673 rc, CARD_DDEV_ID(card));
2674 QETH_DBF_TEXT(trace, 2, "qinberr");
2675 QETH_DBF_TEXT_(trace, 2, "%s", CARD_BUS_ID(card));
2676 }
2677 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2678 QDIO_MAX_BUFFERS_PER_Q;
2679 }
2680 }
2681 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2682
2683 static int qeth_handle_send_error(struct qeth_card *card,
2684 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err,
2685 unsigned int siga_err)
2686 {
2687 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2688 int cc = siga_err & 3;
2689
2690 QETH_DBF_TEXT(trace, 6, "hdsnderr");
2691 qeth_check_qdio_errors(buffer->buffer, qdio_err, siga_err, "qouterr");
2692 switch (cc) {
2693 case 0:
2694 if (qdio_err) {
2695 QETH_DBF_TEXT(trace, 1, "lnkfail");
2696 QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
2697 QETH_DBF_TEXT_(trace, 1, "%04x %02x",
2698 (u16)qdio_err, (u8)sbalf15);
2699 return QETH_SEND_ERROR_LINK_FAILURE;
2700 }
2701 return QETH_SEND_ERROR_NONE;
2702 case 2:
2703 if (siga_err & QDIO_SIGA_ERROR_B_BIT_SET) {
2704 QETH_DBF_TEXT(trace, 1, "SIGAcc2B");
2705 QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
2706 return QETH_SEND_ERROR_KICK_IT;
2707 }
2708 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2709 return QETH_SEND_ERROR_RETRY;
2710 return QETH_SEND_ERROR_LINK_FAILURE;
2711 /* look at qdio_error and sbalf 15 */
2712 case 1:
2713 QETH_DBF_TEXT(trace, 1, "SIGAcc1");
2714 QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
2715 return QETH_SEND_ERROR_LINK_FAILURE;
2716 case 3:
2717 default:
2718 QETH_DBF_TEXT(trace, 1, "SIGAcc3");
2719 QETH_DBF_TEXT_(trace, 1, "%s", CARD_BUS_ID(card));
2720 return QETH_SEND_ERROR_KICK_IT;
2721 }
2722 }
2723
2724 /*
2725 * Switched to packing state if the number of used buffers on a queue
2726 * reaches a certain limit.
2727 */
2728 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2729 {
2730 if (!queue->do_pack) {
2731 if (atomic_read(&queue->used_buffers)
2732 >= QETH_HIGH_WATERMARK_PACK){
2733 /* switch non-PACKING -> PACKING */
2734 QETH_DBF_TEXT(trace, 6, "np->pack");
2735 if (queue->card->options.performance_stats)
2736 queue->card->perf_stats.sc_dp_p++;
2737 queue->do_pack = 1;
2738 }
2739 }
2740 }
2741
2742 /*
2743 * Switches from packing to non-packing mode. If there is a packing
2744 * buffer on the queue this buffer will be prepared to be flushed.
2745 * In that case 1 is returned to inform the caller. If no buffer
2746 * has to be flushed, zero is returned.
2747 */
2748 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2749 {
2750 struct qeth_qdio_out_buffer *buffer;
2751 int flush_count = 0;
2752
2753 if (queue->do_pack) {
2754 if (atomic_read(&queue->used_buffers)
2755 <= QETH_LOW_WATERMARK_PACK) {
2756 /* switch PACKING -> non-PACKING */
2757 QETH_DBF_TEXT(trace, 6, "pack->np");
2758 if (queue->card->options.performance_stats)
2759 queue->card->perf_stats.sc_p_dp++;
2760 queue->do_pack = 0;
2761 /* flush packing buffers */
2762 buffer = &queue->bufs[queue->next_buf_to_fill];
2763 if ((atomic_read(&buffer->state) ==
2764 QETH_QDIO_BUF_EMPTY) &&
2765 (buffer->next_element_to_fill > 0)) {
2766 atomic_set(&buffer->state,
2767 QETH_QDIO_BUF_PRIMED);
2768 flush_count++;
2769 queue->next_buf_to_fill =
2770 (queue->next_buf_to_fill + 1) %
2771 QDIO_MAX_BUFFERS_PER_Q;
2772 }
2773 }
2774 }
2775 return flush_count;
2776 }
2777
2778 /*
2779 * Called to flush a packing buffer if no more pci flags are on the queue.
2780 * Checks if there is a packing buffer and prepares it to be flushed.
2781 * In that case returns 1, otherwise zero.
2782 */
2783 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2784 {
2785 struct qeth_qdio_out_buffer *buffer;
2786
2787 buffer = &queue->bufs[queue->next_buf_to_fill];
2788 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2789 (buffer->next_element_to_fill > 0)) {
2790 /* it's a packing buffer */
2791 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2792 queue->next_buf_to_fill =
2793 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2794 return 1;
2795 }
2796 return 0;
2797 }
2798
2799 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int under_int,
2800 int index, int count)
2801 {
2802 struct qeth_qdio_out_buffer *buf;
2803 int rc;
2804 int i;
2805 unsigned int qdio_flags;
2806
2807 QETH_DBF_TEXT(trace, 6, "flushbuf");
2808
2809 for (i = index; i < index + count; ++i) {
2810 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2811 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2812 SBAL_FLAGS_LAST_ENTRY;
2813
2814 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2815 continue;
2816
2817 if (!queue->do_pack) {
2818 if ((atomic_read(&queue->used_buffers) >=
2819 (QETH_HIGH_WATERMARK_PACK -
2820 QETH_WATERMARK_PACK_FUZZ)) &&
2821 !atomic_read(&queue->set_pci_flags_count)) {
2822 /* it's likely that we'll go to packing
2823 * mode soon */
2824 atomic_inc(&queue->set_pci_flags_count);
2825 buf->buffer->element[0].flags |= 0x40;
2826 }
2827 } else {
2828 if (!atomic_read(&queue->set_pci_flags_count)) {
2829 /*
2830 * there's no outstanding PCI any more, so we
2831 * have to request a PCI to be sure the the PCI
2832 * will wake at some time in the future then we
2833 * can flush packed buffers that might still be
2834 * hanging around, which can happen if no
2835 * further send was requested by the stack
2836 */
2837 atomic_inc(&queue->set_pci_flags_count);
2838 buf->buffer->element[0].flags |= 0x40;
2839 }
2840 }
2841 }
2842
2843 queue->card->dev->trans_start = jiffies;
2844 if (queue->card->options.performance_stats) {
2845 queue->card->perf_stats.outbound_do_qdio_cnt++;
2846 queue->card->perf_stats.outbound_do_qdio_start_time =
2847 qeth_get_micros();
2848 }
2849 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2850 if (under_int)
2851 qdio_flags |= QDIO_FLAG_UNDER_INTERRUPT;
2852 if (atomic_read(&queue->set_pci_flags_count))
2853 qdio_flags |= QDIO_FLAG_PCI_OUT;
2854 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2855 queue->queue_no, index, count, NULL);
2856 if (queue->card->options.performance_stats)
2857 queue->card->perf_stats.outbound_do_qdio_time +=
2858 qeth_get_micros() -
2859 queue->card->perf_stats.outbound_do_qdio_start_time;
2860 if (rc) {
2861 QETH_DBF_TEXT(trace, 2, "flushbuf");
2862 QETH_DBF_TEXT_(trace, 2, " err%d", rc);
2863 QETH_DBF_TEXT_(trace, 2, "%s", CARD_DDEV_ID(queue->card));
2864 queue->card->stats.tx_errors += count;
2865 /* this must not happen under normal circumstances. if it
2866 * happens something is really wrong -> recover */
2867 qeth_schedule_recovery(queue->card);
2868 return;
2869 }
2870 atomic_add(count, &queue->used_buffers);
2871 if (queue->card->options.performance_stats)
2872 queue->card->perf_stats.bufs_sent += count;
2873 }
2874
2875 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2876 {
2877 int index;
2878 int flush_cnt = 0;
2879 int q_was_packing = 0;
2880
2881 /*
2882 * check if weed have to switch to non-packing mode or if
2883 * we have to get a pci flag out on the queue
2884 */
2885 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2886 !atomic_read(&queue->set_pci_flags_count)) {
2887 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2888 QETH_OUT_Q_UNLOCKED) {
2889 /*
2890 * If we get in here, there was no action in
2891 * do_send_packet. So, we check if there is a
2892 * packing buffer to be flushed here.
2893 */
2894 netif_stop_queue(queue->card->dev);
2895 index = queue->next_buf_to_fill;
2896 q_was_packing = queue->do_pack;
2897 /* queue->do_pack may change */
2898 barrier();
2899 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2900 if (!flush_cnt &&
2901 !atomic_read(&queue->set_pci_flags_count))
2902 flush_cnt +=
2903 qeth_flush_buffers_on_no_pci(queue);
2904 if (queue->card->options.performance_stats &&
2905 q_was_packing)
2906 queue->card->perf_stats.bufs_sent_pack +=
2907 flush_cnt;
2908 if (flush_cnt)
2909 qeth_flush_buffers(queue, 1, index, flush_cnt);
2910 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2911 }
2912 }
2913 }
2914
2915 void qeth_qdio_output_handler(struct ccw_device *ccwdev, unsigned int status,
2916 unsigned int qdio_error, unsigned int siga_error,
2917 unsigned int __queue, int first_element, int count,
2918 unsigned long card_ptr)
2919 {
2920 struct qeth_card *card = (struct qeth_card *) card_ptr;
2921 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2922 struct qeth_qdio_out_buffer *buffer;
2923 int i;
2924
2925 QETH_DBF_TEXT(trace, 6, "qdouhdl");
2926 if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
2927 if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION) {
2928 QETH_DBF_TEXT(trace, 2, "achkcond");
2929 QETH_DBF_TEXT_(trace, 2, "%s", CARD_BUS_ID(card));
2930 QETH_DBF_TEXT_(trace, 2, "%08x", status);
2931 netif_stop_queue(card->dev);
2932 qeth_schedule_recovery(card);
2933 return;
2934 }
2935 }
2936 if (card->options.performance_stats) {
2937 card->perf_stats.outbound_handler_cnt++;
2938 card->perf_stats.outbound_handler_start_time =
2939 qeth_get_micros();
2940 }
2941 for (i = first_element; i < (first_element + count); ++i) {
2942 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2943 /*we only handle the KICK_IT error by doing a recovery */
2944 if (qeth_handle_send_error(card, buffer,
2945 qdio_error, siga_error)
2946 == QETH_SEND_ERROR_KICK_IT){
2947 netif_stop_queue(card->dev);
2948 qeth_schedule_recovery(card);
2949 return;
2950 }
2951 qeth_clear_output_buffer(queue, buffer);
2952 }
2953 atomic_sub(count, &queue->used_buffers);
2954 /* check if we need to do something on this outbound queue */
2955 if (card->info.type != QETH_CARD_TYPE_IQD)
2956 qeth_check_outbound_queue(queue);
2957
2958 netif_wake_queue(queue->card->dev);
2959 if (card->options.performance_stats)
2960 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2961 card->perf_stats.outbound_handler_start_time;
2962 }
2963 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2964
2965 int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2966 {
2967 int cast_type = RTN_UNSPEC;
2968
2969 if (card->info.type == QETH_CARD_TYPE_OSN)
2970 return cast_type;
2971
2972 if (skb->dst && skb->dst->neighbour) {
2973 cast_type = skb->dst->neighbour->type;
2974 if ((cast_type == RTN_BROADCAST) ||
2975 (cast_type == RTN_MULTICAST) ||
2976 (cast_type == RTN_ANYCAST))
2977 return cast_type;
2978 else
2979 return RTN_UNSPEC;
2980 }
2981 /* try something else */
2982 if (skb->protocol == ETH_P_IPV6)
2983 return (skb_network_header(skb)[24] == 0xff) ?
2984 RTN_MULTICAST : 0;
2985 else if (skb->protocol == ETH_P_IP)
2986 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2987 RTN_MULTICAST : 0;
2988 /* ... */
2989 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2990 return RTN_BROADCAST;
2991 else {
2992 u16 hdr_mac;
2993
2994 hdr_mac = *((u16 *)skb->data);
2995 /* tr multicast? */
2996 switch (card->info.link_type) {
2997 case QETH_LINK_TYPE_HSTR:
2998 case QETH_LINK_TYPE_LANE_TR:
2999 if ((hdr_mac == QETH_TR_MAC_NC) ||
3000 (hdr_mac == QETH_TR_MAC_C))
3001 return RTN_MULTICAST;
3002 break;
3003 /* eth or so multicast? */
3004 default:
3005 if ((hdr_mac == QETH_ETH_MAC_V4) ||
3006 (hdr_mac == QETH_ETH_MAC_V6))
3007 return RTN_MULTICAST;
3008 }
3009 }
3010 return cast_type;
3011 }
3012 EXPORT_SYMBOL_GPL(qeth_get_cast_type);
3013
3014 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3015 int ipv, int cast_type)
3016 {
3017 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
3018 return card->qdio.default_out_queue;
3019 switch (card->qdio.no_out_queues) {
3020 case 4:
3021 if (cast_type && card->info.is_multicast_different)
3022 return card->info.is_multicast_different &
3023 (card->qdio.no_out_queues - 1);
3024 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3025 const u8 tos = ip_hdr(skb)->tos;
3026
3027 if (card->qdio.do_prio_queueing ==
3028 QETH_PRIO_Q_ING_TOS) {
3029 if (tos & IP_TOS_NOTIMPORTANT)
3030 return 3;
3031 if (tos & IP_TOS_HIGHRELIABILITY)
3032 return 2;
3033 if (tos & IP_TOS_HIGHTHROUGHPUT)
3034 return 1;
3035 if (tos & IP_TOS_LOWDELAY)
3036 return 0;
3037 }
3038 if (card->qdio.do_prio_queueing ==
3039 QETH_PRIO_Q_ING_PREC)
3040 return 3 - (tos >> 6);
3041 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3042 /* TODO: IPv6!!! */
3043 }
3044 return card->qdio.default_out_queue;
3045 case 1: /* fallthrough for single-out-queue 1920-device */
3046 default:
3047 return card->qdio.default_out_queue;
3048 }
3049 }
3050 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3051
3052 static void __qeth_free_new_skb(struct sk_buff *orig_skb,
3053 struct sk_buff *new_skb)
3054 {
3055 if (orig_skb != new_skb)
3056 dev_kfree_skb_any(new_skb);
3057 }
3058
3059 static inline struct sk_buff *qeth_realloc_headroom(struct qeth_card *card,
3060 struct sk_buff *skb, int size)
3061 {
3062 struct sk_buff *new_skb = skb;
3063
3064 if (skb_headroom(skb) >= size)
3065 return skb;
3066 new_skb = skb_realloc_headroom(skb, size);
3067 if (!new_skb)
3068 PRINT_ERR("Could not realloc headroom for qeth_hdr "
3069 "on interface %s", QETH_CARD_IFNAME(card));
3070 return new_skb;
3071 }
3072
3073 struct sk_buff *qeth_prepare_skb(struct qeth_card *card, struct sk_buff *skb,
3074 struct qeth_hdr **hdr)
3075 {
3076 struct sk_buff *new_skb;
3077
3078 QETH_DBF_TEXT(trace, 6, "prepskb");
3079
3080 new_skb = qeth_realloc_headroom(card, skb,
3081 sizeof(struct qeth_hdr));
3082 if (!new_skb)
3083 return NULL;
3084
3085 *hdr = ((struct qeth_hdr *)qeth_push_skb(card, new_skb,
3086 sizeof(struct qeth_hdr)));
3087 if (*hdr == NULL) {
3088 __qeth_free_new_skb(skb, new_skb);
3089 return NULL;
3090 }
3091 return new_skb;
3092 }
3093 EXPORT_SYMBOL_GPL(qeth_prepare_skb);
3094
3095 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3096 struct sk_buff *skb, int elems)
3097 {
3098 int elements_needed = 0;
3099
3100 if (skb_shinfo(skb)->nr_frags > 0)
3101 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3102 if (elements_needed == 0)
3103 elements_needed = 1 + (((((unsigned long) hdr) % PAGE_SIZE)
3104 + skb->len) >> PAGE_SHIFT);
3105 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3106 PRINT_ERR("Invalid size of IP packet "
3107 "(Number=%d / Length=%d). Discarded.\n",
3108 (elements_needed+elems), skb->len);
3109 return 0;
3110 }
3111 return elements_needed;
3112 }
3113 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3114
3115 static void __qeth_fill_buffer(struct sk_buff *skb, struct qdio_buffer *buffer,
3116 int is_tso, int *next_element_to_fill)
3117 {
3118 int length = skb->len;
3119 int length_here;
3120 int element;
3121 char *data;
3122 int first_lap ;
3123
3124 element = *next_element_to_fill;
3125 data = skb->data;
3126 first_lap = (is_tso == 0 ? 1 : 0);
3127
3128 while (length > 0) {
3129 /* length_here is the remaining amount of data in this page */
3130 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3131 if (length < length_here)
3132 length_here = length;
3133
3134 buffer->element[element].addr = data;
3135 buffer->element[element].length = length_here;
3136 length -= length_here;
3137 if (!length) {
3138 if (first_lap)
3139 buffer->element[element].flags = 0;
3140 else
3141 buffer->element[element].flags =
3142 SBAL_FLAGS_LAST_FRAG;
3143 } else {
3144 if (first_lap)
3145 buffer->element[element].flags =
3146 SBAL_FLAGS_FIRST_FRAG;
3147 else
3148 buffer->element[element].flags =
3149 SBAL_FLAGS_MIDDLE_FRAG;
3150 }
3151 data += length_here;
3152 element++;
3153 first_lap = 0;
3154 }
3155 *next_element_to_fill = element;
3156 }
3157
3158 static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3159 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb)
3160 {
3161 struct qdio_buffer *buffer;
3162 struct qeth_hdr_tso *hdr;
3163 int flush_cnt = 0, hdr_len, large_send = 0;
3164
3165 QETH_DBF_TEXT(trace, 6, "qdfillbf");
3166
3167 buffer = buf->buffer;
3168 atomic_inc(&skb->users);
3169 skb_queue_tail(&buf->skb_list, skb);
3170
3171 hdr = (struct qeth_hdr_tso *) skb->data;
3172 /*check first on TSO ....*/
3173 if (hdr->hdr.hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3174 int element = buf->next_element_to_fill;
3175
3176 hdr_len = sizeof(struct qeth_hdr_tso) + hdr->ext.dg_hdr_len;
3177 /*fill first buffer entry only with header information */
3178 buffer->element[element].addr = skb->data;
3179 buffer->element[element].length = hdr_len;
3180 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3181 buf->next_element_to_fill++;
3182 skb->data += hdr_len;
3183 skb->len -= hdr_len;
3184 large_send = 1;
3185 }
3186 if (skb_shinfo(skb)->nr_frags == 0)
3187 __qeth_fill_buffer(skb, buffer, large_send,
3188 (int *)&buf->next_element_to_fill);
3189 else
3190 __qeth_fill_buffer_frag(skb, buffer, large_send,
3191 (int *)&buf->next_element_to_fill);
3192
3193 if (!queue->do_pack) {
3194 QETH_DBF_TEXT(trace, 6, "fillbfnp");
3195 /* set state to PRIMED -> will be flushed */
3196 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3197 flush_cnt = 1;
3198 } else {
3199 QETH_DBF_TEXT(trace, 6, "fillbfpa");
3200 if (queue->card->options.performance_stats)
3201 queue->card->perf_stats.skbs_sent_pack++;
3202 if (buf->next_element_to_fill >=
3203 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3204 /*
3205 * packed buffer if full -> set state PRIMED
3206 * -> will be flushed
3207 */
3208 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3209 flush_cnt = 1;
3210 }
3211 }
3212 return flush_cnt;
3213 }
3214
3215 int qeth_do_send_packet_fast(struct qeth_card *card,
3216 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3217 struct qeth_hdr *hdr, int elements_needed,
3218 struct qeth_eddp_context *ctx)
3219 {
3220 struct qeth_qdio_out_buffer *buffer;
3221 int buffers_needed = 0;
3222 int flush_cnt = 0;
3223 int index;
3224
3225 QETH_DBF_TEXT(trace, 6, "dosndpfa");
3226
3227 /* spin until we get the queue ... */
3228 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3229 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3230 /* ... now we've got the queue */
3231 index = queue->next_buf_to_fill;
3232 buffer = &queue->bufs[queue->next_buf_to_fill];
3233 /*
3234 * check if buffer is empty to make sure that we do not 'overtake'
3235 * ourselves and try to fill a buffer that is already primed
3236 */
3237 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3238 goto out;
3239 if (ctx == NULL)
3240 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3241 QDIO_MAX_BUFFERS_PER_Q;
3242 else {
3243 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3244 ctx);
3245 if (buffers_needed < 0)
3246 goto out;
3247 queue->next_buf_to_fill =
3248 (queue->next_buf_to_fill + buffers_needed) %
3249 QDIO_MAX_BUFFERS_PER_Q;
3250 }
3251 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3252 if (ctx == NULL) {
3253 qeth_fill_buffer(queue, buffer, skb);
3254 qeth_flush_buffers(queue, 0, index, 1);
3255 } else {
3256 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3257 WARN_ON(buffers_needed != flush_cnt);
3258 qeth_flush_buffers(queue, 0, index, flush_cnt);
3259 }
3260 return 0;
3261 out:
3262 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3263 return -EBUSY;
3264 }
3265 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3266
3267 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3268 struct sk_buff *skb, struct qeth_hdr *hdr,
3269 int elements_needed, struct qeth_eddp_context *ctx)
3270 {
3271 struct qeth_qdio_out_buffer *buffer;
3272 int start_index;
3273 int flush_count = 0;
3274 int do_pack = 0;
3275 int tmp;
3276 int rc = 0;
3277
3278 QETH_DBF_TEXT(trace, 6, "dosndpkt");
3279
3280 /* spin until we get the queue ... */
3281 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3282 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3283 start_index = queue->next_buf_to_fill;
3284 buffer = &queue->bufs[queue->next_buf_to_fill];
3285 /*
3286 * check if buffer is empty to make sure that we do not 'overtake'
3287 * ourselves and try to fill a buffer that is already primed
3288 */
3289 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3290 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3291 return -EBUSY;
3292 }
3293 /* check if we need to switch packing state of this queue */
3294 qeth_switch_to_packing_if_needed(queue);
3295 if (queue->do_pack) {
3296 do_pack = 1;
3297 if (ctx == NULL) {
3298 /* does packet fit in current buffer? */
3299 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3300 buffer->next_element_to_fill) < elements_needed) {
3301 /* ... no -> set state PRIMED */
3302 atomic_set(&buffer->state,
3303 QETH_QDIO_BUF_PRIMED);
3304 flush_count++;
3305 queue->next_buf_to_fill =
3306 (queue->next_buf_to_fill + 1) %
3307 QDIO_MAX_BUFFERS_PER_Q;
3308 buffer = &queue->bufs[queue->next_buf_to_fill];
3309 /* we did a step forward, so check buffer state
3310 * again */
3311 if (atomic_read(&buffer->state) !=
3312 QETH_QDIO_BUF_EMPTY){
3313 qeth_flush_buffers(queue, 0,
3314 start_index, flush_count);
3315 atomic_set(&queue->state,
3316 QETH_OUT_Q_UNLOCKED);
3317 return -EBUSY;
3318 }
3319 }
3320 } else {
3321 /* check if we have enough elements (including following
3322 * free buffers) to handle eddp context */
3323 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3324 < 0) {
3325 if (net_ratelimit())
3326 PRINT_WARN("eddp tx_dropped 1\n");
3327 rc = -EBUSY;
3328 goto out;
3329 }
3330 }
3331 }
3332 if (ctx == NULL)
3333 tmp = qeth_fill_buffer(queue, buffer, skb);
3334 else {
3335 tmp = qeth_eddp_fill_buffer(queue, ctx,
3336 queue->next_buf_to_fill);
3337 if (tmp < 0) {
3338 PRINT_ERR("eddp tx_dropped 2\n");
3339 rc = -EBUSY;
3340 goto out;
3341 }
3342 }
3343 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3344 QDIO_MAX_BUFFERS_PER_Q;
3345 flush_count += tmp;
3346 out:
3347 if (flush_count)
3348 qeth_flush_buffers(queue, 0, start_index, flush_count);
3349 else if (!atomic_read(&queue->set_pci_flags_count))
3350 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3351 /*
3352 * queue->state will go from LOCKED -> UNLOCKED or from
3353 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3354 * (switch packing state or flush buffer to get another pci flag out).
3355 * In that case we will enter this loop
3356 */
3357 while (atomic_dec_return(&queue->state)) {
3358 flush_count = 0;
3359 start_index = queue->next_buf_to_fill;
3360 /* check if we can go back to non-packing state */
3361 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3362 /*
3363 * check if we need to flush a packing buffer to get a pci
3364 * flag out on the queue
3365 */
3366 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3367 flush_count += qeth_flush_buffers_on_no_pci(queue);
3368 if (flush_count)
3369 qeth_flush_buffers(queue, 0, start_index, flush_count);
3370 }
3371 /* at this point the queue is UNLOCKED again */
3372 if (queue->card->options.performance_stats && do_pack)
3373 queue->card->perf_stats.bufs_sent_pack += flush_count;
3374
3375 return rc;
3376 }
3377 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3378
3379 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3380 struct qeth_reply *reply, unsigned long data)
3381 {
3382 struct qeth_ipa_cmd *cmd;
3383 struct qeth_ipacmd_setadpparms *setparms;
3384
3385 QETH_DBF_TEXT(trace, 4, "prmadpcb");
3386
3387 cmd = (struct qeth_ipa_cmd *) data;
3388 setparms = &(cmd->data.setadapterparms);
3389
3390 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3391 if (cmd->hdr.return_code) {
3392 QETH_DBF_TEXT_(trace, 4, "prmrc%2.2x", cmd->hdr.return_code);
3393 setparms->data.mode = SET_PROMISC_MODE_OFF;
3394 }
3395 card->info.promisc_mode = setparms->data.mode;
3396 return 0;
3397 }
3398
3399 void qeth_setadp_promisc_mode(struct qeth_card *card)
3400 {
3401 enum qeth_ipa_promisc_modes mode;
3402 struct net_device *dev = card->dev;
3403 struct qeth_cmd_buffer *iob;
3404 struct qeth_ipa_cmd *cmd;
3405
3406 QETH_DBF_TEXT(trace, 4, "setprom");
3407
3408 if (((dev->flags & IFF_PROMISC) &&
3409 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3410 (!(dev->flags & IFF_PROMISC) &&
3411 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3412 return;
3413 mode = SET_PROMISC_MODE_OFF;
3414 if (dev->flags & IFF_PROMISC)
3415 mode = SET_PROMISC_MODE_ON;
3416 QETH_DBF_TEXT_(trace, 4, "mode:%x", mode);
3417
3418 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3419 sizeof(struct qeth_ipacmd_setadpparms));
3420 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3421 cmd->data.setadapterparms.data.mode = mode;
3422 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3423 }
3424 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3425
3426 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3427 {
3428 struct qeth_card *card;
3429 char dbf_text[15];
3430
3431 card = netdev_priv(dev);
3432
3433 QETH_DBF_TEXT(trace, 4, "chgmtu");
3434 sprintf(dbf_text, "%8x", new_mtu);
3435 QETH_DBF_TEXT(trace, 4, dbf_text);
3436
3437 if (new_mtu < 64)
3438 return -EINVAL;
3439 if (new_mtu > 65535)
3440 return -EINVAL;
3441 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3442 (!qeth_mtu_is_valid(card, new_mtu)))
3443 return -EINVAL;
3444 dev->mtu = new_mtu;
3445 return 0;
3446 }
3447 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3448
3449 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3450 {
3451 struct qeth_card *card;
3452
3453 card = netdev_priv(dev);
3454
3455 QETH_DBF_TEXT(trace, 5, "getstat");
3456
3457 return &card->stats;
3458 }
3459 EXPORT_SYMBOL_GPL(qeth_get_stats);
3460
3461 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3462 struct qeth_reply *reply, unsigned long data)
3463 {
3464 struct qeth_ipa_cmd *cmd;
3465
3466 QETH_DBF_TEXT(trace, 4, "chgmaccb");
3467
3468 cmd = (struct qeth_ipa_cmd *) data;
3469 if (!card->options.layer2 ||
3470 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3471 memcpy(card->dev->dev_addr,
3472 &cmd->data.setadapterparms.data.change_addr.addr,
3473 OSA_ADDR_LEN);
3474 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3475 }
3476 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3477 return 0;
3478 }
3479
3480 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3481 {
3482 int rc;
3483 struct qeth_cmd_buffer *iob;
3484 struct qeth_ipa_cmd *cmd;
3485
3486 QETH_DBF_TEXT(trace, 4, "chgmac");
3487
3488 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3489 sizeof(struct qeth_ipacmd_setadpparms));
3490 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3491 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3492 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3493 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3494 card->dev->dev_addr, OSA_ADDR_LEN);
3495 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3496 NULL);
3497 return rc;
3498 }
3499 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3500
3501 void qeth_tx_timeout(struct net_device *dev)
3502 {
3503 struct qeth_card *card;
3504
3505 card = netdev_priv(dev);
3506 card->stats.tx_errors++;
3507 qeth_schedule_recovery(card);
3508 }
3509 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3510
3511 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3512 {
3513 struct qeth_card *card = netdev_priv(dev);
3514 int rc = 0;
3515
3516 switch (regnum) {
3517 case MII_BMCR: /* Basic mode control register */
3518 rc = BMCR_FULLDPLX;
3519 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3520 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3521 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3522 rc |= BMCR_SPEED100;
3523 break;
3524 case MII_BMSR: /* Basic mode status register */
3525 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3526 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3527 BMSR_100BASE4;
3528 break;
3529 case MII_PHYSID1: /* PHYS ID 1 */
3530 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3531 dev->dev_addr[2];
3532 rc = (rc >> 5) & 0xFFFF;
3533 break;
3534 case MII_PHYSID2: /* PHYS ID 2 */
3535 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3536 break;
3537 case MII_ADVERTISE: /* Advertisement control reg */
3538 rc = ADVERTISE_ALL;
3539 break;
3540 case MII_LPA: /* Link partner ability reg */
3541 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3542 LPA_100BASE4 | LPA_LPACK;
3543 break;
3544 case MII_EXPANSION: /* Expansion register */
3545 break;
3546 case MII_DCOUNTER: /* disconnect counter */
3547 break;
3548 case MII_FCSCOUNTER: /* false carrier counter */
3549 break;
3550 case MII_NWAYTEST: /* N-way auto-neg test register */
3551 break;
3552 case MII_RERRCOUNTER: /* rx error counter */
3553 rc = card->stats.rx_errors;
3554 break;
3555 case MII_SREVISION: /* silicon revision */
3556 break;
3557 case MII_RESV1: /* reserved 1 */
3558 break;
3559 case MII_LBRERROR: /* loopback, rx, bypass error */
3560 break;
3561 case MII_PHYADDR: /* physical address */
3562 break;
3563 case MII_RESV2: /* reserved 2 */
3564 break;
3565 case MII_TPISTATUS: /* TPI status for 10mbps */
3566 break;
3567 case MII_NCONFIG: /* network interface config */
3568 break;
3569 default:
3570 break;
3571 }
3572 return rc;
3573 }
3574 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3575
3576 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3577 struct qeth_cmd_buffer *iob, int len,
3578 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3579 unsigned long),
3580 void *reply_param)
3581 {
3582 u16 s1, s2;
3583
3584 QETH_DBF_TEXT(trace, 4, "sendsnmp");
3585
3586 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3587 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3588 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3589 /* adjust PDU length fields in IPA_PDU_HEADER */
3590 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3591 s2 = (u32) len;
3592 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3593 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3594 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3595 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3596 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3597 reply_cb, reply_param);
3598 }
3599
3600 static int qeth_snmp_command_cb(struct qeth_card *card,
3601 struct qeth_reply *reply, unsigned long sdata)
3602 {
3603 struct qeth_ipa_cmd *cmd;
3604 struct qeth_arp_query_info *qinfo;
3605 struct qeth_snmp_cmd *snmp;
3606 unsigned char *data;
3607 __u16 data_len;
3608
3609 QETH_DBF_TEXT(trace, 3, "snpcmdcb");
3610
3611 cmd = (struct qeth_ipa_cmd *) sdata;
3612 data = (unsigned char *)((char *)cmd - reply->offset);
3613 qinfo = (struct qeth_arp_query_info *) reply->param;
3614 snmp = &cmd->data.setadapterparms.data.snmp;
3615
3616 if (cmd->hdr.return_code) {
3617 QETH_DBF_TEXT_(trace, 4, "scer1%i", cmd->hdr.return_code);
3618 return 0;
3619 }
3620 if (cmd->data.setadapterparms.hdr.return_code) {
3621 cmd->hdr.return_code =
3622 cmd->data.setadapterparms.hdr.return_code;
3623 QETH_DBF_TEXT_(trace, 4, "scer2%i", cmd->hdr.return_code);
3624 return 0;
3625 }
3626 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3627 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3628 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3629 else
3630 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3631
3632 /* check if there is enough room in userspace */
3633 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3634 QETH_DBF_TEXT_(trace, 4, "scer3%i", -ENOMEM);
3635 cmd->hdr.return_code = -ENOMEM;
3636 return 0;
3637 }
3638 QETH_DBF_TEXT_(trace, 4, "snore%i",
3639 cmd->data.setadapterparms.hdr.used_total);
3640 QETH_DBF_TEXT_(trace, 4, "sseqn%i",
3641 cmd->data.setadapterparms.hdr.seq_no);
3642 /*copy entries to user buffer*/
3643 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3644 memcpy(qinfo->udata + qinfo->udata_offset,
3645 (char *)snmp,
3646 data_len + offsetof(struct qeth_snmp_cmd, data));
3647 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3648 } else {
3649 memcpy(qinfo->udata + qinfo->udata_offset,
3650 (char *)&snmp->request, data_len);
3651 }
3652 qinfo->udata_offset += data_len;
3653 /* check if all replies received ... */
3654 QETH_DBF_TEXT_(trace, 4, "srtot%i",
3655 cmd->data.setadapterparms.hdr.used_total);
3656 QETH_DBF_TEXT_(trace, 4, "srseq%i",
3657 cmd->data.setadapterparms.hdr.seq_no);
3658 if (cmd->data.setadapterparms.hdr.seq_no <
3659 cmd->data.setadapterparms.hdr.used_total)
3660 return 1;
3661 return 0;
3662 }
3663
3664 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3665 {
3666 struct qeth_cmd_buffer *iob;
3667 struct qeth_ipa_cmd *cmd;
3668 struct qeth_snmp_ureq *ureq;
3669 int req_len;
3670 struct qeth_arp_query_info qinfo = {0, };
3671 int rc = 0;
3672
3673 QETH_DBF_TEXT(trace, 3, "snmpcmd");
3674
3675 if (card->info.guestlan)
3676 return -EOPNOTSUPP;
3677
3678 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3679 (!card->options.layer2)) {
3680 PRINT_WARN("SNMP Query MIBS not supported "
3681 "on %s!\n", QETH_CARD_IFNAME(card));
3682 return -EOPNOTSUPP;
3683 }
3684 /* skip 4 bytes (data_len struct member) to get req_len */
3685 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3686 return -EFAULT;
3687 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3688 if (!ureq) {
3689 QETH_DBF_TEXT(trace, 2, "snmpnome");
3690 return -ENOMEM;
3691 }
3692 if (copy_from_user(ureq, udata,
3693 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3694 kfree(ureq);
3695 return -EFAULT;
3696 }
3697 qinfo.udata_len = ureq->hdr.data_len;
3698 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3699 if (!qinfo.udata) {
3700 kfree(ureq);
3701 return -ENOMEM;
3702 }
3703 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3704
3705 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3706 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3707 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3708 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3709 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3710 qeth_snmp_command_cb, (void *)&qinfo);
3711 if (rc)
3712 PRINT_WARN("SNMP command failed on %s: (0x%x)\n",
3713 QETH_CARD_IFNAME(card), rc);
3714 else {
3715 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3716 rc = -EFAULT;
3717 }
3718
3719 kfree(ureq);
3720 kfree(qinfo.udata);
3721 return rc;
3722 }
3723 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3724
3725 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3726 {
3727 switch (card->info.type) {
3728 case QETH_CARD_TYPE_IQD:
3729 return 2;
3730 default:
3731 return 0;
3732 }
3733 }
3734
3735 static int qeth_qdio_establish(struct qeth_card *card)
3736 {
3737 struct qdio_initialize init_data;
3738 char *qib_param_field;
3739 struct qdio_buffer **in_sbal_ptrs;
3740 struct qdio_buffer **out_sbal_ptrs;
3741 int i, j, k;
3742 int rc = 0;
3743
3744 QETH_DBF_TEXT(setup, 2, "qdioest");
3745
3746 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3747 GFP_KERNEL);
3748 if (!qib_param_field)
3749 return -ENOMEM;
3750
3751 qeth_create_qib_param_field(card, qib_param_field);
3752 qeth_create_qib_param_field_blkt(card, qib_param_field);
3753
3754 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3755 GFP_KERNEL);
3756 if (!in_sbal_ptrs) {
3757 kfree(qib_param_field);
3758 return -ENOMEM;
3759 }
3760 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3761 in_sbal_ptrs[i] = (struct qdio_buffer *)
3762 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3763
3764 out_sbal_ptrs =
3765 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3766 sizeof(void *), GFP_KERNEL);
3767 if (!out_sbal_ptrs) {
3768 kfree(in_sbal_ptrs);
3769 kfree(qib_param_field);
3770 return -ENOMEM;
3771 }
3772 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3773 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3774 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3775 card->qdio.out_qs[i]->bufs[j].buffer);
3776 }
3777
3778 memset(&init_data, 0, sizeof(struct qdio_initialize));
3779 init_data.cdev = CARD_DDEV(card);
3780 init_data.q_format = qeth_get_qdio_q_format(card);
3781 init_data.qib_param_field_format = 0;
3782 init_data.qib_param_field = qib_param_field;
3783 init_data.min_input_threshold = QETH_MIN_INPUT_THRESHOLD;
3784 init_data.max_input_threshold = QETH_MAX_INPUT_THRESHOLD;
3785 init_data.min_output_threshold = QETH_MIN_OUTPUT_THRESHOLD;
3786 init_data.max_output_threshold = QETH_MAX_OUTPUT_THRESHOLD;
3787 init_data.no_input_qs = 1;
3788 init_data.no_output_qs = card->qdio.no_out_queues;
3789 init_data.input_handler = card->discipline.input_handler;
3790 init_data.output_handler = card->discipline.output_handler;
3791 init_data.int_parm = (unsigned long) card;
3792 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3793 QDIO_OUTBOUND_0COPY_SBALS |
3794 QDIO_USE_OUTBOUND_PCIS;
3795 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3796 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3797
3798 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3799 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3800 rc = qdio_initialize(&init_data);
3801 if (rc)
3802 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3803 }
3804 kfree(out_sbal_ptrs);
3805 kfree(in_sbal_ptrs);
3806 kfree(qib_param_field);
3807 return rc;
3808 }
3809
3810 static void qeth_core_free_card(struct qeth_card *card)
3811 {
3812
3813 QETH_DBF_TEXT(setup, 2, "freecrd");
3814 QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
3815 qeth_clean_channel(&card->read);
3816 qeth_clean_channel(&card->write);
3817 if (card->dev)
3818 free_netdev(card->dev);
3819 kfree(card->ip_tbd_list);
3820 qeth_free_qdio_buffers(card);
3821 kfree(card);
3822 }
3823
3824 static struct ccw_device_id qeth_ids[] = {
3825 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3826 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3827 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3828 {},
3829 };
3830 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3831
3832 static struct ccw_driver qeth_ccw_driver = {
3833 .name = "qeth",
3834 .ids = qeth_ids,
3835 .probe = ccwgroup_probe_ccwdev,
3836 .remove = ccwgroup_remove_ccwdev,
3837 };
3838
3839 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3840 unsigned long driver_id)
3841 {
3842 const char *start, *end;
3843 char bus_ids[3][BUS_ID_SIZE], *argv[3];
3844 int i;
3845
3846 start = buf;
3847 for (i = 0; i < 3; i++) {
3848 static const char delim[] = { ',', ',', '\n' };
3849 int len;
3850
3851 end = strchr(start, delim[i]);
3852 if (!end)
3853 return -EINVAL;
3854 len = min_t(ptrdiff_t, BUS_ID_SIZE, end - start);
3855 strncpy(bus_ids[i], start, len);
3856 bus_ids[i][len] = '\0';
3857 start = end + 1;
3858 argv[i] = bus_ids[i];
3859 }
3860
3861 return (ccwgroup_create(root_dev, driver_id,
3862 &qeth_ccw_driver, 3, argv));
3863 }
3864
3865 int qeth_core_hardsetup_card(struct qeth_card *card)
3866 {
3867 int retries = 3;
3868 int mpno;
3869 int rc;
3870
3871 QETH_DBF_TEXT(setup, 2, "hrdsetup");
3872 atomic_set(&card->force_alloc_skb, 0);
3873 retry:
3874 if (retries < 3) {
3875 PRINT_WARN("Retrying to do IDX activates.\n");
3876 ccw_device_set_offline(CARD_DDEV(card));
3877 ccw_device_set_offline(CARD_WDEV(card));
3878 ccw_device_set_offline(CARD_RDEV(card));
3879 ccw_device_set_online(CARD_RDEV(card));
3880 ccw_device_set_online(CARD_WDEV(card));
3881 ccw_device_set_online(CARD_DDEV(card));
3882 }
3883 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3884 if (rc == -ERESTARTSYS) {
3885 QETH_DBF_TEXT(setup, 2, "break1");
3886 return rc;
3887 } else if (rc) {
3888 QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
3889 if (--retries < 0)
3890 goto out;
3891 else
3892 goto retry;
3893 }
3894
3895 rc = qeth_get_unitaddr(card);
3896 if (rc) {
3897 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
3898 return rc;
3899 }
3900
3901 mpno = QETH_MAX_PORTNO;
3902 if (card->info.portno > mpno) {
3903 PRINT_ERR("Device %s does not offer port number %d \n.",
3904 CARD_BUS_ID(card), card->info.portno);
3905 rc = -ENODEV;
3906 goto out;
3907 }
3908 qeth_init_tokens(card);
3909 qeth_init_func_level(card);
3910 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3911 if (rc == -ERESTARTSYS) {
3912 QETH_DBF_TEXT(setup, 2, "break2");
3913 return rc;
3914 } else if (rc) {
3915 QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
3916 if (--retries < 0)
3917 goto out;
3918 else
3919 goto retry;
3920 }
3921 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3922 if (rc == -ERESTARTSYS) {
3923 QETH_DBF_TEXT(setup, 2, "break3");
3924 return rc;
3925 } else if (rc) {
3926 QETH_DBF_TEXT_(setup, 2, "4err%d", rc);
3927 if (--retries < 0)
3928 goto out;
3929 else
3930 goto retry;
3931 }
3932 rc = qeth_mpc_initialize(card);
3933 if (rc) {
3934 QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
3935 goto out;
3936 }
3937 return 0;
3938 out:
3939 PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc);
3940 return rc;
3941 }
3942 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3943
3944 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3945 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3946 {
3947 struct page *page = virt_to_page(element->addr);
3948 if (*pskb == NULL) {
3949 /* the upper protocol layers assume that there is data in the
3950 * skb itself. Copy a small amount (64 bytes) to make them
3951 * happy. */
3952 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3953 if (!(*pskb))
3954 return -ENOMEM;
3955 skb_reserve(*pskb, ETH_HLEN);
3956 if (data_len <= 64) {
3957 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3958 data_len);
3959 } else {
3960 get_page(page);
3961 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3962 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3963 data_len - 64);
3964 (*pskb)->data_len += data_len - 64;
3965 (*pskb)->len += data_len - 64;
3966 (*pskb)->truesize += data_len - 64;
3967 (*pfrag)++;
3968 }
3969 } else {
3970 get_page(page);
3971 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3972 (*pskb)->data_len += data_len;
3973 (*pskb)->len += data_len;
3974 (*pskb)->truesize += data_len;
3975 (*pfrag)++;
3976 }
3977 return 0;
3978 }
3979
3980 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3981 struct qdio_buffer *buffer,
3982 struct qdio_buffer_element **__element, int *__offset,
3983 struct qeth_hdr **hdr)
3984 {
3985 struct qdio_buffer_element *element = *__element;
3986 int offset = *__offset;
3987 struct sk_buff *skb = NULL;
3988 int skb_len;
3989 void *data_ptr;
3990 int data_len;
3991 int headroom = 0;
3992 int use_rx_sg = 0;
3993 int frag = 0;
3994
3995 QETH_DBF_TEXT(trace, 6, "nextskb");
3996 /* qeth_hdr must not cross element boundaries */
3997 if (element->length < offset + sizeof(struct qeth_hdr)) {
3998 if (qeth_is_last_sbale(element))
3999 return NULL;
4000 element++;
4001 offset = 0;
4002 if (element->length < sizeof(struct qeth_hdr))
4003 return NULL;
4004 }
4005 *hdr = element->addr + offset;
4006
4007 offset += sizeof(struct qeth_hdr);
4008 if (card->options.layer2) {
4009 if (card->info.type == QETH_CARD_TYPE_OSN) {
4010 skb_len = (*hdr)->hdr.osn.pdu_length;
4011 headroom = sizeof(struct qeth_hdr);
4012 } else {
4013 skb_len = (*hdr)->hdr.l2.pkt_length;
4014 }
4015 } else {
4016 skb_len = (*hdr)->hdr.l3.length;
4017 headroom = max((int)ETH_HLEN, (int)TR_HLEN);
4018 }
4019
4020 if (!skb_len)
4021 return NULL;
4022
4023 if ((skb_len >= card->options.rx_sg_cb) &&
4024 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4025 (!atomic_read(&card->force_alloc_skb))) {
4026 use_rx_sg = 1;
4027 } else {
4028 skb = dev_alloc_skb(skb_len + headroom);
4029 if (!skb)
4030 goto no_mem;
4031 if (headroom)
4032 skb_reserve(skb, headroom);
4033 }
4034
4035 data_ptr = element->addr + offset;
4036 while (skb_len) {
4037 data_len = min(skb_len, (int)(element->length - offset));
4038 if (data_len) {
4039 if (use_rx_sg) {
4040 if (qeth_create_skb_frag(element, &skb, offset,
4041 &frag, data_len))
4042 goto no_mem;
4043 } else {
4044 memcpy(skb_put(skb, data_len), data_ptr,
4045 data_len);
4046 }
4047 }
4048 skb_len -= data_len;
4049 if (skb_len) {
4050 if (qeth_is_last_sbale(element)) {
4051 QETH_DBF_TEXT(trace, 4, "unexeob");
4052 QETH_DBF_TEXT_(trace, 4, "%s",
4053 CARD_BUS_ID(card));
4054 QETH_DBF_TEXT(qerr, 2, "unexeob");
4055 QETH_DBF_TEXT_(qerr, 2, "%s",
4056 CARD_BUS_ID(card));
4057 QETH_DBF_HEX(misc, 4, buffer, sizeof(*buffer));
4058 dev_kfree_skb_any(skb);
4059 card->stats.rx_errors++;
4060 return NULL;
4061 }
4062 element++;
4063 offset = 0;
4064 data_ptr = element->addr;
4065 } else {
4066 offset += data_len;
4067 }
4068 }
4069 *__element = element;
4070 *__offset = offset;
4071 if (use_rx_sg && card->options.performance_stats) {
4072 card->perf_stats.sg_skbs_rx++;
4073 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4074 }
4075 return skb;
4076 no_mem:
4077 if (net_ratelimit()) {
4078 PRINT_WARN("No memory for packet received on %s.\n",
4079 QETH_CARD_IFNAME(card));
4080 QETH_DBF_TEXT(trace, 2, "noskbmem");
4081 QETH_DBF_TEXT_(trace, 2, "%s", CARD_BUS_ID(card));
4082 }
4083 card->stats.rx_dropped++;
4084 return NULL;
4085 }
4086 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4087
4088 static void qeth_unregister_dbf_views(void)
4089 {
4090 if (qeth_dbf_setup)
4091 debug_unregister(qeth_dbf_setup);
4092 if (qeth_dbf_qerr)
4093 debug_unregister(qeth_dbf_qerr);
4094 if (qeth_dbf_sense)
4095 debug_unregister(qeth_dbf_sense);
4096 if (qeth_dbf_misc)
4097 debug_unregister(qeth_dbf_misc);
4098 if (qeth_dbf_data)
4099 debug_unregister(qeth_dbf_data);
4100 if (qeth_dbf_control)
4101 debug_unregister(qeth_dbf_control);
4102 if (qeth_dbf_trace)
4103 debug_unregister(qeth_dbf_trace);
4104 }
4105
4106 static int qeth_register_dbf_views(void)
4107 {
4108 qeth_dbf_setup = debug_register(QETH_DBF_SETUP_NAME,
4109 QETH_DBF_SETUP_PAGES,
4110 QETH_DBF_SETUP_NR_AREAS,
4111 QETH_DBF_SETUP_LEN);
4112 qeth_dbf_misc = debug_register(QETH_DBF_MISC_NAME,
4113 QETH_DBF_MISC_PAGES,
4114 QETH_DBF_MISC_NR_AREAS,
4115 QETH_DBF_MISC_LEN);
4116 qeth_dbf_data = debug_register(QETH_DBF_DATA_NAME,
4117 QETH_DBF_DATA_PAGES,
4118 QETH_DBF_DATA_NR_AREAS,
4119 QETH_DBF_DATA_LEN);
4120 qeth_dbf_control = debug_register(QETH_DBF_CONTROL_NAME,
4121 QETH_DBF_CONTROL_PAGES,
4122 QETH_DBF_CONTROL_NR_AREAS,
4123 QETH_DBF_CONTROL_LEN);
4124 qeth_dbf_sense = debug_register(QETH_DBF_SENSE_NAME,
4125 QETH_DBF_SENSE_PAGES,
4126 QETH_DBF_SENSE_NR_AREAS,
4127 QETH_DBF_SENSE_LEN);
4128 qeth_dbf_qerr = debug_register(QETH_DBF_QERR_NAME,
4129 QETH_DBF_QERR_PAGES,
4130 QETH_DBF_QERR_NR_AREAS,
4131 QETH_DBF_QERR_LEN);
4132 qeth_dbf_trace = debug_register(QETH_DBF_TRACE_NAME,
4133 QETH_DBF_TRACE_PAGES,
4134 QETH_DBF_TRACE_NR_AREAS,
4135 QETH_DBF_TRACE_LEN);
4136
4137 if ((qeth_dbf_setup == NULL) || (qeth_dbf_misc == NULL) ||
4138 (qeth_dbf_data == NULL) || (qeth_dbf_control == NULL) ||
4139 (qeth_dbf_sense == NULL) || (qeth_dbf_qerr == NULL) ||
4140 (qeth_dbf_trace == NULL)) {
4141 qeth_unregister_dbf_views();
4142 return -ENOMEM;
4143 }
4144 debug_register_view(qeth_dbf_setup, &debug_hex_ascii_view);
4145 debug_set_level(qeth_dbf_setup, QETH_DBF_SETUP_LEVEL);
4146
4147 debug_register_view(qeth_dbf_misc, &debug_hex_ascii_view);
4148 debug_set_level(qeth_dbf_misc, QETH_DBF_MISC_LEVEL);
4149
4150 debug_register_view(qeth_dbf_data, &debug_hex_ascii_view);
4151 debug_set_level(qeth_dbf_data, QETH_DBF_DATA_LEVEL);
4152
4153 debug_register_view(qeth_dbf_control, &debug_hex_ascii_view);
4154 debug_set_level(qeth_dbf_control, QETH_DBF_CONTROL_LEVEL);
4155
4156 debug_register_view(qeth_dbf_sense, &debug_hex_ascii_view);
4157 debug_set_level(qeth_dbf_sense, QETH_DBF_SENSE_LEVEL);
4158
4159 debug_register_view(qeth_dbf_qerr, &debug_hex_ascii_view);
4160 debug_set_level(qeth_dbf_qerr, QETH_DBF_QERR_LEVEL);
4161
4162 debug_register_view(qeth_dbf_trace, &debug_hex_ascii_view);
4163 debug_set_level(qeth_dbf_trace, QETH_DBF_TRACE_LEVEL);
4164
4165 return 0;
4166 }
4167
4168 int qeth_core_load_discipline(struct qeth_card *card,
4169 enum qeth_discipline_id discipline)
4170 {
4171 int rc = 0;
4172 switch (discipline) {
4173 case QETH_DISCIPLINE_LAYER3:
4174 card->discipline.ccwgdriver = try_then_request_module(
4175 symbol_get(qeth_l3_ccwgroup_driver),
4176 "qeth_l3");
4177 break;
4178 case QETH_DISCIPLINE_LAYER2:
4179 card->discipline.ccwgdriver = try_then_request_module(
4180 symbol_get(qeth_l2_ccwgroup_driver),
4181 "qeth_l2");
4182 break;
4183 }
4184 if (!card->discipline.ccwgdriver) {
4185 PRINT_ERR("Support for discipline %d not present\n",
4186 discipline);
4187 rc = -EINVAL;
4188 }
4189 return rc;
4190 }
4191
4192 void qeth_core_free_discipline(struct qeth_card *card)
4193 {
4194 if (card->options.layer2)
4195 symbol_put(qeth_l2_ccwgroup_driver);
4196 else
4197 symbol_put(qeth_l3_ccwgroup_driver);
4198 card->discipline.ccwgdriver = NULL;
4199 }
4200
4201 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4202 {
4203 struct qeth_card *card;
4204 struct device *dev;
4205 int rc;
4206 unsigned long flags;
4207
4208 QETH_DBF_TEXT(setup, 2, "probedev");
4209
4210 dev = &gdev->dev;
4211 if (!get_device(dev))
4212 return -ENODEV;
4213
4214 QETH_DBF_TEXT_(setup, 2, "%s", gdev->dev.bus_id);
4215
4216 card = qeth_alloc_card();
4217 if (!card) {
4218 QETH_DBF_TEXT_(setup, 2, "1err%d", -ENOMEM);
4219 rc = -ENOMEM;
4220 goto err_dev;
4221 }
4222 card->read.ccwdev = gdev->cdev[0];
4223 card->write.ccwdev = gdev->cdev[1];
4224 card->data.ccwdev = gdev->cdev[2];
4225 dev_set_drvdata(&gdev->dev, card);
4226 card->gdev = gdev;
4227 gdev->cdev[0]->handler = qeth_irq;
4228 gdev->cdev[1]->handler = qeth_irq;
4229 gdev->cdev[2]->handler = qeth_irq;
4230
4231 rc = qeth_determine_card_type(card);
4232 if (rc) {
4233 PRINT_WARN("%s: not a valid card type\n", __func__);
4234 QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
4235 goto err_card;
4236 }
4237 rc = qeth_setup_card(card);
4238 if (rc) {
4239 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
4240 goto err_card;
4241 }
4242
4243 if (card->info.type == QETH_CARD_TYPE_OSN) {
4244 rc = qeth_core_create_osn_attributes(dev);
4245 if (rc)
4246 goto err_card;
4247 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4248 if (rc) {
4249 qeth_core_remove_osn_attributes(dev);
4250 goto err_card;
4251 }
4252 rc = card->discipline.ccwgdriver->probe(card->gdev);
4253 if (rc) {
4254 qeth_core_free_discipline(card);
4255 qeth_core_remove_osn_attributes(dev);
4256 goto err_card;
4257 }
4258 } else {
4259 rc = qeth_core_create_device_attributes(dev);
4260 if (rc)
4261 goto err_card;
4262 }
4263
4264 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4265 list_add_tail(&card->list, &qeth_core_card_list.list);
4266 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4267 return 0;
4268
4269 err_card:
4270 qeth_core_free_card(card);
4271 err_dev:
4272 put_device(dev);
4273 return rc;
4274 }
4275
4276 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4277 {
4278 unsigned long flags;
4279 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4280
4281 if (card->discipline.ccwgdriver) {
4282 card->discipline.ccwgdriver->remove(gdev);
4283 qeth_core_free_discipline(card);
4284 }
4285
4286 if (card->info.type == QETH_CARD_TYPE_OSN) {
4287 qeth_core_remove_osn_attributes(&gdev->dev);
4288 } else {
4289 qeth_core_remove_device_attributes(&gdev->dev);
4290 }
4291 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4292 list_del(&card->list);
4293 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4294 qeth_core_free_card(card);
4295 dev_set_drvdata(&gdev->dev, NULL);
4296 put_device(&gdev->dev);
4297 return;
4298 }
4299
4300 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4301 {
4302 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4303 int rc = 0;
4304 int def_discipline;
4305
4306 if (!card->discipline.ccwgdriver) {
4307 if (card->info.type == QETH_CARD_TYPE_IQD)
4308 def_discipline = QETH_DISCIPLINE_LAYER3;
4309 else
4310 def_discipline = QETH_DISCIPLINE_LAYER2;
4311 rc = qeth_core_load_discipline(card, def_discipline);
4312 if (rc)
4313 goto err;
4314 rc = card->discipline.ccwgdriver->probe(card->gdev);
4315 if (rc)
4316 goto err;
4317 }
4318 rc = card->discipline.ccwgdriver->set_online(gdev);
4319 err:
4320 return rc;
4321 }
4322
4323 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4324 {
4325 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4326 return card->discipline.ccwgdriver->set_offline(gdev);
4327 }
4328
4329 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4330 {
4331 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4332 if (card->discipline.ccwgdriver &&
4333 card->discipline.ccwgdriver->shutdown)
4334 card->discipline.ccwgdriver->shutdown(gdev);
4335 }
4336
4337 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4338 .owner = THIS_MODULE,
4339 .name = "qeth",
4340 .driver_id = 0xD8C5E3C8,
4341 .probe = qeth_core_probe_device,
4342 .remove = qeth_core_remove_device,
4343 .set_online = qeth_core_set_online,
4344 .set_offline = qeth_core_set_offline,
4345 .shutdown = qeth_core_shutdown,
4346 };
4347
4348 static ssize_t
4349 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4350 size_t count)
4351 {
4352 int err;
4353 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4354 qeth_core_ccwgroup_driver.driver_id);
4355 if (err)
4356 return err;
4357 else
4358 return count;
4359 }
4360
4361 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4362
4363 static struct {
4364 const char str[ETH_GSTRING_LEN];
4365 } qeth_ethtool_stats_keys[] = {
4366 /* 0 */{"rx skbs"},
4367 {"rx buffers"},
4368 {"tx skbs"},
4369 {"tx buffers"},
4370 {"tx skbs no packing"},
4371 {"tx buffers no packing"},
4372 {"tx skbs packing"},
4373 {"tx buffers packing"},
4374 {"tx sg skbs"},
4375 {"tx sg frags"},
4376 /* 10 */{"rx sg skbs"},
4377 {"rx sg frags"},
4378 {"rx sg page allocs"},
4379 {"tx large kbytes"},
4380 {"tx large count"},
4381 {"tx pk state ch n->p"},
4382 {"tx pk state ch p->n"},
4383 {"tx pk watermark low"},
4384 {"tx pk watermark high"},
4385 {"queue 0 buffer usage"},
4386 /* 20 */{"queue 1 buffer usage"},
4387 {"queue 2 buffer usage"},
4388 {"queue 3 buffer usage"},
4389 {"rx handler time"},
4390 {"rx handler count"},
4391 {"rx do_QDIO time"},
4392 {"rx do_QDIO count"},
4393 {"tx handler time"},
4394 {"tx handler count"},
4395 {"tx time"},
4396 /* 30 */{"tx count"},
4397 {"tx do_QDIO time"},
4398 {"tx do_QDIO count"},
4399 };
4400
4401 int qeth_core_get_stats_count(struct net_device *dev)
4402 {
4403 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4404 }
4405 EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4406
4407 void qeth_core_get_ethtool_stats(struct net_device *dev,
4408 struct ethtool_stats *stats, u64 *data)
4409 {
4410 struct qeth_card *card = netdev_priv(dev);
4411 data[0] = card->stats.rx_packets -
4412 card->perf_stats.initial_rx_packets;
4413 data[1] = card->perf_stats.bufs_rec;
4414 data[2] = card->stats.tx_packets -
4415 card->perf_stats.initial_tx_packets;
4416 data[3] = card->perf_stats.bufs_sent;
4417 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4418 - card->perf_stats.skbs_sent_pack;
4419 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4420 data[6] = card->perf_stats.skbs_sent_pack;
4421 data[7] = card->perf_stats.bufs_sent_pack;
4422 data[8] = card->perf_stats.sg_skbs_sent;
4423 data[9] = card->perf_stats.sg_frags_sent;
4424 data[10] = card->perf_stats.sg_skbs_rx;
4425 data[11] = card->perf_stats.sg_frags_rx;
4426 data[12] = card->perf_stats.sg_alloc_page_rx;
4427 data[13] = (card->perf_stats.large_send_bytes >> 10);
4428 data[14] = card->perf_stats.large_send_cnt;
4429 data[15] = card->perf_stats.sc_dp_p;
4430 data[16] = card->perf_stats.sc_p_dp;
4431 data[17] = QETH_LOW_WATERMARK_PACK;
4432 data[18] = QETH_HIGH_WATERMARK_PACK;
4433 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4434 data[20] = (card->qdio.no_out_queues > 1) ?
4435 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4436 data[21] = (card->qdio.no_out_queues > 2) ?
4437 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4438 data[22] = (card->qdio.no_out_queues > 3) ?
4439 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4440 data[23] = card->perf_stats.inbound_time;
4441 data[24] = card->perf_stats.inbound_cnt;
4442 data[25] = card->perf_stats.inbound_do_qdio_time;
4443 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4444 data[27] = card->perf_stats.outbound_handler_time;
4445 data[28] = card->perf_stats.outbound_handler_cnt;
4446 data[29] = card->perf_stats.outbound_time;
4447 data[30] = card->perf_stats.outbound_cnt;
4448 data[31] = card->perf_stats.outbound_do_qdio_time;
4449 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4450 }
4451 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4452
4453 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4454 {
4455 switch (stringset) {
4456 case ETH_SS_STATS:
4457 memcpy(data, &qeth_ethtool_stats_keys,
4458 sizeof(qeth_ethtool_stats_keys));
4459 break;
4460 default:
4461 WARN_ON(1);
4462 break;
4463 }
4464 }
4465 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4466
4467 void qeth_core_get_drvinfo(struct net_device *dev,
4468 struct ethtool_drvinfo *info)
4469 {
4470 struct qeth_card *card = netdev_priv(dev);
4471 if (card->options.layer2)
4472 strcpy(info->driver, "qeth_l2");
4473 else
4474 strcpy(info->driver, "qeth_l3");
4475
4476 strcpy(info->version, "1.0");
4477 strcpy(info->fw_version, card->info.mcl_level);
4478 sprintf(info->bus_info, "%s/%s/%s",
4479 CARD_RDEV_ID(card),
4480 CARD_WDEV_ID(card),
4481 CARD_DDEV_ID(card));
4482 }
4483 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4484
4485 static int __init qeth_core_init(void)
4486 {
4487 int rc;
4488
4489 PRINT_INFO("loading core functions\n");
4490 INIT_LIST_HEAD(&qeth_core_card_list.list);
4491 rwlock_init(&qeth_core_card_list.rwlock);
4492
4493 rc = qeth_register_dbf_views();
4494 if (rc)
4495 goto out_err;
4496 rc = ccw_driver_register(&qeth_ccw_driver);
4497 if (rc)
4498 goto ccw_err;
4499 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4500 if (rc)
4501 goto ccwgroup_err;
4502 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4503 &driver_attr_group);
4504 if (rc)
4505 goto driver_err;
4506 qeth_core_root_dev = s390_root_dev_register("qeth");
4507 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4508 if (rc)
4509 goto register_err;
4510 return 0;
4511
4512 register_err:
4513 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4514 &driver_attr_group);
4515 driver_err:
4516 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4517 ccwgroup_err:
4518 ccw_driver_unregister(&qeth_ccw_driver);
4519 ccw_err:
4520 qeth_unregister_dbf_views();
4521 out_err:
4522 PRINT_ERR("Initialization failed with code %d\n", rc);
4523 return rc;
4524 }
4525
4526 static void __exit qeth_core_exit(void)
4527 {
4528 s390_root_dev_unregister(qeth_core_root_dev);
4529 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4530 &driver_attr_group);
4531 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4532 ccw_driver_unregister(&qeth_ccw_driver);
4533 qeth_unregister_dbf_views();
4534 PRINT_INFO("core functions removed\n");
4535 }
4536
4537 module_init(qeth_core_init);
4538 module_exit(qeth_core_exit);
4539 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4540 MODULE_DESCRIPTION("qeth core functions");
4541 MODULE_LICENSE("GPL");
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