arch/powerpc/platforms/83xx/mpc832x_mds.c

   1 /*
   2  * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
   3  *
   4  * Description:
   5  * MPC832xE MDS board specific routines.
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  */
  12
  13 #include <linux/stddef.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/errno.h>
  17 #include <linux/reboot.h>
  18 #include <linux/pci.h>
  19 #include <linux/kdev_t.h>
  20 #include <linux/major.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/seq_file.h>
  24 #include <linux/root_dev.h>
  25 #include <linux/initrd.h>
  26
  27 #include <asm/of_device.h>
  28 #include <asm/system.h>
  29 #include <asm/atomic.h>
  30 #include <asm/time.h>
  31 #include <asm/io.h>
  32 #include <asm/machdep.h>
  33 #include <asm/ipic.h>
  34 #include <asm/bootinfo.h>
  35 #include <asm/irq.h>
  36 #include <asm/prom.h>
  37 #include <asm/udbg.h>
  38 #include <sysdev/fsl_soc.h>
  39 #include <asm/qe.h>
  40 #include <asm/qe_ic.h>
  41
  42 #include "mpc83xx.h"
  43 #include "mpc832x_mds.h"
  44
  45 #undef DEBUG
  46 #ifdef DEBUG
  47 #define DBG(fmt...) udbg_printf(fmt)
  48 #else
  49 #define DBG(fmt...)
  50 #endif
  51
  52 #ifndef CONFIG_PCI
  53 unsigned long isa_io_base = 0;
  54 unsigned long isa_mem_base = 0;
  55 #endif
  56
  57 static u8 *bcsr_regs = NULL;
  58
  59 u8 *get_bcsr(void)
  60 {
  61         return bcsr_regs;
  62 }
  63
  64 /* ************************************************************************
  65  *
  66  * Setup the architecture
  67  *
  68  */
  69 static void __init mpc832x_sys_setup_arch(void)
  70 {
  71         struct device_node *np;
  72
  73         if (ppc_md.progress)
  74                 ppc_md.progress("mpc832x_sys_setup_arch()", 0);
  75
  76         np = of_find_node_by_type(NULL, "cpu");
  77         if (np != 0) {
  78                 unsigned int *fp =
  79                     (int *)get_property(np, "clock-frequency", NULL);
  80                 if (fp != 0)
  81                         loops_per_jiffy = *fp / HZ;
  82                 else
  83                         loops_per_jiffy = 50000000 / HZ;
  84                 of_node_put(np);
  85         }
  86
  87         /* Map BCSR area */
  88         np = of_find_node_by_name(NULL, "bcsr");
  89         if (np != 0) {
  90                 struct resource res;
  91
  92                 of_address_to_resource(np, 0, &res);
  93                 bcsr_regs = ioremap(res.start, res.end - res.start +1);
  94                 of_node_put(np);
  95         }
  96
  97 #ifdef CONFIG_PCI
  98         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
  99                 add_bridge(np);
 100
 101         ppc_md.pci_swizzle = common_swizzle;
 102         ppc_md.pci_exclude_device = mpc83xx_exclude_device;
 103 #endif
 104
 105 #ifdef CONFIG_QUICC_ENGINE
 106         qe_reset();
 107
 108         if ((np = of_find_node_by_name(np, "par_io")) != NULL) {
 109                 par_io_init(np);
 110                 of_node_put(np);
 111
 112                 for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
 113                         par_io_of_config(np);
 114         }
 115
 116         if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
 117                         != NULL){
 118                 /* Reset the Ethernet PHY */
 119                 bcsr_regs[9] &= ~0x20;
 120                 udelay(1000);
 121                 bcsr_regs[9] |= 0x20;
 122                 iounmap(bcsr_regs);
 123                 of_node_put(np);
 124         }
 125
 126 #endif                          /* CONFIG_QUICC_ENGINE */
 127
 128 #ifdef CONFIG_BLK_DEV_INITRD
 129         if (initrd_start)
 130                 ROOT_DEV = Root_RAM0;
 131         else
 132 #endif
 133 #ifdef  CONFIG_ROOT_NFS
 134                 ROOT_DEV = Root_NFS;
 135 #else
 136                 ROOT_DEV = Root_HDA1;
 137 #endif
 138 }
 139
 140 static int __init mpc832x_declare_of_platform_devices(void)
 141 {
 142         struct device_node *np;
 143
 144         for (np = NULL; (np = of_find_compatible_node(np, "network",
 145                                         "ucc_geth")) != NULL;) {
 146                 int ucc_num;
 147                 char bus_id[BUS_ID_SIZE];
 148
 149                 ucc_num = *((uint *) get_property(np, "device-id", NULL)) - 1;
 150                 snprintf(bus_id, BUS_ID_SIZE, "ucc_geth.%u", ucc_num);
 151                 of_platform_device_create(np, bus_id, NULL);
 152         }
 153
 154         return 0;
 155 }
 156 device_initcall(mpc832x_declare_of_platform_devices);
 157
 158 void __init mpc832x_sys_init_IRQ(void)
 159 {
 160
 161         struct device_node *np;
 162
 163         np = of_find_node_by_type(NULL, "ipic");
 164         if (!np)
 165                 return;
 166
 167         ipic_init(np, 0);
 168
 169         /* Initialize the default interrupt mapping priorities,
 170          * in case the boot rom changed something on us.
 171          */
 172         ipic_set_default_priority();
 173         of_node_put(np);
 174
 175 #ifdef CONFIG_QUICC_ENGINE
 176         np = of_find_node_by_type(NULL, "qeic");
 177         if (!np)
 178                 return;
 179
 180         qe_ic_init(np, 0);
 181         of_node_put(np);
 182 #endif                          /* CONFIG_QUICC_ENGINE */
 183 }
 184
 185 #if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
 186 extern ulong ds1374_get_rtc_time(void);
 187 extern int ds1374_set_rtc_time(ulong);
 188
 189 static int __init mpc832x_rtc_hookup(void)
 190 {
 191         struct timespec tv;
 192
 193         ppc_md.get_rtc_time = ds1374_get_rtc_time;
 194         ppc_md.set_rtc_time = ds1374_set_rtc_time;
 195
 196         tv.tv_nsec = 0;
 197         tv.tv_sec = (ppc_md.get_rtc_time) ();
 198         do_settimeofday(&tv);
 199
 200         return 0;
 201 }
 202
 203 late_initcall(mpc832x_rtc_hookup);
 204 #endif
 205
 206 /*
 207  * Called very early, MMU is off, device-tree isn't unflattened
 208  */
 209 static int __init mpc832x_sys_probe(void)
 210 {
 211         char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
 212                                           "model", NULL);
 213
 214         if (model == NULL)
 215                 return 0;
 216         if (strcmp(model, "MPC8323EMDS"))
 217                 return 0;
 218
 219         DBG("%s found\n", model);
 220
 221         return 1;
 222 }
 223
 224 define_machine(mpc832x_mds) {
 225         .name           = "MPC832x MDS",
 226         .probe          = mpc832x_sys_probe,
 227         .setup_arch     = mpc832x_sys_setup_arch,
 228         .init_IRQ       = mpc832x_sys_init_IRQ,
 229         .get_irq        = ipic_get_irq,
 230         .restart        = mpc83xx_restart,
 231         .time_init      = mpc83xx_time_init,
 232         .calibrate_decr = generic_calibrate_decr,
 233         .progress       = udbg_progress,
 234 };