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iwlwifi: initialize geo/channel information during probe
[linux-2.6/verdex.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
blob77c635287035c406fd698edb2f3e81f41ebe8de0
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/version.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #include "iwl-4965.h"
49 #include "iwl-helpers.h"
50
51 #ifdef CONFIG_IWL4965_DEBUG
52 u32 iwl4965_debug_level;
53 #endif
54
55 static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
56 struct iwl4965_tx_queue *txq);
57
58 /******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64 /* module parameters */
65 static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
66 static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
67 static int iwl4965_param_disable; /* def: enable radio */
68 static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
69 int iwl4965_param_hwcrypto; /* def: using software encryption */
70 static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
71 int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
72 int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
73
74 /*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
80
81 #ifdef CONFIG_IWL4965_DEBUG
82 #define VD "d"
83 #else
84 #define VD
85 #endif
86
87 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
88 #define VS "s"
89 #else
90 #define VS
91 #endif
92
93 #define IWLWIFI_VERSION "1.2.23k" VD VS
94 #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
95 #define DRV_VERSION IWLWIFI_VERSION
96
97 /* Change firmware file name, using "-" and incrementing number,
98 * *only* when uCode interface or architecture changes so that it
99 * is not compatible with earlier drivers.
100 * This number will also appear in << 8 position of 1st dword of uCode file */
101 #define IWL4965_UCODE_API "-1"
102
103 MODULE_DESCRIPTION(DRV_DESCRIPTION);
104 MODULE_VERSION(DRV_VERSION);
105 MODULE_AUTHOR(DRV_COPYRIGHT);
106 MODULE_LICENSE("GPL");
107
108 __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
109 {
110 u16 fc = le16_to_cpu(hdr->frame_control);
111 int hdr_len = ieee80211_get_hdrlen(fc);
112
113 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
114 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
115 return NULL;
116 }
117
118 static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
119 struct iwl4965_priv *priv, int mode)
120 {
121 int i;
122
123 for (i = 0; i < 3; i++)
124 if (priv->modes[i].mode == mode)
125 return &priv->modes[i];
126
127 return NULL;
128 }
129
130 static int iwl4965_is_empty_essid(const char *essid, int essid_len)
131 {
132 /* Single white space is for Linksys APs */
133 if (essid_len == 1 && essid[0] == ' ')
134 return 1;
135
136 /* Otherwise, if the entire essid is 0, we assume it is hidden */
137 while (essid_len) {
138 essid_len--;
139 if (essid[essid_len] != '\0')
140 return 0;
141 }
142
143 return 1;
144 }
145
146 static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
147 {
148 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
149 const char *s = essid;
150 char *d = escaped;
151
152 if (iwl4965_is_empty_essid(essid, essid_len)) {
153 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
154 return escaped;
155 }
156
157 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
158 while (essid_len--) {
159 if (*s == '\0') {
160 *d++ = '\\';
161 *d++ = '0';
162 s++;
163 } else
164 *d++ = *s++;
165 }
166 *d = '\0';
167 return escaped;
168 }
169
170 static void iwl4965_print_hex_dump(int level, void *p, u32 len)
171 {
172 #ifdef CONFIG_IWL4965_DEBUG
173 if (!(iwl4965_debug_level & level))
174 return;
175
176 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
177 p, len, 1);
178 #endif
179 }
180
181 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
182 * DMA services
183 *
184 * Theory of operation
185 *
186 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
187 * of buffer descriptors, each of which points to one or more data buffers for
188 * the device to read from or fill. Driver and device exchange status of each
189 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
190 * entries in each circular buffer, to protect against confusing empty and full
191 * queue states.
192 *
193 * The device reads or writes the data in the queues via the device's several
194 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
195 *
196 * For Tx queue, there are low mark and high mark limits. If, after queuing
197 * the packet for Tx, free space become < low mark, Tx queue stopped. When
198 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
199 * Tx queue resumed.
200 *
201 * The 4965 operates with up to 17 queues: One receive queue, one transmit
202 * queue (#4) for sending commands to the device firmware, and 15 other
203 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
204 *
205 * See more detailed info in iwl-4965-hw.h.
206 ***************************************************/
207
208 static int iwl4965_queue_space(const struct iwl4965_queue *q)
209 {
210 int s = q->read_ptr - q->write_ptr;
211
212 if (q->read_ptr > q->write_ptr)
213 s -= q->n_bd;
214
215 if (s <= 0)
216 s += q->n_window;
217 /* keep some reserve to not confuse empty and full situations */
218 s -= 2;
219 if (s < 0)
220 s = 0;
221 return s;
222 }
223
224 /**
225 * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
226 * @index -- current index
227 * @n_bd -- total number of entries in queue (must be power of 2)
228 */
229 static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
230 {
231 return ++index & (n_bd - 1);
232 }
233
234 /**
235 * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
236 * @index -- current index
237 * @n_bd -- total number of entries in queue (must be power of 2)
238 */
239 static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
240 {
241 return --index & (n_bd - 1);
242 }
243
244 static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
245 {
246 return q->write_ptr > q->read_ptr ?
247 (i >= q->read_ptr && i < q->write_ptr) :
248 !(i < q->read_ptr && i >= q->write_ptr);
249 }
250
251 static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
252 {
253 /* This is for scan command, the big buffer at end of command array */
254 if (is_huge)
255 return q->n_window; /* must be power of 2 */
256
257 /* Otherwise, use normal size buffers */
258 return index & (q->n_window - 1);
259 }
260
261 /**
262 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
263 */
264 static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
265 int count, int slots_num, u32 id)
266 {
267 q->n_bd = count;
268 q->n_window = slots_num;
269 q->id = id;
270
271 /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
272 * and iwl4965_queue_dec_wrap are broken. */
273 BUG_ON(!is_power_of_2(count));
274
275 /* slots_num must be power-of-two size, otherwise
276 * get_cmd_index is broken. */
277 BUG_ON(!is_power_of_2(slots_num));
278
279 q->low_mark = q->n_window / 4;
280 if (q->low_mark < 4)
281 q->low_mark = 4;
282
283 q->high_mark = q->n_window / 8;
284 if (q->high_mark < 2)
285 q->high_mark = 2;
286
287 q->write_ptr = q->read_ptr = 0;
288
289 return 0;
290 }
291
292 /**
293 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
294 */
295 static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
296 struct iwl4965_tx_queue *txq, u32 id)
297 {
298 struct pci_dev *dev = priv->pci_dev;
299
300 /* Driver private data, only for Tx (not command) queues,
301 * not shared with device. */
302 if (id != IWL_CMD_QUEUE_NUM) {
303 txq->txb = kmalloc(sizeof(txq->txb[0]) *
304 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
305 if (!txq->txb) {
306 IWL_ERROR("kmalloc for auxiliary BD "
307 "structures failed\n");
308 goto error;
309 }
310 } else
311 txq->txb = NULL;
312
313 /* Circular buffer of transmit frame descriptors (TFDs),
314 * shared with device */
315 txq->bd = pci_alloc_consistent(dev,
316 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
317 &txq->q.dma_addr);
318
319 if (!txq->bd) {
320 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
321 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
322 goto error;
323 }
324 txq->q.id = id;
325
326 return 0;
327
328 error:
329 if (txq->txb) {
330 kfree(txq->txb);
331 txq->txb = NULL;
332 }
333
334 return -ENOMEM;
335 }
336
337 /**
338 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
339 */
340 int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
341 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
342 {
343 struct pci_dev *dev = priv->pci_dev;
344 int len;
345 int rc = 0;
346
347 /*
348 * Alloc buffer array for commands (Tx or other types of commands).
349 * For the command queue (#4), allocate command space + one big
350 * command for scan, since scan command is very huge; the system will
351 * not have two scans at the same time, so only one is needed.
352 * For normal Tx queues (all other queues), no super-size command
353 * space is needed.
354 */
355 len = sizeof(struct iwl4965_cmd) * slots_num;
356 if (txq_id == IWL_CMD_QUEUE_NUM)
357 len += IWL_MAX_SCAN_SIZE;
358 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
359 if (!txq->cmd)
360 return -ENOMEM;
361
362 /* Alloc driver data array and TFD circular buffer */
363 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
364 if (rc) {
365 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
366
367 return -ENOMEM;
368 }
369 txq->need_update = 0;
370
371 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
372 * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
373 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
374
375 /* Initialize queue's high/low-water marks, and head/tail indexes */
376 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
377
378 /* Tell device where to find queue */
379 iwl4965_hw_tx_queue_init(priv, txq);
380
381 return 0;
382 }
383
384 /**
385 * iwl4965_tx_queue_free - Deallocate DMA queue.
386 * @txq: Transmit queue to deallocate.
387 *
388 * Empty queue by removing and destroying all BD's.
389 * Free all buffers.
390 * 0-fill, but do not free "txq" descriptor structure.
391 */
392 void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
393 {
394 struct iwl4965_queue *q = &txq->q;
395 struct pci_dev *dev = priv->pci_dev;
396 int len;
397
398 if (q->n_bd == 0)
399 return;
400
401 /* first, empty all BD's */
402 for (; q->write_ptr != q->read_ptr;
403 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
404 iwl4965_hw_txq_free_tfd(priv, txq);
405
406 len = sizeof(struct iwl4965_cmd) * q->n_window;
407 if (q->id == IWL_CMD_QUEUE_NUM)
408 len += IWL_MAX_SCAN_SIZE;
409
410 /* De-alloc array of command/tx buffers */
411 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
412
413 /* De-alloc circular buffer of TFDs */
414 if (txq->q.n_bd)
415 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
416 txq->q.n_bd, txq->bd, txq->q.dma_addr);
417
418 /* De-alloc array of per-TFD driver data */
419 if (txq->txb) {
420 kfree(txq->txb);
421 txq->txb = NULL;
422 }
423
424 /* 0-fill queue descriptor structure */
425 memset(txq, 0, sizeof(*txq));
426 }
427
428 const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
429
430 /*************** STATION TABLE MANAGEMENT ****
431 * mac80211 should be examined to determine if sta_info is duplicating
432 * the functionality provided here
433 */
434
435 /**************************************************************/
436
437 #if 0 /* temporary disable till we add real remove station */
438 /**
439 * iwl4965_remove_station - Remove driver's knowledge of station.
440 *
441 * NOTE: This does not remove station from device's station table.
442 */
443 static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
444 {
445 int index = IWL_INVALID_STATION;
446 int i;
447 unsigned long flags;
448
449 spin_lock_irqsave(&priv->sta_lock, flags);
450
451 if (is_ap)
452 index = IWL_AP_ID;
453 else if (is_broadcast_ether_addr(addr))
454 index = priv->hw_setting.bcast_sta_id;
455 else
456 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
457 if (priv->stations[i].used &&
458 !compare_ether_addr(priv->stations[i].sta.sta.addr,
459 addr)) {
460 index = i;
461 break;
462 }
463
464 if (unlikely(index == IWL_INVALID_STATION))
465 goto out;
466
467 if (priv->stations[index].used) {
468 priv->stations[index].used = 0;
469 priv->num_stations--;
470 }
471
472 BUG_ON(priv->num_stations < 0);
473
474 out:
475 spin_unlock_irqrestore(&priv->sta_lock, flags);
476 return 0;
477 }
478 #endif
479
480 /**
481 * iwl4965_clear_stations_table - Clear the driver's station table
482 *
483 * NOTE: This does not clear or otherwise alter the device's station table.
484 */
485 static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
486 {
487 unsigned long flags;
488
489 spin_lock_irqsave(&priv->sta_lock, flags);
490
491 priv->num_stations = 0;
492 memset(priv->stations, 0, sizeof(priv->stations));
493
494 spin_unlock_irqrestore(&priv->sta_lock, flags);
495 }
496
497 /**
498 * iwl4965_add_station_flags - Add station to tables in driver and device
499 */
500 u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
501 int is_ap, u8 flags, void *ht_data)
502 {
503 int i;
504 int index = IWL_INVALID_STATION;
505 struct iwl4965_station_entry *station;
506 unsigned long flags_spin;
507 DECLARE_MAC_BUF(mac);
508
509 spin_lock_irqsave(&priv->sta_lock, flags_spin);
510 if (is_ap)
511 index = IWL_AP_ID;
512 else if (is_broadcast_ether_addr(addr))
513 index = priv->hw_setting.bcast_sta_id;
514 else
515 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
516 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
517 addr)) {
518 index = i;
519 break;
520 }
521
522 if (!priv->stations[i].used &&
523 index == IWL_INVALID_STATION)
524 index = i;
525 }
526
527
528 /* These two conditions have the same outcome, but keep them separate
529 since they have different meanings */
530 if (unlikely(index == IWL_INVALID_STATION)) {
531 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
532 return index;
533 }
534
535 if (priv->stations[index].used &&
536 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
537 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
538 return index;
539 }
540
541
542 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
543 station = &priv->stations[index];
544 station->used = 1;
545 priv->num_stations++;
546
547 /* Set up the REPLY_ADD_STA command to send to device */
548 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
549 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
550 station->sta.mode = 0;
551 station->sta.sta.sta_id = index;
552 station->sta.station_flags = 0;
553
554 #ifdef CONFIG_IWL4965_HT
555 /* BCAST station and IBSS stations do not work in HT mode */
556 if (index != priv->hw_setting.bcast_sta_id &&
557 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
558 iwl4965_set_ht_add_station(priv, index,
559 (struct ieee80211_ht_info *) ht_data);
560 #endif /*CONFIG_IWL4965_HT*/
561
562 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
563
564 /* Add station to device's station table */
565 iwl4965_send_add_station(priv, &station->sta, flags);
566 return index;
567
568 }
569
570 /*************** DRIVER STATUS FUNCTIONS *****/
571
572 static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
573 {
574 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
575 * set but EXIT_PENDING is not */
576 return test_bit(STATUS_READY, &priv->status) &&
577 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
578 !test_bit(STATUS_EXIT_PENDING, &priv->status);
579 }
580
581 static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
582 {
583 return test_bit(STATUS_ALIVE, &priv->status);
584 }
585
586 static inline int iwl4965_is_init(struct iwl4965_priv *priv)
587 {
588 return test_bit(STATUS_INIT, &priv->status);
589 }
590
591 static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
592 {
593 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
594 test_bit(STATUS_RF_KILL_SW, &priv->status);
595 }
596
597 static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
598 {
599
600 if (iwl4965_is_rfkill(priv))
601 return 0;
602
603 return iwl4965_is_ready(priv);
604 }
605
606 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
607
608 #define IWL_CMD(x) case x : return #x
609
610 static const char *get_cmd_string(u8 cmd)
611 {
612 switch (cmd) {
613 IWL_CMD(REPLY_ALIVE);
614 IWL_CMD(REPLY_ERROR);
615 IWL_CMD(REPLY_RXON);
616 IWL_CMD(REPLY_RXON_ASSOC);
617 IWL_CMD(REPLY_QOS_PARAM);
618 IWL_CMD(REPLY_RXON_TIMING);
619 IWL_CMD(REPLY_ADD_STA);
620 IWL_CMD(REPLY_REMOVE_STA);
621 IWL_CMD(REPLY_REMOVE_ALL_STA);
622 IWL_CMD(REPLY_TX);
623 IWL_CMD(REPLY_RATE_SCALE);
624 IWL_CMD(REPLY_LEDS_CMD);
625 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
626 IWL_CMD(RADAR_NOTIFICATION);
627 IWL_CMD(REPLY_QUIET_CMD);
628 IWL_CMD(REPLY_CHANNEL_SWITCH);
629 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
630 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
631 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
632 IWL_CMD(POWER_TABLE_CMD);
633 IWL_CMD(PM_SLEEP_NOTIFICATION);
634 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
635 IWL_CMD(REPLY_SCAN_CMD);
636 IWL_CMD(REPLY_SCAN_ABORT_CMD);
637 IWL_CMD(SCAN_START_NOTIFICATION);
638 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
639 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
640 IWL_CMD(BEACON_NOTIFICATION);
641 IWL_CMD(REPLY_TX_BEACON);
642 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
643 IWL_CMD(QUIET_NOTIFICATION);
644 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
645 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
646 IWL_CMD(REPLY_BT_CONFIG);
647 IWL_CMD(REPLY_STATISTICS_CMD);
648 IWL_CMD(STATISTICS_NOTIFICATION);
649 IWL_CMD(REPLY_CARD_STATE_CMD);
650 IWL_CMD(CARD_STATE_NOTIFICATION);
651 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
652 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
653 IWL_CMD(SENSITIVITY_CMD);
654 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
655 IWL_CMD(REPLY_RX_PHY_CMD);
656 IWL_CMD(REPLY_RX_MPDU_CMD);
657 IWL_CMD(REPLY_4965_RX);
658 IWL_CMD(REPLY_COMPRESSED_BA);
659 default:
660 return "UNKNOWN";
661
662 }
663 }
664
665 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
666
667 /**
668 * iwl4965_enqueue_hcmd - enqueue a uCode command
669 * @priv: device private data point
670 * @cmd: a point to the ucode command structure
671 *
672 * The function returns < 0 values to indicate the operation is
673 * failed. On success, it turns the index (> 0) of command in the
674 * command queue.
675 */
676 static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
677 {
678 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
679 struct iwl4965_queue *q = &txq->q;
680 struct iwl4965_tfd_frame *tfd;
681 u32 *control_flags;
682 struct iwl4965_cmd *out_cmd;
683 u32 idx;
684 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
685 dma_addr_t phys_addr;
686 int ret;
687 unsigned long flags;
688
689 /* If any of the command structures end up being larger than
690 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
691 * we will need to increase the size of the TFD entries */
692 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
693 !(cmd->meta.flags & CMD_SIZE_HUGE));
694
695 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
696 IWL_ERROR("No space for Tx\n");
697 return -ENOSPC;
698 }
699
700 spin_lock_irqsave(&priv->hcmd_lock, flags);
701
702 tfd = &txq->bd[q->write_ptr];
703 memset(tfd, 0, sizeof(*tfd));
704
705 control_flags = (u32 *) tfd;
706
707 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
708 out_cmd = &txq->cmd[idx];
709
710 out_cmd->hdr.cmd = cmd->id;
711 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
712 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
713
714 /* At this point, the out_cmd now has all of the incoming cmd
715 * information */
716
717 out_cmd->hdr.flags = 0;
718 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
719 INDEX_TO_SEQ(q->write_ptr));
720 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
721 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
722
723 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
724 offsetof(struct iwl4965_cmd, hdr);
725 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
726
727 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
728 "%d bytes at %d[%d]:%d\n",
729 get_cmd_string(out_cmd->hdr.cmd),
730 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
731 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
732
733 txq->need_update = 1;
734
735 /* Set up entry in queue's byte count circular buffer */
736 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
737
738 /* Increment and update queue's write index */
739 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
740 iwl4965_tx_queue_update_write_ptr(priv, txq);
741
742 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
743 return ret ? ret : idx;
744 }
745
746 static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
747 {
748 int ret;
749
750 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
751
752 /* An asynchronous command can not expect an SKB to be set. */
753 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
754
755 /* An asynchronous command MUST have a callback. */
756 BUG_ON(!cmd->meta.u.callback);
757
758 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
759 return -EBUSY;
760
761 ret = iwl4965_enqueue_hcmd(priv, cmd);
762 if (ret < 0) {
763 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
764 get_cmd_string(cmd->id), ret);
765 return ret;
766 }
767 return 0;
768 }
769
770 static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
771 {
772 int cmd_idx;
773 int ret;
774 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
775
776 BUG_ON(cmd->meta.flags & CMD_ASYNC);
777
778 /* A synchronous command can not have a callback set. */
779 BUG_ON(cmd->meta.u.callback != NULL);
780
781 if (atomic_xchg(&entry, 1)) {
782 IWL_ERROR("Error sending %s: Already sending a host command\n",
783 get_cmd_string(cmd->id));
784 return -EBUSY;
785 }
786
787 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
788
789 if (cmd->meta.flags & CMD_WANT_SKB)
790 cmd->meta.source = &cmd->meta;
791
792 cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
793 if (cmd_idx < 0) {
794 ret = cmd_idx;
795 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
796 get_cmd_string(cmd->id), ret);
797 goto out;
798 }
799
800 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
801 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
802 HOST_COMPLETE_TIMEOUT);
803 if (!ret) {
804 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
805 IWL_ERROR("Error sending %s: time out after %dms.\n",
806 get_cmd_string(cmd->id),
807 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
808
809 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
810 ret = -ETIMEDOUT;
811 goto cancel;
812 }
813 }
814
815 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
816 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
817 get_cmd_string(cmd->id));
818 ret = -ECANCELED;
819 goto fail;
820 }
821 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
822 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
823 get_cmd_string(cmd->id));
824 ret = -EIO;
825 goto fail;
826 }
827 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
828 IWL_ERROR("Error: Response NULL in '%s'\n",
829 get_cmd_string(cmd->id));
830 ret = -EIO;
831 goto out;
832 }
833
834 ret = 0;
835 goto out;
836
837 cancel:
838 if (cmd->meta.flags & CMD_WANT_SKB) {
839 struct iwl4965_cmd *qcmd;
840
841 /* Cancel the CMD_WANT_SKB flag for the cmd in the
842 * TX cmd queue. Otherwise in case the cmd comes
843 * in later, it will possibly set an invalid
844 * address (cmd->meta.source). */
845 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
846 qcmd->meta.flags &= ~CMD_WANT_SKB;
847 }
848 fail:
849 if (cmd->meta.u.skb) {
850 dev_kfree_skb_any(cmd->meta.u.skb);
851 cmd->meta.u.skb = NULL;
852 }
853 out:
854 atomic_set(&entry, 0);
855 return ret;
856 }
857
858 int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
859 {
860 if (cmd->meta.flags & CMD_ASYNC)
861 return iwl4965_send_cmd_async(priv, cmd);
862
863 return iwl4965_send_cmd_sync(priv, cmd);
864 }
865
866 int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
867 {
868 struct iwl4965_host_cmd cmd = {
869 .id = id,
870 .len = len,
871 .data = data,
872 };
873
874 return iwl4965_send_cmd_sync(priv, &cmd);
875 }
876
877 static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
878 {
879 struct iwl4965_host_cmd cmd = {
880 .id = id,
881 .len = sizeof(val),
882 .data = &val,
883 };
884
885 return iwl4965_send_cmd_sync(priv, &cmd);
886 }
887
888 int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
889 {
890 return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
891 }
892
893 /**
894 * iwl4965_rxon_add_station - add station into station table.
895 *
896 * there is only one AP station with id= IWL_AP_ID
897 * NOTE: mutex must be held before calling this fnction
898 */
899 static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
900 const u8 *addr, int is_ap)
901 {
902 u8 sta_id;
903
904 /* Add station to device's station table */
905 #ifdef CONFIG_IWL4965_HT
906 struct ieee80211_conf *conf = &priv->hw->conf;
907 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
908
909 if ((is_ap) &&
910 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
911 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
912 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
913 0, cur_ht_config);
914 else
915 #endif /* CONFIG_IWL4965_HT */
916 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
917 0, NULL);
918
919 /* Set up default rate scaling table in device's station table */
920 iwl4965_add_station(priv, addr, is_ap);
921
922 return sta_id;
923 }
924
925 /**
926 * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
927 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
928 * @channel: Any channel valid for the requested phymode
929
930 * In addition to setting the staging RXON, priv->phymode is also set.
931 *
932 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
933 * in the staging RXON flag structure based on the phymode
934 */
935 static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
936 u16 channel)
937 {
938 if (!iwl4965_get_channel_info(priv, phymode, channel)) {
939 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
940 channel, phymode);
941 return -EINVAL;
942 }
943
944 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
945 (priv->phymode == phymode))
946 return 0;
947
948 priv->staging_rxon.channel = cpu_to_le16(channel);
949 if (phymode == MODE_IEEE80211A)
950 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
951 else
952 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
953
954 priv->phymode = phymode;
955
956 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
957
958 return 0;
959 }
960
961 /**
962 * iwl4965_check_rxon_cmd - validate RXON structure is valid
963 *
964 * NOTE: This is really only useful during development and can eventually
965 * be #ifdef'd out once the driver is stable and folks aren't actively
966 * making changes
967 */
968 static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
969 {
970 int error = 0;
971 int counter = 1;
972
973 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
974 error |= le32_to_cpu(rxon->flags &
975 (RXON_FLG_TGJ_NARROW_BAND_MSK |
976 RXON_FLG_RADAR_DETECT_MSK));
977 if (error)
978 IWL_WARNING("check 24G fields %d | %d\n",
979 counter++, error);
980 } else {
981 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
982 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
983 if (error)
984 IWL_WARNING("check 52 fields %d | %d\n",
985 counter++, error);
986 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
987 if (error)
988 IWL_WARNING("check 52 CCK %d | %d\n",
989 counter++, error);
990 }
991 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
992 if (error)
993 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
994
995 /* make sure basic rates 6Mbps and 1Mbps are supported */
996 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
997 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
998 if (error)
999 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
1000
1001 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
1002 if (error)
1003 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
1004
1005 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
1006 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
1007 if (error)
1008 IWL_WARNING("check CCK and short slot %d | %d\n",
1009 counter++, error);
1010
1011 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
1012 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
1013 if (error)
1014 IWL_WARNING("check CCK & auto detect %d | %d\n",
1015 counter++, error);
1016
1017 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
1018 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
1019 if (error)
1020 IWL_WARNING("check TGG and auto detect %d | %d\n",
1021 counter++, error);
1022
1023 if (error)
1024 IWL_WARNING("Tuning to channel %d\n",
1025 le16_to_cpu(rxon->channel));
1026
1027 if (error) {
1028 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
1029 return -1;
1030 }
1031 return 0;
1032 }
1033
1034 /**
1035 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
1036 * @priv: staging_rxon is compared to active_rxon
1037 *
1038 * If the RXON structure is changing enough to require a new tune,
1039 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1040 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
1041 */
1042 static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
1043 {
1044
1045 /* These items are only settable from the full RXON command */
1046 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1047 compare_ether_addr(priv->staging_rxon.bssid_addr,
1048 priv->active_rxon.bssid_addr) ||
1049 compare_ether_addr(priv->staging_rxon.node_addr,
1050 priv->active_rxon.node_addr) ||
1051 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1052 priv->active_rxon.wlap_bssid_addr) ||
1053 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1054 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1055 (priv->staging_rxon.air_propagation !=
1056 priv->active_rxon.air_propagation) ||
1057 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
1058 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
1059 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
1060 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
1061 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
1062 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1063 return 1;
1064
1065 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1066 * be updated with the RXON_ASSOC command -- however only some
1067 * flag transitions are allowed using RXON_ASSOC */
1068
1069 /* Check if we are not switching bands */
1070 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1071 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1072 return 1;
1073
1074 /* Check if we are switching association toggle */
1075 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1076 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1077 return 1;
1078
1079 return 0;
1080 }
1081
1082 static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
1083 {
1084 int rc = 0;
1085 struct iwl4965_rx_packet *res = NULL;
1086 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1087 struct iwl4965_host_cmd cmd = {
1088 .id = REPLY_RXON_ASSOC,
1089 .len = sizeof(rxon_assoc),
1090 .meta.flags = CMD_WANT_SKB,
1091 .data = &rxon_assoc,
1092 };
1093 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1094 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
1095
1096 if ((rxon1->flags == rxon2->flags) &&
1097 (rxon1->filter_flags == rxon2->filter_flags) &&
1098 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1099 (rxon1->ofdm_ht_single_stream_basic_rates ==
1100 rxon2->ofdm_ht_single_stream_basic_rates) &&
1101 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1102 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1103 (rxon1->rx_chain == rxon2->rx_chain) &&
1104 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1105 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1106 return 0;
1107 }
1108
1109 rxon_assoc.flags = priv->staging_rxon.flags;
1110 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1111 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1112 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1113 rxon_assoc.reserved = 0;
1114 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1115 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1116 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1117 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1118 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1119
1120 rc = iwl4965_send_cmd_sync(priv, &cmd);
1121 if (rc)
1122 return rc;
1123
1124 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1125 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1126 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1127 rc = -EIO;
1128 }
1129
1130 priv->alloc_rxb_skb--;
1131 dev_kfree_skb_any(cmd.meta.u.skb);
1132
1133 return rc;
1134 }
1135
1136 /**
1137 * iwl4965_commit_rxon - commit staging_rxon to hardware
1138 *
1139 * The RXON command in staging_rxon is committed to the hardware and
1140 * the active_rxon structure is updated with the new data. This
1141 * function correctly transitions out of the RXON_ASSOC_MSK state if
1142 * a HW tune is required based on the RXON structure changes.
1143 */
1144 static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
1145 {
1146 /* cast away the const for active_rxon in this function */
1147 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1148 DECLARE_MAC_BUF(mac);
1149 int rc = 0;
1150
1151 if (!iwl4965_is_alive(priv))
1152 return -1;
1153
1154 /* always get timestamp with Rx frame */
1155 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1156
1157 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
1158 if (rc) {
1159 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1160 return -EINVAL;
1161 }
1162
1163 /* If we don't need to send a full RXON, we can use
1164 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
1165 * and other flags for the current radio configuration. */
1166 if (!iwl4965_full_rxon_required(priv)) {
1167 rc = iwl4965_send_rxon_assoc(priv);
1168 if (rc) {
1169 IWL_ERROR("Error setting RXON_ASSOC "
1170 "configuration (%d).\n", rc);
1171 return rc;
1172 }
1173
1174 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1175
1176 return 0;
1177 }
1178
1179 /* station table will be cleared */
1180 priv->assoc_station_added = 0;
1181
1182 #ifdef CONFIG_IWL4965_SENSITIVITY
1183 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1184 if (!priv->error_recovering)
1185 priv->start_calib = 0;
1186
1187 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
1188 #endif /* CONFIG_IWL4965_SENSITIVITY */
1189
1190 /* If we are currently associated and the new config requires
1191 * an RXON_ASSOC and the new config wants the associated mask enabled,
1192 * we must clear the associated from the active configuration
1193 * before we apply the new config */
1194 if (iwl4965_is_associated(priv) &&
1195 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1196 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1197 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1198
1199 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1200 sizeof(struct iwl4965_rxon_cmd),
1201 &priv->active_rxon);
1202
1203 /* If the mask clearing failed then we set
1204 * active_rxon back to what it was previously */
1205 if (rc) {
1206 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1207 IWL_ERROR("Error clearing ASSOC_MSK on current "
1208 "configuration (%d).\n", rc);
1209 return rc;
1210 }
1211 }
1212
1213 IWL_DEBUG_INFO("Sending RXON\n"
1214 "* with%s RXON_FILTER_ASSOC_MSK\n"
1215 "* channel = %d\n"
1216 "* bssid = %s\n",
1217 ((priv->staging_rxon.filter_flags &
1218 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1219 le16_to_cpu(priv->staging_rxon.channel),
1220 print_mac(mac, priv->staging_rxon.bssid_addr));
1221
1222 /* Apply the new configuration */
1223 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1224 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
1225 if (rc) {
1226 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1227 return rc;
1228 }
1229
1230 iwl4965_clear_stations_table(priv);
1231
1232 #ifdef CONFIG_IWL4965_SENSITIVITY
1233 if (!priv->error_recovering)
1234 priv->start_calib = 0;
1235
1236 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1237 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
1238 #endif /* CONFIG_IWL4965_SENSITIVITY */
1239
1240 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1241
1242 /* If we issue a new RXON command which required a tune then we must
1243 * send a new TXPOWER command or we won't be able to Tx any frames */
1244 rc = iwl4965_hw_reg_send_txpower(priv);
1245 if (rc) {
1246 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1247 return rc;
1248 }
1249
1250 /* Add the broadcast address so we can send broadcast frames */
1251 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
1252 IWL_INVALID_STATION) {
1253 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1254 return -EIO;
1255 }
1256
1257 /* If we have set the ASSOC_MSK and we are in BSS mode then
1258 * add the IWL_AP_ID to the station rate table */
1259 if (iwl4965_is_associated(priv) &&
1260 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
1261 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
1262 == IWL_INVALID_STATION) {
1263 IWL_ERROR("Error adding AP address for transmit.\n");
1264 return -EIO;
1265 }
1266 priv->assoc_station_added = 1;
1267 }
1268
1269 return 0;
1270 }
1271
1272 static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
1273 {
1274 struct iwl4965_bt_cmd bt_cmd = {
1275 .flags = 3,
1276 .lead_time = 0xAA,
1277 .max_kill = 1,
1278 .kill_ack_mask = 0,
1279 .kill_cts_mask = 0,
1280 };
1281
1282 return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1283 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
1284 }
1285
1286 static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
1287 {
1288 int rc = 0;
1289 struct iwl4965_rx_packet *res;
1290 struct iwl4965_host_cmd cmd = {
1291 .id = REPLY_SCAN_ABORT_CMD,
1292 .meta.flags = CMD_WANT_SKB,
1293 };
1294
1295 /* If there isn't a scan actively going on in the hardware
1296 * then we are in between scan bands and not actually
1297 * actively scanning, so don't send the abort command */
1298 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1299 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1300 return 0;
1301 }
1302
1303 rc = iwl4965_send_cmd_sync(priv, &cmd);
1304 if (rc) {
1305 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1306 return rc;
1307 }
1308
1309 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1310 if (res->u.status != CAN_ABORT_STATUS) {
1311 /* The scan abort will return 1 for success or
1312 * 2 for "failure". A failure condition can be
1313 * due to simply not being in an active scan which
1314 * can occur if we send the scan abort before we
1315 * the microcode has notified us that a scan is
1316 * completed. */
1317 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1318 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1319 clear_bit(STATUS_SCAN_HW, &priv->status);
1320 }
1321
1322 dev_kfree_skb_any(cmd.meta.u.skb);
1323
1324 return rc;
1325 }
1326
1327 static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
1328 struct iwl4965_cmd *cmd,
1329 struct sk_buff *skb)
1330 {
1331 return 1;
1332 }
1333
1334 /*
1335 * CARD_STATE_CMD
1336 *
1337 * Use: Sets the device's internal card state to enable, disable, or halt
1338 *
1339 * When in the 'enable' state the card operates as normal.
1340 * When in the 'disable' state, the card enters into a low power mode.
1341 * When in the 'halt' state, the card is shut down and must be fully
1342 * restarted to come back on.
1343 */
1344 static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
1345 {
1346 struct iwl4965_host_cmd cmd = {
1347 .id = REPLY_CARD_STATE_CMD,
1348 .len = sizeof(u32),
1349 .data = &flags,
1350 .meta.flags = meta_flag,
1351 };
1352
1353 if (meta_flag & CMD_ASYNC)
1354 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
1355
1356 return iwl4965_send_cmd(priv, &cmd);
1357 }
1358
1359 static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
1360 struct iwl4965_cmd *cmd, struct sk_buff *skb)
1361 {
1362 struct iwl4965_rx_packet *res = NULL;
1363
1364 if (!skb) {
1365 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1366 return 1;
1367 }
1368
1369 res = (struct iwl4965_rx_packet *)skb->data;
1370 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1371 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1372 res->hdr.flags);
1373 return 1;
1374 }
1375
1376 switch (res->u.add_sta.status) {
1377 case ADD_STA_SUCCESS_MSK:
1378 break;
1379 default:
1380 break;
1381 }
1382
1383 /* We didn't cache the SKB; let the caller free it */
1384 return 1;
1385 }
1386
1387 int iwl4965_send_add_station(struct iwl4965_priv *priv,
1388 struct iwl4965_addsta_cmd *sta, u8 flags)
1389 {
1390 struct iwl4965_rx_packet *res = NULL;
1391 int rc = 0;
1392 struct iwl4965_host_cmd cmd = {
1393 .id = REPLY_ADD_STA,
1394 .len = sizeof(struct iwl4965_addsta_cmd),
1395 .meta.flags = flags,
1396 .data = sta,
1397 };
1398
1399 if (flags & CMD_ASYNC)
1400 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
1401 else
1402 cmd.meta.flags |= CMD_WANT_SKB;
1403
1404 rc = iwl4965_send_cmd(priv, &cmd);
1405
1406 if (rc || (flags & CMD_ASYNC))
1407 return rc;
1408
1409 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1410 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1411 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1412 res->hdr.flags);
1413 rc = -EIO;
1414 }
1415
1416 if (rc == 0) {
1417 switch (res->u.add_sta.status) {
1418 case ADD_STA_SUCCESS_MSK:
1419 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1420 break;
1421 default:
1422 rc = -EIO;
1423 IWL_WARNING("REPLY_ADD_STA failed\n");
1424 break;
1425 }
1426 }
1427
1428 priv->alloc_rxb_skb--;
1429 dev_kfree_skb_any(cmd.meta.u.skb);
1430
1431 return rc;
1432 }
1433
1434 static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
1435 struct ieee80211_key_conf *keyconf,
1436 u8 sta_id)
1437 {
1438 unsigned long flags;
1439 __le16 key_flags = 0;
1440
1441 switch (keyconf->alg) {
1442 case ALG_CCMP:
1443 key_flags |= STA_KEY_FLG_CCMP;
1444 key_flags |= cpu_to_le16(
1445 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1446 key_flags &= ~STA_KEY_FLG_INVALID;
1447 break;
1448 case ALG_TKIP:
1449 case ALG_WEP:
1450 default:
1451 return -EINVAL;
1452 }
1453 spin_lock_irqsave(&priv->sta_lock, flags);
1454 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1455 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1456 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1457 keyconf->keylen);
1458
1459 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1460 keyconf->keylen);
1461 priv->stations[sta_id].sta.key.key_flags = key_flags;
1462 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1463 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1464
1465 spin_unlock_irqrestore(&priv->sta_lock, flags);
1466
1467 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1468 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1469 return 0;
1470 }
1471
1472 static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
1473 {
1474 unsigned long flags;
1475
1476 spin_lock_irqsave(&priv->sta_lock, flags);
1477 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1478 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
1479 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1480 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1481 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1482 spin_unlock_irqrestore(&priv->sta_lock, flags);
1483
1484 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1485 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1486 return 0;
1487 }
1488
1489 static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
1490 {
1491 struct list_head *element;
1492
1493 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1494 priv->frames_count);
1495
1496 while (!list_empty(&priv->free_frames)) {
1497 element = priv->free_frames.next;
1498 list_del(element);
1499 kfree(list_entry(element, struct iwl4965_frame, list));
1500 priv->frames_count--;
1501 }
1502
1503 if (priv->frames_count) {
1504 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1505 priv->frames_count);
1506 priv->frames_count = 0;
1507 }
1508 }
1509
1510 static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
1511 {
1512 struct iwl4965_frame *frame;
1513 struct list_head *element;
1514 if (list_empty(&priv->free_frames)) {
1515 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1516 if (!frame) {
1517 IWL_ERROR("Could not allocate frame!\n");
1518 return NULL;
1519 }
1520
1521 priv->frames_count++;
1522 return frame;
1523 }
1524
1525 element = priv->free_frames.next;
1526 list_del(element);
1527 return list_entry(element, struct iwl4965_frame, list);
1528 }
1529
1530 static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
1531 {
1532 memset(frame, 0, sizeof(*frame));
1533 list_add(&frame->list, &priv->free_frames);
1534 }
1535
1536 unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
1537 struct ieee80211_hdr *hdr,
1538 const u8 *dest, int left)
1539 {
1540
1541 if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
1542 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1543 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1544 return 0;
1545
1546 if (priv->ibss_beacon->len > left)
1547 return 0;
1548
1549 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1550
1551 return priv->ibss_beacon->len;
1552 }
1553
1554 int iwl4965_rate_index_from_plcp(int plcp)
1555 {
1556 int i = 0;
1557
1558 /* 4965 HT rate format */
1559 if (plcp & RATE_MCS_HT_MSK) {
1560 i = (plcp & 0xff);
1561
1562 if (i >= IWL_RATE_MIMO_6M_PLCP)
1563 i = i - IWL_RATE_MIMO_6M_PLCP;
1564
1565 i += IWL_FIRST_OFDM_RATE;
1566 /* skip 9M not supported in ht*/
1567 if (i >= IWL_RATE_9M_INDEX)
1568 i += 1;
1569 if ((i >= IWL_FIRST_OFDM_RATE) &&
1570 (i <= IWL_LAST_OFDM_RATE))
1571 return i;
1572
1573 /* 4965 legacy rate format, search for match in table */
1574 } else {
1575 for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
1576 if (iwl4965_rates[i].plcp == (plcp &0xFF))
1577 return i;
1578 }
1579 return -1;
1580 }
1581
1582 static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
1583 {
1584 u8 i;
1585
1586 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1587 i = iwl4965_rates[i].next_ieee) {
1588 if (rate_mask & (1 << i))
1589 return iwl4965_rates[i].plcp;
1590 }
1591
1592 return IWL_RATE_INVALID;
1593 }
1594
1595 static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
1596 {
1597 struct iwl4965_frame *frame;
1598 unsigned int frame_size;
1599 int rc;
1600 u8 rate;
1601
1602 frame = iwl4965_get_free_frame(priv);
1603
1604 if (!frame) {
1605 IWL_ERROR("Could not obtain free frame buffer for beacon "
1606 "command.\n");
1607 return -ENOMEM;
1608 }
1609
1610 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1611 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
1612 0xFF0);
1613 if (rate == IWL_INVALID_RATE)
1614 rate = IWL_RATE_6M_PLCP;
1615 } else {
1616 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1617 if (rate == IWL_INVALID_RATE)
1618 rate = IWL_RATE_1M_PLCP;
1619 }
1620
1621 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
1622
1623 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1624 &frame->u.cmd[0]);
1625
1626 iwl4965_free_frame(priv, frame);
1627
1628 return rc;
1629 }
1630
1631 /******************************************************************************
1632 *
1633 * EEPROM related functions
1634 *
1635 ******************************************************************************/
1636
1637 static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
1638 {
1639 memcpy(mac, priv->eeprom.mac_address, 6);
1640 }
1641
1642 /**
1643 * iwl4965_eeprom_init - read EEPROM contents
1644 *
1645 * Load the EEPROM contents from adapter into priv->eeprom
1646 *
1647 * NOTE: This routine uses the non-debug IO access functions.
1648 */
1649 int iwl4965_eeprom_init(struct iwl4965_priv *priv)
1650 {
1651 __le16 *e = (__le16 *)&priv->eeprom;
1652 u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
1653 u32 r;
1654 int sz = sizeof(priv->eeprom);
1655 int rc;
1656 int i;
1657 u16 addr;
1658
1659 /* The EEPROM structure has several padding buffers within it
1660 * and when adding new EEPROM maps is subject to programmer errors
1661 * which may be very difficult to identify without explicitly
1662 * checking the resulting size of the eeprom map. */
1663 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1664
1665 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1666 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1667 return -ENOENT;
1668 }
1669
1670 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1671 rc = iwl4965_eeprom_acquire_semaphore(priv);
1672 if (rc < 0) {
1673 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1674 return -ENOENT;
1675 }
1676
1677 /* eeprom is an array of 16bit values */
1678 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1679 _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
1680 _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1681
1682 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1683 i += IWL_EEPROM_ACCESS_DELAY) {
1684 r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
1685 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1686 break;
1687 udelay(IWL_EEPROM_ACCESS_DELAY);
1688 }
1689
1690 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1691 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1692 rc = -ETIMEDOUT;
1693 goto done;
1694 }
1695 e[addr / 2] = cpu_to_le16(r >> 16);
1696 }
1697 rc = 0;
1698
1699 done:
1700 iwl4965_eeprom_release_semaphore(priv);
1701 return rc;
1702 }
1703
1704 /******************************************************************************
1705 *
1706 * Misc. internal state and helper functions
1707 *
1708 ******************************************************************************/
1709 #ifdef CONFIG_IWL4965_DEBUG
1710
1711 /**
1712 * iwl4965_report_frame - dump frame to syslog during debug sessions
1713 *
1714 * You may hack this function to show different aspects of received frames,
1715 * including selective frame dumps.
1716 * group100 parameter selects whether to show 1 out of 100 good frames.
1717 *
1718 * TODO: This was originally written for 3945, need to audit for
1719 * proper operation with 4965.
1720 */
1721 void iwl4965_report_frame(struct iwl4965_priv *priv,
1722 struct iwl4965_rx_packet *pkt,
1723 struct ieee80211_hdr *header, int group100)
1724 {
1725 u32 to_us;
1726 u32 print_summary = 0;
1727 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1728 u32 hundred = 0;
1729 u32 dataframe = 0;
1730 u16 fc;
1731 u16 seq_ctl;
1732 u16 channel;
1733 u16 phy_flags;
1734 int rate_sym;
1735 u16 length;
1736 u16 status;
1737 u16 bcn_tmr;
1738 u32 tsf_low;
1739 u64 tsf;
1740 u8 rssi;
1741 u8 agc;
1742 u16 sig_avg;
1743 u16 noise_diff;
1744 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1745 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1746 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
1747 u8 *data = IWL_RX_DATA(pkt);
1748
1749 /* MAC header */
1750 fc = le16_to_cpu(header->frame_control);
1751 seq_ctl = le16_to_cpu(header->seq_ctrl);
1752
1753 /* metadata */
1754 channel = le16_to_cpu(rx_hdr->channel);
1755 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1756 rate_sym = rx_hdr->rate;
1757 length = le16_to_cpu(rx_hdr->len);
1758
1759 /* end-of-frame status and timestamp */
1760 status = le32_to_cpu(rx_end->status);
1761 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1762 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1763 tsf = le64_to_cpu(rx_end->timestamp);
1764
1765 /* signal statistics */
1766 rssi = rx_stats->rssi;
1767 agc = rx_stats->agc;
1768 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1769 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1770
1771 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1772
1773 /* if data frame is to us and all is good,
1774 * (optionally) print summary for only 1 out of every 100 */
1775 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1776 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1777 dataframe = 1;
1778 if (!group100)
1779 print_summary = 1; /* print each frame */
1780 else if (priv->framecnt_to_us < 100) {
1781 priv->framecnt_to_us++;
1782 print_summary = 0;
1783 } else {
1784 priv->framecnt_to_us = 0;
1785 print_summary = 1;
1786 hundred = 1;
1787 }
1788 } else {
1789 /* print summary for all other frames */
1790 print_summary = 1;
1791 }
1792
1793 if (print_summary) {
1794 char *title;
1795 u32 rate;
1796
1797 if (hundred)
1798 title = "100Frames";
1799 else if (fc & IEEE80211_FCTL_RETRY)
1800 title = "Retry";
1801 else if (ieee80211_is_assoc_response(fc))
1802 title = "AscRsp";
1803 else if (ieee80211_is_reassoc_response(fc))
1804 title = "RasRsp";
1805 else if (ieee80211_is_probe_response(fc)) {
1806 title = "PrbRsp";
1807 print_dump = 1; /* dump frame contents */
1808 } else if (ieee80211_is_beacon(fc)) {
1809 title = "Beacon";
1810 print_dump = 1; /* dump frame contents */
1811 } else if (ieee80211_is_atim(fc))
1812 title = "ATIM";
1813 else if (ieee80211_is_auth(fc))
1814 title = "Auth";
1815 else if (ieee80211_is_deauth(fc))
1816 title = "DeAuth";
1817 else if (ieee80211_is_disassoc(fc))
1818 title = "DisAssoc";
1819 else
1820 title = "Frame";
1821
1822 rate = iwl4965_rate_index_from_plcp(rate_sym);
1823 if (rate == -1)
1824 rate = 0;
1825 else
1826 rate = iwl4965_rates[rate].ieee / 2;
1827
1828 /* print frame summary.
1829 * MAC addresses show just the last byte (for brevity),
1830 * but you can hack it to show more, if you'd like to. */
1831 if (dataframe)
1832 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1833 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1834 title, fc, header->addr1[5],
1835 length, rssi, channel, rate);
1836 else {
1837 /* src/dst addresses assume managed mode */
1838 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1839 "src=0x%02x, rssi=%u, tim=%lu usec, "
1840 "phy=0x%02x, chnl=%d\n",
1841 title, fc, header->addr1[5],
1842 header->addr3[5], rssi,
1843 tsf_low - priv->scan_start_tsf,
1844 phy_flags, channel);
1845 }
1846 }
1847 if (print_dump)
1848 iwl4965_print_hex_dump(IWL_DL_RX, data, length);
1849 }
1850 #endif
1851
1852 static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
1853 {
1854 if (priv->hw_setting.shared_virt)
1855 pci_free_consistent(priv->pci_dev,
1856 sizeof(struct iwl4965_shared),
1857 priv->hw_setting.shared_virt,
1858 priv->hw_setting.shared_phys);
1859 }
1860
1861 /**
1862 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
1863 *
1864 * return : set the bit for each supported rate insert in ie
1865 */
1866 static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1867 u16 basic_rate, int *left)
1868 {
1869 u16 ret_rates = 0, bit;
1870 int i;
1871 u8 *cnt = ie;
1872 u8 *rates = ie + 1;
1873
1874 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1875 if (bit & supported_rate) {
1876 ret_rates |= bit;
1877 rates[*cnt] = iwl4965_rates[i].ieee |
1878 ((bit & basic_rate) ? 0x80 : 0x00);
1879 (*cnt)++;
1880 (*left)--;
1881 if ((*left <= 0) ||
1882 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1883 break;
1884 }
1885 }
1886
1887 return ret_rates;
1888 }
1889
1890 #ifdef CONFIG_IWL4965_HT
1891 void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
1892 struct ieee80211_ht_cap *ht_cap,
1893 u8 use_current_config);
1894 #endif
1895
1896 /**
1897 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
1898 */
1899 static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
1900 struct ieee80211_mgmt *frame,
1901 int left, int is_direct)
1902 {
1903 int len = 0;
1904 u8 *pos = NULL;
1905 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
1906 #ifdef CONFIG_IWL4965_HT
1907 struct ieee80211_hw_mode *mode;
1908 #endif /* CONFIG_IWL4965_HT */
1909
1910 /* Make sure there is enough space for the probe request,
1911 * two mandatory IEs and the data */
1912 left -= 24;
1913 if (left < 0)
1914 return 0;
1915 len += 24;
1916
1917 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1918 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
1919 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1920 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
1921 frame->seq_ctrl = 0;
1922
1923 /* fill in our indirect SSID IE */
1924 /* ...next IE... */
1925
1926 left -= 2;
1927 if (left < 0)
1928 return 0;
1929 len += 2;
1930 pos = &(frame->u.probe_req.variable[0]);
1931 *pos++ = WLAN_EID_SSID;
1932 *pos++ = 0;
1933
1934 /* fill in our direct SSID IE... */
1935 if (is_direct) {
1936 /* ...next IE... */
1937 left -= 2 + priv->essid_len;
1938 if (left < 0)
1939 return 0;
1940 /* ... fill it in... */
1941 *pos++ = WLAN_EID_SSID;
1942 *pos++ = priv->essid_len;
1943 memcpy(pos, priv->essid, priv->essid_len);
1944 pos += priv->essid_len;
1945 len += 2 + priv->essid_len;
1946 }
1947
1948 /* fill in supported rate */
1949 /* ...next IE... */
1950 left -= 2;
1951 if (left < 0)
1952 return 0;
1953
1954 /* ... fill it in... */
1955 *pos++ = WLAN_EID_SUPP_RATES;
1956 *pos = 0;
1957
1958 /* exclude 60M rate */
1959 active_rates = priv->rates_mask;
1960 active_rates &= ~IWL_RATE_60M_MASK;
1961
1962 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
1963
1964 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1965 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
1966 active_rate_basic, &left);
1967 active_rates &= ~ret_rates;
1968
1969 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
1970 active_rate_basic, &left);
1971 active_rates &= ~ret_rates;
1972
1973 len += 2 + *pos;
1974 pos += (*pos) + 1;
1975 if (active_rates == 0)
1976 goto fill_end;
1977
1978 /* fill in supported extended rate */
1979 /* ...next IE... */
1980 left -= 2;
1981 if (left < 0)
1982 return 0;
1983 /* ... fill it in... */
1984 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1985 *pos = 0;
1986 iwl4965_supported_rate_to_ie(pos, active_rates,
1987 active_rate_basic, &left);
1988 if (*pos > 0)
1989 len += 2 + *pos;
1990
1991 #ifdef CONFIG_IWL4965_HT
1992 mode = priv->hw->conf.mode;
1993 if (mode->ht_info.ht_supported) {
1994 pos += (*pos) + 1;
1995 *pos++ = WLAN_EID_HT_CAPABILITY;
1996 *pos++ = sizeof(struct ieee80211_ht_cap);
1997 iwl4965_set_ht_capab(priv->hw,
1998 (struct ieee80211_ht_cap *)pos, 0);
1999 len += 2 + sizeof(struct ieee80211_ht_cap);
2000 }
2001 #endif /*CONFIG_IWL4965_HT */
2002
2003 fill_end:
2004 return (u16)len;
2005 }
2006
2007 /*
2008 * QoS support
2009 */
2010 #ifdef CONFIG_IWL4965_QOS
2011 static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
2012 struct iwl4965_qosparam_cmd *qos)
2013 {
2014
2015 return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
2016 sizeof(struct iwl4965_qosparam_cmd), qos);
2017 }
2018
2019 static void iwl4965_reset_qos(struct iwl4965_priv *priv)
2020 {
2021 u16 cw_min = 15;
2022 u16 cw_max = 1023;
2023 u8 aifs = 2;
2024 u8 is_legacy = 0;
2025 unsigned long flags;
2026 int i;
2027
2028 spin_lock_irqsave(&priv->lock, flags);
2029 priv->qos_data.qos_active = 0;
2030
2031 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
2032 if (priv->qos_data.qos_enable)
2033 priv->qos_data.qos_active = 1;
2034 if (!(priv->active_rate & 0xfff0)) {
2035 cw_min = 31;
2036 is_legacy = 1;
2037 }
2038 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2039 if (priv->qos_data.qos_enable)
2040 priv->qos_data.qos_active = 1;
2041 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
2042 cw_min = 31;
2043 is_legacy = 1;
2044 }
2045
2046 if (priv->qos_data.qos_active)
2047 aifs = 3;
2048
2049 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
2050 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
2051 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
2052 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
2053 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
2054
2055 if (priv->qos_data.qos_active) {
2056 i = 1;
2057 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
2058 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
2059 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
2060 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2061 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2062
2063 i = 2;
2064 priv->qos_data.def_qos_parm.ac[i].cw_min =
2065 cpu_to_le16((cw_min + 1) / 2 - 1);
2066 priv->qos_data.def_qos_parm.ac[i].cw_max =
2067 cpu_to_le16(cw_max);
2068 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2069 if (is_legacy)
2070 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2071 cpu_to_le16(6016);
2072 else
2073 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2074 cpu_to_le16(3008);
2075 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2076
2077 i = 3;
2078 priv->qos_data.def_qos_parm.ac[i].cw_min =
2079 cpu_to_le16((cw_min + 1) / 4 - 1);
2080 priv->qos_data.def_qos_parm.ac[i].cw_max =
2081 cpu_to_le16((cw_max + 1) / 2 - 1);
2082 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2083 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2084 if (is_legacy)
2085 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2086 cpu_to_le16(3264);
2087 else
2088 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2089 cpu_to_le16(1504);
2090 } else {
2091 for (i = 1; i < 4; i++) {
2092 priv->qos_data.def_qos_parm.ac[i].cw_min =
2093 cpu_to_le16(cw_min);
2094 priv->qos_data.def_qos_parm.ac[i].cw_max =
2095 cpu_to_le16(cw_max);
2096 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
2097 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2098 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2099 }
2100 }
2101 IWL_DEBUG_QOS("set QoS to default \n");
2102
2103 spin_unlock_irqrestore(&priv->lock, flags);
2104 }
2105
2106 static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
2107 {
2108 unsigned long flags;
2109
2110 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2111 return;
2112
2113 if (!priv->qos_data.qos_enable)
2114 return;
2115
2116 spin_lock_irqsave(&priv->lock, flags);
2117 priv->qos_data.def_qos_parm.qos_flags = 0;
2118
2119 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2120 !priv->qos_data.qos_cap.q_AP.txop_request)
2121 priv->qos_data.def_qos_parm.qos_flags |=
2122 QOS_PARAM_FLG_TXOP_TYPE_MSK;
2123 if (priv->qos_data.qos_active)
2124 priv->qos_data.def_qos_parm.qos_flags |=
2125 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2126
2127 #ifdef CONFIG_IWL4965_HT
2128 if (priv->current_ht_config.is_ht)
2129 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
2130 #endif /* CONFIG_IWL4965_HT */
2131
2132 spin_unlock_irqrestore(&priv->lock, flags);
2133
2134 if (force || iwl4965_is_associated(priv)) {
2135 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
2136 priv->qos_data.qos_active,
2137 priv->qos_data.def_qos_parm.qos_flags);
2138
2139 iwl4965_send_qos_params_command(priv,
2140 &(priv->qos_data.def_qos_parm));
2141 }
2142 }
2143
2144 #endif /* CONFIG_IWL4965_QOS */
2145 /*
2146 * Power management (not Tx power!) functions
2147 */
2148 #define MSEC_TO_USEC 1024
2149
2150 #define NOSLP __constant_cpu_to_le16(0), 0, 0
2151 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
2152 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2153 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2154 __constant_cpu_to_le32(X1), \
2155 __constant_cpu_to_le32(X2), \
2156 __constant_cpu_to_le32(X3), \
2157 __constant_cpu_to_le32(X4)}
2158
2159
2160 /* default power management (not Tx power) table values */
2161 /* for tim 0-10 */
2162 static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
2163 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2164 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2165 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2166 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2167 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2168 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2169 };
2170
2171 /* for tim > 10 */
2172 static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
2173 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2174 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2175 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2176 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2177 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2178 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2179 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2180 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2181 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2182 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2183 };
2184
2185 int iwl4965_power_init_handle(struct iwl4965_priv *priv)
2186 {
2187 int rc = 0, i;
2188 struct iwl4965_power_mgr *pow_data;
2189 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
2190 u16 pci_pm;
2191
2192 IWL_DEBUG_POWER("Initialize power \n");
2193
2194 pow_data = &(priv->power_data);
2195
2196 memset(pow_data, 0, sizeof(*pow_data));
2197
2198 pow_data->active_index = IWL_POWER_RANGE_0;
2199 pow_data->dtim_val = 0xffff;
2200
2201 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2202 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2203
2204 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2205 if (rc != 0)
2206 return 0;
2207 else {
2208 struct iwl4965_powertable_cmd *cmd;
2209
2210 IWL_DEBUG_POWER("adjust power command flags\n");
2211
2212 for (i = 0; i < IWL_POWER_AC; i++) {
2213 cmd = &pow_data->pwr_range_0[i].cmd;
2214
2215 if (pci_pm & 0x1)
2216 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2217 else
2218 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2219 }
2220 }
2221 return rc;
2222 }
2223
2224 static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
2225 struct iwl4965_powertable_cmd *cmd, u32 mode)
2226 {
2227 int rc = 0, i;
2228 u8 skip;
2229 u32 max_sleep = 0;
2230 struct iwl4965_power_vec_entry *range;
2231 u8 period = 0;
2232 struct iwl4965_power_mgr *pow_data;
2233
2234 if (mode > IWL_POWER_INDEX_5) {
2235 IWL_DEBUG_POWER("Error invalid power mode \n");
2236 return -1;
2237 }
2238 pow_data = &(priv->power_data);
2239
2240 if (pow_data->active_index == IWL_POWER_RANGE_0)
2241 range = &pow_data->pwr_range_0[0];
2242 else
2243 range = &pow_data->pwr_range_1[1];
2244
2245 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
2246
2247 #ifdef IWL_MAC80211_DISABLE
2248 if (priv->assoc_network != NULL) {
2249 unsigned long flags;
2250
2251 period = priv->assoc_network->tim.tim_period;
2252 }
2253 #endif /*IWL_MAC80211_DISABLE */
2254 skip = range[mode].no_dtim;
2255
2256 if (period == 0) {
2257 period = 1;
2258 skip = 0;
2259 }
2260
2261 if (skip == 0) {
2262 max_sleep = period;
2263 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2264 } else {
2265 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2266 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2267 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2268 }
2269
2270 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2271 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2272 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2273 }
2274
2275 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2276 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2277 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2278 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2279 le32_to_cpu(cmd->sleep_interval[0]),
2280 le32_to_cpu(cmd->sleep_interval[1]),
2281 le32_to_cpu(cmd->sleep_interval[2]),
2282 le32_to_cpu(cmd->sleep_interval[3]),
2283 le32_to_cpu(cmd->sleep_interval[4]));
2284
2285 return rc;
2286 }
2287
2288 static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
2289 {
2290 u32 uninitialized_var(final_mode);
2291 int rc;
2292 struct iwl4965_powertable_cmd cmd;
2293
2294 /* If on battery, set to 3,
2295 * if plugged into AC power, set to CAM ("continuously aware mode"),
2296 * else user level */
2297 switch (mode) {
2298 case IWL_POWER_BATTERY:
2299 final_mode = IWL_POWER_INDEX_3;
2300 break;
2301 case IWL_POWER_AC:
2302 final_mode = IWL_POWER_MODE_CAM;
2303 break;
2304 default:
2305 final_mode = mode;
2306 break;
2307 }
2308
2309 cmd.keep_alive_beacons = 0;
2310
2311 iwl4965_update_power_cmd(priv, &cmd, final_mode);
2312
2313 rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2314
2315 if (final_mode == IWL_POWER_MODE_CAM)
2316 clear_bit(STATUS_POWER_PMI, &priv->status);
2317 else
2318 set_bit(STATUS_POWER_PMI, &priv->status);
2319
2320 return rc;
2321 }
2322
2323 int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
2324 {
2325 /* Filter incoming packets to determine if they are targeted toward
2326 * this network, discarding packets coming from ourselves */
2327 switch (priv->iw_mode) {
2328 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2329 /* packets from our adapter are dropped (echo) */
2330 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2331 return 0;
2332 /* {broad,multi}cast packets to our IBSS go through */
2333 if (is_multicast_ether_addr(header->addr1))
2334 return !compare_ether_addr(header->addr3, priv->bssid);
2335 /* packets to our adapter go through */
2336 return !compare_ether_addr(header->addr1, priv->mac_addr);
2337 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2338 /* packets from our adapter are dropped (echo) */
2339 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2340 return 0;
2341 /* {broad,multi}cast packets to our BSS go through */
2342 if (is_multicast_ether_addr(header->addr1))
2343 return !compare_ether_addr(header->addr2, priv->bssid);
2344 /* packets to our adapter go through */
2345 return !compare_ether_addr(header->addr1, priv->mac_addr);
2346 }
2347
2348 return 1;
2349 }
2350
2351 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2352
2353 static const char *iwl4965_get_tx_fail_reason(u32 status)
2354 {
2355 switch (status & TX_STATUS_MSK) {
2356 case TX_STATUS_SUCCESS:
2357 return "SUCCESS";
2358 TX_STATUS_ENTRY(SHORT_LIMIT);
2359 TX_STATUS_ENTRY(LONG_LIMIT);
2360 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2361 TX_STATUS_ENTRY(MGMNT_ABORT);
2362 TX_STATUS_ENTRY(NEXT_FRAG);
2363 TX_STATUS_ENTRY(LIFE_EXPIRE);
2364 TX_STATUS_ENTRY(DEST_PS);
2365 TX_STATUS_ENTRY(ABORTED);
2366 TX_STATUS_ENTRY(BT_RETRY);
2367 TX_STATUS_ENTRY(STA_INVALID);
2368 TX_STATUS_ENTRY(FRAG_DROPPED);
2369 TX_STATUS_ENTRY(TID_DISABLE);
2370 TX_STATUS_ENTRY(FRAME_FLUSHED);
2371 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2372 TX_STATUS_ENTRY(TX_LOCKED);
2373 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2374 }
2375
2376 return "UNKNOWN";
2377 }
2378
2379 /**
2380 * iwl4965_scan_cancel - Cancel any currently executing HW scan
2381 *
2382 * NOTE: priv->mutex is not required before calling this function
2383 */
2384 static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
2385 {
2386 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2387 clear_bit(STATUS_SCANNING, &priv->status);
2388 return 0;
2389 }
2390
2391 if (test_bit(STATUS_SCANNING, &priv->status)) {
2392 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2393 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2394 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2395 queue_work(priv->workqueue, &priv->abort_scan);
2396
2397 } else
2398 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2399
2400 return test_bit(STATUS_SCANNING, &priv->status);
2401 }
2402
2403 return 0;
2404 }
2405
2406 /**
2407 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
2408 * @ms: amount of time to wait (in milliseconds) for scan to abort
2409 *
2410 * NOTE: priv->mutex must be held before calling this function
2411 */
2412 static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
2413 {
2414 unsigned long now = jiffies;
2415 int ret;
2416
2417 ret = iwl4965_scan_cancel(priv);
2418 if (ret && ms) {
2419 mutex_unlock(&priv->mutex);
2420 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2421 test_bit(STATUS_SCANNING, &priv->status))
2422 msleep(1);
2423 mutex_lock(&priv->mutex);
2424
2425 return test_bit(STATUS_SCANNING, &priv->status);
2426 }
2427
2428 return ret;
2429 }
2430
2431 static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
2432 {
2433 /* Reset ieee stats */
2434
2435 /* We don't reset the net_device_stats (ieee->stats) on
2436 * re-association */
2437
2438 priv->last_seq_num = -1;
2439 priv->last_frag_num = -1;
2440 priv->last_packet_time = 0;
2441
2442 iwl4965_scan_cancel(priv);
2443 }
2444
2445 #define MAX_UCODE_BEACON_INTERVAL 4096
2446 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2447
2448 static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
2449 {
2450 u16 new_val = 0;
2451 u16 beacon_factor = 0;
2452
2453 beacon_factor =
2454 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2455 / MAX_UCODE_BEACON_INTERVAL;
2456 new_val = beacon_val / beacon_factor;
2457
2458 return cpu_to_le16(new_val);
2459 }
2460
2461 static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
2462 {
2463 u64 interval_tm_unit;
2464 u64 tsf, result;
2465 unsigned long flags;
2466 struct ieee80211_conf *conf = NULL;
2467 u16 beacon_int = 0;
2468
2469 conf = ieee80211_get_hw_conf(priv->hw);
2470
2471 spin_lock_irqsave(&priv->lock, flags);
2472 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2473 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2474
2475 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2476
2477 tsf = priv->timestamp1;
2478 tsf = ((tsf << 32) | priv->timestamp0);
2479
2480 beacon_int = priv->beacon_int;
2481 spin_unlock_irqrestore(&priv->lock, flags);
2482
2483 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2484 if (beacon_int == 0) {
2485 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2486 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2487 } else {
2488 priv->rxon_timing.beacon_interval =
2489 cpu_to_le16(beacon_int);
2490 priv->rxon_timing.beacon_interval =
2491 iwl4965_adjust_beacon_interval(
2492 le16_to_cpu(priv->rxon_timing.beacon_interval));
2493 }
2494
2495 priv->rxon_timing.atim_window = 0;
2496 } else {
2497 priv->rxon_timing.beacon_interval =
2498 iwl4965_adjust_beacon_interval(conf->beacon_int);
2499 /* TODO: we need to get atim_window from upper stack
2500 * for now we set to 0 */
2501 priv->rxon_timing.atim_window = 0;
2502 }
2503
2504 interval_tm_unit =
2505 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2506 result = do_div(tsf, interval_tm_unit);
2507 priv->rxon_timing.beacon_init_val =
2508 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2509
2510 IWL_DEBUG_ASSOC
2511 ("beacon interval %d beacon timer %d beacon tim %d\n",
2512 le16_to_cpu(priv->rxon_timing.beacon_interval),
2513 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2514 le16_to_cpu(priv->rxon_timing.atim_window));
2515 }
2516
2517 static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
2518 {
2519 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2520 IWL_ERROR("APs don't scan.\n");
2521 return 0;
2522 }
2523
2524 if (!iwl4965_is_ready_rf(priv)) {
2525 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2526 return -EIO;
2527 }
2528
2529 if (test_bit(STATUS_SCANNING, &priv->status)) {
2530 IWL_DEBUG_SCAN("Scan already in progress.\n");
2531 return -EAGAIN;
2532 }
2533
2534 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2535 IWL_DEBUG_SCAN("Scan request while abort pending. "
2536 "Queuing.\n");
2537 return -EAGAIN;
2538 }
2539
2540 IWL_DEBUG_INFO("Starting scan...\n");
2541 priv->scan_bands = 2;
2542 set_bit(STATUS_SCANNING, &priv->status);
2543 priv->scan_start = jiffies;
2544 priv->scan_pass_start = priv->scan_start;
2545
2546 queue_work(priv->workqueue, &priv->request_scan);
2547
2548 return 0;
2549 }
2550
2551 static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
2552 {
2553 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
2554
2555 if (hw_decrypt)
2556 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2557 else
2558 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2559
2560 return 0;
2561 }
2562
2563 static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
2564 {
2565 if (phymode == MODE_IEEE80211A) {
2566 priv->staging_rxon.flags &=
2567 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2568 | RXON_FLG_CCK_MSK);
2569 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2570 } else {
2571 /* Copied from iwl4965_bg_post_associate() */
2572 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2573 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2574 else
2575 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2576
2577 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2578 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2579
2580 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2581 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2582 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2583 }
2584 }
2585
2586 /*
2587 * initialize rxon structure with default values from eeprom
2588 */
2589 static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
2590 {
2591 const struct iwl4965_channel_info *ch_info;
2592
2593 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2594
2595 switch (priv->iw_mode) {
2596 case IEEE80211_IF_TYPE_AP:
2597 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2598 break;
2599
2600 case IEEE80211_IF_TYPE_STA:
2601 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2602 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2603 break;
2604
2605 case IEEE80211_IF_TYPE_IBSS:
2606 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2607 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2608 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2609 RXON_FILTER_ACCEPT_GRP_MSK;
2610 break;
2611
2612 case IEEE80211_IF_TYPE_MNTR:
2613 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2614 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2615 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2616 break;
2617 }
2618
2619 #if 0
2620 /* TODO: Figure out when short_preamble would be set and cache from
2621 * that */
2622 if (!hw_to_local(priv->hw)->short_preamble)
2623 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2624 else
2625 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2626 #endif
2627
2628 ch_info = iwl4965_get_channel_info(priv, priv->phymode,
2629 le16_to_cpu(priv->staging_rxon.channel));
2630
2631 if (!ch_info)
2632 ch_info = &priv->channel_info[0];
2633
2634 /*
2635 * in some case A channels are all non IBSS
2636 * in this case force B/G channel
2637 */
2638 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2639 !(is_channel_ibss(ch_info)))
2640 ch_info = &priv->channel_info[0];
2641
2642 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2643 if (is_channel_a_band(ch_info))
2644 priv->phymode = MODE_IEEE80211A;
2645 else
2646 priv->phymode = MODE_IEEE80211G;
2647
2648 iwl4965_set_flags_for_phymode(priv, priv->phymode);
2649
2650 priv->staging_rxon.ofdm_basic_rates =
2651 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2652 priv->staging_rxon.cck_basic_rates =
2653 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2654
2655 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2656 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2657 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2658 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2659 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2660 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2661 iwl4965_set_rxon_chain(priv);
2662 }
2663
2664 static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
2665 {
2666 if (mode == IEEE80211_IF_TYPE_IBSS) {
2667 const struct iwl4965_channel_info *ch_info;
2668
2669 ch_info = iwl4965_get_channel_info(priv,
2670 priv->phymode,
2671 le16_to_cpu(priv->staging_rxon.channel));
2672
2673 if (!ch_info || !is_channel_ibss(ch_info)) {
2674 IWL_ERROR("channel %d not IBSS channel\n",
2675 le16_to_cpu(priv->staging_rxon.channel));
2676 return -EINVAL;
2677 }
2678 }
2679
2680 priv->iw_mode = mode;
2681
2682 iwl4965_connection_init_rx_config(priv);
2683 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2684
2685 iwl4965_clear_stations_table(priv);
2686
2687 /* dont commit rxon if rf-kill is on*/
2688 if (!iwl4965_is_ready_rf(priv))
2689 return -EAGAIN;
2690
2691 cancel_delayed_work(&priv->scan_check);
2692 if (iwl4965_scan_cancel_timeout(priv, 100)) {
2693 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2694 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2695 return -EAGAIN;
2696 }
2697
2698 iwl4965_commit_rxon(priv);
2699
2700 return 0;
2701 }
2702
2703 static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
2704 struct ieee80211_tx_control *ctl,
2705 struct iwl4965_cmd *cmd,
2706 struct sk_buff *skb_frag,
2707 int last_frag)
2708 {
2709 struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
2710
2711 switch (keyinfo->alg) {
2712 case ALG_CCMP:
2713 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2714 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2715 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2716 break;
2717
2718 case ALG_TKIP:
2719 #if 0
2720 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2721
2722 if (last_frag)
2723 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2724 8);
2725 else
2726 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2727 #endif
2728 break;
2729
2730 case ALG_WEP:
2731 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2732 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2733
2734 if (keyinfo->keylen == 13)
2735 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2736
2737 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2738
2739 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2740 "with key %d\n", ctl->key_idx);
2741 break;
2742
2743 default:
2744 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2745 break;
2746 }
2747 }
2748
2749 /*
2750 * handle build REPLY_TX command notification.
2751 */
2752 static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
2753 struct iwl4965_cmd *cmd,
2754 struct ieee80211_tx_control *ctrl,
2755 struct ieee80211_hdr *hdr,
2756 int is_unicast, u8 std_id)
2757 {
2758 __le16 *qc;
2759 u16 fc = le16_to_cpu(hdr->frame_control);
2760 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2761
2762 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2763 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2764 tx_flags |= TX_CMD_FLG_ACK_MSK;
2765 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2766 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2767 if (ieee80211_is_probe_response(fc) &&
2768 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2769 tx_flags |= TX_CMD_FLG_TSF_MSK;
2770 } else {
2771 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2772 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2773 }
2774
2775 if (ieee80211_is_back_request(fc))
2776 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
2777
2778
2779 cmd->cmd.tx.sta_id = std_id;
2780 if (ieee80211_get_morefrag(hdr))
2781 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2782
2783 qc = ieee80211_get_qos_ctrl(hdr);
2784 if (qc) {
2785 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2786 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2787 } else
2788 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2789
2790 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2791 tx_flags |= TX_CMD_FLG_RTS_MSK;
2792 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2793 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2794 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2795 tx_flags |= TX_CMD_FLG_CTS_MSK;
2796 }
2797
2798 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2799 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2800
2801 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2802 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2803 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2804 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
2805 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2806 else
2807 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2808 } else
2809 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2810
2811 cmd->cmd.tx.driver_txop = 0;
2812 cmd->cmd.tx.tx_flags = tx_flags;
2813 cmd->cmd.tx.next_frame_len = 0;
2814 }
2815
2816 /**
2817 * iwl4965_get_sta_id - Find station's index within station table
2818 *
2819 * If new IBSS station, create new entry in station table
2820 */
2821 static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
2822 struct ieee80211_hdr *hdr)
2823 {
2824 int sta_id;
2825 u16 fc = le16_to_cpu(hdr->frame_control);
2826 DECLARE_MAC_BUF(mac);
2827
2828 /* If this frame is broadcast or management, use broadcast station id */
2829 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2830 is_multicast_ether_addr(hdr->addr1))
2831 return priv->hw_setting.bcast_sta_id;
2832
2833 switch (priv->iw_mode) {
2834
2835 /* If we are a client station in a BSS network, use the special
2836 * AP station entry (that's the only station we communicate with) */
2837 case IEEE80211_IF_TYPE_STA:
2838 return IWL_AP_ID;
2839
2840 /* If we are an AP, then find the station, or use BCAST */
2841 case IEEE80211_IF_TYPE_AP:
2842 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
2843 if (sta_id != IWL_INVALID_STATION)
2844 return sta_id;
2845 return priv->hw_setting.bcast_sta_id;
2846
2847 /* If this frame is going out to an IBSS network, find the station,
2848 * or create a new station table entry */
2849 case IEEE80211_IF_TYPE_IBSS:
2850 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
2851 if (sta_id != IWL_INVALID_STATION)
2852 return sta_id;
2853
2854 /* Create new station table entry */
2855 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
2856 0, CMD_ASYNC, NULL);
2857
2858 if (sta_id != IWL_INVALID_STATION)
2859 return sta_id;
2860
2861 IWL_DEBUG_DROP("Station %s not in station map. "
2862 "Defaulting to broadcast...\n",
2863 print_mac(mac, hdr->addr1));
2864 iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2865 return priv->hw_setting.bcast_sta_id;
2866
2867 default:
2868 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2869 return priv->hw_setting.bcast_sta_id;
2870 }
2871 }
2872
2873 /*
2874 * start REPLY_TX command process
2875 */
2876 static int iwl4965_tx_skb(struct iwl4965_priv *priv,
2877 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2878 {
2879 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2880 struct iwl4965_tfd_frame *tfd;
2881 u32 *control_flags;
2882 int txq_id = ctl->queue;
2883 struct iwl4965_tx_queue *txq = NULL;
2884 struct iwl4965_queue *q = NULL;
2885 dma_addr_t phys_addr;
2886 dma_addr_t txcmd_phys;
2887 dma_addr_t scratch_phys;
2888 struct iwl4965_cmd *out_cmd = NULL;
2889 u16 len, idx, len_org;
2890 u8 id, hdr_len, unicast;
2891 u8 sta_id;
2892 u16 seq_number = 0;
2893 u16 fc;
2894 __le16 *qc;
2895 u8 wait_write_ptr = 0;
2896 unsigned long flags;
2897 int rc;
2898
2899 spin_lock_irqsave(&priv->lock, flags);
2900 if (iwl4965_is_rfkill(priv)) {
2901 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2902 goto drop_unlock;
2903 }
2904
2905 if (!priv->vif) {
2906 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
2907 goto drop_unlock;
2908 }
2909
2910 if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2911 IWL_ERROR("ERROR: No TX rate available.\n");
2912 goto drop_unlock;
2913 }
2914
2915 unicast = !is_multicast_ether_addr(hdr->addr1);
2916 id = 0;
2917
2918 fc = le16_to_cpu(hdr->frame_control);
2919
2920 #ifdef CONFIG_IWL4965_DEBUG
2921 if (ieee80211_is_auth(fc))
2922 IWL_DEBUG_TX("Sending AUTH frame\n");
2923 else if (ieee80211_is_assoc_request(fc))
2924 IWL_DEBUG_TX("Sending ASSOC frame\n");
2925 else if (ieee80211_is_reassoc_request(fc))
2926 IWL_DEBUG_TX("Sending REASSOC frame\n");
2927 #endif
2928
2929 /* drop all data frame if we are not associated */
2930 if (!iwl4965_is_associated(priv) && !priv->assoc_id &&
2931 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
2932 IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
2933 goto drop_unlock;
2934 }
2935
2936 spin_unlock_irqrestore(&priv->lock, flags);
2937
2938 hdr_len = ieee80211_get_hdrlen(fc);
2939
2940 /* Find (or create) index into station table for destination station */
2941 sta_id = iwl4965_get_sta_id(priv, hdr);
2942 if (sta_id == IWL_INVALID_STATION) {
2943 DECLARE_MAC_BUF(mac);
2944
2945 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2946 print_mac(mac, hdr->addr1));
2947 goto drop;
2948 }
2949
2950 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2951
2952 qc = ieee80211_get_qos_ctrl(hdr);
2953 if (qc) {
2954 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2955 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2956 IEEE80211_SCTL_SEQ;
2957 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2958 (hdr->seq_ctrl &
2959 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2960 seq_number += 0x10;
2961 #ifdef CONFIG_IWL4965_HT
2962 #ifdef CONFIG_IWL4965_HT_AGG
2963 /* aggregation is on for this <sta,tid> */
2964 if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
2965 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
2966 #endif /* CONFIG_IWL4965_HT_AGG */
2967 #endif /* CONFIG_IWL4965_HT */
2968 }
2969
2970 /* Descriptor for chosen Tx queue */
2971 txq = &priv->txq[txq_id];
2972 q = &txq->q;
2973
2974 spin_lock_irqsave(&priv->lock, flags);
2975
2976 /* Set up first empty TFD within this queue's circular TFD buffer */
2977 tfd = &txq->bd[q->write_ptr];
2978 memset(tfd, 0, sizeof(*tfd));
2979 control_flags = (u32 *) tfd;
2980 idx = get_cmd_index(q, q->write_ptr, 0);
2981
2982 /* Set up driver data for this TFD */
2983 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
2984 txq->txb[q->write_ptr].skb[0] = skb;
2985 memcpy(&(txq->txb[q->write_ptr].status.control),
2986 ctl, sizeof(struct ieee80211_tx_control));
2987
2988 /* Set up first empty entry in queue's array of Tx/cmd buffers */
2989 out_cmd = &txq->cmd[idx];
2990 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2991 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2992
2993 /*
2994 * Set up the Tx-command (not MAC!) header.
2995 * Store the chosen Tx queue and TFD index within the sequence field;
2996 * after Tx, uCode's Tx response will return this value so driver can
2997 * locate the frame within the tx queue and do post-tx processing.
2998 */
2999 out_cmd->hdr.cmd = REPLY_TX;
3000 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
3001 INDEX_TO_SEQ(q->write_ptr)));
3002
3003 /* Copy MAC header from skb into command buffer */
3004 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
3005
3006 /*
3007 * Use the first empty entry in this queue's command buffer array
3008 * to contain the Tx command and MAC header concatenated together
3009 * (payload data will be in another buffer).
3010 * Size of this varies, due to varying MAC header length.
3011 * If end is not dword aligned, we'll have 2 extra bytes at the end
3012 * of the MAC header (device reads on dword boundaries).
3013 * We'll tell device about this padding later.
3014 */
3015 len = priv->hw_setting.tx_cmd_len +
3016 sizeof(struct iwl4965_cmd_header) + hdr_len;
3017
3018 len_org = len;
3019 len = (len + 3) & ~3;
3020
3021 if (len_org != len)
3022 len_org = 1;
3023 else
3024 len_org = 0;
3025
3026 /* Physical address of this Tx command's header (not MAC header!),
3027 * within command buffer array. */
3028 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
3029 offsetof(struct iwl4965_cmd, hdr);
3030
3031 /* Add buffer containing Tx command and MAC(!) header to TFD's
3032 * first entry */
3033 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
3034
3035 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
3036 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
3037
3038 /* Set up TFD's 2nd entry to point directly to remainder of skb,
3039 * if any (802.11 null frames have no payload). */
3040 len = skb->len - hdr_len;
3041 if (len) {
3042 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
3043 len, PCI_DMA_TODEVICE);
3044 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
3045 }
3046
3047 /* Tell 4965 about any 2-byte padding after MAC header */
3048 if (len_org)
3049 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
3050
3051 /* Total # bytes to be transmitted */
3052 len = (u16)skb->len;
3053 out_cmd->cmd.tx.len = cpu_to_le16(len);
3054
3055 /* TODO need this for burst mode later on */
3056 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
3057
3058 /* set is_hcca to 0; it probably will never be implemented */
3059 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
3060
3061 scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
3062 offsetof(struct iwl4965_tx_cmd, scratch);
3063 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
3064 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
3065
3066 #ifdef CONFIG_IWL4965_HT_AGG
3067 #ifdef CONFIG_IWL4965_HT
3068 /* TODO: move this functionality to rate scaling */
3069 iwl4965_tl_get_stats(priv, hdr);
3070 #endif /* CONFIG_IWL4965_HT_AGG */
3071 #endif /*CONFIG_IWL4965_HT */
3072
3073
3074 if (!ieee80211_get_morefrag(hdr)) {
3075 txq->need_update = 1;
3076 if (qc) {
3077 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
3078 priv->stations[sta_id].tid[tid].seq_number = seq_number;
3079 }
3080 } else {
3081 wait_write_ptr = 1;
3082 txq->need_update = 0;
3083 }
3084
3085 iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
3086 sizeof(out_cmd->cmd.tx));
3087
3088 iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
3089 ieee80211_get_hdrlen(fc));
3090
3091 /* Set up entry for this TFD in Tx byte-count array */
3092 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
3093
3094 /* Tell device the write index *just past* this latest filled TFD */
3095 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
3096 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
3097 spin_unlock_irqrestore(&priv->lock, flags);
3098
3099 if (rc)
3100 return rc;
3101
3102 if ((iwl4965_queue_space(q) < q->high_mark)
3103 && priv->mac80211_registered) {
3104 if (wait_write_ptr) {
3105 spin_lock_irqsave(&priv->lock, flags);
3106 txq->need_update = 1;
3107 iwl4965_tx_queue_update_write_ptr(priv, txq);
3108 spin_unlock_irqrestore(&priv->lock, flags);
3109 }
3110
3111 ieee80211_stop_queue(priv->hw, ctl->queue);
3112 }
3113
3114 return 0;
3115
3116 drop_unlock:
3117 spin_unlock_irqrestore(&priv->lock, flags);
3118 drop:
3119 return -1;
3120 }
3121
3122 static void iwl4965_set_rate(struct iwl4965_priv *priv)
3123 {
3124 const struct ieee80211_hw_mode *hw = NULL;
3125 struct ieee80211_rate *rate;
3126 int i;
3127
3128 hw = iwl4965_get_hw_mode(priv, priv->phymode);
3129 if (!hw) {
3130 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
3131 return;
3132 }
3133
3134 priv->active_rate = 0;
3135 priv->active_rate_basic = 0;
3136
3137 IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
3138 hw->mode == MODE_IEEE80211A ?
3139 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
3140
3141 for (i = 0; i < hw->num_rates; i++) {
3142 rate = &(hw->rates[i]);
3143 if ((rate->val < IWL_RATE_COUNT) &&
3144 (rate->flags & IEEE80211_RATE_SUPPORTED)) {
3145 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
3146 rate->val, iwl4965_rates[rate->val].plcp,
3147 (rate->flags & IEEE80211_RATE_BASIC) ?
3148 "*" : "");
3149 priv->active_rate |= (1 << rate->val);
3150 if (rate->flags & IEEE80211_RATE_BASIC)
3151 priv->active_rate_basic |= (1 << rate->val);
3152 } else
3153 IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
3154 rate->val, iwl4965_rates[rate->val].plcp);
3155 }
3156
3157 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3158 priv->active_rate, priv->active_rate_basic);
3159
3160 /*
3161 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3162 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3163 * OFDM
3164 */
3165 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3166 priv->staging_rxon.cck_basic_rates =
3167 ((priv->active_rate_basic &
3168 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3169 else
3170 priv->staging_rxon.cck_basic_rates =
3171 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3172
3173 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3174 priv->staging_rxon.ofdm_basic_rates =
3175 ((priv->active_rate_basic &
3176 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3177 IWL_FIRST_OFDM_RATE) & 0xFF;
3178 else
3179 priv->staging_rxon.ofdm_basic_rates =
3180 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3181 }
3182
3183 static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
3184 {
3185 unsigned long flags;
3186
3187 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3188 return;
3189
3190 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3191 disable_radio ? "OFF" : "ON");
3192
3193 if (disable_radio) {
3194 iwl4965_scan_cancel(priv);
3195 /* FIXME: This is a workaround for AP */
3196 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3197 spin_lock_irqsave(&priv->lock, flags);
3198 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
3199 CSR_UCODE_SW_BIT_RFKILL);
3200 spin_unlock_irqrestore(&priv->lock, flags);
3201 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
3202 set_bit(STATUS_RF_KILL_SW, &priv->status);
3203 }
3204 return;
3205 }
3206
3207 spin_lock_irqsave(&priv->lock, flags);
3208 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3209
3210 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3211 spin_unlock_irqrestore(&priv->lock, flags);
3212
3213 /* wake up ucode */
3214 msleep(10);
3215
3216 spin_lock_irqsave(&priv->lock, flags);
3217 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
3218 if (!iwl4965_grab_nic_access(priv))
3219 iwl4965_release_nic_access(priv);
3220 spin_unlock_irqrestore(&priv->lock, flags);
3221
3222 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3223 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3224 "disabled by HW switch\n");
3225 return;
3226 }
3227
3228 queue_work(priv->workqueue, &priv->restart);
3229 return;
3230 }
3231
3232 void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
3233 u32 decrypt_res, struct ieee80211_rx_status *stats)
3234 {
3235 u16 fc =
3236 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3237
3238 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3239 return;
3240
3241 if (!(fc & IEEE80211_FCTL_PROTECTED))
3242 return;
3243
3244 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3245 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3246 case RX_RES_STATUS_SEC_TYPE_TKIP:
3247 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3248 RX_RES_STATUS_BAD_ICV_MIC)
3249 stats->flag |= RX_FLAG_MMIC_ERROR;
3250 case RX_RES_STATUS_SEC_TYPE_WEP:
3251 case RX_RES_STATUS_SEC_TYPE_CCMP:
3252 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3253 RX_RES_STATUS_DECRYPT_OK) {
3254 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3255 stats->flag |= RX_FLAG_DECRYPTED;
3256 }
3257 break;
3258
3259 default:
3260 break;
3261 }
3262 }
3263
3264
3265 #define IWL_PACKET_RETRY_TIME HZ
3266
3267 int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
3268 {
3269 u16 sc = le16_to_cpu(header->seq_ctrl);
3270 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3271 u16 frag = sc & IEEE80211_SCTL_FRAG;
3272 u16 *last_seq, *last_frag;
3273 unsigned long *last_time;
3274
3275 switch (priv->iw_mode) {
3276 case IEEE80211_IF_TYPE_IBSS:{
3277 struct list_head *p;
3278 struct iwl4965_ibss_seq *entry = NULL;
3279 u8 *mac = header->addr2;
3280 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3281
3282 __list_for_each(p, &priv->ibss_mac_hash[index]) {
3283 entry = list_entry(p, struct iwl4965_ibss_seq, list);
3284 if (!compare_ether_addr(entry->mac, mac))
3285 break;
3286 }
3287 if (p == &priv->ibss_mac_hash[index]) {
3288 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3289 if (!entry) {
3290 IWL_ERROR("Cannot malloc new mac entry\n");
3291 return 0;
3292 }
3293 memcpy(entry->mac, mac, ETH_ALEN);
3294 entry->seq_num = seq;
3295 entry->frag_num = frag;
3296 entry->packet_time = jiffies;
3297 list_add(&entry->list, &priv->ibss_mac_hash[index]);
3298 return 0;
3299 }
3300 last_seq = &entry->seq_num;
3301 last_frag = &entry->frag_num;
3302 last_time = &entry->packet_time;
3303 break;
3304 }
3305 case IEEE80211_IF_TYPE_STA:
3306 last_seq = &priv->last_seq_num;
3307 last_frag = &priv->last_frag_num;
3308 last_time = &priv->last_packet_time;
3309 break;
3310 default:
3311 return 0;
3312 }
3313 if ((*last_seq == seq) &&
3314 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3315 if (*last_frag == frag)
3316 goto drop;
3317 if (*last_frag + 1 != frag)
3318 /* out-of-order fragment */
3319 goto drop;
3320 } else
3321 *last_seq = seq;
3322
3323 *last_frag = frag;
3324 *last_time = jiffies;
3325 return 0;
3326
3327 drop:
3328 return 1;
3329 }
3330
3331 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
3332
3333 #include "iwl-spectrum.h"
3334
3335 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
3336 #define BEACON_TIME_MASK_HIGH 0xFF000000
3337 #define TIME_UNIT 1024
3338
3339 /*
3340 * extended beacon time format
3341 * time in usec will be changed into a 32-bit value in 8:24 format
3342 * the high 1 byte is the beacon counts
3343 * the lower 3 bytes is the time in usec within one beacon interval
3344 */
3345
3346 static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
3347 {
3348 u32 quot;
3349 u32 rem;
3350 u32 interval = beacon_interval * 1024;
3351
3352 if (!interval || !usec)
3353 return 0;
3354
3355 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3356 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3357
3358 return (quot << 24) + rem;
3359 }
3360
3361 /* base is usually what we get from ucode with each received frame,
3362 * the same as HW timer counter counting down
3363 */
3364
3365 static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
3366 {
3367 u32 base_low = base & BEACON_TIME_MASK_LOW;
3368 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3369 u32 interval = beacon_interval * TIME_UNIT;
3370 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3371 (addon & BEACON_TIME_MASK_HIGH);
3372
3373 if (base_low > addon_low)
3374 res += base_low - addon_low;
3375 else if (base_low < addon_low) {
3376 res += interval + base_low - addon_low;
3377 res += (1 << 24);
3378 } else
3379 res += (1 << 24);
3380
3381 return cpu_to_le32(res);
3382 }
3383
3384 static int iwl4965_get_measurement(struct iwl4965_priv *priv,
3385 struct ieee80211_measurement_params *params,
3386 u8 type)
3387 {
3388 struct iwl4965_spectrum_cmd spectrum;
3389 struct iwl4965_rx_packet *res;
3390 struct iwl4965_host_cmd cmd = {
3391 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3392 .data = (void *)&spectrum,
3393 .meta.flags = CMD_WANT_SKB,
3394 };
3395 u32 add_time = le64_to_cpu(params->start_time);
3396 int rc;
3397 int spectrum_resp_status;
3398 int duration = le16_to_cpu(params->duration);
3399
3400 if (iwl4965_is_associated(priv))
3401 add_time =
3402 iwl4965_usecs_to_beacons(
3403 le64_to_cpu(params->start_time) - priv->last_tsf,
3404 le16_to_cpu(priv->rxon_timing.beacon_interval));
3405
3406 memset(&spectrum, 0, sizeof(spectrum));
3407
3408 spectrum.channel_count = cpu_to_le16(1);
3409 spectrum.flags =
3410 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3411 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3412 cmd.len = sizeof(spectrum);
3413 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3414
3415 if (iwl4965_is_associated(priv))
3416 spectrum.start_time =
3417 iwl4965_add_beacon_time(priv->last_beacon_time,
3418 add_time,
3419 le16_to_cpu(priv->rxon_timing.beacon_interval));
3420 else
3421 spectrum.start_time = 0;
3422
3423 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3424 spectrum.channels[0].channel = params->channel;
3425 spectrum.channels[0].type = type;
3426 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3427 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3428 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3429
3430 rc = iwl4965_send_cmd_sync(priv, &cmd);
3431 if (rc)
3432 return rc;
3433
3434 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
3435 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3436 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3437 rc = -EIO;
3438 }
3439
3440 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3441 switch (spectrum_resp_status) {
3442 case 0: /* Command will be handled */
3443 if (res->u.spectrum.id != 0xff) {
3444 IWL_DEBUG_INFO
3445 ("Replaced existing measurement: %d\n",
3446 res->u.spectrum.id);
3447 priv->measurement_status &= ~MEASUREMENT_READY;
3448 }
3449 priv->measurement_status |= MEASUREMENT_ACTIVE;
3450 rc = 0;
3451 break;
3452
3453 case 1: /* Command will not be handled */
3454 rc = -EAGAIN;
3455 break;
3456 }
3457
3458 dev_kfree_skb_any(cmd.meta.u.skb);
3459
3460 return rc;
3461 }
3462 #endif
3463
3464 static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
3465 struct iwl4965_tx_info *tx_sta)
3466 {
3467
3468 tx_sta->status.ack_signal = 0;
3469 tx_sta->status.excessive_retries = 0;
3470 tx_sta->status.queue_length = 0;
3471 tx_sta->status.queue_number = 0;
3472
3473 if (in_interrupt())
3474 ieee80211_tx_status_irqsafe(priv->hw,
3475 tx_sta->skb[0], &(tx_sta->status));
3476 else
3477 ieee80211_tx_status(priv->hw,
3478 tx_sta->skb[0], &(tx_sta->status));
3479
3480 tx_sta->skb[0] = NULL;
3481 }
3482
3483 /**
3484 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
3485 *
3486 * When FW advances 'R' index, all entries between old and new 'R' index
3487 * need to be reclaimed. As result, some free space forms. If there is
3488 * enough free space (> low mark), wake the stack that feeds us.
3489 */
3490 int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
3491 {
3492 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3493 struct iwl4965_queue *q = &txq->q;
3494 int nfreed = 0;
3495
3496 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3497 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3498 "is out of range [0-%d] %d %d.\n", txq_id,
3499 index, q->n_bd, q->write_ptr, q->read_ptr);
3500 return 0;
3501 }
3502
3503 for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
3504 q->read_ptr != index;
3505 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3506 if (txq_id != IWL_CMD_QUEUE_NUM) {
3507 iwl4965_txstatus_to_ieee(priv,
3508 &(txq->txb[txq->q.read_ptr]));
3509 iwl4965_hw_txq_free_tfd(priv, txq);
3510 } else if (nfreed > 1) {
3511 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3512 q->write_ptr, q->read_ptr);
3513 queue_work(priv->workqueue, &priv->restart);
3514 }
3515 nfreed++;
3516 }
3517
3518 if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
3519 (txq_id != IWL_CMD_QUEUE_NUM) &&
3520 priv->mac80211_registered)
3521 ieee80211_wake_queue(priv->hw, txq_id);
3522
3523
3524 return nfreed;
3525 }
3526
3527 static int iwl4965_is_tx_success(u32 status)
3528 {
3529 status &= TX_STATUS_MSK;
3530 return (status == TX_STATUS_SUCCESS)
3531 || (status == TX_STATUS_DIRECT_DONE);
3532 }
3533
3534 /******************************************************************************
3535 *
3536 * Generic RX handler implementations
3537 *
3538 ******************************************************************************/
3539 #ifdef CONFIG_IWL4965_HT
3540 #ifdef CONFIG_IWL4965_HT_AGG
3541
3542 static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
3543 struct ieee80211_hdr *hdr)
3544 {
3545 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
3546 return IWL_AP_ID;
3547 else {
3548 u8 *da = ieee80211_get_DA(hdr);
3549 return iwl4965_hw_find_station(priv, da);
3550 }
3551 }
3552
3553 static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
3554 struct iwl4965_priv *priv, int txq_id, int idx)
3555 {
3556 if (priv->txq[txq_id].txb[idx].skb[0])
3557 return (struct ieee80211_hdr *)priv->txq[txq_id].
3558 txb[idx].skb[0]->data;
3559 return NULL;
3560 }
3561
3562 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
3563 {
3564 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3565 tx_resp->frame_count);
3566 return le32_to_cpu(*scd_ssn) & MAX_SN;
3567
3568 }
3569
3570 /**
3571 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3572 */
3573 static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
3574 struct iwl4965_ht_agg *agg,
3575 struct iwl4965_tx_resp *tx_resp,
3576 u16 start_idx)
3577 {
3578 u32 status;
3579 __le32 *frame_status = &tx_resp->status;
3580 struct ieee80211_tx_status *tx_status = NULL;
3581 struct ieee80211_hdr *hdr = NULL;
3582 int i, sh;
3583 int txq_id, idx;
3584 u16 seq;
3585
3586 if (agg->wait_for_ba)
3587 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
3588
3589 agg->frame_count = tx_resp->frame_count;
3590 agg->start_idx = start_idx;
3591 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3592 agg->bitmap0 = agg->bitmap1 = 0;
3593
3594 /* # frames attempted by Tx command */
3595 if (agg->frame_count == 1) {
3596 /* Only one frame was attempted; no block-ack will arrive */
3597 struct iwl4965_tx_queue *txq ;
3598 status = le32_to_cpu(frame_status[0]);
3599
3600 txq_id = agg->txq_id;
3601 txq = &priv->txq[txq_id];
3602 /* FIXME: code repetition */
3603 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
3604 agg->frame_count, agg->start_idx);
3605
3606 tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
3607 tx_status->retry_count = tx_resp->failure_frame;
3608 tx_status->queue_number = status & 0xff;
3609 tx_status->queue_length = tx_resp->bt_kill_count;
3610 tx_status->queue_length |= tx_resp->failure_rts;
3611
3612 tx_status->flags = iwl4965_is_tx_success(status)?
3613 IEEE80211_TX_STATUS_ACK : 0;
3614 tx_status->control.tx_rate =
3615 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
3616 /* FIXME: code repetition end */
3617
3618 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3619 status & 0xff, tx_resp->failure_frame);
3620 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
3621 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
3622
3623 agg->wait_for_ba = 0;
3624 } else {
3625 /* Two or more frames were attempted; expect block-ack */
3626 u64 bitmap = 0;
3627 int start = agg->start_idx;
3628
3629 /* Construct bit-map of pending frames within Tx window */
3630 for (i = 0; i < agg->frame_count; i++) {
3631 u16 sc;
3632 status = le32_to_cpu(frame_status[i]);
3633 seq = status >> 16;
3634 idx = SEQ_TO_INDEX(seq);
3635 txq_id = SEQ_TO_QUEUE(seq);
3636
3637 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3638 AGG_TX_STATE_ABORT_MSK))
3639 continue;
3640
3641 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3642 agg->frame_count, txq_id, idx);
3643
3644 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
3645
3646 sc = le16_to_cpu(hdr->seq_ctrl);
3647 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3648 IWL_ERROR("BUG_ON idx doesn't match seq control"
3649 " idx=%d, seq_idx=%d, seq=%d\n",
3650 idx, SEQ_TO_SN(sc),
3651 hdr->seq_ctrl);
3652 return -1;
3653 }
3654
3655 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3656 i, idx, SEQ_TO_SN(sc));
3657
3658 sh = idx - start;
3659 if (sh > 64) {
3660 sh = (start - idx) + 0xff;
3661 bitmap = bitmap << sh;
3662 sh = 0;
3663 start = idx;
3664 } else if (sh < -64)
3665 sh = 0xff - (start - idx);
3666 else if (sh < 0) {
3667 sh = start - idx;
3668 start = idx;
3669 bitmap = bitmap << sh;
3670 sh = 0;
3671 }
3672 bitmap |= (1 << sh);
3673 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3674 start, (u32)(bitmap & 0xFFFFFFFF));
3675 }
3676
3677 agg->bitmap0 = bitmap & 0xFFFFFFFF;
3678 agg->bitmap1 = bitmap >> 32;
3679 agg->start_idx = start;
3680 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3681 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
3682 agg->frame_count, agg->start_idx,
3683 agg->bitmap0);
3684
3685 if (bitmap)
3686 agg->wait_for_ba = 1;
3687 }
3688 return 0;
3689 }
3690 #endif
3691 #endif
3692
3693 /**
3694 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3695 */
3696 static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
3697 struct iwl4965_rx_mem_buffer *rxb)
3698 {
3699 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3700 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3701 int txq_id = SEQ_TO_QUEUE(sequence);
3702 int index = SEQ_TO_INDEX(sequence);
3703 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3704 struct ieee80211_tx_status *tx_status;
3705 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3706 u32 status = le32_to_cpu(tx_resp->status);
3707 #ifdef CONFIG_IWL4965_HT
3708 #ifdef CONFIG_IWL4965_HT_AGG
3709 int tid, sta_id;
3710 #endif
3711 #endif
3712
3713 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3714 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3715 "is out of range [0-%d] %d %d\n", txq_id,
3716 index, txq->q.n_bd, txq->q.write_ptr,
3717 txq->q.read_ptr);
3718 return;
3719 }
3720
3721 #ifdef CONFIG_IWL4965_HT
3722 #ifdef CONFIG_IWL4965_HT_AGG
3723 if (txq->sched_retry) {
3724 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
3725 struct ieee80211_hdr *hdr =
3726 iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3727 struct iwl4965_ht_agg *agg = NULL;
3728 __le16 *qc = ieee80211_get_qos_ctrl(hdr);
3729
3730 if (qc == NULL) {
3731 IWL_ERROR("BUG_ON qc is null!!!!\n");
3732 return;
3733 }
3734
3735 tid = le16_to_cpu(*qc) & 0xf;
3736
3737 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
3738 if (unlikely(sta_id == IWL_INVALID_STATION)) {
3739 IWL_ERROR("Station not known for\n");
3740 return;
3741 }
3742
3743 agg = &priv->stations[sta_id].tid[tid].agg;
3744
3745 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
3746
3747 if ((tx_resp->frame_count == 1) &&
3748 !iwl4965_is_tx_success(status)) {
3749 /* TODO: send BAR */
3750 }
3751
3752 if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
3753 index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
3754 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3755 "%d index %d\n", scd_ssn , index);
3756 iwl4965_tx_queue_reclaim(priv, txq_id, index);
3757 }
3758 } else {
3759 #endif /* CONFIG_IWL4965_HT_AGG */
3760 #endif /* CONFIG_IWL4965_HT */
3761 tx_status = &(txq->txb[txq->q.read_ptr].status);
3762
3763 tx_status->retry_count = tx_resp->failure_frame;
3764 tx_status->queue_number = status;
3765 tx_status->queue_length = tx_resp->bt_kill_count;
3766 tx_status->queue_length |= tx_resp->failure_rts;
3767
3768 tx_status->flags =
3769 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
3770
3771 tx_status->control.tx_rate =
3772 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
3773
3774 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
3775 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
3776 status, le32_to_cpu(tx_resp->rate_n_flags),
3777 tx_resp->failure_frame);
3778
3779 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3780 if (index != -1)
3781 iwl4965_tx_queue_reclaim(priv, txq_id, index);
3782 #ifdef CONFIG_IWL4965_HT
3783 #ifdef CONFIG_IWL4965_HT_AGG
3784 }
3785 #endif /* CONFIG_IWL4965_HT_AGG */
3786 #endif /* CONFIG_IWL4965_HT */
3787
3788 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3789 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3790 }
3791
3792
3793 static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
3794 struct iwl4965_rx_mem_buffer *rxb)
3795 {
3796 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3797 struct iwl4965_alive_resp *palive;
3798 struct delayed_work *pwork;
3799
3800 palive = &pkt->u.alive_frame;
3801
3802 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3803 "0x%01X 0x%01X\n",
3804 palive->is_valid, palive->ver_type,
3805 palive->ver_subtype);
3806
3807 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3808 IWL_DEBUG_INFO("Initialization Alive received.\n");
3809 memcpy(&priv->card_alive_init,
3810 &pkt->u.alive_frame,
3811 sizeof(struct iwl4965_init_alive_resp));
3812 pwork = &priv->init_alive_start;
3813 } else {
3814 IWL_DEBUG_INFO("Runtime Alive received.\n");
3815 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3816 sizeof(struct iwl4965_alive_resp));
3817 pwork = &priv->alive_start;
3818 }
3819
3820 /* We delay the ALIVE response by 5ms to
3821 * give the HW RF Kill time to activate... */
3822 if (palive->is_valid == UCODE_VALID_OK)
3823 queue_delayed_work(priv->workqueue, pwork,
3824 msecs_to_jiffies(5));
3825 else
3826 IWL_WARNING("uCode did not respond OK.\n");
3827 }
3828
3829 static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
3830 struct iwl4965_rx_mem_buffer *rxb)
3831 {
3832 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3833
3834 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3835 return;
3836 }
3837
3838 static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
3839 struct iwl4965_rx_mem_buffer *rxb)
3840 {
3841 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3842
3843 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3844 "seq 0x%04X ser 0x%08X\n",
3845 le32_to_cpu(pkt->u.err_resp.error_type),
3846 get_cmd_string(pkt->u.err_resp.cmd_id),
3847 pkt->u.err_resp.cmd_id,
3848 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3849 le32_to_cpu(pkt->u.err_resp.error_info));
3850 }
3851
3852 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3853
3854 static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
3855 {
3856 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3857 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3858 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
3859 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3860 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3861 rxon->channel = csa->channel;
3862 priv->staging_rxon.channel = csa->channel;
3863 }
3864
3865 static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
3866 struct iwl4965_rx_mem_buffer *rxb)
3867 {
3868 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
3869 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3870 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
3871
3872 if (!report->state) {
3873 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3874 "Spectrum Measure Notification: Start\n");
3875 return;
3876 }
3877
3878 memcpy(&priv->measure_report, report, sizeof(*report));
3879 priv->measurement_status |= MEASUREMENT_READY;
3880 #endif
3881 }
3882
3883 static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
3884 struct iwl4965_rx_mem_buffer *rxb)
3885 {
3886 #ifdef CONFIG_IWL4965_DEBUG
3887 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3888 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
3889 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3890 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3891 #endif
3892 }
3893
3894 static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
3895 struct iwl4965_rx_mem_buffer *rxb)
3896 {
3897 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3898 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3899 "notification for %s:\n",
3900 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3901 iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3902 }
3903
3904 static void iwl4965_bg_beacon_update(struct work_struct *work)
3905 {
3906 struct iwl4965_priv *priv =
3907 container_of(work, struct iwl4965_priv, beacon_update);
3908 struct sk_buff *beacon;
3909
3910 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3911 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
3912
3913 if (!beacon) {
3914 IWL_ERROR("update beacon failed\n");
3915 return;
3916 }
3917
3918 mutex_lock(&priv->mutex);
3919 /* new beacon skb is allocated every time; dispose previous.*/
3920 if (priv->ibss_beacon)
3921 dev_kfree_skb(priv->ibss_beacon);
3922
3923 priv->ibss_beacon = beacon;
3924 mutex_unlock(&priv->mutex);
3925
3926 iwl4965_send_beacon_cmd(priv);
3927 }
3928
3929 static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
3930 struct iwl4965_rx_mem_buffer *rxb)
3931 {
3932 #ifdef CONFIG_IWL4965_DEBUG
3933 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3934 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3935 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
3936
3937 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3938 "tsf %d %d rate %d\n",
3939 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3940 beacon->beacon_notify_hdr.failure_frame,
3941 le32_to_cpu(beacon->ibss_mgr_status),
3942 le32_to_cpu(beacon->high_tsf),
3943 le32_to_cpu(beacon->low_tsf), rate);
3944 #endif
3945
3946 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3947 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3948 queue_work(priv->workqueue, &priv->beacon_update);
3949 }
3950
3951 /* Service response to REPLY_SCAN_CMD (0x80) */
3952 static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
3953 struct iwl4965_rx_mem_buffer *rxb)
3954 {
3955 #ifdef CONFIG_IWL4965_DEBUG
3956 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3957 struct iwl4965_scanreq_notification *notif =
3958 (struct iwl4965_scanreq_notification *)pkt->u.raw;
3959
3960 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3961 #endif
3962 }
3963
3964 /* Service SCAN_START_NOTIFICATION (0x82) */
3965 static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
3966 struct iwl4965_rx_mem_buffer *rxb)
3967 {
3968 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3969 struct iwl4965_scanstart_notification *notif =
3970 (struct iwl4965_scanstart_notification *)pkt->u.raw;
3971 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3972 IWL_DEBUG_SCAN("Scan start: "
3973 "%d [802.11%s] "
3974 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3975 notif->channel,
3976 notif->band ? "bg" : "a",
3977 notif->tsf_high,
3978 notif->tsf_low, notif->status, notif->beacon_timer);
3979 }
3980
3981 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3982 static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
3983 struct iwl4965_rx_mem_buffer *rxb)
3984 {
3985 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3986 struct iwl4965_scanresults_notification *notif =
3987 (struct iwl4965_scanresults_notification *)pkt->u.raw;
3988
3989 IWL_DEBUG_SCAN("Scan ch.res: "
3990 "%d [802.11%s] "
3991 "(TSF: 0x%08X:%08X) - %d "
3992 "elapsed=%lu usec (%dms since last)\n",
3993 notif->channel,
3994 notif->band ? "bg" : "a",
3995 le32_to_cpu(notif->tsf_high),
3996 le32_to_cpu(notif->tsf_low),
3997 le32_to_cpu(notif->statistics[0]),
3998 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3999 jiffies_to_msecs(elapsed_jiffies
4000 (priv->last_scan_jiffies, jiffies)));
4001
4002 priv->last_scan_jiffies = jiffies;
4003 priv->next_scan_jiffies = 0;
4004 }
4005
4006 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
4007 static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
4008 struct iwl4965_rx_mem_buffer *rxb)
4009 {
4010 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4011 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
4012
4013 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
4014 scan_notif->scanned_channels,
4015 scan_notif->tsf_low,
4016 scan_notif->tsf_high, scan_notif->status);
4017
4018 /* The HW is no longer scanning */
4019 clear_bit(STATUS_SCAN_HW, &priv->status);
4020
4021 /* The scan completion notification came in, so kill that timer... */
4022 cancel_delayed_work(&priv->scan_check);
4023
4024 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
4025 (priv->scan_bands == 2) ? "2.4" : "5.2",
4026 jiffies_to_msecs(elapsed_jiffies
4027 (priv->scan_pass_start, jiffies)));
4028
4029 /* Remove this scanned band from the list
4030 * of pending bands to scan */
4031 priv->scan_bands--;
4032
4033 /* If a request to abort was given, or the scan did not succeed
4034 * then we reset the scan state machine and terminate,
4035 * re-queuing another scan if one has been requested */
4036 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
4037 IWL_DEBUG_INFO("Aborted scan completed.\n");
4038 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
4039 } else {
4040 /* If there are more bands on this scan pass reschedule */
4041 if (priv->scan_bands > 0)
4042 goto reschedule;
4043 }
4044
4045 priv->last_scan_jiffies = jiffies;
4046 priv->next_scan_jiffies = 0;
4047 IWL_DEBUG_INFO("Setting scan to off\n");
4048
4049 clear_bit(STATUS_SCANNING, &priv->status);
4050
4051 IWL_DEBUG_INFO("Scan took %dms\n",
4052 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
4053
4054 queue_work(priv->workqueue, &priv->scan_completed);
4055
4056 return;
4057
4058 reschedule:
4059 priv->scan_pass_start = jiffies;
4060 queue_work(priv->workqueue, &priv->request_scan);
4061 }
4062
4063 /* Handle notification from uCode that card's power state is changing
4064 * due to software, hardware, or critical temperature RFKILL */
4065 static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
4066 struct iwl4965_rx_mem_buffer *rxb)
4067 {
4068 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4069 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
4070 unsigned long status = priv->status;
4071
4072 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
4073 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
4074 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
4075
4076 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
4077 RF_CARD_DISABLED)) {
4078
4079 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
4080 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4081
4082 if (!iwl4965_grab_nic_access(priv)) {
4083 iwl4965_write_direct32(
4084 priv, HBUS_TARG_MBX_C,
4085 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4086
4087 iwl4965_release_nic_access(priv);
4088 }
4089
4090 if (!(flags & RXON_CARD_DISABLED)) {
4091 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
4092 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4093 if (!iwl4965_grab_nic_access(priv)) {
4094 iwl4965_write_direct32(
4095 priv, HBUS_TARG_MBX_C,
4096 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4097
4098 iwl4965_release_nic_access(priv);
4099 }
4100 }
4101
4102 if (flags & RF_CARD_DISABLED) {
4103 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
4104 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
4105 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4106 if (!iwl4965_grab_nic_access(priv))
4107 iwl4965_release_nic_access(priv);
4108 }
4109 }
4110
4111 if (flags & HW_CARD_DISABLED)
4112 set_bit(STATUS_RF_KILL_HW, &priv->status);
4113 else
4114 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4115
4116
4117 if (flags & SW_CARD_DISABLED)
4118 set_bit(STATUS_RF_KILL_SW, &priv->status);
4119 else
4120 clear_bit(STATUS_RF_KILL_SW, &priv->status);
4121
4122 if (!(flags & RXON_CARD_DISABLED))
4123 iwl4965_scan_cancel(priv);
4124
4125 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
4126 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
4127 (test_bit(STATUS_RF_KILL_SW, &status) !=
4128 test_bit(STATUS_RF_KILL_SW, &priv->status)))
4129 queue_work(priv->workqueue, &priv->rf_kill);
4130 else
4131 wake_up_interruptible(&priv->wait_command_queue);
4132 }
4133
4134 /**
4135 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
4136 *
4137 * Setup the RX handlers for each of the reply types sent from the uCode
4138 * to the host.
4139 *
4140 * This function chains into the hardware specific files for them to setup
4141 * any hardware specific handlers as well.
4142 */
4143 static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
4144 {
4145 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
4146 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
4147 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
4148 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
4149 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
4150 iwl4965_rx_spectrum_measure_notif;
4151 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
4152 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
4153 iwl4965_rx_pm_debug_statistics_notif;
4154 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
4155
4156 /*
4157 * The same handler is used for both the REPLY to a discrete
4158 * statistics request from the host as well as for the periodic
4159 * statistics notifications (after received beacons) from the uCode.
4160 */
4161 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
4162 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
4163
4164 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
4165 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
4166 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
4167 iwl4965_rx_scan_results_notif;
4168 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
4169 iwl4965_rx_scan_complete_notif;
4170 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
4171 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
4172
4173 /* Set up hardware specific Rx handlers */
4174 iwl4965_hw_rx_handler_setup(priv);
4175 }
4176
4177 /**
4178 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
4179 * @rxb: Rx buffer to reclaim
4180 *
4181 * If an Rx buffer has an async callback associated with it the callback
4182 * will be executed. The attached skb (if present) will only be freed
4183 * if the callback returns 1
4184 */
4185 static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
4186 struct iwl4965_rx_mem_buffer *rxb)
4187 {
4188 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
4189 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
4190 int txq_id = SEQ_TO_QUEUE(sequence);
4191 int index = SEQ_TO_INDEX(sequence);
4192 int huge = sequence & SEQ_HUGE_FRAME;
4193 int cmd_index;
4194 struct iwl4965_cmd *cmd;
4195
4196 /* If a Tx command is being handled and it isn't in the actual
4197 * command queue then there a command routing bug has been introduced
4198 * in the queue management code. */
4199 if (txq_id != IWL_CMD_QUEUE_NUM)
4200 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
4201 txq_id, pkt->hdr.cmd);
4202 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
4203
4204 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
4205 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
4206
4207 /* Input error checking is done when commands are added to queue. */
4208 if (cmd->meta.flags & CMD_WANT_SKB) {
4209 cmd->meta.source->u.skb = rxb->skb;
4210 rxb->skb = NULL;
4211 } else if (cmd->meta.u.callback &&
4212 !cmd->meta.u.callback(priv, cmd, rxb->skb))
4213 rxb->skb = NULL;
4214
4215 iwl4965_tx_queue_reclaim(priv, txq_id, index);
4216
4217 if (!(cmd->meta.flags & CMD_ASYNC)) {
4218 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4219 wake_up_interruptible(&priv->wait_command_queue);
4220 }
4221 }
4222
4223 /************************** RX-FUNCTIONS ****************************/
4224 /*
4225 * Rx theory of operation
4226 *
4227 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
4228 * each of which point to Receive Buffers to be filled by 4965. These get
4229 * used not only for Rx frames, but for any command response or notification
4230 * from the 4965. The driver and 4965 manage the Rx buffers by means
4231 * of indexes into the circular buffer.
4232 *
4233 * Rx Queue Indexes
4234 * The host/firmware share two index registers for managing the Rx buffers.
4235 *
4236 * The READ index maps to the first position that the firmware may be writing
4237 * to -- the driver can read up to (but not including) this position and get
4238 * good data.
4239 * The READ index is managed by the firmware once the card is enabled.
4240 *
4241 * The WRITE index maps to the last position the driver has read from -- the
4242 * position preceding WRITE is the last slot the firmware can place a packet.
4243 *
4244 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
4245 * WRITE = READ.
4246 *
4247 * During initialization, the host sets up the READ queue position to the first
4248 * INDEX position, and WRITE to the last (READ - 1 wrapped)
4249 *
4250 * When the firmware places a packet in a buffer, it will advance the READ index
4251 * and fire the RX interrupt. The driver can then query the READ index and
4252 * process as many packets as possible, moving the WRITE index forward as it
4253 * resets the Rx queue buffers with new memory.
4254 *
4255 * The management in the driver is as follows:
4256 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
4257 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
4258 * to replenish the iwl->rxq->rx_free.
4259 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
4260 * iwl->rxq is replenished and the READ INDEX is updated (updating the
4261 * 'processed' and 'read' driver indexes as well)
4262 * + A received packet is processed and handed to the kernel network stack,
4263 * detached from the iwl->rxq. The driver 'processed' index is updated.
4264 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
4265 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
4266 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
4267 * were enough free buffers and RX_STALLED is set it is cleared.
4268 *
4269 *
4270 * Driver sequence:
4271 *
4272 * iwl4965_rx_queue_alloc() Allocates rx_free
4273 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
4274 * iwl4965_rx_queue_restock
4275 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
4276 * queue, updates firmware pointers, and updates
4277 * the WRITE index. If insufficient rx_free buffers
4278 * are available, schedules iwl4965_rx_replenish
4279 *
4280 * -- enable interrupts --
4281 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
4282 * READ INDEX, detaching the SKB from the pool.
4283 * Moves the packet buffer from queue to rx_used.
4284 * Calls iwl4965_rx_queue_restock to refill any empty
4285 * slots.
4286 * ...
4287 *
4288 */
4289
4290 /**
4291 * iwl4965_rx_queue_space - Return number of free slots available in queue.
4292 */
4293 static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
4294 {
4295 int s = q->read - q->write;
4296 if (s <= 0)
4297 s += RX_QUEUE_SIZE;
4298 /* keep some buffer to not confuse full and empty queue */
4299 s -= 2;
4300 if (s < 0)
4301 s = 0;
4302 return s;
4303 }
4304
4305 /**
4306 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
4307 */
4308 int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
4309 {
4310 u32 reg = 0;
4311 int rc = 0;
4312 unsigned long flags;
4313
4314 spin_lock_irqsave(&q->lock, flags);
4315
4316 if (q->need_update == 0)
4317 goto exit_unlock;
4318
4319 /* If power-saving is in use, make sure device is awake */
4320 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4321 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4322
4323 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4324 iwl4965_set_bit(priv, CSR_GP_CNTRL,
4325 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4326 goto exit_unlock;
4327 }
4328
4329 rc = iwl4965_grab_nic_access(priv);
4330 if (rc)
4331 goto exit_unlock;
4332
4333 /* Device expects a multiple of 8 */
4334 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
4335 q->write & ~0x7);
4336 iwl4965_release_nic_access(priv);
4337
4338 /* Else device is assumed to be awake */
4339 } else
4340 /* Device expects a multiple of 8 */
4341 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
4342
4343
4344 q->need_update = 0;
4345
4346 exit_unlock:
4347 spin_unlock_irqrestore(&q->lock, flags);
4348 return rc;
4349 }
4350
4351 /**
4352 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
4353 */
4354 static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
4355 dma_addr_t dma_addr)
4356 {
4357 return cpu_to_le32((u32)(dma_addr >> 8));
4358 }
4359
4360
4361 /**
4362 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
4363 *
4364 * If there are slots in the RX queue that need to be restocked,
4365 * and we have free pre-allocated buffers, fill the ranks as much
4366 * as we can, pulling from rx_free.
4367 *
4368 * This moves the 'write' index forward to catch up with 'processed', and
4369 * also updates the memory address in the firmware to reference the new
4370 * target buffer.
4371 */
4372 static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
4373 {
4374 struct iwl4965_rx_queue *rxq = &priv->rxq;
4375 struct list_head *element;
4376 struct iwl4965_rx_mem_buffer *rxb;
4377 unsigned long flags;
4378 int write, rc;
4379
4380 spin_lock_irqsave(&rxq->lock, flags);
4381 write = rxq->write & ~0x7;
4382 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
4383 /* Get next free Rx buffer, remove from free list */
4384 element = rxq->rx_free.next;
4385 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
4386 list_del(element);
4387
4388 /* Point to Rx buffer via next RBD in circular buffer */
4389 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
4390 rxq->queue[rxq->write] = rxb;
4391 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4392 rxq->free_count--;
4393 }
4394 spin_unlock_irqrestore(&rxq->lock, flags);
4395 /* If the pre-allocated buffer pool is dropping low, schedule to
4396 * refill it */
4397 if (rxq->free_count <= RX_LOW_WATERMARK)
4398 queue_work(priv->workqueue, &priv->rx_replenish);
4399
4400
4401 /* If we've added more space for the firmware to place data, tell it.
4402 * Increment device's write pointer in multiples of 8. */
4403 if ((write != (rxq->write & ~0x7))
4404 || (abs(rxq->write - rxq->read) > 7)) {
4405 spin_lock_irqsave(&rxq->lock, flags);
4406 rxq->need_update = 1;
4407 spin_unlock_irqrestore(&rxq->lock, flags);
4408 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
4409 if (rc)
4410 return rc;
4411 }
4412
4413 return 0;
4414 }
4415
4416 /**
4417 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
4418 *
4419 * When moving to rx_free an SKB is allocated for the slot.
4420 *
4421 * Also restock the Rx queue via iwl4965_rx_queue_restock.
4422 * This is called as a scheduled work item (except for during initialization)
4423 */
4424 static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
4425 {
4426 struct iwl4965_rx_queue *rxq = &priv->rxq;
4427 struct list_head *element;
4428 struct iwl4965_rx_mem_buffer *rxb;
4429 unsigned long flags;
4430 spin_lock_irqsave(&rxq->lock, flags);
4431 while (!list_empty(&rxq->rx_used)) {
4432 element = rxq->rx_used.next;
4433 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
4434
4435 /* Alloc a new receive buffer */
4436 rxb->skb =
4437 alloc_skb(priv->hw_setting.rx_buf_size,
4438 __GFP_NOWARN | GFP_ATOMIC);
4439 if (!rxb->skb) {
4440 if (net_ratelimit())
4441 printk(KERN_CRIT DRV_NAME
4442 ": Can not allocate SKB buffers\n");
4443 /* We don't reschedule replenish work here -- we will
4444 * call the restock method and if it still needs
4445 * more buffers it will schedule replenish */
4446 break;
4447 }
4448 priv->alloc_rxb_skb++;
4449 list_del(element);
4450
4451 /* Get physical address of RB/SKB */
4452 rxb->dma_addr =
4453 pci_map_single(priv->pci_dev, rxb->skb->data,
4454 priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
4455 list_add_tail(&rxb->list, &rxq->rx_free);
4456 rxq->free_count++;
4457 }
4458 spin_unlock_irqrestore(&rxq->lock, flags);
4459 }
4460
4461 /*
4462 * this should be called while priv->lock is locked
4463 */
4464 static void __iwl4965_rx_replenish(void *data)
4465 {
4466 struct iwl4965_priv *priv = data;
4467
4468 iwl4965_rx_allocate(priv);
4469 iwl4965_rx_queue_restock(priv);
4470 }
4471
4472
4473 void iwl4965_rx_replenish(void *data)
4474 {
4475 struct iwl4965_priv *priv = data;
4476 unsigned long flags;
4477
4478 iwl4965_rx_allocate(priv);
4479
4480 spin_lock_irqsave(&priv->lock, flags);
4481 iwl4965_rx_queue_restock(priv);
4482 spin_unlock_irqrestore(&priv->lock, flags);
4483 }
4484
4485 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
4486 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
4487 * This free routine walks the list of POOL entries and if SKB is set to
4488 * non NULL it is unmapped and freed
4489 */
4490 static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
4491 {
4492 int i;
4493 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4494 if (rxq->pool[i].skb != NULL) {
4495 pci_unmap_single(priv->pci_dev,
4496 rxq->pool[i].dma_addr,
4497 priv->hw_setting.rx_buf_size,
4498 PCI_DMA_FROMDEVICE);
4499 dev_kfree_skb(rxq->pool[i].skb);
4500 }
4501 }
4502
4503 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4504 rxq->dma_addr);
4505 rxq->bd = NULL;
4506 }
4507
4508 int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
4509 {
4510 struct iwl4965_rx_queue *rxq = &priv->rxq;
4511 struct pci_dev *dev = priv->pci_dev;
4512 int i;
4513
4514 spin_lock_init(&rxq->lock);
4515 INIT_LIST_HEAD(&rxq->rx_free);
4516 INIT_LIST_HEAD(&rxq->rx_used);
4517
4518 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
4519 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4520 if (!rxq->bd)
4521 return -ENOMEM;
4522
4523 /* Fill the rx_used queue with _all_ of the Rx buffers */
4524 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4525 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4526
4527 /* Set us so that we have processed and used all buffers, but have
4528 * not restocked the Rx queue with fresh buffers */
4529 rxq->read = rxq->write = 0;
4530 rxq->free_count = 0;
4531 rxq->need_update = 0;
4532 return 0;
4533 }
4534
4535 void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
4536 {
4537 unsigned long flags;
4538 int i;
4539 spin_lock_irqsave(&rxq->lock, flags);
4540 INIT_LIST_HEAD(&rxq->rx_free);
4541 INIT_LIST_HEAD(&rxq->rx_used);
4542 /* Fill the rx_used queue with _all_ of the Rx buffers */
4543 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4544 /* In the reset function, these buffers may have been allocated
4545 * to an SKB, so we need to unmap and free potential storage */
4546 if (rxq->pool[i].skb != NULL) {
4547 pci_unmap_single(priv->pci_dev,
4548 rxq->pool[i].dma_addr,
4549 priv->hw_setting.rx_buf_size,
4550 PCI_DMA_FROMDEVICE);
4551 priv->alloc_rxb_skb--;
4552 dev_kfree_skb(rxq->pool[i].skb);
4553 rxq->pool[i].skb = NULL;
4554 }
4555 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4556 }
4557
4558 /* Set us so that we have processed and used all buffers, but have
4559 * not restocked the Rx queue with fresh buffers */
4560 rxq->read = rxq->write = 0;
4561 rxq->free_count = 0;
4562 spin_unlock_irqrestore(&rxq->lock, flags);
4563 }
4564
4565 /* Convert linear signal-to-noise ratio into dB */
4566 static u8 ratio2dB[100] = {
4567 /* 0 1 2 3 4 5 6 7 8 9 */
4568 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4569 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4570 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4571 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4572 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4573 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4574 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4575 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4576 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4577 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4578 };
4579
4580 /* Calculates a relative dB value from a ratio of linear
4581 * (i.e. not dB) signal levels.
4582 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
4583 int iwl4965_calc_db_from_ratio(int sig_ratio)
4584 {
4585 /* 1000:1 or higher just report as 60 dB */
4586 if (sig_ratio >= 1000)
4587 return 60;
4588
4589 /* 100:1 or higher, divide by 10 and use table,
4590 * add 20 dB to make up for divide by 10 */
4591 if (sig_ratio >= 100)
4592 return (20 + (int)ratio2dB[sig_ratio/10]);
4593
4594 /* We shouldn't see this */
4595 if (sig_ratio < 1)
4596 return 0;
4597
4598 /* Use table for ratios 1:1 - 99:1 */
4599 return (int)ratio2dB[sig_ratio];
4600 }
4601
4602 #define PERFECT_RSSI (-20) /* dBm */
4603 #define WORST_RSSI (-95) /* dBm */
4604 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4605
4606 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
4607 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4608 * about formulas used below. */
4609 int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
4610 {
4611 int sig_qual;
4612 int degradation = PERFECT_RSSI - rssi_dbm;
4613
4614 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4615 * as indicator; formula is (signal dbm - noise dbm).
4616 * SNR at or above 40 is a great signal (100%).
4617 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4618 * Weakest usable signal is usually 10 - 15 dB SNR. */
4619 if (noise_dbm) {
4620 if (rssi_dbm - noise_dbm >= 40)
4621 return 100;
4622 else if (rssi_dbm < noise_dbm)
4623 return 0;
4624 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4625
4626 /* Else use just the signal level.
4627 * This formula is a least squares fit of data points collected and
4628 * compared with a reference system that had a percentage (%) display
4629 * for signal quality. */
4630 } else
4631 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4632 (15 * RSSI_RANGE + 62 * degradation)) /
4633 (RSSI_RANGE * RSSI_RANGE);
4634
4635 if (sig_qual > 100)
4636 sig_qual = 100;
4637 else if (sig_qual < 1)
4638 sig_qual = 0;
4639
4640 return sig_qual;
4641 }
4642
4643 /**
4644 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
4645 *
4646 * Uses the priv->rx_handlers callback function array to invoke
4647 * the appropriate handlers, including command responses,
4648 * frame-received notifications, and other notifications.
4649 */
4650 static void iwl4965_rx_handle(struct iwl4965_priv *priv)
4651 {
4652 struct iwl4965_rx_mem_buffer *rxb;
4653 struct iwl4965_rx_packet *pkt;
4654 struct iwl4965_rx_queue *rxq = &priv->rxq;
4655 u32 r, i;
4656 int reclaim;
4657 unsigned long flags;
4658 u8 fill_rx = 0;
4659 u32 count = 0;
4660
4661 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4662 * buffer that the driver may process (last buffer filled by ucode). */
4663 r = iwl4965_hw_get_rx_read(priv);
4664 i = rxq->read;
4665
4666 /* Rx interrupt, but nothing sent from uCode */
4667 if (i == r)
4668 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4669
4670 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4671 fill_rx = 1;
4672
4673 while (i != r) {
4674 rxb = rxq->queue[i];
4675
4676 /* If an RXB doesn't have a Rx queue slot associated with it,
4677 * then a bug has been introduced in the queue refilling
4678 * routines -- catch it here */
4679 BUG_ON(rxb == NULL);
4680
4681 rxq->queue[i] = NULL;
4682
4683 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4684 priv->hw_setting.rx_buf_size,
4685 PCI_DMA_FROMDEVICE);
4686 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
4687
4688 /* Reclaim a command buffer only if this packet is a response
4689 * to a (driver-originated) command.
4690 * If the packet (e.g. Rx frame) originated from uCode,
4691 * there is no command buffer to reclaim.
4692 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4693 * but apparently a few don't get set; catch them here. */
4694 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4695 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
4696 (pkt->hdr.cmd != REPLY_4965_RX) &&
4697 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
4698 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4699 (pkt->hdr.cmd != REPLY_TX);
4700
4701 /* Based on type of command response or notification,
4702 * handle those that need handling via function in
4703 * rx_handlers table. See iwl4965_setup_rx_handlers() */
4704 if (priv->rx_handlers[pkt->hdr.cmd]) {
4705 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4706 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4707 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4708 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4709 } else {
4710 /* No handling needed */
4711 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4712 "r %d i %d No handler needed for %s, 0x%02x\n",
4713 r, i, get_cmd_string(pkt->hdr.cmd),
4714 pkt->hdr.cmd);
4715 }
4716
4717 if (reclaim) {
4718 /* Invoke any callbacks, transfer the skb to caller, and
4719 * fire off the (possibly) blocking iwl4965_send_cmd()
4720 * as we reclaim the driver command queue */
4721 if (rxb && rxb->skb)
4722 iwl4965_tx_cmd_complete(priv, rxb);
4723 else
4724 IWL_WARNING("Claim null rxb?\n");
4725 }
4726
4727 /* For now we just don't re-use anything. We can tweak this
4728 * later to try and re-use notification packets and SKBs that
4729 * fail to Rx correctly */
4730 if (rxb->skb != NULL) {
4731 priv->alloc_rxb_skb--;
4732 dev_kfree_skb_any(rxb->skb);
4733 rxb->skb = NULL;
4734 }
4735
4736 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4737 priv->hw_setting.rx_buf_size,
4738 PCI_DMA_FROMDEVICE);
4739 spin_lock_irqsave(&rxq->lock, flags);
4740 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4741 spin_unlock_irqrestore(&rxq->lock, flags);
4742 i = (i + 1) & RX_QUEUE_MASK;
4743 /* If there are a lot of unused frames,
4744 * restock the Rx queue so ucode wont assert. */
4745 if (fill_rx) {
4746 count++;
4747 if (count >= 8) {
4748 priv->rxq.read = i;
4749 __iwl4965_rx_replenish(priv);
4750 count = 0;
4751 }
4752 }
4753 }
4754
4755 /* Backtrack one entry */
4756 priv->rxq.read = i;
4757 iwl4965_rx_queue_restock(priv);
4758 }
4759
4760 /**
4761 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4762 */
4763 static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
4764 struct iwl4965_tx_queue *txq)
4765 {
4766 u32 reg = 0;
4767 int rc = 0;
4768 int txq_id = txq->q.id;
4769
4770 if (txq->need_update == 0)
4771 return rc;
4772
4773 /* if we're trying to save power */
4774 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4775 /* wake up nic if it's powered down ...
4776 * uCode will wake up, and interrupt us again, so next
4777 * time we'll skip this part. */
4778 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4779
4780 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4781 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4782 iwl4965_set_bit(priv, CSR_GP_CNTRL,
4783 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4784 return rc;
4785 }
4786
4787 /* restore this queue's parameters in nic hardware. */
4788 rc = iwl4965_grab_nic_access(priv);
4789 if (rc)
4790 return rc;
4791 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
4792 txq->q.write_ptr | (txq_id << 8));
4793 iwl4965_release_nic_access(priv);
4794
4795 /* else not in power-save mode, uCode will never sleep when we're
4796 * trying to tx (during RFKILL, we're not trying to tx). */
4797 } else
4798 iwl4965_write32(priv, HBUS_TARG_WRPTR,
4799 txq->q.write_ptr | (txq_id << 8));
4800
4801 txq->need_update = 0;
4802
4803 return rc;
4804 }
4805
4806 #ifdef CONFIG_IWL4965_DEBUG
4807 static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
4808 {
4809 DECLARE_MAC_BUF(mac);
4810
4811 IWL_DEBUG_RADIO("RX CONFIG:\n");
4812 iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4813 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4814 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4815 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4816 le32_to_cpu(rxon->filter_flags));
4817 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4818 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4819 rxon->ofdm_basic_rates);
4820 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4821 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4822 print_mac(mac, rxon->node_addr));
4823 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4824 print_mac(mac, rxon->bssid_addr));
4825 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4826 }
4827 #endif
4828
4829 static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
4830 {
4831 IWL_DEBUG_ISR("Enabling interrupts\n");
4832 set_bit(STATUS_INT_ENABLED, &priv->status);
4833 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4834 }
4835
4836 static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
4837 {
4838 clear_bit(STATUS_INT_ENABLED, &priv->status);
4839
4840 /* disable interrupts from uCode/NIC to host */
4841 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
4842
4843 /* acknowledge/clear/reset any interrupts still pending
4844 * from uCode or flow handler (Rx/Tx DMA) */
4845 iwl4965_write32(priv, CSR_INT, 0xffffffff);
4846 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4847 IWL_DEBUG_ISR("Disabled interrupts\n");
4848 }
4849
4850 static const char *desc_lookup(int i)
4851 {
4852 switch (i) {
4853 case 1:
4854 return "FAIL";
4855 case 2:
4856 return "BAD_PARAM";
4857 case 3:
4858 return "BAD_CHECKSUM";
4859 case 4:
4860 return "NMI_INTERRUPT";
4861 case 5:
4862 return "SYSASSERT";
4863 case 6:
4864 return "FATAL_ERROR";
4865 }
4866
4867 return "UNKNOWN";
4868 }
4869
4870 #define ERROR_START_OFFSET (1 * sizeof(u32))
4871 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4872
4873 static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
4874 {
4875 u32 data2, line;
4876 u32 desc, time, count, base, data1;
4877 u32 blink1, blink2, ilink1, ilink2;
4878 int rc;
4879
4880 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4881
4882 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
4883 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4884 return;
4885 }
4886
4887 rc = iwl4965_grab_nic_access(priv);
4888 if (rc) {
4889 IWL_WARNING("Can not read from adapter at this time.\n");
4890 return;
4891 }
4892
4893 count = iwl4965_read_targ_mem(priv, base);
4894
4895 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4896 IWL_ERROR("Start IWL Error Log Dump:\n");
4897 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4898 priv->status, priv->config, count);
4899 }
4900
4901 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
4902 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
4903 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
4904 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
4905 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
4906 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
4907 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
4908 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
4909 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
4910
4911 IWL_ERROR("Desc Time "
4912 "data1 data2 line\n");
4913 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4914 desc_lookup(desc), desc, time, data1, data2, line);
4915 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4916 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4917 ilink1, ilink2);
4918
4919 iwl4965_release_nic_access(priv);
4920 }
4921
4922 #define EVENT_START_OFFSET (4 * sizeof(u32))
4923
4924 /**
4925 * iwl4965_print_event_log - Dump error event log to syslog
4926 *
4927 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
4928 */
4929 static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
4930 u32 num_events, u32 mode)
4931 {
4932 u32 i;
4933 u32 base; /* SRAM byte address of event log header */
4934 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4935 u32 ptr; /* SRAM byte address of log data */
4936 u32 ev, time, data; /* event log data */
4937
4938 if (num_events == 0)
4939 return;
4940
4941 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4942
4943 if (mode == 0)
4944 event_size = 2 * sizeof(u32);
4945 else
4946 event_size = 3 * sizeof(u32);
4947
4948 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4949
4950 /* "time" is actually "data" for mode 0 (no timestamp).
4951 * place event id # at far right for easier visual parsing. */
4952 for (i = 0; i < num_events; i++) {
4953 ev = iwl4965_read_targ_mem(priv, ptr);
4954 ptr += sizeof(u32);
4955 time = iwl4965_read_targ_mem(priv, ptr);
4956 ptr += sizeof(u32);
4957 if (mode == 0)
4958 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4959 else {
4960 data = iwl4965_read_targ_mem(priv, ptr);
4961 ptr += sizeof(u32);
4962 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4963 }
4964 }
4965 }
4966
4967 static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
4968 {
4969 int rc;
4970 u32 base; /* SRAM byte address of event log header */
4971 u32 capacity; /* event log capacity in # entries */
4972 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4973 u32 num_wraps; /* # times uCode wrapped to top of log */
4974 u32 next_entry; /* index of next entry to be written by uCode */
4975 u32 size; /* # entries that we'll print */
4976
4977 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4978 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
4979 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4980 return;
4981 }
4982
4983 rc = iwl4965_grab_nic_access(priv);
4984 if (rc) {
4985 IWL_WARNING("Can not read from adapter at this time.\n");
4986 return;
4987 }
4988
4989 /* event log header */
4990 capacity = iwl4965_read_targ_mem(priv, base);
4991 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
4992 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
4993 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
4994
4995 size = num_wraps ? capacity : next_entry;
4996
4997 /* bail out if nothing in log */
4998 if (size == 0) {
4999 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
5000 iwl4965_release_nic_access(priv);
5001 return;
5002 }
5003
5004 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
5005 size, num_wraps);
5006
5007 /* if uCode has wrapped back to top of log, start at the oldest entry,
5008 * i.e the next one that uCode would fill. */
5009 if (num_wraps)
5010 iwl4965_print_event_log(priv, next_entry,
5011 capacity - next_entry, mode);
5012
5013 /* (then/else) start at top of log */
5014 iwl4965_print_event_log(priv, 0, next_entry, mode);
5015
5016 iwl4965_release_nic_access(priv);
5017 }
5018
5019 /**
5020 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
5021 */
5022 static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
5023 {
5024 /* Set the FW error flag -- cleared on iwl4965_down */
5025 set_bit(STATUS_FW_ERROR, &priv->status);
5026
5027 /* Cancel currently queued command. */
5028 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
5029
5030 #ifdef CONFIG_IWL4965_DEBUG
5031 if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
5032 iwl4965_dump_nic_error_log(priv);
5033 iwl4965_dump_nic_event_log(priv);
5034 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
5035 }
5036 #endif
5037
5038 wake_up_interruptible(&priv->wait_command_queue);
5039
5040 /* Keep the restart process from trying to send host
5041 * commands by clearing the INIT status bit */
5042 clear_bit(STATUS_READY, &priv->status);
5043
5044 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5045 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
5046 "Restarting adapter due to uCode error.\n");
5047
5048 if (iwl4965_is_associated(priv)) {
5049 memcpy(&priv->recovery_rxon, &priv->active_rxon,
5050 sizeof(priv->recovery_rxon));
5051 priv->error_recovering = 1;
5052 }
5053 queue_work(priv->workqueue, &priv->restart);
5054 }
5055 }
5056
5057 static void iwl4965_error_recovery(struct iwl4965_priv *priv)
5058 {
5059 unsigned long flags;
5060
5061 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
5062 sizeof(priv->staging_rxon));
5063 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5064 iwl4965_commit_rxon(priv);
5065
5066 iwl4965_rxon_add_station(priv, priv->bssid, 1);
5067
5068 spin_lock_irqsave(&priv->lock, flags);
5069 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
5070 priv->error_recovering = 0;
5071 spin_unlock_irqrestore(&priv->lock, flags);
5072 }
5073
5074 static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
5075 {
5076 u32 inta, handled = 0;
5077 u32 inta_fh;
5078 unsigned long flags;
5079 #ifdef CONFIG_IWL4965_DEBUG
5080 u32 inta_mask;
5081 #endif
5082
5083 spin_lock_irqsave(&priv->lock, flags);
5084
5085 /* Ack/clear/reset pending uCode interrupts.
5086 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
5087 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5088 inta = iwl4965_read32(priv, CSR_INT);
5089 iwl4965_write32(priv, CSR_INT, inta);
5090
5091 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
5092 * Any new interrupts that happen after this, either while we're
5093 * in this tasklet, or later, will show up in next ISR/tasklet. */
5094 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5095 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
5096
5097 #ifdef CONFIG_IWL4965_DEBUG
5098 if (iwl4965_debug_level & IWL_DL_ISR) {
5099 /* just for debug */
5100 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
5101 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5102 inta, inta_mask, inta_fh);
5103 }
5104 #endif
5105
5106 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
5107 * atomic, make sure that inta covers all the interrupts that
5108 * we've discovered, even if FH interrupt came in just after
5109 * reading CSR_INT. */
5110 if (inta_fh & CSR_FH_INT_RX_MASK)
5111 inta |= CSR_INT_BIT_FH_RX;
5112 if (inta_fh & CSR_FH_INT_TX_MASK)
5113 inta |= CSR_INT_BIT_FH_TX;
5114
5115 /* Now service all interrupt bits discovered above. */
5116 if (inta & CSR_INT_BIT_HW_ERR) {
5117 IWL_ERROR("Microcode HW error detected. Restarting.\n");
5118
5119 /* Tell the device to stop sending interrupts */
5120 iwl4965_disable_interrupts(priv);
5121
5122 iwl4965_irq_handle_error(priv);
5123
5124 handled |= CSR_INT_BIT_HW_ERR;
5125
5126 spin_unlock_irqrestore(&priv->lock, flags);
5127
5128 return;
5129 }
5130
5131 #ifdef CONFIG_IWL4965_DEBUG
5132 if (iwl4965_debug_level & (IWL_DL_ISR)) {
5133 /* NIC fires this, but we don't use it, redundant with WAKEUP */
5134 if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
5135 IWL_DEBUG_ISR("Microcode started or stopped.\n");
5136
5137 /* Alive notification via Rx interrupt will do the real work */
5138 if (inta & CSR_INT_BIT_ALIVE)
5139 IWL_DEBUG_ISR("Alive interrupt\n");
5140 }
5141 #endif
5142 /* Safely ignore these bits for debug checks below */
5143 inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
5144
5145 /* HW RF KILL switch toggled */
5146 if (inta & CSR_INT_BIT_RF_KILL) {
5147 int hw_rf_kill = 0;
5148 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
5149 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
5150 hw_rf_kill = 1;
5151
5152 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
5153 "RF_KILL bit toggled to %s.\n",
5154 hw_rf_kill ? "disable radio":"enable radio");
5155
5156 /* Queue restart only if RF_KILL switch was set to "kill"
5157 * when we loaded driver, and is now set to "enable".
5158 * After we're Alive, RF_KILL gets handled by
5159 * iwl_rx_card_state_notif() */
5160 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
5161 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5162 queue_work(priv->workqueue, &priv->restart);
5163 }
5164
5165 handled |= CSR_INT_BIT_RF_KILL;
5166 }
5167
5168 /* Chip got too hot and stopped itself */
5169 if (inta & CSR_INT_BIT_CT_KILL) {
5170 IWL_ERROR("Microcode CT kill error detected.\n");
5171 handled |= CSR_INT_BIT_CT_KILL;
5172 }
5173
5174 /* Error detected by uCode */
5175 if (inta & CSR_INT_BIT_SW_ERR) {
5176 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
5177 inta);
5178 iwl4965_irq_handle_error(priv);
5179 handled |= CSR_INT_BIT_SW_ERR;
5180 }
5181
5182 /* uCode wakes up after power-down sleep */
5183 if (inta & CSR_INT_BIT_WAKEUP) {
5184 IWL_DEBUG_ISR("Wakeup interrupt\n");
5185 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
5186 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
5187 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
5188 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
5189 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
5190 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
5191 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
5192
5193 handled |= CSR_INT_BIT_WAKEUP;
5194 }
5195
5196 /* All uCode command responses, including Tx command responses,
5197 * Rx "responses" (frame-received notification), and other
5198 * notifications from uCode come through here*/
5199 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
5200 iwl4965_rx_handle(priv);
5201 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
5202 }
5203
5204 if (inta & CSR_INT_BIT_FH_TX) {
5205 IWL_DEBUG_ISR("Tx interrupt\n");
5206 handled |= CSR_INT_BIT_FH_TX;
5207 }
5208
5209 if (inta & ~handled)
5210 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
5211
5212 if (inta & ~CSR_INI_SET_MASK) {
5213 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
5214 inta & ~CSR_INI_SET_MASK);
5215 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
5216 }
5217
5218 /* Re-enable all interrupts */
5219 iwl4965_enable_interrupts(priv);
5220
5221 #ifdef CONFIG_IWL4965_DEBUG
5222 if (iwl4965_debug_level & (IWL_DL_ISR)) {
5223 inta = iwl4965_read32(priv, CSR_INT);
5224 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
5225 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5226 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
5227 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
5228 }
5229 #endif
5230 spin_unlock_irqrestore(&priv->lock, flags);
5231 }
5232
5233 static irqreturn_t iwl4965_isr(int irq, void *data)
5234 {
5235 struct iwl4965_priv *priv = data;
5236 u32 inta, inta_mask;
5237 u32 inta_fh;
5238 if (!priv)
5239 return IRQ_NONE;
5240
5241 spin_lock(&priv->lock);
5242
5243 /* Disable (but don't clear!) interrupts here to avoid
5244 * back-to-back ISRs and sporadic interrupts from our NIC.
5245 * If we have something to service, the tasklet will re-enable ints.
5246 * If we *don't* have something, we'll re-enable before leaving here. */
5247 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
5248 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
5249
5250 /* Discover which interrupts are active/pending */
5251 inta = iwl4965_read32(priv, CSR_INT);
5252 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5253
5254 /* Ignore interrupt if there's nothing in NIC to service.
5255 * This may be due to IRQ shared with another device,
5256 * or due to sporadic interrupts thrown from our NIC. */
5257 if (!inta && !inta_fh) {
5258 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5259 goto none;
5260 }
5261
5262 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
5263 /* Hardware disappeared. It might have already raised
5264 * an interrupt */
5265 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
5266 goto unplugged;
5267 }
5268
5269 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5270 inta, inta_mask, inta_fh);
5271
5272 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
5273 tasklet_schedule(&priv->irq_tasklet);
5274
5275 unplugged:
5276 spin_unlock(&priv->lock);
5277 return IRQ_HANDLED;
5278
5279 none:
5280 /* re-enable interrupts here since we don't have anything to service. */
5281 iwl4965_enable_interrupts(priv);
5282 spin_unlock(&priv->lock);
5283 return IRQ_NONE;
5284 }
5285
5286 /************************** EEPROM BANDS ****************************
5287 *
5288 * The iwl4965_eeprom_band definitions below provide the mapping from the
5289 * EEPROM contents to the specific channel number supported for each
5290 * band.
5291 *
5292 * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
5293 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
5294 * The specific geography and calibration information for that channel
5295 * is contained in the eeprom map itself.
5296 *
5297 * During init, we copy the eeprom information and channel map
5298 * information into priv->channel_info_24/52 and priv->channel_map_24/52
5299 *
5300 * channel_map_24/52 provides the index in the channel_info array for a
5301 * given channel. We have to have two separate maps as there is channel
5302 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5303 * band_2
5304 *
5305 * A value of 0xff stored in the channel_map indicates that the channel
5306 * is not supported by the hardware at all.
5307 *
5308 * A value of 0xfe in the channel_map indicates that the channel is not
5309 * valid for Tx with the current hardware. This means that
5310 * while the system can tune and receive on a given channel, it may not
5311 * be able to associate or transmit any frames on that
5312 * channel. There is no corresponding channel information for that
5313 * entry.
5314 *
5315 *********************************************************************/
5316
5317 /* 2.4 GHz */
5318 static const u8 iwl4965_eeprom_band_1[14] = {
5319 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5320 };
5321
5322 /* 5.2 GHz bands */
5323 static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
5324 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5325 };
5326
5327 static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
5328 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5329 };
5330
5331 static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
5332 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5333 };
5334
5335 static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
5336 145, 149, 153, 157, 161, 165
5337 };
5338
5339 static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
5340 1, 2, 3, 4, 5, 6, 7
5341 };
5342
5343 static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
5344 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
5345 };
5346
5347 static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
5348 int band,
5349 int *eeprom_ch_count,
5350 const struct iwl4965_eeprom_channel
5351 **eeprom_ch_info,
5352 const u8 **eeprom_ch_index)
5353 {
5354 switch (band) {
5355 case 1: /* 2.4GHz band */
5356 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
5357 *eeprom_ch_info = priv->eeprom.band_1_channels;
5358 *eeprom_ch_index = iwl4965_eeprom_band_1;
5359 break;
5360 case 2: /* 4.9GHz band */
5361 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
5362 *eeprom_ch_info = priv->eeprom.band_2_channels;
5363 *eeprom_ch_index = iwl4965_eeprom_band_2;
5364 break;
5365 case 3: /* 5.2GHz band */
5366 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
5367 *eeprom_ch_info = priv->eeprom.band_3_channels;
5368 *eeprom_ch_index = iwl4965_eeprom_band_3;
5369 break;
5370 case 4: /* 5.5GHz band */
5371 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
5372 *eeprom_ch_info = priv->eeprom.band_4_channels;
5373 *eeprom_ch_index = iwl4965_eeprom_band_4;
5374 break;
5375 case 5: /* 5.7GHz band */
5376 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
5377 *eeprom_ch_info = priv->eeprom.band_5_channels;
5378 *eeprom_ch_index = iwl4965_eeprom_band_5;
5379 break;
5380 case 6: /* 2.4GHz FAT channels */
5381 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
5382 *eeprom_ch_info = priv->eeprom.band_24_channels;
5383 *eeprom_ch_index = iwl4965_eeprom_band_6;
5384 break;
5385 case 7: /* 5 GHz FAT channels */
5386 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
5387 *eeprom_ch_info = priv->eeprom.band_52_channels;
5388 *eeprom_ch_index = iwl4965_eeprom_band_7;
5389 break;
5390 default:
5391 BUG();
5392 return;
5393 }
5394 }
5395
5396 /**
5397 * iwl4965_get_channel_info - Find driver's private channel info
5398 *
5399 * Based on band and channel number.
5400 */
5401 const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
5402 int phymode, u16 channel)
5403 {
5404 int i;
5405
5406 switch (phymode) {
5407 case MODE_IEEE80211A:
5408 for (i = 14; i < priv->channel_count; i++) {
5409 if (priv->channel_info[i].channel == channel)
5410 return &priv->channel_info[i];
5411 }
5412 break;
5413
5414 case MODE_IEEE80211B:
5415 case MODE_IEEE80211G:
5416 if (channel >= 1 && channel <= 14)
5417 return &priv->channel_info[channel - 1];
5418 break;
5419
5420 }
5421
5422 return NULL;
5423 }
5424
5425 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5426 ? # x " " : "")
5427
5428 /**
5429 * iwl4965_init_channel_map - Set up driver's info for all possible channels
5430 */
5431 static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
5432 {
5433 int eeprom_ch_count = 0;
5434 const u8 *eeprom_ch_index = NULL;
5435 const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
5436 int band, ch;
5437 struct iwl4965_channel_info *ch_info;
5438
5439 if (priv->channel_count) {
5440 IWL_DEBUG_INFO("Channel map already initialized.\n");
5441 return 0;
5442 }
5443
5444 if (priv->eeprom.version < 0x2f) {
5445 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5446 priv->eeprom.version);
5447 return -EINVAL;
5448 }
5449
5450 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5451
5452 priv->channel_count =
5453 ARRAY_SIZE(iwl4965_eeprom_band_1) +
5454 ARRAY_SIZE(iwl4965_eeprom_band_2) +
5455 ARRAY_SIZE(iwl4965_eeprom_band_3) +
5456 ARRAY_SIZE(iwl4965_eeprom_band_4) +
5457 ARRAY_SIZE(iwl4965_eeprom_band_5);
5458
5459 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5460
5461 priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
5462 priv->channel_count, GFP_KERNEL);
5463 if (!priv->channel_info) {
5464 IWL_ERROR("Could not allocate channel_info\n");
5465 priv->channel_count = 0;
5466 return -ENOMEM;
5467 }
5468
5469 ch_info = priv->channel_info;
5470
5471 /* Loop through the 5 EEPROM bands adding them in order to the
5472 * channel map we maintain (that contains additional information than
5473 * what just in the EEPROM) */
5474 for (band = 1; band <= 5; band++) {
5475
5476 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
5477 &eeprom_ch_info, &eeprom_ch_index);
5478
5479 /* Loop through each band adding each of the channels */
5480 for (ch = 0; ch < eeprom_ch_count; ch++) {
5481 ch_info->channel = eeprom_ch_index[ch];
5482 ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5483 MODE_IEEE80211A;
5484
5485 /* permanently store EEPROM's channel regulatory flags
5486 * and max power in channel info database. */
5487 ch_info->eeprom = eeprom_ch_info[ch];
5488
5489 /* Copy the run-time flags so they are there even on
5490 * invalid channels */
5491 ch_info->flags = eeprom_ch_info[ch].flags;
5492
5493 if (!(is_channel_valid(ch_info))) {
5494 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5495 "No traffic\n",
5496 ch_info->channel,
5497 ch_info->flags,
5498 is_channel_a_band(ch_info) ?
5499 "5.2" : "2.4");
5500 ch_info++;
5501 continue;
5502 }
5503
5504 /* Initialize regulatory-based run-time data */
5505 ch_info->max_power_avg = ch_info->curr_txpow =
5506 eeprom_ch_info[ch].max_power_avg;
5507 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5508 ch_info->min_power = 0;
5509
5510 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5511 " %ddBm): Ad-Hoc %ssupported\n",
5512 ch_info->channel,
5513 is_channel_a_band(ch_info) ?
5514 "5.2" : "2.4",
5515 CHECK_AND_PRINT(IBSS),
5516 CHECK_AND_PRINT(ACTIVE),
5517 CHECK_AND_PRINT(RADAR),
5518 CHECK_AND_PRINT(WIDE),
5519 CHECK_AND_PRINT(NARROW),
5520 CHECK_AND_PRINT(DFS),
5521 eeprom_ch_info[ch].flags,
5522 eeprom_ch_info[ch].max_power_avg,
5523 ((eeprom_ch_info[ch].
5524 flags & EEPROM_CHANNEL_IBSS)
5525 && !(eeprom_ch_info[ch].
5526 flags & EEPROM_CHANNEL_RADAR))
5527 ? "" : "not ");
5528
5529 /* Set the user_txpower_limit to the highest power
5530 * supported by any channel */
5531 if (eeprom_ch_info[ch].max_power_avg >
5532 priv->user_txpower_limit)
5533 priv->user_txpower_limit =
5534 eeprom_ch_info[ch].max_power_avg;
5535
5536 ch_info++;
5537 }
5538 }
5539
5540 /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
5541 for (band = 6; band <= 7; band++) {
5542 int phymode;
5543 u8 fat_extension_chan;
5544
5545 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
5546 &eeprom_ch_info, &eeprom_ch_index);
5547
5548 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
5549 phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
5550
5551 /* Loop through each band adding each of the channels */
5552 for (ch = 0; ch < eeprom_ch_count; ch++) {
5553
5554 if ((band == 6) &&
5555 ((eeprom_ch_index[ch] == 5) ||
5556 (eeprom_ch_index[ch] == 6) ||
5557 (eeprom_ch_index[ch] == 7)))
5558 fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
5559 else
5560 fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
5561
5562 /* Set up driver's info for lower half */
5563 iwl4965_set_fat_chan_info(priv, phymode,
5564 eeprom_ch_index[ch],
5565 &(eeprom_ch_info[ch]),
5566 fat_extension_chan);
5567
5568 /* Set up driver's info for upper half */
5569 iwl4965_set_fat_chan_info(priv, phymode,
5570 (eeprom_ch_index[ch] + 4),
5571 &(eeprom_ch_info[ch]),
5572 HT_IE_EXT_CHANNEL_BELOW);
5573 }
5574 }
5575
5576 return 0;
5577 }
5578
5579 /*
5580 * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
5581 */
5582 static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
5583 {
5584 kfree(priv->channel_info);
5585 priv->channel_count = 0;
5586 }
5587
5588 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5589 * sending probe req. This should be set long enough to hear probe responses
5590 * from more than one AP. */
5591 #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5592 #define IWL_ACTIVE_DWELL_TIME_52 (10)
5593
5594 /* For faster active scanning, scan will move to the next channel if fewer than
5595 * PLCP_QUIET_THRESH packets are heard on this channel within
5596 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5597 * time if it's a quiet channel (nothing responded to our probe, and there's
5598 * no other traffic).
5599 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5600 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5601 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5602
5603 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5604 * Must be set longer than active dwell time.
5605 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5606 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5607 #define IWL_PASSIVE_DWELL_TIME_52 (10)
5608 #define IWL_PASSIVE_DWELL_BASE (100)
5609 #define IWL_CHANNEL_TUNE_TIME 5
5610
5611 static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
5612 {
5613 if (phymode == MODE_IEEE80211A)
5614 return IWL_ACTIVE_DWELL_TIME_52;
5615 else
5616 return IWL_ACTIVE_DWELL_TIME_24;
5617 }
5618
5619 static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
5620 {
5621 u16 active = iwl4965_get_active_dwell_time(priv, phymode);
5622 u16 passive = (phymode != MODE_IEEE80211A) ?
5623 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5624 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5625
5626 if (iwl4965_is_associated(priv)) {
5627 /* If we're associated, we clamp the maximum passive
5628 * dwell time to be 98% of the beacon interval (minus
5629 * 2 * channel tune time) */
5630 passive = priv->beacon_int;
5631 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5632 passive = IWL_PASSIVE_DWELL_BASE;
5633 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5634 }
5635
5636 if (passive <= active)
5637 passive = active + 1;
5638
5639 return passive;
5640 }
5641
5642 static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
5643 u8 is_active, u8 direct_mask,
5644 struct iwl4965_scan_channel *scan_ch)
5645 {
5646 const struct ieee80211_channel *channels = NULL;
5647 const struct ieee80211_hw_mode *hw_mode;
5648 const struct iwl4965_channel_info *ch_info;
5649 u16 passive_dwell = 0;
5650 u16 active_dwell = 0;
5651 int added, i;
5652
5653 hw_mode = iwl4965_get_hw_mode(priv, phymode);
5654 if (!hw_mode)
5655 return 0;
5656
5657 channels = hw_mode->channels;
5658
5659 active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
5660 passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
5661
5662 for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5663 if (channels[i].chan ==
5664 le16_to_cpu(priv->active_rxon.channel)) {
5665 if (iwl4965_is_associated(priv)) {
5666 IWL_DEBUG_SCAN
5667 ("Skipping current channel %d\n",
5668 le16_to_cpu(priv->active_rxon.channel));
5669 continue;
5670 }
5671 } else if (priv->only_active_channel)
5672 continue;
5673
5674 scan_ch->channel = channels[i].chan;
5675
5676 ch_info = iwl4965_get_channel_info(priv, phymode,
5677 scan_ch->channel);
5678 if (!is_channel_valid(ch_info)) {
5679 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5680 scan_ch->channel);
5681 continue;
5682 }
5683
5684 if (!is_active || is_channel_passive(ch_info) ||
5685 !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5686 scan_ch->type = 0; /* passive */
5687 else
5688 scan_ch->type = 1; /* active */
5689
5690 if (scan_ch->type & 1)
5691 scan_ch->type |= (direct_mask << 1);
5692
5693 if (is_channel_narrow(ch_info))
5694 scan_ch->type |= (1 << 7);
5695
5696 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5697 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5698
5699 /* Set txpower levels to defaults */
5700 scan_ch->tpc.dsp_atten = 110;
5701 /* scan_pwr_info->tpc.dsp_atten; */
5702
5703 /*scan_pwr_info->tpc.tx_gain; */
5704 if (phymode == MODE_IEEE80211A)
5705 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5706 else {
5707 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5708 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
5709 * power level:
5710 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
5711 */
5712 }
5713
5714 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5715 scan_ch->channel,
5716 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5717 (scan_ch->type & 1) ?
5718 active_dwell : passive_dwell);
5719
5720 scan_ch++;
5721 added++;
5722 }
5723
5724 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5725 return added;
5726 }
5727
5728 static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
5729 {
5730 int i, j;
5731 for (i = 0; i < 3; i++) {
5732 struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5733 for (j = 0; j < hw_mode->num_channels; j++)
5734 hw_mode->channels[j].flag = hw_mode->channels[j].val;
5735 }
5736 }
5737
5738 static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
5739 struct ieee80211_rate *rates)
5740 {
5741 int i;
5742
5743 for (i = 0; i < IWL_RATE_COUNT; i++) {
5744 rates[i].rate = iwl4965_rates[i].ieee * 5;
5745 rates[i].val = i; /* Rate scaling will work on indexes */
5746 rates[i].val2 = i;
5747 rates[i].flags = IEEE80211_RATE_SUPPORTED;
5748 /* Only OFDM have the bits-per-symbol set */
5749 if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5750 rates[i].flags |= IEEE80211_RATE_OFDM;
5751 else {
5752 /*
5753 * If CCK 1M then set rate flag to CCK else CCK_2
5754 * which is CCK | PREAMBLE2
5755 */
5756 rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
5757 IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5758 }
5759
5760 /* Set up which ones are basic rates... */
5761 if (IWL_BASIC_RATES_MASK & (1 << i))
5762 rates[i].flags |= IEEE80211_RATE_BASIC;
5763 }
5764 }
5765
5766 /**
5767 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
5768 */
5769 static int iwl4965_init_geos(struct iwl4965_priv *priv)
5770 {
5771 struct iwl4965_channel_info *ch;
5772 struct ieee80211_hw_mode *modes;
5773 struct ieee80211_channel *channels;
5774 struct ieee80211_channel *geo_ch;
5775 struct ieee80211_rate *rates;
5776 int i = 0;
5777 enum {
5778 A = 0,
5779 B = 1,
5780 G = 2,
5781 };
5782 int mode_count = 3;
5783
5784 if (priv->modes) {
5785 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5786 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5787 return 0;
5788 }
5789
5790 modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5791 GFP_KERNEL);
5792 if (!modes)
5793 return -ENOMEM;
5794
5795 channels = kzalloc(sizeof(struct ieee80211_channel) *
5796 priv->channel_count, GFP_KERNEL);
5797 if (!channels) {
5798 kfree(modes);
5799 return -ENOMEM;
5800 }
5801
5802 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5803 GFP_KERNEL);
5804 if (!rates) {
5805 kfree(modes);
5806 kfree(channels);
5807 return -ENOMEM;
5808 }
5809
5810 /* 0 = 802.11a
5811 * 1 = 802.11b
5812 * 2 = 802.11g
5813 */
5814
5815 /* 5.2GHz channels start after the 2.4GHz channels */
5816 modes[A].mode = MODE_IEEE80211A;
5817 modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
5818 modes[A].rates = rates;
5819 modes[A].num_rates = 8; /* just OFDM */
5820 modes[A].rates = &rates[4];
5821 modes[A].num_channels = 0;
5822 #ifdef CONFIG_IWL4965_HT
5823 iwl4965_init_ht_hw_capab(&modes[A].ht_info, MODE_IEEE80211A);
5824 #endif
5825
5826 modes[B].mode = MODE_IEEE80211B;
5827 modes[B].channels = channels;
5828 modes[B].rates = rates;
5829 modes[B].num_rates = 4; /* just CCK */
5830 modes[B].num_channels = 0;
5831
5832 modes[G].mode = MODE_IEEE80211G;
5833 modes[G].channels = channels;
5834 modes[G].rates = rates;
5835 modes[G].num_rates = 12; /* OFDM & CCK */
5836 modes[G].num_channels = 0;
5837 #ifdef CONFIG_IWL4965_HT
5838 iwl4965_init_ht_hw_capab(&modes[G].ht_info, MODE_IEEE80211G);
5839 #endif
5840
5841 priv->ieee_channels = channels;
5842 priv->ieee_rates = rates;
5843
5844 iwl4965_init_hw_rates(priv, rates);
5845
5846 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5847 ch = &priv->channel_info[i];
5848
5849 if (!is_channel_valid(ch)) {
5850 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5851 "skipping.\n",
5852 ch->channel, is_channel_a_band(ch) ?
5853 "5.2" : "2.4");
5854 continue;
5855 }
5856
5857 if (is_channel_a_band(ch)) {
5858 geo_ch = &modes[A].channels[modes[A].num_channels++];
5859 } else {
5860 geo_ch = &modes[B].channels[modes[B].num_channels++];
5861 modes[G].num_channels++;
5862 }
5863
5864 geo_ch->freq = ieee80211chan2mhz(ch->channel);
5865 geo_ch->chan = ch->channel;
5866 geo_ch->power_level = ch->max_power_avg;
5867 geo_ch->antenna_max = 0xff;
5868
5869 if (is_channel_valid(ch)) {
5870 geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5871 if (ch->flags & EEPROM_CHANNEL_IBSS)
5872 geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5873
5874 if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5875 geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5876
5877 if (ch->flags & EEPROM_CHANNEL_RADAR)
5878 geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5879
5880 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5881 priv->max_channel_txpower_limit =
5882 ch->max_power_avg;
5883 }
5884
5885 geo_ch->val = geo_ch->flag;
5886 }
5887
5888 if ((modes[A].num_channels == 0) && priv->is_abg) {
5889 printk(KERN_INFO DRV_NAME
5890 ": Incorrectly detected BG card as ABG. Please send "
5891 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5892 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5893 priv->is_abg = 0;
5894 }
5895
5896 printk(KERN_INFO DRV_NAME
5897 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5898 modes[G].num_channels, modes[A].num_channels);
5899
5900 /*
5901 * NOTE: We register these in preference of order -- the
5902 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5903 * a phymode based on rates or AP capabilities but seems to
5904 * configure it purely on if the channel being configured
5905 * is supported by a mode -- and the first match is taken
5906 */
5907
5908 if (modes[G].num_channels)
5909 ieee80211_register_hwmode(priv->hw, &modes[G]);
5910 if (modes[B].num_channels)
5911 ieee80211_register_hwmode(priv->hw, &modes[B]);
5912 if (modes[A].num_channels)
5913 ieee80211_register_hwmode(priv->hw, &modes[A]);
5914
5915 priv->modes = modes;
5916 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5917
5918 return 0;
5919 }
5920
5921 /*
5922 * iwl4965_free_geos - undo allocations in iwl4965_init_geos
5923 */
5924 static void iwl4965_free_geos(struct iwl4965_priv *priv)
5925 {
5926 kfree(priv->modes);
5927 kfree(priv->ieee_channels);
5928 kfree(priv->ieee_rates);
5929 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5930 }
5931
5932 /******************************************************************************
5933 *
5934 * uCode download functions
5935 *
5936 ******************************************************************************/
5937
5938 static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
5939 {
5940 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5941 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5942 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5943 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5944 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5945 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5946 }
5947
5948 /**
5949 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
5950 * looking at all data.
5951 */
5952 static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
5953 u32 len)
5954 {
5955 u32 val;
5956 u32 save_len = len;
5957 int rc = 0;
5958 u32 errcnt;
5959
5960 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5961
5962 rc = iwl4965_grab_nic_access(priv);
5963 if (rc)
5964 return rc;
5965
5966 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5967
5968 errcnt = 0;
5969 for (; len > 0; len -= sizeof(u32), image++) {
5970 /* read data comes through single port, auto-incr addr */
5971 /* NOTE: Use the debugless read so we don't flood kernel log
5972 * if IWL_DL_IO is set */
5973 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5974 if (val != le32_to_cpu(*image)) {
5975 IWL_ERROR("uCode INST section is invalid at "
5976 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5977 save_len - len, val, le32_to_cpu(*image));
5978 rc = -EIO;
5979 errcnt++;
5980 if (errcnt >= 20)
5981 break;
5982 }
5983 }
5984
5985 iwl4965_release_nic_access(priv);
5986
5987 if (!errcnt)
5988 IWL_DEBUG_INFO
5989 ("ucode image in INSTRUCTION memory is good\n");
5990
5991 return rc;
5992 }
5993
5994
5995 /**
5996 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
5997 * using sample data 100 bytes apart. If these sample points are good,
5998 * it's a pretty good bet that everything between them is good, too.
5999 */
6000 static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
6001 {
6002 u32 val;
6003 int rc = 0;
6004 u32 errcnt = 0;
6005 u32 i;
6006
6007 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
6008
6009 rc = iwl4965_grab_nic_access(priv);
6010 if (rc)
6011 return rc;
6012
6013 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
6014 /* read data comes through single port, auto-incr addr */
6015 /* NOTE: Use the debugless read so we don't flood kernel log
6016 * if IWL_DL_IO is set */
6017 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
6018 i + RTC_INST_LOWER_BOUND);
6019 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
6020 if (val != le32_to_cpu(*image)) {
6021 #if 0 /* Enable this if you want to see details */
6022 IWL_ERROR("uCode INST section is invalid at "
6023 "offset 0x%x, is 0x%x, s/b 0x%x\n",
6024 i, val, *image);
6025 #endif
6026 rc = -EIO;
6027 errcnt++;
6028 if (errcnt >= 3)
6029 break;
6030 }
6031 }
6032
6033 iwl4965_release_nic_access(priv);
6034
6035 return rc;
6036 }
6037
6038
6039 /**
6040 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
6041 * and verify its contents
6042 */
6043 static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
6044 {
6045 __le32 *image;
6046 u32 len;
6047 int rc = 0;
6048
6049 /* Try bootstrap */
6050 image = (__le32 *)priv->ucode_boot.v_addr;
6051 len = priv->ucode_boot.len;
6052 rc = iwl4965_verify_inst_sparse(priv, image, len);
6053 if (rc == 0) {
6054 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
6055 return 0;
6056 }
6057
6058 /* Try initialize */
6059 image = (__le32 *)priv->ucode_init.v_addr;
6060 len = priv->ucode_init.len;
6061 rc = iwl4965_verify_inst_sparse(priv, image, len);
6062 if (rc == 0) {
6063 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
6064 return 0;
6065 }
6066
6067 /* Try runtime/protocol */
6068 image = (__le32 *)priv->ucode_code.v_addr;
6069 len = priv->ucode_code.len;
6070 rc = iwl4965_verify_inst_sparse(priv, image, len);
6071 if (rc == 0) {
6072 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
6073 return 0;
6074 }
6075
6076 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
6077
6078 /* Since nothing seems to match, show first several data entries in
6079 * instruction SRAM, so maybe visual inspection will give a clue.
6080 * Selection of bootstrap image (vs. other images) is arbitrary. */
6081 image = (__le32 *)priv->ucode_boot.v_addr;
6082 len = priv->ucode_boot.len;
6083 rc = iwl4965_verify_inst_full(priv, image, len);
6084
6085 return rc;
6086 }
6087
6088
6089 /* check contents of special bootstrap uCode SRAM */
6090 static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
6091 {
6092 __le32 *image = priv->ucode_boot.v_addr;
6093 u32 len = priv->ucode_boot.len;
6094 u32 reg;
6095 u32 val;
6096
6097 IWL_DEBUG_INFO("Begin verify bsm\n");
6098
6099 /* verify BSM SRAM contents */
6100 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
6101 for (reg = BSM_SRAM_LOWER_BOUND;
6102 reg < BSM_SRAM_LOWER_BOUND + len;
6103 reg += sizeof(u32), image ++) {
6104 val = iwl4965_read_prph(priv, reg);
6105 if (val != le32_to_cpu(*image)) {
6106 IWL_ERROR("BSM uCode verification failed at "
6107 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
6108 BSM_SRAM_LOWER_BOUND,
6109 reg - BSM_SRAM_LOWER_BOUND, len,
6110 val, le32_to_cpu(*image));
6111 return -EIO;
6112 }
6113 }
6114
6115 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
6116
6117 return 0;
6118 }
6119
6120 /**
6121 * iwl4965_load_bsm - Load bootstrap instructions
6122 *
6123 * BSM operation:
6124 *
6125 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
6126 * in special SRAM that does not power down during RFKILL. When powering back
6127 * up after power-saving sleeps (or during initial uCode load), the BSM loads
6128 * the bootstrap program into the on-board processor, and starts it.
6129 *
6130 * The bootstrap program loads (via DMA) instructions and data for a new
6131 * program from host DRAM locations indicated by the host driver in the
6132 * BSM_DRAM_* registers. Once the new program is loaded, it starts
6133 * automatically.
6134 *
6135 * When initializing the NIC, the host driver points the BSM to the
6136 * "initialize" uCode image. This uCode sets up some internal data, then
6137 * notifies host via "initialize alive" that it is complete.
6138 *
6139 * The host then replaces the BSM_DRAM_* pointer values to point to the
6140 * normal runtime uCode instructions and a backup uCode data cache buffer
6141 * (filled initially with starting data values for the on-board processor),
6142 * then triggers the "initialize" uCode to load and launch the runtime uCode,
6143 * which begins normal operation.
6144 *
6145 * When doing a power-save shutdown, runtime uCode saves data SRAM into
6146 * the backup data cache in DRAM before SRAM is powered down.
6147 *
6148 * When powering back up, the BSM loads the bootstrap program. This reloads
6149 * the runtime uCode instructions and the backup data cache into SRAM,
6150 * and re-launches the runtime uCode from where it left off.
6151 */
6152 static int iwl4965_load_bsm(struct iwl4965_priv *priv)
6153 {
6154 __le32 *image = priv->ucode_boot.v_addr;
6155 u32 len = priv->ucode_boot.len;
6156 dma_addr_t pinst;
6157 dma_addr_t pdata;
6158 u32 inst_len;
6159 u32 data_len;
6160 int rc;
6161 int i;
6162 u32 done;
6163 u32 reg_offset;
6164
6165 IWL_DEBUG_INFO("Begin load bsm\n");
6166
6167 /* make sure bootstrap program is no larger than BSM's SRAM size */
6168 if (len > IWL_MAX_BSM_SIZE)
6169 return -EINVAL;
6170
6171 /* Tell bootstrap uCode where to find the "Initialize" uCode
6172 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
6173 * NOTE: iwl4965_initialize_alive_start() will replace these values,
6174 * after the "initialize" uCode has run, to point to
6175 * runtime/protocol instructions and backup data cache. */
6176 pinst = priv->ucode_init.p_addr >> 4;
6177 pdata = priv->ucode_init_data.p_addr >> 4;
6178 inst_len = priv->ucode_init.len;
6179 data_len = priv->ucode_init_data.len;
6180
6181 rc = iwl4965_grab_nic_access(priv);
6182 if (rc)
6183 return rc;
6184
6185 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6186 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6187 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
6188 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
6189
6190 /* Fill BSM memory with bootstrap instructions */
6191 for (reg_offset = BSM_SRAM_LOWER_BOUND;
6192 reg_offset < BSM_SRAM_LOWER_BOUND + len;
6193 reg_offset += sizeof(u32), image++)
6194 _iwl4965_write_prph(priv, reg_offset,
6195 le32_to_cpu(*image));
6196
6197 rc = iwl4965_verify_bsm(priv);
6198 if (rc) {
6199 iwl4965_release_nic_access(priv);
6200 return rc;
6201 }
6202
6203 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
6204 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
6205 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
6206 RTC_INST_LOWER_BOUND);
6207 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
6208
6209 /* Load bootstrap code into instruction SRAM now,
6210 * to prepare to load "initialize" uCode */
6211 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
6212 BSM_WR_CTRL_REG_BIT_START);
6213
6214 /* Wait for load of bootstrap uCode to finish */
6215 for (i = 0; i < 100; i++) {
6216 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
6217 if (!(done & BSM_WR_CTRL_REG_BIT_START))
6218 break;
6219 udelay(10);
6220 }
6221 if (i < 100)
6222 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
6223 else {
6224 IWL_ERROR("BSM write did not complete!\n");
6225 return -EIO;
6226 }
6227
6228 /* Enable future boot loads whenever power management unit triggers it
6229 * (e.g. when powering back up after power-save shutdown) */
6230 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
6231 BSM_WR_CTRL_REG_BIT_START_EN);
6232
6233 iwl4965_release_nic_access(priv);
6234
6235 return 0;
6236 }
6237
6238 static void iwl4965_nic_start(struct iwl4965_priv *priv)
6239 {
6240 /* Remove all resets to allow NIC to operate */
6241 iwl4965_write32(priv, CSR_RESET, 0);
6242 }
6243
6244
6245 /**
6246 * iwl4965_read_ucode - Read uCode images from disk file.
6247 *
6248 * Copy into buffers for card to fetch via bus-mastering
6249 */
6250 static int iwl4965_read_ucode(struct iwl4965_priv *priv)
6251 {
6252 struct iwl4965_ucode *ucode;
6253 int ret;
6254 const struct firmware *ucode_raw;
6255 const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
6256 u8 *src;
6257 size_t len;
6258 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
6259
6260 /* Ask kernel firmware_class module to get the boot firmware off disk.
6261 * request_firmware() is synchronous, file is in memory on return. */
6262 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
6263 if (ret < 0) {
6264 IWL_ERROR("%s firmware file req failed: Reason %d\n",
6265 name, ret);
6266 goto error;
6267 }
6268
6269 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
6270 name, ucode_raw->size);
6271
6272 /* Make sure that we got at least our header! */
6273 if (ucode_raw->size < sizeof(*ucode)) {
6274 IWL_ERROR("File size way too small!\n");
6275 ret = -EINVAL;
6276 goto err_release;
6277 }
6278
6279 /* Data from ucode file: header followed by uCode images */
6280 ucode = (void *)ucode_raw->data;
6281
6282 ver = le32_to_cpu(ucode->ver);
6283 inst_size = le32_to_cpu(ucode->inst_size);
6284 data_size = le32_to_cpu(ucode->data_size);
6285 init_size = le32_to_cpu(ucode->init_size);
6286 init_data_size = le32_to_cpu(ucode->init_data_size);
6287 boot_size = le32_to_cpu(ucode->boot_size);
6288
6289 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
6290 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
6291 inst_size);
6292 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
6293 data_size);
6294 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
6295 init_size);
6296 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
6297 init_data_size);
6298 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
6299 boot_size);
6300
6301 /* Verify size of file vs. image size info in file's header */
6302 if (ucode_raw->size < sizeof(*ucode) +
6303 inst_size + data_size + init_size +
6304 init_data_size + boot_size) {
6305
6306 IWL_DEBUG_INFO("uCode file size %d too small\n",
6307 (int)ucode_raw->size);
6308 ret = -EINVAL;
6309 goto err_release;
6310 }
6311
6312 /* Verify that uCode images will fit in card's SRAM */
6313 if (inst_size > IWL_MAX_INST_SIZE) {
6314 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
6315 inst_size);
6316 ret = -EINVAL;
6317 goto err_release;
6318 }
6319
6320 if (data_size > IWL_MAX_DATA_SIZE) {
6321 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
6322 data_size);
6323 ret = -EINVAL;
6324 goto err_release;
6325 }
6326 if (init_size > IWL_MAX_INST_SIZE) {
6327 IWL_DEBUG_INFO
6328 ("uCode init instr len %d too large to fit in\n",
6329 init_size);
6330 ret = -EINVAL;
6331 goto err_release;
6332 }
6333 if (init_data_size > IWL_MAX_DATA_SIZE) {
6334 IWL_DEBUG_INFO
6335 ("uCode init data len %d too large to fit in\n",
6336 init_data_size);
6337 ret = -EINVAL;
6338 goto err_release;
6339 }
6340 if (boot_size > IWL_MAX_BSM_SIZE) {
6341 IWL_DEBUG_INFO
6342 ("uCode boot instr len %d too large to fit in\n",
6343 boot_size);
6344 ret = -EINVAL;
6345 goto err_release;
6346 }
6347
6348 /* Allocate ucode buffers for card's bus-master loading ... */
6349
6350 /* Runtime instructions and 2 copies of data:
6351 * 1) unmodified from disk
6352 * 2) backup cache for save/restore during power-downs */
6353 priv->ucode_code.len = inst_size;
6354 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
6355
6356 priv->ucode_data.len = data_size;
6357 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
6358
6359 priv->ucode_data_backup.len = data_size;
6360 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
6361
6362 /* Initialization instructions and data */
6363 if (init_size && init_data_size) {
6364 priv->ucode_init.len = init_size;
6365 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
6366
6367 priv->ucode_init_data.len = init_data_size;
6368 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
6369
6370 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6371 goto err_pci_alloc;
6372 }
6373
6374 /* Bootstrap (instructions only, no data) */
6375 if (boot_size) {
6376 priv->ucode_boot.len = boot_size;
6377 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
6378
6379 if (!priv->ucode_boot.v_addr)
6380 goto err_pci_alloc;
6381 }
6382
6383 /* Copy images into buffers for card's bus-master reads ... */
6384
6385 /* Runtime instructions (first block of data in file) */
6386 src = &ucode->data[0];
6387 len = priv->ucode_code.len;
6388 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
6389 memcpy(priv->ucode_code.v_addr, src, len);
6390 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6391 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6392
6393 /* Runtime data (2nd block)
6394 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
6395 src = &ucode->data[inst_size];
6396 len = priv->ucode_data.len;
6397 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
6398 memcpy(priv->ucode_data.v_addr, src, len);
6399 memcpy(priv->ucode_data_backup.v_addr, src, len);
6400
6401 /* Initialization instructions (3rd block) */
6402 if (init_size) {
6403 src = &ucode->data[inst_size + data_size];
6404 len = priv->ucode_init.len;
6405 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6406 len);
6407 memcpy(priv->ucode_init.v_addr, src, len);
6408 }
6409
6410 /* Initialization data (4th block) */
6411 if (init_data_size) {
6412 src = &ucode->data[inst_size + data_size + init_size];
6413 len = priv->ucode_init_data.len;
6414 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
6415 len);
6416 memcpy(priv->ucode_init_data.v_addr, src, len);
6417 }
6418
6419 /* Bootstrap instructions (5th block) */
6420 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6421 len = priv->ucode_boot.len;
6422 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
6423 memcpy(priv->ucode_boot.v_addr, src, len);
6424
6425 /* We have our copies now, allow OS release its copies */
6426 release_firmware(ucode_raw);
6427 return 0;
6428
6429 err_pci_alloc:
6430 IWL_ERROR("failed to allocate pci memory\n");
6431 ret = -ENOMEM;
6432 iwl4965_dealloc_ucode_pci(priv);
6433
6434 err_release:
6435 release_firmware(ucode_raw);
6436
6437 error:
6438 return ret;
6439 }
6440
6441
6442 /**
6443 * iwl4965_set_ucode_ptrs - Set uCode address location
6444 *
6445 * Tell initialization uCode where to find runtime uCode.
6446 *
6447 * BSM registers initially contain pointers to initialization uCode.
6448 * We need to replace them to load runtime uCode inst and data,
6449 * and to save runtime data when powering down.
6450 */
6451 static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
6452 {
6453 dma_addr_t pinst;
6454 dma_addr_t pdata;
6455 int rc = 0;
6456 unsigned long flags;
6457
6458 /* bits 35:4 for 4965 */
6459 pinst = priv->ucode_code.p_addr >> 4;
6460 pdata = priv->ucode_data_backup.p_addr >> 4;
6461
6462 spin_lock_irqsave(&priv->lock, flags);
6463 rc = iwl4965_grab_nic_access(priv);
6464 if (rc) {
6465 spin_unlock_irqrestore(&priv->lock, flags);
6466 return rc;
6467 }
6468
6469 /* Tell bootstrap uCode where to find image to load */
6470 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6471 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6472 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
6473 priv->ucode_data.len);
6474
6475 /* Inst bytecount must be last to set up, bit 31 signals uCode
6476 * that all new ptr/size info is in place */
6477 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
6478 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6479
6480 iwl4965_release_nic_access(priv);
6481
6482 spin_unlock_irqrestore(&priv->lock, flags);
6483
6484 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6485
6486 return rc;
6487 }
6488
6489 /**
6490 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
6491 *
6492 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6493 *
6494 * The 4965 "initialize" ALIVE reply contains calibration data for:
6495 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
6496 * (3945 does not contain this data).
6497 *
6498 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6499 */
6500 static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
6501 {
6502 /* Check alive response for "valid" sign from uCode */
6503 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6504 /* We had an error bringing up the hardware, so take it
6505 * all the way back down so we can try again */
6506 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6507 goto restart;
6508 }
6509
6510 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6511 * This is a paranoid check, because we would not have gotten the
6512 * "initialize" alive if code weren't properly loaded. */
6513 if (iwl4965_verify_ucode(priv)) {
6514 /* Runtime instruction load was bad;
6515 * take it all the way back down so we can try again */
6516 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6517 goto restart;
6518 }
6519
6520 /* Calculate temperature */
6521 priv->temperature = iwl4965_get_temperature(priv);
6522
6523 /* Send pointers to protocol/runtime uCode image ... init code will
6524 * load and launch runtime uCode, which will send us another "Alive"
6525 * notification. */
6526 IWL_DEBUG_INFO("Initialization Alive received.\n");
6527 if (iwl4965_set_ucode_ptrs(priv)) {
6528 /* Runtime instruction load won't happen;
6529 * take it all the way back down so we can try again */
6530 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6531 goto restart;
6532 }
6533 return;
6534
6535 restart:
6536 queue_work(priv->workqueue, &priv->restart);
6537 }
6538
6539
6540 /**
6541 * iwl4965_alive_start - called after REPLY_ALIVE notification received
6542 * from protocol/runtime uCode (initialization uCode's
6543 * Alive gets handled by iwl4965_init_alive_start()).
6544 */
6545 static void iwl4965_alive_start(struct iwl4965_priv *priv)
6546 {
6547 int rc = 0;
6548
6549 IWL_DEBUG_INFO("Runtime Alive received.\n");
6550
6551 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6552 /* We had an error bringing up the hardware, so take it
6553 * all the way back down so we can try again */
6554 IWL_DEBUG_INFO("Alive failed.\n");
6555 goto restart;
6556 }
6557
6558 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6559 * This is a paranoid check, because we would not have gotten the
6560 * "runtime" alive if code weren't properly loaded. */
6561 if (iwl4965_verify_ucode(priv)) {
6562 /* Runtime instruction load was bad;
6563 * take it all the way back down so we can try again */
6564 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6565 goto restart;
6566 }
6567
6568 iwl4965_clear_stations_table(priv);
6569
6570 rc = iwl4965_alive_notify(priv);
6571 if (rc) {
6572 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
6573 rc);
6574 goto restart;
6575 }
6576
6577 /* After the ALIVE response, we can send host commands to 4965 uCode */
6578 set_bit(STATUS_ALIVE, &priv->status);
6579
6580 /* Clear out the uCode error bit if it is set */
6581 clear_bit(STATUS_FW_ERROR, &priv->status);
6582
6583 if (iwl4965_is_rfkill(priv))
6584 return;
6585
6586 ieee80211_start_queues(priv->hw);
6587
6588 priv->active_rate = priv->rates_mask;
6589 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6590
6591 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
6592
6593 if (iwl4965_is_associated(priv)) {
6594 struct iwl4965_rxon_cmd *active_rxon =
6595 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
6596
6597 memcpy(&priv->staging_rxon, &priv->active_rxon,
6598 sizeof(priv->staging_rxon));
6599 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6600 } else {
6601 /* Initialize our rx_config data */
6602 iwl4965_connection_init_rx_config(priv);
6603 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6604 }
6605
6606 /* Configure Bluetooth device coexistence support */
6607 iwl4965_send_bt_config(priv);
6608
6609 /* Configure the adapter for unassociated operation */
6610 iwl4965_commit_rxon(priv);
6611
6612 /* At this point, the NIC is initialized and operational */
6613 priv->notif_missed_beacons = 0;
6614 set_bit(STATUS_READY, &priv->status);
6615
6616 iwl4965_rf_kill_ct_config(priv);
6617
6618 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6619 wake_up_interruptible(&priv->wait_command_queue);
6620
6621 if (priv->error_recovering)
6622 iwl4965_error_recovery(priv);
6623
6624 return;
6625
6626 restart:
6627 queue_work(priv->workqueue, &priv->restart);
6628 }
6629
6630 static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
6631
6632 static void __iwl4965_down(struct iwl4965_priv *priv)
6633 {
6634 unsigned long flags;
6635 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6636 struct ieee80211_conf *conf = NULL;
6637
6638 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6639
6640 conf = ieee80211_get_hw_conf(priv->hw);
6641
6642 if (!exit_pending)
6643 set_bit(STATUS_EXIT_PENDING, &priv->status);
6644
6645 iwl4965_clear_stations_table(priv);
6646
6647 /* Unblock any waiting calls */
6648 wake_up_interruptible_all(&priv->wait_command_queue);
6649
6650 /* Wipe out the EXIT_PENDING status bit if we are not actually
6651 * exiting the module */
6652 if (!exit_pending)
6653 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6654
6655 /* stop and reset the on-board processor */
6656 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6657
6658 /* tell the device to stop sending interrupts */
6659 iwl4965_disable_interrupts(priv);
6660
6661 if (priv->mac80211_registered)
6662 ieee80211_stop_queues(priv->hw);
6663
6664 /* If we have not previously called iwl4965_init() then
6665 * clear all bits but the RF Kill and SUSPEND bits and return */
6666 if (!iwl4965_is_init(priv)) {
6667 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6668 STATUS_RF_KILL_HW |
6669 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6670 STATUS_RF_KILL_SW |
6671 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6672 STATUS_IN_SUSPEND;
6673 goto exit;
6674 }
6675
6676 /* ...otherwise clear out all the status bits but the RF Kill and
6677 * SUSPEND bits and continue taking the NIC down. */
6678 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6679 STATUS_RF_KILL_HW |
6680 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6681 STATUS_RF_KILL_SW |
6682 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6683 STATUS_IN_SUSPEND |
6684 test_bit(STATUS_FW_ERROR, &priv->status) <<
6685 STATUS_FW_ERROR;
6686
6687 spin_lock_irqsave(&priv->lock, flags);
6688 iwl4965_clear_bit(priv, CSR_GP_CNTRL,
6689 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
6690 spin_unlock_irqrestore(&priv->lock, flags);
6691
6692 iwl4965_hw_txq_ctx_stop(priv);
6693 iwl4965_hw_rxq_stop(priv);
6694
6695 spin_lock_irqsave(&priv->lock, flags);
6696 if (!iwl4965_grab_nic_access(priv)) {
6697 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
6698 APMG_CLK_VAL_DMA_CLK_RQT);
6699 iwl4965_release_nic_access(priv);
6700 }
6701 spin_unlock_irqrestore(&priv->lock, flags);
6702
6703 udelay(5);
6704
6705 iwl4965_hw_nic_stop_master(priv);
6706 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6707 iwl4965_hw_nic_reset(priv);
6708
6709 exit:
6710 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
6711
6712 if (priv->ibss_beacon)
6713 dev_kfree_skb(priv->ibss_beacon);
6714 priv->ibss_beacon = NULL;
6715
6716 /* clear out any free frames */
6717 iwl4965_clear_free_frames(priv);
6718 }
6719
6720 static void iwl4965_down(struct iwl4965_priv *priv)
6721 {
6722 mutex_lock(&priv->mutex);
6723 __iwl4965_down(priv);
6724 mutex_unlock(&priv->mutex);
6725
6726 iwl4965_cancel_deferred_work(priv);
6727 }
6728
6729 #define MAX_HW_RESTARTS 5
6730
6731 static int __iwl4965_up(struct iwl4965_priv *priv)
6732 {
6733 int rc, i;
6734
6735 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6736 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6737 return -EIO;
6738 }
6739
6740 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6741 IWL_WARNING("Radio disabled by SW RF kill (module "
6742 "parameter)\n");
6743 return -ENODEV;
6744 }
6745
6746 /* If platform's RF_KILL switch is NOT set to KILL */
6747 if (iwl4965_read32(priv, CSR_GP_CNTRL) &
6748 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6749 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6750 else {
6751 set_bit(STATUS_RF_KILL_HW, &priv->status);
6752 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6753 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6754 return -ENODEV;
6755 }
6756 }
6757
6758 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6759 IWL_ERROR("ucode not available for device bringup\n");
6760 return -EIO;
6761 }
6762
6763 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6764
6765 rc = iwl4965_hw_nic_init(priv);
6766 if (rc) {
6767 IWL_ERROR("Unable to int nic\n");
6768 return rc;
6769 }
6770
6771 /* make sure rfkill handshake bits are cleared */
6772 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6773 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
6774 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6775
6776 /* clear (again), then enable host interrupts */
6777 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6778 iwl4965_enable_interrupts(priv);
6779
6780 /* really make sure rfkill handshake bits are cleared */
6781 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6782 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6783
6784 /* Copy original ucode data image from disk into backup cache.
6785 * This will be used to initialize the on-board processor's
6786 * data SRAM for a clean start when the runtime program first loads. */
6787 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6788 priv->ucode_data.len);
6789
6790 /* We return success when we resume from suspend and rf_kill is on. */
6791 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6792 return 0;
6793
6794 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6795
6796 iwl4965_clear_stations_table(priv);
6797
6798 /* load bootstrap state machine,
6799 * load bootstrap program into processor's memory,
6800 * prepare to load the "initialize" uCode */
6801 rc = iwl4965_load_bsm(priv);
6802
6803 if (rc) {
6804 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6805 continue;
6806 }
6807
6808 /* start card; "initialize" will load runtime ucode */
6809 iwl4965_nic_start(priv);
6810
6811 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6812
6813 return 0;
6814 }
6815
6816 set_bit(STATUS_EXIT_PENDING, &priv->status);
6817 __iwl4965_down(priv);
6818
6819 /* tried to restart and config the device for as long as our
6820 * patience could withstand */
6821 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6822 return -EIO;
6823 }
6824
6825
6826 /*****************************************************************************
6827 *
6828 * Workqueue callbacks
6829 *
6830 *****************************************************************************/
6831
6832 static void iwl4965_bg_init_alive_start(struct work_struct *data)
6833 {
6834 struct iwl4965_priv *priv =
6835 container_of(data, struct iwl4965_priv, init_alive_start.work);
6836
6837 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6838 return;
6839
6840 mutex_lock(&priv->mutex);
6841 iwl4965_init_alive_start(priv);
6842 mutex_unlock(&priv->mutex);
6843 }
6844
6845 static void iwl4965_bg_alive_start(struct work_struct *data)
6846 {
6847 struct iwl4965_priv *priv =
6848 container_of(data, struct iwl4965_priv, alive_start.work);
6849
6850 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6851 return;
6852
6853 mutex_lock(&priv->mutex);
6854 iwl4965_alive_start(priv);
6855 mutex_unlock(&priv->mutex);
6856 }
6857
6858 static void iwl4965_bg_rf_kill(struct work_struct *work)
6859 {
6860 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
6861
6862 wake_up_interruptible(&priv->wait_command_queue);
6863
6864 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6865 return;
6866
6867 mutex_lock(&priv->mutex);
6868
6869 if (!iwl4965_is_rfkill(priv)) {
6870 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6871 "HW and/or SW RF Kill no longer active, restarting "
6872 "device\n");
6873 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6874 queue_work(priv->workqueue, &priv->restart);
6875 } else {
6876
6877 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6878 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6879 "disabled by SW switch\n");
6880 else
6881 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6882 "Kill switch must be turned off for "
6883 "wireless networking to work.\n");
6884 }
6885 mutex_unlock(&priv->mutex);
6886 }
6887
6888 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6889
6890 static void iwl4965_bg_scan_check(struct work_struct *data)
6891 {
6892 struct iwl4965_priv *priv =
6893 container_of(data, struct iwl4965_priv, scan_check.work);
6894
6895 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6896 return;
6897
6898 mutex_lock(&priv->mutex);
6899 if (test_bit(STATUS_SCANNING, &priv->status) ||
6900 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6901 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6902 "Scan completion watchdog resetting adapter (%dms)\n",
6903 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6904
6905 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6906 iwl4965_send_scan_abort(priv);
6907 }
6908 mutex_unlock(&priv->mutex);
6909 }
6910
6911 static void iwl4965_bg_request_scan(struct work_struct *data)
6912 {
6913 struct iwl4965_priv *priv =
6914 container_of(data, struct iwl4965_priv, request_scan);
6915 struct iwl4965_host_cmd cmd = {
6916 .id = REPLY_SCAN_CMD,
6917 .len = sizeof(struct iwl4965_scan_cmd),
6918 .meta.flags = CMD_SIZE_HUGE,
6919 };
6920 int rc = 0;
6921 struct iwl4965_scan_cmd *scan;
6922 struct ieee80211_conf *conf = NULL;
6923 u8 direct_mask;
6924 int phymode;
6925
6926 conf = ieee80211_get_hw_conf(priv->hw);
6927
6928 mutex_lock(&priv->mutex);
6929
6930 if (!iwl4965_is_ready(priv)) {
6931 IWL_WARNING("request scan called when driver not ready.\n");
6932 goto done;
6933 }
6934
6935 /* Make sure the scan wasn't cancelled before this queued work
6936 * was given the chance to run... */
6937 if (!test_bit(STATUS_SCANNING, &priv->status))
6938 goto done;
6939
6940 /* This should never be called or scheduled if there is currently
6941 * a scan active in the hardware. */
6942 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6943 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6944 "Ignoring second request.\n");
6945 rc = -EIO;
6946 goto done;
6947 }
6948
6949 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6950 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6951 goto done;
6952 }
6953
6954 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6955 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6956 goto done;
6957 }
6958
6959 if (iwl4965_is_rfkill(priv)) {
6960 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6961 goto done;
6962 }
6963
6964 if (!test_bit(STATUS_READY, &priv->status)) {
6965 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6966 goto done;
6967 }
6968
6969 if (!priv->scan_bands) {
6970 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6971 goto done;
6972 }
6973
6974 if (!priv->scan) {
6975 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
6976 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6977 if (!priv->scan) {
6978 rc = -ENOMEM;
6979 goto done;
6980 }
6981 }
6982 scan = priv->scan;
6983 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
6984
6985 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6986 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6987
6988 if (iwl4965_is_associated(priv)) {
6989 u16 interval = 0;
6990 u32 extra;
6991 u32 suspend_time = 100;
6992 u32 scan_suspend_time = 100;
6993 unsigned long flags;
6994
6995 IWL_DEBUG_INFO("Scanning while associated...\n");
6996
6997 spin_lock_irqsave(&priv->lock, flags);
6998 interval = priv->beacon_int;
6999 spin_unlock_irqrestore(&priv->lock, flags);
7000
7001 scan->suspend_time = 0;
7002 scan->max_out_time = cpu_to_le32(200 * 1024);
7003 if (!interval)
7004 interval = suspend_time;
7005
7006 extra = (suspend_time / interval) << 22;
7007 scan_suspend_time = (extra |
7008 ((suspend_time % interval) * 1024));
7009 scan->suspend_time = cpu_to_le32(scan_suspend_time);
7010 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
7011 scan_suspend_time, interval);
7012 }
7013
7014 /* We should add the ability for user to lock to PASSIVE ONLY */
7015 if (priv->one_direct_scan) {
7016 IWL_DEBUG_SCAN
7017 ("Kicking off one direct scan for '%s'\n",
7018 iwl4965_escape_essid(priv->direct_ssid,
7019 priv->direct_ssid_len));
7020 scan->direct_scan[0].id = WLAN_EID_SSID;
7021 scan->direct_scan[0].len = priv->direct_ssid_len;
7022 memcpy(scan->direct_scan[0].ssid,
7023 priv->direct_ssid, priv->direct_ssid_len);
7024 direct_mask = 1;
7025 } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
7026 scan->direct_scan[0].id = WLAN_EID_SSID;
7027 scan->direct_scan[0].len = priv->essid_len;
7028 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
7029 direct_mask = 1;
7030 } else
7031 direct_mask = 0;
7032
7033 /* We don't build a direct scan probe request; the uCode will do
7034 * that based on the direct_mask added to each channel entry */
7035 scan->tx_cmd.len = cpu_to_le16(
7036 iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
7037 IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
7038 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
7039 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
7040 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
7041
7042 /* flags + rate selection */
7043
7044 scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
7045
7046 switch (priv->scan_bands) {
7047 case 2:
7048 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
7049 scan->tx_cmd.rate_n_flags =
7050 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
7051 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
7052
7053 scan->good_CRC_th = 0;
7054 phymode = MODE_IEEE80211G;
7055 break;
7056
7057 case 1:
7058 scan->tx_cmd.rate_n_flags =
7059 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
7060 RATE_MCS_ANT_B_MSK);
7061 scan->good_CRC_th = IWL_GOOD_CRC_TH;
7062 phymode = MODE_IEEE80211A;
7063 break;
7064
7065 default:
7066 IWL_WARNING("Invalid scan band count\n");
7067 goto done;
7068 }
7069
7070 /* select Rx chains */
7071
7072 /* Force use of chains B and C (0x6) for scan Rx.
7073 * Avoid A (0x1) because of its off-channel reception on A-band.
7074 * MIMO is not used here, but value is required to make uCode happy. */
7075 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
7076 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
7077 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
7078 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
7079
7080 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
7081 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
7082
7083 if (direct_mask)
7084 IWL_DEBUG_SCAN
7085 ("Initiating direct scan for %s.\n",
7086 iwl4965_escape_essid(priv->essid, priv->essid_len));
7087 else
7088 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
7089
7090 scan->channel_count =
7091 iwl4965_get_channels_for_scan(
7092 priv, phymode, 1, /* active */
7093 direct_mask,
7094 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
7095
7096 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
7097 scan->channel_count * sizeof(struct iwl4965_scan_channel);
7098 cmd.data = scan;
7099 scan->len = cpu_to_le16(cmd.len);
7100
7101 set_bit(STATUS_SCAN_HW, &priv->status);
7102 rc = iwl4965_send_cmd_sync(priv, &cmd);
7103 if (rc)
7104 goto done;
7105
7106 queue_delayed_work(priv->workqueue, &priv->scan_check,
7107 IWL_SCAN_CHECK_WATCHDOG);
7108
7109 mutex_unlock(&priv->mutex);
7110 return;
7111
7112 done:
7113 /* inform mac80211 scan aborted */
7114 queue_work(priv->workqueue, &priv->scan_completed);
7115 mutex_unlock(&priv->mutex);
7116 }
7117
7118 static void iwl4965_bg_up(struct work_struct *data)
7119 {
7120 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
7121
7122 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7123 return;
7124
7125 mutex_lock(&priv->mutex);
7126 __iwl4965_up(priv);
7127 mutex_unlock(&priv->mutex);
7128 }
7129
7130 static void iwl4965_bg_restart(struct work_struct *data)
7131 {
7132 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
7133
7134 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7135 return;
7136
7137 iwl4965_down(priv);
7138 queue_work(priv->workqueue, &priv->up);
7139 }
7140
7141 static void iwl4965_bg_rx_replenish(struct work_struct *data)
7142 {
7143 struct iwl4965_priv *priv =
7144 container_of(data, struct iwl4965_priv, rx_replenish);
7145
7146 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7147 return;
7148
7149 mutex_lock(&priv->mutex);
7150 iwl4965_rx_replenish(priv);
7151 mutex_unlock(&priv->mutex);
7152 }
7153
7154 #define IWL_DELAY_NEXT_SCAN (HZ*2)
7155
7156 static void iwl4965_bg_post_associate(struct work_struct *data)
7157 {
7158 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
7159 post_associate.work);
7160
7161 int rc = 0;
7162 struct ieee80211_conf *conf = NULL;
7163 DECLARE_MAC_BUF(mac);
7164
7165 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7166 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
7167 return;
7168 }
7169
7170 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
7171 priv->assoc_id,
7172 print_mac(mac, priv->active_rxon.bssid_addr));
7173
7174
7175 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7176 return;
7177
7178 mutex_lock(&priv->mutex);
7179
7180 if (!priv->vif || !priv->is_open) {
7181 mutex_unlock(&priv->mutex);
7182 return;
7183 }
7184 iwl4965_scan_cancel_timeout(priv, 200);
7185
7186 conf = ieee80211_get_hw_conf(priv->hw);
7187
7188 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7189 iwl4965_commit_rxon(priv);
7190
7191 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7192 iwl4965_setup_rxon_timing(priv);
7193 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7194 sizeof(priv->rxon_timing), &priv->rxon_timing);
7195 if (rc)
7196 IWL_WARNING("REPLY_RXON_TIMING failed - "
7197 "Attempting to continue.\n");
7198
7199 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7200
7201 #ifdef CONFIG_IWL4965_HT
7202 if (priv->current_ht_config.is_ht)
7203 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
7204 #endif /* CONFIG_IWL4965_HT*/
7205 iwl4965_set_rxon_chain(priv);
7206 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7207
7208 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
7209 priv->assoc_id, priv->beacon_int);
7210
7211 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7212 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7213 else
7214 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7215
7216 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7217 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
7218 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
7219 else
7220 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7221
7222 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7223 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7224
7225 }
7226
7227 iwl4965_commit_rxon(priv);
7228
7229 switch (priv->iw_mode) {
7230 case IEEE80211_IF_TYPE_STA:
7231 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
7232 break;
7233
7234 case IEEE80211_IF_TYPE_IBSS:
7235
7236 /* clear out the station table */
7237 iwl4965_clear_stations_table(priv);
7238
7239 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7240 iwl4965_rxon_add_station(priv, priv->bssid, 0);
7241 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
7242 iwl4965_send_beacon_cmd(priv);
7243
7244 break;
7245
7246 default:
7247 IWL_ERROR("%s Should not be called in %d mode\n",
7248 __FUNCTION__, priv->iw_mode);
7249 break;
7250 }
7251
7252 iwl4965_sequence_reset(priv);
7253
7254 #ifdef CONFIG_IWL4965_SENSITIVITY
7255 /* Enable Rx differential gain and sensitivity calibrations */
7256 iwl4965_chain_noise_reset(priv);
7257 priv->start_calib = 1;
7258 #endif /* CONFIG_IWL4965_SENSITIVITY */
7259
7260 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7261 priv->assoc_station_added = 1;
7262
7263 #ifdef CONFIG_IWL4965_QOS
7264 iwl4965_activate_qos(priv, 0);
7265 #endif /* CONFIG_IWL4965_QOS */
7266 /* we have just associated, don't start scan too early */
7267 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
7268 mutex_unlock(&priv->mutex);
7269 }
7270
7271 static void iwl4965_bg_abort_scan(struct work_struct *work)
7272 {
7273 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
7274
7275 if (!iwl4965_is_ready(priv))
7276 return;
7277
7278 mutex_lock(&priv->mutex);
7279
7280 set_bit(STATUS_SCAN_ABORTING, &priv->status);
7281 iwl4965_send_scan_abort(priv);
7282
7283 mutex_unlock(&priv->mutex);
7284 }
7285
7286 static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
7287
7288 static void iwl4965_bg_scan_completed(struct work_struct *work)
7289 {
7290 struct iwl4965_priv *priv =
7291 container_of(work, struct iwl4965_priv, scan_completed);
7292
7293 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
7294
7295 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7296 return;
7297
7298 if (test_bit(STATUS_CONF_PENDING, &priv->status))
7299 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
7300
7301 ieee80211_scan_completed(priv->hw);
7302
7303 /* Since setting the TXPOWER may have been deferred while
7304 * performing the scan, fire one off */
7305 mutex_lock(&priv->mutex);
7306 iwl4965_hw_reg_send_txpower(priv);
7307 mutex_unlock(&priv->mutex);
7308 }
7309
7310 /*****************************************************************************
7311 *
7312 * mac80211 entry point functions
7313 *
7314 *****************************************************************************/
7315
7316 #define UCODE_READY_TIMEOUT (2 * HZ)
7317
7318 static int iwl4965_mac_start(struct ieee80211_hw *hw)
7319 {
7320 struct iwl4965_priv *priv = hw->priv;
7321 int ret;
7322
7323 IWL_DEBUG_MAC80211("enter\n");
7324
7325 if (pci_enable_device(priv->pci_dev)) {
7326 IWL_ERROR("Fail to pci_enable_device\n");
7327 return -ENODEV;
7328 }
7329 pci_restore_state(priv->pci_dev);
7330 pci_enable_msi(priv->pci_dev);
7331
7332 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
7333 DRV_NAME, priv);
7334 if (ret) {
7335 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
7336 goto out_disable_msi;
7337 }
7338
7339 /* we should be verifying the device is ready to be opened */
7340 mutex_lock(&priv->mutex);
7341
7342 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
7343 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
7344 * ucode filename and max sizes are card-specific. */
7345
7346 if (!priv->ucode_code.len) {
7347 ret = iwl4965_read_ucode(priv);
7348 if (ret) {
7349 IWL_ERROR("Could not read microcode: %d\n", ret);
7350 mutex_unlock(&priv->mutex);
7351 goto out_release_irq;
7352 }
7353 }
7354
7355 ret = __iwl4965_up(priv);
7356
7357 mutex_unlock(&priv->mutex);
7358
7359 if (ret)
7360 goto out_release_irq;
7361
7362 IWL_DEBUG_INFO("Start UP work done.\n");
7363
7364 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
7365 return 0;
7366
7367 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
7368 * mac80211 will not be run successfully. */
7369 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
7370 test_bit(STATUS_READY, &priv->status),
7371 UCODE_READY_TIMEOUT);
7372 if (!ret) {
7373 if (!test_bit(STATUS_READY, &priv->status)) {
7374 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
7375 jiffies_to_msecs(UCODE_READY_TIMEOUT));
7376 ret = -ETIMEDOUT;
7377 goto out_release_irq;
7378 }
7379 }
7380
7381 priv->is_open = 1;
7382 IWL_DEBUG_MAC80211("leave\n");
7383 return 0;
7384
7385 out_release_irq:
7386 free_irq(priv->pci_dev->irq, priv);
7387 out_disable_msi:
7388 pci_disable_msi(priv->pci_dev);
7389 pci_disable_device(priv->pci_dev);
7390 priv->is_open = 0;
7391 IWL_DEBUG_MAC80211("leave - failed\n");
7392 return ret;
7393 }
7394
7395 static void iwl4965_mac_stop(struct ieee80211_hw *hw)
7396 {
7397 struct iwl4965_priv *priv = hw->priv;
7398
7399 IWL_DEBUG_MAC80211("enter\n");
7400
7401 if (!priv->is_open) {
7402 IWL_DEBUG_MAC80211("leave - skip\n");
7403 return;
7404 }
7405
7406 priv->is_open = 0;
7407
7408 if (iwl4965_is_ready_rf(priv)) {
7409 /* stop mac, cancel any scan request and clear
7410 * RXON_FILTER_ASSOC_MSK BIT
7411 */
7412 mutex_lock(&priv->mutex);
7413 iwl4965_scan_cancel_timeout(priv, 100);
7414 cancel_delayed_work(&priv->post_associate);
7415 mutex_unlock(&priv->mutex);
7416 }
7417
7418 iwl4965_down(priv);
7419
7420 flush_workqueue(priv->workqueue);
7421 free_irq(priv->pci_dev->irq, priv);
7422 pci_disable_msi(priv->pci_dev);
7423 pci_save_state(priv->pci_dev);
7424 pci_disable_device(priv->pci_dev);
7425
7426 IWL_DEBUG_MAC80211("leave\n");
7427 }
7428
7429 static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
7430 struct ieee80211_tx_control *ctl)
7431 {
7432 struct iwl4965_priv *priv = hw->priv;
7433
7434 IWL_DEBUG_MAC80211("enter\n");
7435
7436 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7437 IWL_DEBUG_MAC80211("leave - monitor\n");
7438 return -1;
7439 }
7440
7441 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7442 ctl->tx_rate);
7443
7444 if (iwl4965_tx_skb(priv, skb, ctl))
7445 dev_kfree_skb_any(skb);
7446
7447 IWL_DEBUG_MAC80211("leave\n");
7448 return 0;
7449 }
7450
7451 static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
7452 struct ieee80211_if_init_conf *conf)
7453 {
7454 struct iwl4965_priv *priv = hw->priv;
7455 unsigned long flags;
7456 DECLARE_MAC_BUF(mac);
7457
7458 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
7459
7460 if (priv->vif) {
7461 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
7462 return -EOPNOTSUPP;
7463 }
7464
7465 spin_lock_irqsave(&priv->lock, flags);
7466 priv->vif = conf->vif;
7467
7468 spin_unlock_irqrestore(&priv->lock, flags);
7469
7470 mutex_lock(&priv->mutex);
7471
7472 if (conf->mac_addr) {
7473 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
7474 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7475 }
7476
7477 if (iwl4965_is_ready(priv))
7478 iwl4965_set_mode(priv, conf->type);
7479
7480 mutex_unlock(&priv->mutex);
7481
7482 IWL_DEBUG_MAC80211("leave\n");
7483 return 0;
7484 }
7485
7486 /**
7487 * iwl4965_mac_config - mac80211 config callback
7488 *
7489 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7490 * be set inappropriately and the driver currently sets the hardware up to
7491 * use it whenever needed.
7492 */
7493 static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
7494 {
7495 struct iwl4965_priv *priv = hw->priv;
7496 const struct iwl4965_channel_info *ch_info;
7497 unsigned long flags;
7498 int ret = 0;
7499
7500 mutex_lock(&priv->mutex);
7501 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7502
7503 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7504
7505 if (!iwl4965_is_ready(priv)) {
7506 IWL_DEBUG_MAC80211("leave - not ready\n");
7507 ret = -EIO;
7508 goto out;
7509 }
7510
7511 if (unlikely(!iwl4965_param_disable_hw_scan &&
7512 test_bit(STATUS_SCANNING, &priv->status))) {
7513 IWL_DEBUG_MAC80211("leave - scanning\n");
7514 set_bit(STATUS_CONF_PENDING, &priv->status);
7515 mutex_unlock(&priv->mutex);
7516 return 0;
7517 }
7518
7519 spin_lock_irqsave(&priv->lock, flags);
7520
7521 ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
7522 if (!is_channel_valid(ch_info)) {
7523 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7524 conf->channel, conf->phymode);
7525 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7526 spin_unlock_irqrestore(&priv->lock, flags);
7527 ret = -EINVAL;
7528 goto out;
7529 }
7530
7531 #ifdef CONFIG_IWL4965_HT
7532 /* if we are switching fron ht to 2.4 clear flags
7533 * from any ht related info since 2.4 does not
7534 * support ht */
7535 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
7536 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7537 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
7538 #endif
7539 )
7540 priv->staging_rxon.flags = 0;
7541 #endif /* CONFIG_IWL4965_HT */
7542
7543 iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
7544
7545 iwl4965_set_flags_for_phymode(priv, conf->phymode);
7546
7547 /* The list of supported rates and rate mask can be different
7548 * for each phymode; since the phymode may have changed, reset
7549 * the rate mask to what mac80211 lists */
7550 iwl4965_set_rate(priv);
7551
7552 spin_unlock_irqrestore(&priv->lock, flags);
7553
7554 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7555 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
7556 iwl4965_hw_channel_switch(priv, conf->channel);
7557 goto out;
7558 }
7559 #endif
7560
7561 iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
7562
7563 if (!conf->radio_enabled) {
7564 IWL_DEBUG_MAC80211("leave - radio disabled\n");
7565 goto out;
7566 }
7567
7568 if (iwl4965_is_rfkill(priv)) {
7569 IWL_DEBUG_MAC80211("leave - RF kill\n");
7570 ret = -EIO;
7571 goto out;
7572 }
7573
7574 iwl4965_set_rate(priv);
7575
7576 if (memcmp(&priv->active_rxon,
7577 &priv->staging_rxon, sizeof(priv->staging_rxon)))
7578 iwl4965_commit_rxon(priv);
7579 else
7580 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7581
7582 IWL_DEBUG_MAC80211("leave\n");
7583
7584 out:
7585 clear_bit(STATUS_CONF_PENDING, &priv->status);
7586 mutex_unlock(&priv->mutex);
7587 return ret;
7588 }
7589
7590 static void iwl4965_config_ap(struct iwl4965_priv *priv)
7591 {
7592 int rc = 0;
7593
7594 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7595 return;
7596
7597 /* The following should be done only at AP bring up */
7598 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7599
7600 /* RXON - unassoc (to set timing command) */
7601 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7602 iwl4965_commit_rxon(priv);
7603
7604 /* RXON Timing */
7605 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7606 iwl4965_setup_rxon_timing(priv);
7607 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7608 sizeof(priv->rxon_timing), &priv->rxon_timing);
7609 if (rc)
7610 IWL_WARNING("REPLY_RXON_TIMING failed - "
7611 "Attempting to continue.\n");
7612
7613 iwl4965_set_rxon_chain(priv);
7614
7615 /* FIXME: what should be the assoc_id for AP? */
7616 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7617 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7618 priv->staging_rxon.flags |=
7619 RXON_FLG_SHORT_PREAMBLE_MSK;
7620 else
7621 priv->staging_rxon.flags &=
7622 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7623
7624 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7625 if (priv->assoc_capability &
7626 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7627 priv->staging_rxon.flags |=
7628 RXON_FLG_SHORT_SLOT_MSK;
7629 else
7630 priv->staging_rxon.flags &=
7631 ~RXON_FLG_SHORT_SLOT_MSK;
7632
7633 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7634 priv->staging_rxon.flags &=
7635 ~RXON_FLG_SHORT_SLOT_MSK;
7636 }
7637 /* restore RXON assoc */
7638 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7639 iwl4965_commit_rxon(priv);
7640 #ifdef CONFIG_IWL4965_QOS
7641 iwl4965_activate_qos(priv, 1);
7642 #endif
7643 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7644 }
7645 iwl4965_send_beacon_cmd(priv);
7646
7647 /* FIXME - we need to add code here to detect a totally new
7648 * configuration, reset the AP, unassoc, rxon timing, assoc,
7649 * clear sta table, add BCAST sta... */
7650 }
7651
7652 static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
7653 struct ieee80211_vif *vif,
7654 struct ieee80211_if_conf *conf)
7655 {
7656 struct iwl4965_priv *priv = hw->priv;
7657 DECLARE_MAC_BUF(mac);
7658 unsigned long flags;
7659 int rc;
7660
7661 if (conf == NULL)
7662 return -EIO;
7663
7664 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7665 (!conf->beacon || !conf->ssid_len)) {
7666 IWL_DEBUG_MAC80211
7667 ("Leaving in AP mode because HostAPD is not ready.\n");
7668 return 0;
7669 }
7670
7671 if (!iwl4965_is_alive(priv))
7672 return -EAGAIN;
7673
7674 mutex_lock(&priv->mutex);
7675
7676 if (conf->bssid)
7677 IWL_DEBUG_MAC80211("bssid: %s\n",
7678 print_mac(mac, conf->bssid));
7679
7680 /*
7681 * very dubious code was here; the probe filtering flag is never set:
7682 *
7683 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7684 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
7685 */
7686 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
7687 IWL_DEBUG_MAC80211("leave - scanning\n");
7688 mutex_unlock(&priv->mutex);
7689 return 0;
7690 }
7691
7692 if (priv->vif != vif) {
7693 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
7694 mutex_unlock(&priv->mutex);
7695 return 0;
7696 }
7697
7698 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7699 if (!conf->bssid) {
7700 conf->bssid = priv->mac_addr;
7701 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
7702 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7703 print_mac(mac, conf->bssid));
7704 }
7705 if (priv->ibss_beacon)
7706 dev_kfree_skb(priv->ibss_beacon);
7707
7708 priv->ibss_beacon = conf->beacon;
7709 }
7710
7711 if (iwl4965_is_rfkill(priv))
7712 goto done;
7713
7714 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7715 !is_multicast_ether_addr(conf->bssid)) {
7716 /* If there is currently a HW scan going on in the background
7717 * then we need to cancel it else the RXON below will fail. */
7718 if (iwl4965_scan_cancel_timeout(priv, 100)) {
7719 IWL_WARNING("Aborted scan still in progress "
7720 "after 100ms\n");
7721 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7722 mutex_unlock(&priv->mutex);
7723 return -EAGAIN;
7724 }
7725 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7726
7727 /* TODO: Audit driver for usage of these members and see
7728 * if mac80211 deprecates them (priv->bssid looks like it
7729 * shouldn't be there, but I haven't scanned the IBSS code
7730 * to verify) - jpk */
7731 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7732
7733 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7734 iwl4965_config_ap(priv);
7735 else {
7736 rc = iwl4965_commit_rxon(priv);
7737 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
7738 iwl4965_rxon_add_station(
7739 priv, priv->active_rxon.bssid_addr, 1);
7740 }
7741
7742 } else {
7743 iwl4965_scan_cancel_timeout(priv, 100);
7744 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7745 iwl4965_commit_rxon(priv);
7746 }
7747
7748 done:
7749 spin_lock_irqsave(&priv->lock, flags);
7750 if (!conf->ssid_len)
7751 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7752 else
7753 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7754
7755 priv->essid_len = conf->ssid_len;
7756 spin_unlock_irqrestore(&priv->lock, flags);
7757
7758 IWL_DEBUG_MAC80211("leave\n");
7759 mutex_unlock(&priv->mutex);
7760
7761 return 0;
7762 }
7763
7764 static void iwl4965_configure_filter(struct ieee80211_hw *hw,
7765 unsigned int changed_flags,
7766 unsigned int *total_flags,
7767 int mc_count, struct dev_addr_list *mc_list)
7768 {
7769 /*
7770 * XXX: dummy
7771 * see also iwl4965_connection_init_rx_config
7772 */
7773 *total_flags = 0;
7774 }
7775
7776 static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
7777 struct ieee80211_if_init_conf *conf)
7778 {
7779 struct iwl4965_priv *priv = hw->priv;
7780
7781 IWL_DEBUG_MAC80211("enter\n");
7782
7783 mutex_lock(&priv->mutex);
7784
7785 if (iwl4965_is_ready_rf(priv)) {
7786 iwl4965_scan_cancel_timeout(priv, 100);
7787 cancel_delayed_work(&priv->post_associate);
7788 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7789 iwl4965_commit_rxon(priv);
7790 }
7791 if (priv->vif == conf->vif) {
7792 priv->vif = NULL;
7793 memset(priv->bssid, 0, ETH_ALEN);
7794 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7795 priv->essid_len = 0;
7796 }
7797 mutex_unlock(&priv->mutex);
7798
7799 IWL_DEBUG_MAC80211("leave\n");
7800
7801 }
7802
7803 static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
7804 struct ieee80211_vif *vif,
7805 struct ieee80211_bss_conf *bss_conf,
7806 u32 changes)
7807 {
7808 struct iwl4965_priv *priv = hw->priv;
7809
7810 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
7811 if (bss_conf->use_short_preamble)
7812 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7813 else
7814 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7815 }
7816
7817 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
7818 if (bss_conf->use_cts_prot && (priv->phymode != MODE_IEEE80211A))
7819 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
7820 else
7821 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
7822 }
7823
7824 if (changes & BSS_CHANGED_ASSOC) {
7825 /*
7826 * TODO:
7827 * do stuff instead of sniffing assoc resp
7828 */
7829 }
7830
7831 if (iwl4965_is_associated(priv))
7832 iwl4965_send_rxon_assoc(priv);
7833 }
7834
7835 static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
7836 {
7837 int rc = 0;
7838 unsigned long flags;
7839 struct iwl4965_priv *priv = hw->priv;
7840
7841 IWL_DEBUG_MAC80211("enter\n");
7842
7843 mutex_lock(&priv->mutex);
7844 spin_lock_irqsave(&priv->lock, flags);
7845
7846 if (!iwl4965_is_ready_rf(priv)) {
7847 rc = -EIO;
7848 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7849 goto out_unlock;
7850 }
7851
7852 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7853 rc = -EIO;
7854 IWL_ERROR("ERROR: APs don't scan\n");
7855 goto out_unlock;
7856 }
7857
7858 /* we don't schedule scan within next_scan_jiffies period */
7859 if (priv->next_scan_jiffies &&
7860 time_after(priv->next_scan_jiffies, jiffies)) {
7861 rc = -EAGAIN;
7862 goto out_unlock;
7863 }
7864 /* if we just finished scan ask for delay */
7865 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7866 IWL_DELAY_NEXT_SCAN, jiffies)) {
7867 rc = -EAGAIN;
7868 goto out_unlock;
7869 }
7870 if (len) {
7871 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
7872 iwl4965_escape_essid(ssid, len), (int)len);
7873
7874 priv->one_direct_scan = 1;
7875 priv->direct_ssid_len = (u8)
7876 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7877 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7878 } else
7879 priv->one_direct_scan = 0;
7880
7881 rc = iwl4965_scan_initiate(priv);
7882
7883 IWL_DEBUG_MAC80211("leave\n");
7884
7885 out_unlock:
7886 spin_unlock_irqrestore(&priv->lock, flags);
7887 mutex_unlock(&priv->mutex);
7888
7889 return rc;
7890 }
7891
7892 static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7893 const u8 *local_addr, const u8 *addr,
7894 struct ieee80211_key_conf *key)
7895 {
7896 struct iwl4965_priv *priv = hw->priv;
7897 DECLARE_MAC_BUF(mac);
7898 int rc = 0;
7899 u8 sta_id;
7900
7901 IWL_DEBUG_MAC80211("enter\n");
7902
7903 if (!iwl4965_param_hwcrypto) {
7904 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7905 return -EOPNOTSUPP;
7906 }
7907
7908 if (is_zero_ether_addr(addr))
7909 /* only support pairwise keys */
7910 return -EOPNOTSUPP;
7911
7912 sta_id = iwl4965_hw_find_station(priv, addr);
7913 if (sta_id == IWL_INVALID_STATION) {
7914 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7915 print_mac(mac, addr));
7916 return -EINVAL;
7917 }
7918
7919 mutex_lock(&priv->mutex);
7920
7921 iwl4965_scan_cancel_timeout(priv, 100);
7922
7923 switch (cmd) {
7924 case SET_KEY:
7925 rc = iwl4965_update_sta_key_info(priv, key, sta_id);
7926 if (!rc) {
7927 iwl4965_set_rxon_hwcrypto(priv, 1);
7928 iwl4965_commit_rxon(priv);
7929 key->hw_key_idx = sta_id;
7930 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7931 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7932 }
7933 break;
7934 case DISABLE_KEY:
7935 rc = iwl4965_clear_sta_key_info(priv, sta_id);
7936 if (!rc) {
7937 iwl4965_set_rxon_hwcrypto(priv, 0);
7938 iwl4965_commit_rxon(priv);
7939 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7940 }
7941 break;
7942 default:
7943 rc = -EINVAL;
7944 }
7945
7946 IWL_DEBUG_MAC80211("leave\n");
7947 mutex_unlock(&priv->mutex);
7948
7949 return rc;
7950 }
7951
7952 static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
7953 const struct ieee80211_tx_queue_params *params)
7954 {
7955 struct iwl4965_priv *priv = hw->priv;
7956 #ifdef CONFIG_IWL4965_QOS
7957 unsigned long flags;
7958 int q;
7959 #endif /* CONFIG_IWL4965_QOS */
7960
7961 IWL_DEBUG_MAC80211("enter\n");
7962
7963 if (!iwl4965_is_ready_rf(priv)) {
7964 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7965 return -EIO;
7966 }
7967
7968 if (queue >= AC_NUM) {
7969 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7970 return 0;
7971 }
7972
7973 #ifdef CONFIG_IWL4965_QOS
7974 if (!priv->qos_data.qos_enable) {
7975 priv->qos_data.qos_active = 0;
7976 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7977 return 0;
7978 }
7979 q = AC_NUM - 1 - queue;
7980
7981 spin_lock_irqsave(&priv->lock, flags);
7982
7983 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7984 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7985 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7986 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7987 cpu_to_le16((params->burst_time * 100));
7988
7989 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7990 priv->qos_data.qos_active = 1;
7991
7992 spin_unlock_irqrestore(&priv->lock, flags);
7993
7994 mutex_lock(&priv->mutex);
7995 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7996 iwl4965_activate_qos(priv, 1);
7997 else if (priv->assoc_id && iwl4965_is_associated(priv))
7998 iwl4965_activate_qos(priv, 0);
7999
8000 mutex_unlock(&priv->mutex);
8001
8002 #endif /*CONFIG_IWL4965_QOS */
8003
8004 IWL_DEBUG_MAC80211("leave\n");
8005 return 0;
8006 }
8007
8008 static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
8009 struct ieee80211_tx_queue_stats *stats)
8010 {
8011 struct iwl4965_priv *priv = hw->priv;
8012 int i, avail;
8013 struct iwl4965_tx_queue *txq;
8014 struct iwl4965_queue *q;
8015 unsigned long flags;
8016
8017 IWL_DEBUG_MAC80211("enter\n");
8018
8019 if (!iwl4965_is_ready_rf(priv)) {
8020 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8021 return -EIO;
8022 }
8023
8024 spin_lock_irqsave(&priv->lock, flags);
8025
8026 for (i = 0; i < AC_NUM; i++) {
8027 txq = &priv->txq[i];
8028 q = &txq->q;
8029 avail = iwl4965_queue_space(q);
8030
8031 stats->data[i].len = q->n_window - avail;
8032 stats->data[i].limit = q->n_window - q->high_mark;
8033 stats->data[i].count = q->n_window;
8034
8035 }
8036 spin_unlock_irqrestore(&priv->lock, flags);
8037
8038 IWL_DEBUG_MAC80211("leave\n");
8039
8040 return 0;
8041 }
8042
8043 static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
8044 struct ieee80211_low_level_stats *stats)
8045 {
8046 IWL_DEBUG_MAC80211("enter\n");
8047 IWL_DEBUG_MAC80211("leave\n");
8048
8049 return 0;
8050 }
8051
8052 static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
8053 {
8054 IWL_DEBUG_MAC80211("enter\n");
8055 IWL_DEBUG_MAC80211("leave\n");
8056
8057 return 0;
8058 }
8059
8060 static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
8061 {
8062 struct iwl4965_priv *priv = hw->priv;
8063 unsigned long flags;
8064
8065 mutex_lock(&priv->mutex);
8066 IWL_DEBUG_MAC80211("enter\n");
8067
8068 priv->lq_mngr.lq_ready = 0;
8069 #ifdef CONFIG_IWL4965_HT
8070 spin_lock_irqsave(&priv->lock, flags);
8071 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
8072 spin_unlock_irqrestore(&priv->lock, flags);
8073 #ifdef CONFIG_IWL4965_HT_AGG
8074 /* if (priv->lq_mngr.agg_ctrl.granted_ba)
8075 iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
8076
8077 memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
8078 priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
8079 priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
8080 priv->lq_mngr.agg_ctrl.auto_agg = 1;
8081
8082 if (priv->lq_mngr.agg_ctrl.auto_agg)
8083 priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
8084 #endif /*CONFIG_IWL4965_HT_AGG */
8085 #endif /* CONFIG_IWL4965_HT */
8086
8087 #ifdef CONFIG_IWL4965_QOS
8088 iwl4965_reset_qos(priv);
8089 #endif
8090
8091 cancel_delayed_work(&priv->post_associate);
8092
8093 spin_lock_irqsave(&priv->lock, flags);
8094 priv->assoc_id = 0;
8095 priv->assoc_capability = 0;
8096 priv->call_post_assoc_from_beacon = 0;
8097 priv->assoc_station_added = 0;
8098
8099 /* new association get rid of ibss beacon skb */
8100 if (priv->ibss_beacon)
8101 dev_kfree_skb(priv->ibss_beacon);
8102
8103 priv->ibss_beacon = NULL;
8104
8105 priv->beacon_int = priv->hw->conf.beacon_int;
8106 priv->timestamp1 = 0;
8107 priv->timestamp0 = 0;
8108 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
8109 priv->beacon_int = 0;
8110
8111 spin_unlock_irqrestore(&priv->lock, flags);
8112
8113 if (!iwl4965_is_ready_rf(priv)) {
8114 IWL_DEBUG_MAC80211("leave - not ready\n");
8115 mutex_unlock(&priv->mutex);
8116 return;
8117 }
8118
8119 /* we are restarting association process
8120 * clear RXON_FILTER_ASSOC_MSK bit
8121 */
8122 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
8123 iwl4965_scan_cancel_timeout(priv, 100);
8124 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
8125 iwl4965_commit_rxon(priv);
8126 }
8127
8128 /* Per mac80211.h: This is only used in IBSS mode... */
8129 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
8130
8131 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
8132 mutex_unlock(&priv->mutex);
8133 return;
8134 }
8135
8136 priv->only_active_channel = 0;
8137
8138 iwl4965_set_rate(priv);
8139
8140 mutex_unlock(&priv->mutex);
8141
8142 IWL_DEBUG_MAC80211("leave\n");
8143 }
8144
8145 static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
8146 struct ieee80211_tx_control *control)
8147 {
8148 struct iwl4965_priv *priv = hw->priv;
8149 unsigned long flags;
8150
8151 mutex_lock(&priv->mutex);
8152 IWL_DEBUG_MAC80211("enter\n");
8153
8154 if (!iwl4965_is_ready_rf(priv)) {
8155 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8156 mutex_unlock(&priv->mutex);
8157 return -EIO;
8158 }
8159
8160 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
8161 IWL_DEBUG_MAC80211("leave - not IBSS\n");
8162 mutex_unlock(&priv->mutex);
8163 return -EIO;
8164 }
8165
8166 spin_lock_irqsave(&priv->lock, flags);
8167
8168 if (priv->ibss_beacon)
8169 dev_kfree_skb(priv->ibss_beacon);
8170
8171 priv->ibss_beacon = skb;
8172
8173 priv->assoc_id = 0;
8174
8175 IWL_DEBUG_MAC80211("leave\n");
8176 spin_unlock_irqrestore(&priv->lock, flags);
8177
8178 #ifdef CONFIG_IWL4965_QOS
8179 iwl4965_reset_qos(priv);
8180 #endif
8181
8182 queue_work(priv->workqueue, &priv->post_associate.work);
8183
8184 mutex_unlock(&priv->mutex);
8185
8186 return 0;
8187 }
8188
8189 #ifdef CONFIG_IWL4965_HT
8190
8191 static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
8192 struct iwl4965_priv *priv)
8193 {
8194 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
8195 struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
8196 struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
8197
8198 IWL_DEBUG_MAC80211("enter: \n");
8199
8200 if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
8201 iwl_conf->is_ht = 0;
8202 return;
8203 }
8204
8205 iwl_conf->is_ht = 1;
8206 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8207
8208 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
8209 iwl_conf->sgf |= 0x1;
8210 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
8211 iwl_conf->sgf |= 0x2;
8212
8213 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
8214 iwl_conf->max_amsdu_size =
8215 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
8216 iwl_conf->supported_chan_width =
8217 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
8218 iwl_conf->tx_mimo_ps_mode =
8219 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8220 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
8221
8222 iwl_conf->control_channel = ht_bss_conf->primary_channel;
8223 iwl_conf->extension_chan_offset =
8224 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
8225 iwl_conf->tx_chan_width =
8226 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
8227 iwl_conf->ht_protection =
8228 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
8229 iwl_conf->non_GF_STA_present =
8230 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
8231
8232 IWL_DEBUG_MAC80211("control channel %d\n",
8233 iwl_conf->control_channel);
8234 IWL_DEBUG_MAC80211("leave\n");
8235 }
8236
8237 static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
8238 struct ieee80211_conf *conf)
8239 {
8240 struct iwl4965_priv *priv = hw->priv;
8241
8242 IWL_DEBUG_MAC80211("enter: \n");
8243
8244 iwl4965_ht_info_fill(conf, priv);
8245 iwl4965_set_rxon_chain(priv);
8246
8247 if (priv && priv->assoc_id &&
8248 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
8249 unsigned long flags;
8250
8251 spin_lock_irqsave(&priv->lock, flags);
8252 if (priv->beacon_int)
8253 queue_work(priv->workqueue, &priv->post_associate.work);
8254 else
8255 priv->call_post_assoc_from_beacon = 1;
8256 spin_unlock_irqrestore(&priv->lock, flags);
8257 }
8258
8259 IWL_DEBUG_MAC80211("leave:\n");
8260 return 0;
8261 }
8262
8263 static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
8264 struct ieee80211_ht_cap *ht_cap,
8265 u8 use_current_config)
8266 {
8267 struct ieee80211_conf *conf = &hw->conf;
8268 struct ieee80211_hw_mode *mode = conf->mode;
8269
8270 if (use_current_config) {
8271 ht_cap->cap_info = cpu_to_le16(conf->ht_conf.cap);
8272 memcpy(ht_cap->supp_mcs_set,
8273 conf->ht_conf.supp_mcs_set, 16);
8274 } else {
8275 ht_cap->cap_info = cpu_to_le16(mode->ht_info.cap);
8276 memcpy(ht_cap->supp_mcs_set,
8277 mode->ht_info.supp_mcs_set, 16);
8278 }
8279 ht_cap->ampdu_params_info =
8280 (mode->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
8281 ((mode->ht_info.ampdu_density << 2) &
8282 IEEE80211_HT_CAP_AMPDU_DENSITY);
8283 }
8284
8285 #endif /*CONFIG_IWL4965_HT*/
8286
8287 /*****************************************************************************
8288 *
8289 * sysfs attributes
8290 *
8291 *****************************************************************************/
8292
8293 #ifdef CONFIG_IWL4965_DEBUG
8294
8295 /*
8296 * The following adds a new attribute to the sysfs representation
8297 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
8298 * used for controlling the debug level.
8299 *
8300 * See the level definitions in iwl for details.
8301 */
8302
8303 static ssize_t show_debug_level(struct device_driver *d, char *buf)
8304 {
8305 return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
8306 }
8307 static ssize_t store_debug_level(struct device_driver *d,
8308 const char *buf, size_t count)
8309 {
8310 char *p = (char *)buf;
8311 u32 val;
8312
8313 val = simple_strtoul(p, &p, 0);
8314 if (p == buf)
8315 printk(KERN_INFO DRV_NAME
8316 ": %s is not in hex or decimal form.\n", buf);
8317 else
8318 iwl4965_debug_level = val;
8319
8320 return strnlen(buf, count);
8321 }
8322
8323 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
8324 show_debug_level, store_debug_level);
8325
8326 #endif /* CONFIG_IWL4965_DEBUG */
8327
8328 static ssize_t show_rf_kill(struct device *d,
8329 struct device_attribute *attr, char *buf)
8330 {
8331 /*
8332 * 0 - RF kill not enabled
8333 * 1 - SW based RF kill active (sysfs)
8334 * 2 - HW based RF kill active
8335 * 3 - Both HW and SW based RF kill active
8336 */
8337 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8338 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
8339 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
8340
8341 return sprintf(buf, "%i\n", val);
8342 }
8343
8344 static ssize_t store_rf_kill(struct device *d,
8345 struct device_attribute *attr,
8346 const char *buf, size_t count)
8347 {
8348 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8349
8350 mutex_lock(&priv->mutex);
8351 iwl4965_radio_kill_sw(priv, buf[0] == '1');
8352 mutex_unlock(&priv->mutex);
8353
8354 return count;
8355 }
8356
8357 static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
8358
8359 static ssize_t show_temperature(struct device *d,
8360 struct device_attribute *attr, char *buf)
8361 {
8362 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8363
8364 if (!iwl4965_is_alive(priv))
8365 return -EAGAIN;
8366
8367 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
8368 }
8369
8370 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
8371
8372 static ssize_t show_rs_window(struct device *d,
8373 struct device_attribute *attr,
8374 char *buf)
8375 {
8376 struct iwl4965_priv *priv = d->driver_data;
8377 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
8378 }
8379 static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
8380
8381 static ssize_t show_tx_power(struct device *d,
8382 struct device_attribute *attr, char *buf)
8383 {
8384 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8385 return sprintf(buf, "%d\n", priv->user_txpower_limit);
8386 }
8387
8388 static ssize_t store_tx_power(struct device *d,
8389 struct device_attribute *attr,
8390 const char *buf, size_t count)
8391 {
8392 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8393 char *p = (char *)buf;
8394 u32 val;
8395
8396 val = simple_strtoul(p, &p, 10);
8397 if (p == buf)
8398 printk(KERN_INFO DRV_NAME
8399 ": %s is not in decimal form.\n", buf);
8400 else
8401 iwl4965_hw_reg_set_txpower(priv, val);
8402
8403 return count;
8404 }
8405
8406 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
8407
8408 static ssize_t show_flags(struct device *d,
8409 struct device_attribute *attr, char *buf)
8410 {
8411 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8412
8413 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
8414 }
8415
8416 static ssize_t store_flags(struct device *d,
8417 struct device_attribute *attr,
8418 const char *buf, size_t count)
8419 {
8420 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8421 u32 flags = simple_strtoul(buf, NULL, 0);
8422
8423 mutex_lock(&priv->mutex);
8424 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
8425 /* Cancel any currently running scans... */
8426 if (iwl4965_scan_cancel_timeout(priv, 100))
8427 IWL_WARNING("Could not cancel scan.\n");
8428 else {
8429 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
8430 flags);
8431 priv->staging_rxon.flags = cpu_to_le32(flags);
8432 iwl4965_commit_rxon(priv);
8433 }
8434 }
8435 mutex_unlock(&priv->mutex);
8436
8437 return count;
8438 }
8439
8440 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
8441
8442 static ssize_t show_filter_flags(struct device *d,
8443 struct device_attribute *attr, char *buf)
8444 {
8445 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8446
8447 return sprintf(buf, "0x%04X\n",
8448 le32_to_cpu(priv->active_rxon.filter_flags));
8449 }
8450
8451 static ssize_t store_filter_flags(struct device *d,
8452 struct device_attribute *attr,
8453 const char *buf, size_t count)
8454 {
8455 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8456 u32 filter_flags = simple_strtoul(buf, NULL, 0);
8457
8458 mutex_lock(&priv->mutex);
8459 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
8460 /* Cancel any currently running scans... */
8461 if (iwl4965_scan_cancel_timeout(priv, 100))
8462 IWL_WARNING("Could not cancel scan.\n");
8463 else {
8464 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
8465 "0x%04X\n", filter_flags);
8466 priv->staging_rxon.filter_flags =
8467 cpu_to_le32(filter_flags);
8468 iwl4965_commit_rxon(priv);
8469 }
8470 }
8471 mutex_unlock(&priv->mutex);
8472
8473 return count;
8474 }
8475
8476 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
8477 store_filter_flags);
8478
8479 static ssize_t show_tune(struct device *d,
8480 struct device_attribute *attr, char *buf)
8481 {
8482 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8483
8484 return sprintf(buf, "0x%04X\n",
8485 (priv->phymode << 8) |
8486 le16_to_cpu(priv->active_rxon.channel));
8487 }
8488
8489 static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
8490
8491 static ssize_t store_tune(struct device *d,
8492 struct device_attribute *attr,
8493 const char *buf, size_t count)
8494 {
8495 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8496 char *p = (char *)buf;
8497 u16 tune = simple_strtoul(p, &p, 0);
8498 u8 phymode = (tune >> 8) & 0xff;
8499 u16 channel = tune & 0xff;
8500
8501 IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
8502
8503 mutex_lock(&priv->mutex);
8504 if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
8505 (priv->phymode != phymode)) {
8506 const struct iwl4965_channel_info *ch_info;
8507
8508 ch_info = iwl4965_get_channel_info(priv, phymode, channel);
8509 if (!ch_info) {
8510 IWL_WARNING("Requested invalid phymode/channel "
8511 "combination: %d %d\n", phymode, channel);
8512 mutex_unlock(&priv->mutex);
8513 return -EINVAL;
8514 }
8515
8516 /* Cancel any currently running scans... */
8517 if (iwl4965_scan_cancel_timeout(priv, 100))
8518 IWL_WARNING("Could not cancel scan.\n");
8519 else {
8520 IWL_DEBUG_INFO("Committing phymode and "
8521 "rxon.channel = %d %d\n",
8522 phymode, channel);
8523
8524 iwl4965_set_rxon_channel(priv, phymode, channel);
8525 iwl4965_set_flags_for_phymode(priv, phymode);
8526
8527 iwl4965_set_rate(priv);
8528 iwl4965_commit_rxon(priv);
8529 }
8530 }
8531 mutex_unlock(&priv->mutex);
8532
8533 return count;
8534 }
8535
8536 static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
8537
8538 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
8539
8540 static ssize_t show_measurement(struct device *d,
8541 struct device_attribute *attr, char *buf)
8542 {
8543 struct iwl4965_priv *priv = dev_get_drvdata(d);
8544 struct iwl4965_spectrum_notification measure_report;
8545 u32 size = sizeof(measure_report), len = 0, ofs = 0;
8546 u8 *data = (u8 *) & measure_report;
8547 unsigned long flags;
8548
8549 spin_lock_irqsave(&priv->lock, flags);
8550 if (!(priv->measurement_status & MEASUREMENT_READY)) {
8551 spin_unlock_irqrestore(&priv->lock, flags);
8552 return 0;
8553 }
8554 memcpy(&measure_report, &priv->measure_report, size);
8555 priv->measurement_status = 0;
8556 spin_unlock_irqrestore(&priv->lock, flags);
8557
8558 while (size && (PAGE_SIZE - len)) {
8559 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8560 PAGE_SIZE - len, 1);
8561 len = strlen(buf);
8562 if (PAGE_SIZE - len)
8563 buf[len++] = '\n';
8564
8565 ofs += 16;
8566 size -= min(size, 16U);
8567 }
8568
8569 return len;
8570 }
8571
8572 static ssize_t store_measurement(struct device *d,
8573 struct device_attribute *attr,
8574 const char *buf, size_t count)
8575 {
8576 struct iwl4965_priv *priv = dev_get_drvdata(d);
8577 struct ieee80211_measurement_params params = {
8578 .channel = le16_to_cpu(priv->active_rxon.channel),
8579 .start_time = cpu_to_le64(priv->last_tsf),
8580 .duration = cpu_to_le16(1),
8581 };
8582 u8 type = IWL_MEASURE_BASIC;
8583 u8 buffer[32];
8584 u8 channel;
8585
8586 if (count) {
8587 char *p = buffer;
8588 strncpy(buffer, buf, min(sizeof(buffer), count));
8589 channel = simple_strtoul(p, NULL, 0);
8590 if (channel)
8591 params.channel = channel;
8592
8593 p = buffer;
8594 while (*p && *p != ' ')
8595 p++;
8596 if (*p)
8597 type = simple_strtoul(p + 1, NULL, 0);
8598 }
8599
8600 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8601 "channel %d (for '%s')\n", type, params.channel, buf);
8602 iwl4965_get_measurement(priv, &params, type);
8603
8604 return count;
8605 }
8606
8607 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8608 show_measurement, store_measurement);
8609 #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
8610
8611 static ssize_t store_retry_rate(struct device *d,
8612 struct device_attribute *attr,
8613 const char *buf, size_t count)
8614 {
8615 struct iwl4965_priv *priv = dev_get_drvdata(d);
8616
8617 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8618 if (priv->retry_rate <= 0)
8619 priv->retry_rate = 1;
8620
8621 return count;
8622 }
8623
8624 static ssize_t show_retry_rate(struct device *d,
8625 struct device_attribute *attr, char *buf)
8626 {
8627 struct iwl4965_priv *priv = dev_get_drvdata(d);
8628 return sprintf(buf, "%d", priv->retry_rate);
8629 }
8630
8631 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8632 store_retry_rate);
8633
8634 static ssize_t store_power_level(struct device *d,
8635 struct device_attribute *attr,
8636 const char *buf, size_t count)
8637 {
8638 struct iwl4965_priv *priv = dev_get_drvdata(d);
8639 int rc;
8640 int mode;
8641
8642 mode = simple_strtoul(buf, NULL, 0);
8643 mutex_lock(&priv->mutex);
8644
8645 if (!iwl4965_is_ready(priv)) {
8646 rc = -EAGAIN;
8647 goto out;
8648 }
8649
8650 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8651 mode = IWL_POWER_AC;
8652 else
8653 mode |= IWL_POWER_ENABLED;
8654
8655 if (mode != priv->power_mode) {
8656 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
8657 if (rc) {
8658 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8659 goto out;
8660 }
8661 priv->power_mode = mode;
8662 }
8663
8664 rc = count;
8665
8666 out:
8667 mutex_unlock(&priv->mutex);
8668 return rc;
8669 }
8670
8671 #define MAX_WX_STRING 80
8672
8673 /* Values are in microsecond */
8674 static const s32 timeout_duration[] = {
8675 350000,
8676 250000,
8677 75000,
8678 37000,
8679 25000,
8680 };
8681 static const s32 period_duration[] = {
8682 400000,
8683 700000,
8684 1000000,
8685 1000000,
8686 1000000
8687 };
8688
8689 static ssize_t show_power_level(struct device *d,
8690 struct device_attribute *attr, char *buf)
8691 {
8692 struct iwl4965_priv *priv = dev_get_drvdata(d);
8693 int level = IWL_POWER_LEVEL(priv->power_mode);
8694 char *p = buf;
8695
8696 p += sprintf(p, "%d ", level);
8697 switch (level) {
8698 case IWL_POWER_MODE_CAM:
8699 case IWL_POWER_AC:
8700 p += sprintf(p, "(AC)");
8701 break;
8702 case IWL_POWER_BATTERY:
8703 p += sprintf(p, "(BATTERY)");
8704 break;
8705 default:
8706 p += sprintf(p,
8707 "(Timeout %dms, Period %dms)",
8708 timeout_duration[level - 1] / 1000,
8709 period_duration[level - 1] / 1000);
8710 }
8711
8712 if (!(priv->power_mode & IWL_POWER_ENABLED))
8713 p += sprintf(p, " OFF\n");
8714 else
8715 p += sprintf(p, " \n");
8716
8717 return (p - buf + 1);
8718
8719 }
8720
8721 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8722 store_power_level);
8723
8724 static ssize_t show_channels(struct device *d,
8725 struct device_attribute *attr, char *buf)
8726 {
8727 struct iwl4965_priv *priv = dev_get_drvdata(d);
8728 int len = 0, i;
8729 struct ieee80211_channel *channels = NULL;
8730 const struct ieee80211_hw_mode *hw_mode = NULL;
8731 int count = 0;
8732
8733 if (!iwl4965_is_ready(priv))
8734 return -EAGAIN;
8735
8736 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
8737 if (!hw_mode)
8738 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
8739 if (hw_mode) {
8740 channels = hw_mode->channels;
8741 count = hw_mode->num_channels;
8742 }
8743
8744 len +=
8745 sprintf(&buf[len],
8746 "Displaying %d channels in 2.4GHz band "
8747 "(802.11bg):\n", count);
8748
8749 for (i = 0; i < count; i++)
8750 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8751 channels[i].chan,
8752 channels[i].power_level,
8753 channels[i].
8754 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8755 " (IEEE 802.11h required)" : "",
8756 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8757 || (channels[i].
8758 flag &
8759 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8760 ", IBSS",
8761 channels[i].
8762 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8763 "active/passive" : "passive only");
8764
8765 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
8766 if (hw_mode) {
8767 channels = hw_mode->channels;
8768 count = hw_mode->num_channels;
8769 } else {
8770 channels = NULL;
8771 count = 0;
8772 }
8773
8774 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8775 "(802.11a):\n", count);
8776
8777 for (i = 0; i < count; i++)
8778 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8779 channels[i].chan,
8780 channels[i].power_level,
8781 channels[i].
8782 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8783 " (IEEE 802.11h required)" : "",
8784 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8785 || (channels[i].
8786 flag &
8787 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8788 ", IBSS",
8789 channels[i].
8790 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8791 "active/passive" : "passive only");
8792
8793 return len;
8794 }
8795
8796 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8797
8798 static ssize_t show_statistics(struct device *d,
8799 struct device_attribute *attr, char *buf)
8800 {
8801 struct iwl4965_priv *priv = dev_get_drvdata(d);
8802 u32 size = sizeof(struct iwl4965_notif_statistics);
8803 u32 len = 0, ofs = 0;
8804 u8 *data = (u8 *) & priv->statistics;
8805 int rc = 0;
8806
8807 if (!iwl4965_is_alive(priv))
8808 return -EAGAIN;
8809
8810 mutex_lock(&priv->mutex);
8811 rc = iwl4965_send_statistics_request(priv);
8812 mutex_unlock(&priv->mutex);
8813
8814 if (rc) {
8815 len = sprintf(buf,
8816 "Error sending statistics request: 0x%08X\n", rc);
8817 return len;
8818 }
8819
8820 while (size && (PAGE_SIZE - len)) {
8821 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8822 PAGE_SIZE - len, 1);
8823 len = strlen(buf);
8824 if (PAGE_SIZE - len)
8825 buf[len++] = '\n';
8826
8827 ofs += 16;
8828 size -= min(size, 16U);
8829 }
8830
8831 return len;
8832 }
8833
8834 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8835
8836 static ssize_t show_antenna(struct device *d,
8837 struct device_attribute *attr, char *buf)
8838 {
8839 struct iwl4965_priv *priv = dev_get_drvdata(d);
8840
8841 if (!iwl4965_is_alive(priv))
8842 return -EAGAIN;
8843
8844 return sprintf(buf, "%d\n", priv->antenna);
8845 }
8846
8847 static ssize_t store_antenna(struct device *d,
8848 struct device_attribute *attr,
8849 const char *buf, size_t count)
8850 {
8851 int ant;
8852 struct iwl4965_priv *priv = dev_get_drvdata(d);
8853
8854 if (count == 0)
8855 return 0;
8856
8857 if (sscanf(buf, "%1i", &ant) != 1) {
8858 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8859 return count;
8860 }
8861
8862 if ((ant >= 0) && (ant <= 2)) {
8863 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
8864 priv->antenna = (enum iwl4965_antenna)ant;
8865 } else
8866 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8867
8868
8869 return count;
8870 }
8871
8872 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8873
8874 static ssize_t show_status(struct device *d,
8875 struct device_attribute *attr, char *buf)
8876 {
8877 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8878 if (!iwl4965_is_alive(priv))
8879 return -EAGAIN;
8880 return sprintf(buf, "0x%08x\n", (int)priv->status);
8881 }
8882
8883 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8884
8885 static ssize_t dump_error_log(struct device *d,
8886 struct device_attribute *attr,
8887 const char *buf, size_t count)
8888 {
8889 char *p = (char *)buf;
8890
8891 if (p[0] == '1')
8892 iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
8893
8894 return strnlen(buf, count);
8895 }
8896
8897 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8898
8899 static ssize_t dump_event_log(struct device *d,
8900 struct device_attribute *attr,
8901 const char *buf, size_t count)
8902 {
8903 char *p = (char *)buf;
8904
8905 if (p[0] == '1')
8906 iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
8907
8908 return strnlen(buf, count);
8909 }
8910
8911 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8912
8913 /*****************************************************************************
8914 *
8915 * driver setup and teardown
8916 *
8917 *****************************************************************************/
8918
8919 static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
8920 {
8921 priv->workqueue = create_workqueue(DRV_NAME);
8922
8923 init_waitqueue_head(&priv->wait_command_queue);
8924
8925 INIT_WORK(&priv->up, iwl4965_bg_up);
8926 INIT_WORK(&priv->restart, iwl4965_bg_restart);
8927 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
8928 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
8929 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
8930 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
8931 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
8932 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
8933 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
8934 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
8935 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
8936 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
8937
8938 iwl4965_hw_setup_deferred_work(priv);
8939
8940 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
8941 iwl4965_irq_tasklet, (unsigned long)priv);
8942 }
8943
8944 static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
8945 {
8946 iwl4965_hw_cancel_deferred_work(priv);
8947
8948 cancel_delayed_work_sync(&priv->init_alive_start);
8949 cancel_delayed_work(&priv->scan_check);
8950 cancel_delayed_work(&priv->alive_start);
8951 cancel_delayed_work(&priv->post_associate);
8952 cancel_work_sync(&priv->beacon_update);
8953 }
8954
8955 static struct attribute *iwl4965_sysfs_entries[] = {
8956 &dev_attr_antenna.attr,
8957 &dev_attr_channels.attr,
8958 &dev_attr_dump_errors.attr,
8959 &dev_attr_dump_events.attr,
8960 &dev_attr_flags.attr,
8961 &dev_attr_filter_flags.attr,
8962 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
8963 &dev_attr_measurement.attr,
8964 #endif
8965 &dev_attr_power_level.attr,
8966 &dev_attr_retry_rate.attr,
8967 &dev_attr_rf_kill.attr,
8968 &dev_attr_rs_window.attr,
8969 &dev_attr_statistics.attr,
8970 &dev_attr_status.attr,
8971 &dev_attr_temperature.attr,
8972 &dev_attr_tune.attr,
8973 &dev_attr_tx_power.attr,
8974
8975 NULL
8976 };
8977
8978 static struct attribute_group iwl4965_attribute_group = {
8979 .name = NULL, /* put in device directory */
8980 .attrs = iwl4965_sysfs_entries,
8981 };
8982
8983 static struct ieee80211_ops iwl4965_hw_ops = {
8984 .tx = iwl4965_mac_tx,
8985 .start = iwl4965_mac_start,
8986 .stop = iwl4965_mac_stop,
8987 .add_interface = iwl4965_mac_add_interface,
8988 .remove_interface = iwl4965_mac_remove_interface,
8989 .config = iwl4965_mac_config,
8990 .config_interface = iwl4965_mac_config_interface,
8991 .configure_filter = iwl4965_configure_filter,
8992 .set_key = iwl4965_mac_set_key,
8993 .get_stats = iwl4965_mac_get_stats,
8994 .get_tx_stats = iwl4965_mac_get_tx_stats,
8995 .conf_tx = iwl4965_mac_conf_tx,
8996 .get_tsf = iwl4965_mac_get_tsf,
8997 .reset_tsf = iwl4965_mac_reset_tsf,
8998 .beacon_update = iwl4965_mac_beacon_update,
8999 .bss_info_changed = iwl4965_bss_info_changed,
9000 #ifdef CONFIG_IWL4965_HT
9001 .conf_ht = iwl4965_mac_conf_ht,
9002 .ampdu_action = iwl4965_mac_ampdu_action,
9003 #ifdef CONFIG_IWL4965_HT_AGG
9004 .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start,
9005 .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop,
9006 #endif /* CONFIG_IWL4965_HT_AGG */
9007 #endif /* CONFIG_IWL4965_HT */
9008 .hw_scan = iwl4965_mac_hw_scan
9009 };
9010
9011 static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9012 {
9013 int err = 0;
9014 struct iwl4965_priv *priv;
9015 struct ieee80211_hw *hw;
9016 int i;
9017 DECLARE_MAC_BUF(mac);
9018
9019 /* Disabling hardware scan means that mac80211 will perform scans
9020 * "the hard way", rather than using device's scan. */
9021 if (iwl4965_param_disable_hw_scan) {
9022 IWL_DEBUG_INFO("Disabling hw_scan\n");
9023 iwl4965_hw_ops.hw_scan = NULL;
9024 }
9025
9026 if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
9027 (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
9028 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
9029 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
9030 err = -EINVAL;
9031 goto out;
9032 }
9033
9034 /* mac80211 allocates memory for this device instance, including
9035 * space for this driver's private structure */
9036 hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
9037 if (hw == NULL) {
9038 IWL_ERROR("Can not allocate network device\n");
9039 err = -ENOMEM;
9040 goto out;
9041 }
9042 SET_IEEE80211_DEV(hw, &pdev->dev);
9043
9044 hw->rate_control_algorithm = "iwl-4965-rs";
9045
9046 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
9047 priv = hw->priv;
9048 priv->hw = hw;
9049
9050 priv->pci_dev = pdev;
9051 priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
9052 #ifdef CONFIG_IWL4965_DEBUG
9053 iwl4965_debug_level = iwl4965_param_debug;
9054 atomic_set(&priv->restrict_refcnt, 0);
9055 #endif
9056 priv->retry_rate = 1;
9057
9058 priv->ibss_beacon = NULL;
9059
9060 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
9061 * the range of signal quality values that we'll provide.
9062 * Negative values for level/noise indicate that we'll provide dBm.
9063 * For WE, at least, non-0 values here *enable* display of values
9064 * in app (iwconfig). */
9065 hw->max_rssi = -20; /* signal level, negative indicates dBm */
9066 hw->max_noise = -20; /* noise level, negative indicates dBm */
9067 hw->max_signal = 100; /* link quality indication (%) */
9068
9069 /* Tell mac80211 our Tx characteristics */
9070 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
9071
9072 /* Default value; 4 EDCA QOS priorities */
9073 hw->queues = 4;
9074 #ifdef CONFIG_IWL4965_HT
9075 #ifdef CONFIG_IWL4965_HT_AGG
9076 /* Enhanced value; more queues, to support 11n aggregation */
9077 hw->queues = 16;
9078 #endif /* CONFIG_IWL4965_HT_AGG */
9079 #endif /* CONFIG_IWL4965_HT */
9080
9081 spin_lock_init(&priv->lock);
9082 spin_lock_init(&priv->power_data.lock);
9083 spin_lock_init(&priv->sta_lock);
9084 spin_lock_init(&priv->hcmd_lock);
9085 spin_lock_init(&priv->lq_mngr.lock);
9086
9087 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
9088 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
9089
9090 INIT_LIST_HEAD(&priv->free_frames);
9091
9092 mutex_init(&priv->mutex);
9093 if (pci_enable_device(pdev)) {
9094 err = -ENODEV;
9095 goto out_ieee80211_free_hw;
9096 }
9097
9098 pci_set_master(pdev);
9099
9100 /* Clear the driver's (not device's) station table */
9101 iwl4965_clear_stations_table(priv);
9102
9103 priv->data_retry_limit = -1;
9104 priv->ieee_channels = NULL;
9105 priv->ieee_rates = NULL;
9106 priv->phymode = -1;
9107
9108 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
9109 if (!err)
9110 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
9111 if (err) {
9112 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
9113 goto out_pci_disable_device;
9114 }
9115
9116 pci_set_drvdata(pdev, priv);
9117 err = pci_request_regions(pdev, DRV_NAME);
9118 if (err)
9119 goto out_pci_disable_device;
9120
9121 /* We disable the RETRY_TIMEOUT register (0x41) to keep
9122 * PCI Tx retries from interfering with C3 CPU state */
9123 pci_write_config_byte(pdev, 0x41, 0x00);
9124
9125 priv->hw_base = pci_iomap(pdev, 0, 0);
9126 if (!priv->hw_base) {
9127 err = -ENODEV;
9128 goto out_pci_release_regions;
9129 }
9130
9131 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
9132 (unsigned long long) pci_resource_len(pdev, 0));
9133 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
9134
9135 /* Initialize module parameter values here */
9136
9137 /* Disable radio (SW RF KILL) via parameter when loading driver */
9138 if (iwl4965_param_disable) {
9139 set_bit(STATUS_RF_KILL_SW, &priv->status);
9140 IWL_DEBUG_INFO("Radio disabled.\n");
9141 }
9142
9143 priv->iw_mode = IEEE80211_IF_TYPE_STA;
9144
9145 priv->ps_mode = 0;
9146 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
9147 priv->valid_antenna = 0x7; /* assume all 3 connected */
9148 priv->ps_mode = IWL_MIMO_PS_NONE;
9149
9150 /* Choose which receivers/antennas to use */
9151 iwl4965_set_rxon_chain(priv);
9152
9153 printk(KERN_INFO DRV_NAME
9154 ": Detected Intel Wireless WiFi Link 4965AGN\n");
9155
9156 /* Device-specific setup */
9157 if (iwl4965_hw_set_hw_setting(priv)) {
9158 IWL_ERROR("failed to set hw settings\n");
9159 goto out_iounmap;
9160 }
9161
9162 #ifdef CONFIG_IWL4965_QOS
9163 if (iwl4965_param_qos_enable)
9164 priv->qos_data.qos_enable = 1;
9165
9166 iwl4965_reset_qos(priv);
9167
9168 priv->qos_data.qos_active = 0;
9169 priv->qos_data.qos_cap.val = 0;
9170 #endif /* CONFIG_IWL4965_QOS */
9171
9172 iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
9173 iwl4965_setup_deferred_work(priv);
9174 iwl4965_setup_rx_handlers(priv);
9175
9176 priv->rates_mask = IWL_RATES_MASK;
9177 /* If power management is turned on, default to AC mode */
9178 priv->power_mode = IWL_POWER_AC;
9179 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
9180
9181 iwl4965_disable_interrupts(priv);
9182
9183 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
9184 if (err) {
9185 IWL_ERROR("failed to create sysfs device attributes\n");
9186 goto out_release_irq;
9187 }
9188
9189 /* nic init */
9190 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
9191 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
9192
9193 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
9194 err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
9195 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
9196 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
9197 if (err < 0) {
9198 IWL_DEBUG_INFO("Failed to init the card\n");
9199 goto out_remove_sysfs;
9200 }
9201 /* Read the EEPROM */
9202 err = iwl4965_eeprom_init(priv);
9203 if (err) {
9204 IWL_ERROR("Unable to init EEPROM\n");
9205 goto out_remove_sysfs;
9206 }
9207 /* MAC Address location in EEPROM same for 3945/4965 */
9208 get_eeprom_mac(priv, priv->mac_addr);
9209 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
9210 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
9211
9212 err = iwl4965_init_channel_map(priv);
9213 if (err) {
9214 IWL_ERROR("initializing regulatory failed: %d\n", err);
9215 goto out_remove_sysfs;
9216 }
9217
9218 err = iwl4965_init_geos(priv);
9219 if (err) {
9220 IWL_ERROR("initializing geos failed: %d\n", err);
9221 goto out_free_channel_map;
9222 }
9223 iwl4965_reset_channel_flag(priv);
9224
9225 iwl4965_rate_control_register(priv->hw);
9226 err = ieee80211_register_hw(priv->hw);
9227 if (err) {
9228 IWL_ERROR("Failed to register network device (error %d)\n", err);
9229 goto out_free_geos;
9230 }
9231
9232 priv->hw->conf.beacon_int = 100;
9233 priv->mac80211_registered = 1;
9234 pci_save_state(pdev);
9235 pci_disable_device(pdev);
9236
9237 return 0;
9238
9239 out_free_geos:
9240 iwl4965_free_geos(priv);
9241 out_free_channel_map:
9242 iwl4965_free_channel_map(priv);
9243 out_remove_sysfs:
9244 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
9245
9246 out_release_irq:
9247 destroy_workqueue(priv->workqueue);
9248 priv->workqueue = NULL;
9249 iwl4965_unset_hw_setting(priv);
9250
9251 out_iounmap:
9252 pci_iounmap(pdev, priv->hw_base);
9253 out_pci_release_regions:
9254 pci_release_regions(pdev);
9255 out_pci_disable_device:
9256 pci_disable_device(pdev);
9257 pci_set_drvdata(pdev, NULL);
9258 out_ieee80211_free_hw:
9259 ieee80211_free_hw(priv->hw);
9260 out:
9261 return err;
9262 }
9263
9264 static void iwl4965_pci_remove(struct pci_dev *pdev)
9265 {
9266 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
9267 struct list_head *p, *q;
9268 int i;
9269
9270 if (!priv)
9271 return;
9272
9273 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
9274
9275 set_bit(STATUS_EXIT_PENDING, &priv->status);
9276
9277 iwl4965_down(priv);
9278
9279 /* Free MAC hash list for ADHOC */
9280 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
9281 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
9282 list_del(p);
9283 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
9284 }
9285 }
9286
9287 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
9288
9289 iwl4965_dealloc_ucode_pci(priv);
9290
9291 if (priv->rxq.bd)
9292 iwl4965_rx_queue_free(priv, &priv->rxq);
9293 iwl4965_hw_txq_ctx_free(priv);
9294
9295 iwl4965_unset_hw_setting(priv);
9296 iwl4965_clear_stations_table(priv);
9297
9298 if (priv->mac80211_registered) {
9299 ieee80211_unregister_hw(priv->hw);
9300 iwl4965_rate_control_unregister(priv->hw);
9301 }
9302
9303 /*netif_stop_queue(dev); */
9304 flush_workqueue(priv->workqueue);
9305
9306 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
9307 * priv->workqueue... so we can't take down the workqueue
9308 * until now... */
9309 destroy_workqueue(priv->workqueue);
9310 priv->workqueue = NULL;
9311
9312 pci_iounmap(pdev, priv->hw_base);
9313 pci_release_regions(pdev);
9314 pci_disable_device(pdev);
9315 pci_set_drvdata(pdev, NULL);
9316
9317 iwl4965_free_channel_map(priv);
9318 iwl4965_free_geos(priv);
9319
9320 if (priv->ibss_beacon)
9321 dev_kfree_skb(priv->ibss_beacon);
9322
9323 ieee80211_free_hw(priv->hw);
9324 }
9325
9326 #ifdef CONFIG_PM
9327
9328 static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
9329 {
9330 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
9331
9332 if (priv->is_open) {
9333 set_bit(STATUS_IN_SUSPEND, &priv->status);
9334 iwl4965_mac_stop(priv->hw);
9335 priv->is_open = 1;
9336 }
9337
9338 pci_set_power_state(pdev, PCI_D3hot);
9339
9340 return 0;
9341 }
9342
9343 static int iwl4965_pci_resume(struct pci_dev *pdev)
9344 {
9345 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
9346
9347 pci_set_power_state(pdev, PCI_D0);
9348
9349 if (priv->is_open)
9350 iwl4965_mac_start(priv->hw);
9351
9352 clear_bit(STATUS_IN_SUSPEND, &priv->status);
9353 return 0;
9354 }
9355
9356 #endif /* CONFIG_PM */
9357
9358 /*****************************************************************************
9359 *
9360 * driver and module entry point
9361 *
9362 *****************************************************************************/
9363
9364 static struct pci_driver iwl4965_driver = {
9365 .name = DRV_NAME,
9366 .id_table = iwl4965_hw_card_ids,
9367 .probe = iwl4965_pci_probe,
9368 .remove = __devexit_p(iwl4965_pci_remove),
9369 #ifdef CONFIG_PM
9370 .suspend = iwl4965_pci_suspend,
9371 .resume = iwl4965_pci_resume,
9372 #endif
9373 };
9374
9375 static int __init iwl4965_init(void)
9376 {
9377
9378 int ret;
9379 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
9380 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
9381 ret = pci_register_driver(&iwl4965_driver);
9382 if (ret) {
9383 IWL_ERROR("Unable to initialize PCI module\n");
9384 return ret;
9385 }
9386 #ifdef CONFIG_IWL4965_DEBUG
9387 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
9388 if (ret) {
9389 IWL_ERROR("Unable to create driver sysfs file\n");
9390 pci_unregister_driver(&iwl4965_driver);
9391 return ret;
9392 }
9393 #endif
9394
9395 return ret;
9396 }
9397
9398 static void __exit iwl4965_exit(void)
9399 {
9400 #ifdef CONFIG_IWL4965_DEBUG
9401 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
9402 #endif
9403 pci_unregister_driver(&iwl4965_driver);
9404 }
9405
9406 module_param_named(antenna, iwl4965_param_antenna, int, 0444);
9407 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
9408 module_param_named(disable, iwl4965_param_disable, int, 0444);
9409 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
9410 module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
9411 MODULE_PARM_DESC(hwcrypto,
9412 "using hardware crypto engine (default 0 [software])\n");
9413 module_param_named(debug, iwl4965_param_debug, int, 0444);
9414 MODULE_PARM_DESC(debug, "debug output mask");
9415 module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
9416 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
9417
9418 module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
9419 MODULE_PARM_DESC(queues_num, "number of hw queues.");
9420
9421 /* QoS */
9422 module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
9423 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
9424 module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
9425 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
9426
9427 module_exit(iwl4965_exit);
9428 module_init(iwl4965_init);
Verdex Pro support