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iwlwifi: initialize geo/channel information during probe
[linux-2.6/verdex.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blobf96a1a2e90f4019b22132e8fe5395dc3cd26c0eb
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/version.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/ieee80211_radiotap.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #include "iwl-3945.h"
50 #include "iwl-helpers.h"
51
52 #ifdef CONFIG_IWL3945_DEBUG
53 u32 iwl3945_debug_level;
54 #endif
55
56 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
57 struct iwl3945_tx_queue *txq);
58
59 /******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65 /* module parameters */
66 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
67 static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
68 static int iwl3945_param_disable; /* def: 0 = enable radio */
69 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
70 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
71 static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
72 int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 8 Tx queues */
73
74 /*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79 #define DRV_DESCRIPTION \
80 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
81
82 #ifdef CONFIG_IWL3945_DEBUG
83 #define VD "d"
84 #else
85 #define VD
86 #endif
87
88 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
89 #define VS "s"
90 #else
91 #define VS
92 #endif
93
94 #define IWLWIFI_VERSION "1.2.23k" VD VS
95 #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
96 #define DRV_VERSION IWLWIFI_VERSION
97
98 /* Change firmware file name, using "-" and incrementing number,
99 * *only* when uCode interface or architecture changes so that it
100 * is not compatible with earlier drivers.
101 * This number will also appear in << 8 position of 1st dword of uCode file */
102 #define IWL3945_UCODE_API "-1"
103
104 MODULE_DESCRIPTION(DRV_DESCRIPTION);
105 MODULE_VERSION(DRV_VERSION);
106 MODULE_AUTHOR(DRV_COPYRIGHT);
107 MODULE_LICENSE("GPL");
108
109 static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
110 {
111 u16 fc = le16_to_cpu(hdr->frame_control);
112 int hdr_len = ieee80211_get_hdrlen(fc);
113
114 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
115 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
116 return NULL;
117 }
118
119 static const struct ieee80211_hw_mode *iwl3945_get_hw_mode(
120 struct iwl3945_priv *priv, int mode)
121 {
122 int i;
123
124 for (i = 0; i < 3; i++)
125 if (priv->modes[i].mode == mode)
126 return &priv->modes[i];
127
128 return NULL;
129 }
130
131 static int iwl3945_is_empty_essid(const char *essid, int essid_len)
132 {
133 /* Single white space is for Linksys APs */
134 if (essid_len == 1 && essid[0] == ' ')
135 return 1;
136
137 /* Otherwise, if the entire essid is 0, we assume it is hidden */
138 while (essid_len) {
139 essid_len--;
140 if (essid[essid_len] != '\0')
141 return 0;
142 }
143
144 return 1;
145 }
146
147 static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
148 {
149 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
150 const char *s = essid;
151 char *d = escaped;
152
153 if (iwl3945_is_empty_essid(essid, essid_len)) {
154 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
155 return escaped;
156 }
157
158 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
159 while (essid_len--) {
160 if (*s == '\0') {
161 *d++ = '\\';
162 *d++ = '0';
163 s++;
164 } else
165 *d++ = *s++;
166 }
167 *d = '\0';
168 return escaped;
169 }
170
171 static void iwl3945_print_hex_dump(int level, void *p, u32 len)
172 {
173 #ifdef CONFIG_IWL3945_DEBUG
174 if (!(iwl3945_debug_level & level))
175 return;
176
177 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
178 p, len, 1);
179 #endif
180 }
181
182 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
183 * DMA services
184 *
185 * Theory of operation
186 *
187 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
188 * of buffer descriptors, each of which points to one or more data buffers for
189 * the device to read from or fill. Driver and device exchange status of each
190 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
191 * entries in each circular buffer, to protect against confusing empty and full
192 * queue states.
193 *
194 * The device reads or writes the data in the queues via the device's several
195 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
196 *
197 * For Tx queue, there are low mark and high mark limits. If, after queuing
198 * the packet for Tx, free space become < low mark, Tx queue stopped. When
199 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
200 * Tx queue resumed.
201 *
202 * The 3945 operates with six queues: One receive queue, one transmit queue
203 * (#4) for sending commands to the device firmware, and four transmit queues
204 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
205 ***************************************************/
206
207 static int iwl3945_queue_space(const struct iwl3945_queue *q)
208 {
209 int s = q->read_ptr - q->write_ptr;
210
211 if (q->read_ptr > q->write_ptr)
212 s -= q->n_bd;
213
214 if (s <= 0)
215 s += q->n_window;
216 /* keep some reserve to not confuse empty and full situations */
217 s -= 2;
218 if (s < 0)
219 s = 0;
220 return s;
221 }
222
223 /**
224 * iwl3945_queue_inc_wrap - increment queue index, wrap back to beginning
225 * @index -- current index
226 * @n_bd -- total number of entries in queue (must be power of 2)
227 */
228 static inline int iwl3945_queue_inc_wrap(int index, int n_bd)
229 {
230 return ++index & (n_bd - 1);
231 }
232
233 /**
234 * iwl3945_queue_dec_wrap - increment queue index, wrap back to end
235 * @index -- current index
236 * @n_bd -- total number of entries in queue (must be power of 2)
237 */
238 static inline int iwl3945_queue_dec_wrap(int index, int n_bd)
239 {
240 return --index & (n_bd - 1);
241 }
242
243 static inline int x2_queue_used(const struct iwl3945_queue *q, int i)
244 {
245 return q->write_ptr > q->read_ptr ?
246 (i >= q->read_ptr && i < q->write_ptr) :
247 !(i < q->read_ptr && i >= q->write_ptr);
248 }
249
250 static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
251 {
252 /* This is for scan command, the big buffer at end of command array */
253 if (is_huge)
254 return q->n_window; /* must be power of 2 */
255
256 /* Otherwise, use normal size buffers */
257 return index & (q->n_window - 1);
258 }
259
260 /**
261 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
262 */
263 static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
264 int count, int slots_num, u32 id)
265 {
266 q->n_bd = count;
267 q->n_window = slots_num;
268 q->id = id;
269
270 /* count must be power-of-two size, otherwise iwl3945_queue_inc_wrap
271 * and iwl3945_queue_dec_wrap are broken. */
272 BUG_ON(!is_power_of_2(count));
273
274 /* slots_num must be power-of-two size, otherwise
275 * get_cmd_index is broken. */
276 BUG_ON(!is_power_of_2(slots_num));
277
278 q->low_mark = q->n_window / 4;
279 if (q->low_mark < 4)
280 q->low_mark = 4;
281
282 q->high_mark = q->n_window / 8;
283 if (q->high_mark < 2)
284 q->high_mark = 2;
285
286 q->write_ptr = q->read_ptr = 0;
287
288 return 0;
289 }
290
291 /**
292 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
293 */
294 static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
295 struct iwl3945_tx_queue *txq, u32 id)
296 {
297 struct pci_dev *dev = priv->pci_dev;
298
299 /* Driver private data, only for Tx (not command) queues,
300 * not shared with device. */
301 if (id != IWL_CMD_QUEUE_NUM) {
302 txq->txb = kmalloc(sizeof(txq->txb[0]) *
303 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
304 if (!txq->txb) {
305 IWL_ERROR("kmalloc for auxiliary BD "
306 "structures failed\n");
307 goto error;
308 }
309 } else
310 txq->txb = NULL;
311
312 /* Circular buffer of transmit frame descriptors (TFDs),
313 * shared with device */
314 txq->bd = pci_alloc_consistent(dev,
315 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
316 &txq->q.dma_addr);
317
318 if (!txq->bd) {
319 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
320 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
321 goto error;
322 }
323 txq->q.id = id;
324
325 return 0;
326
327 error:
328 if (txq->txb) {
329 kfree(txq->txb);
330 txq->txb = NULL;
331 }
332
333 return -ENOMEM;
334 }
335
336 /**
337 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
338 */
339 int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
340 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
341 {
342 struct pci_dev *dev = priv->pci_dev;
343 int len;
344 int rc = 0;
345
346 /*
347 * Alloc buffer array for commands (Tx or other types of commands).
348 * For the command queue (#4), allocate command space + one big
349 * command for scan, since scan command is very huge; the system will
350 * not have two scans at the same time, so only one is needed.
351 * For data Tx queues (all other queues), no super-size command
352 * space is needed.
353 */
354 len = sizeof(struct iwl3945_cmd) * slots_num;
355 if (txq_id == IWL_CMD_QUEUE_NUM)
356 len += IWL_MAX_SCAN_SIZE;
357 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
358 if (!txq->cmd)
359 return -ENOMEM;
360
361 /* Alloc driver data array and TFD circular buffer */
362 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
363 if (rc) {
364 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
365
366 return -ENOMEM;
367 }
368 txq->need_update = 0;
369
370 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
371 * iwl3945_queue_inc_wrap and iwl3945_queue_dec_wrap are broken. */
372 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
373
374 /* Initialize queue high/low-water, head/tail indexes */
375 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
376
377 /* Tell device where to find queue, enable DMA channel. */
378 iwl3945_hw_tx_queue_init(priv, txq);
379
380 return 0;
381 }
382
383 /**
384 * iwl3945_tx_queue_free - Deallocate DMA queue.
385 * @txq: Transmit queue to deallocate.
386 *
387 * Empty queue by removing and destroying all BD's.
388 * Free all buffers.
389 * 0-fill, but do not free "txq" descriptor structure.
390 */
391 void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
392 {
393 struct iwl3945_queue *q = &txq->q;
394 struct pci_dev *dev = priv->pci_dev;
395 int len;
396
397 if (q->n_bd == 0)
398 return;
399
400 /* first, empty all BD's */
401 for (; q->write_ptr != q->read_ptr;
402 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd))
403 iwl3945_hw_txq_free_tfd(priv, txq);
404
405 len = sizeof(struct iwl3945_cmd) * q->n_window;
406 if (q->id == IWL_CMD_QUEUE_NUM)
407 len += IWL_MAX_SCAN_SIZE;
408
409 /* De-alloc array of command/tx buffers */
410 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
411
412 /* De-alloc circular buffer of TFDs */
413 if (txq->q.n_bd)
414 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
415 txq->q.n_bd, txq->bd, txq->q.dma_addr);
416
417 /* De-alloc array of per-TFD driver data */
418 if (txq->txb) {
419 kfree(txq->txb);
420 txq->txb = NULL;
421 }
422
423 /* 0-fill queue descriptor structure */
424 memset(txq, 0, sizeof(*txq));
425 }
426
427 const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
428
429 /*************** STATION TABLE MANAGEMENT ****
430 * mac80211 should be examined to determine if sta_info is duplicating
431 * the functionality provided here
432 */
433
434 /**************************************************************/
435 #if 0 /* temporary disable till we add real remove station */
436 /**
437 * iwl3945_remove_station - Remove driver's knowledge of station.
438 *
439 * NOTE: This does not remove station from device's station table.
440 */
441 static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
442 {
443 int index = IWL_INVALID_STATION;
444 int i;
445 unsigned long flags;
446
447 spin_lock_irqsave(&priv->sta_lock, flags);
448
449 if (is_ap)
450 index = IWL_AP_ID;
451 else if (is_broadcast_ether_addr(addr))
452 index = priv->hw_setting.bcast_sta_id;
453 else
454 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
455 if (priv->stations[i].used &&
456 !compare_ether_addr(priv->stations[i].sta.sta.addr,
457 addr)) {
458 index = i;
459 break;
460 }
461
462 if (unlikely(index == IWL_INVALID_STATION))
463 goto out;
464
465 if (priv->stations[index].used) {
466 priv->stations[index].used = 0;
467 priv->num_stations--;
468 }
469
470 BUG_ON(priv->num_stations < 0);
471
472 out:
473 spin_unlock_irqrestore(&priv->sta_lock, flags);
474 return 0;
475 }
476 #endif
477
478 /**
479 * iwl3945_clear_stations_table - Clear the driver's station table
480 *
481 * NOTE: This does not clear or otherwise alter the device's station table.
482 */
483 static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
484 {
485 unsigned long flags;
486
487 spin_lock_irqsave(&priv->sta_lock, flags);
488
489 priv->num_stations = 0;
490 memset(priv->stations, 0, sizeof(priv->stations));
491
492 spin_unlock_irqrestore(&priv->sta_lock, flags);
493 }
494
495 /**
496 * iwl3945_add_station - Add station to station tables in driver and device
497 */
498 u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
499 {
500 int i;
501 int index = IWL_INVALID_STATION;
502 struct iwl3945_station_entry *station;
503 unsigned long flags_spin;
504 DECLARE_MAC_BUF(mac);
505 u8 rate;
506
507 spin_lock_irqsave(&priv->sta_lock, flags_spin);
508 if (is_ap)
509 index = IWL_AP_ID;
510 else if (is_broadcast_ether_addr(addr))
511 index = priv->hw_setting.bcast_sta_id;
512 else
513 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
514 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
515 addr)) {
516 index = i;
517 break;
518 }
519
520 if (!priv->stations[i].used &&
521 index == IWL_INVALID_STATION)
522 index = i;
523 }
524
525 /* These two conditions has the same outcome but keep them separate
526 since they have different meaning */
527 if (unlikely(index == IWL_INVALID_STATION)) {
528 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
529 return index;
530 }
531
532 if (priv->stations[index].used &&
533 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
534 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
535 return index;
536 }
537
538 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
539 station = &priv->stations[index];
540 station->used = 1;
541 priv->num_stations++;
542
543 /* Set up the REPLY_ADD_STA command to send to device */
544 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
545 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
546 station->sta.mode = 0;
547 station->sta.sta.sta_id = index;
548 station->sta.station_flags = 0;
549
550 if (priv->phymode == MODE_IEEE80211A)
551 rate = IWL_RATE_6M_PLCP;
552 else
553 rate = IWL_RATE_1M_PLCP;
554
555 /* Turn on both antennas for the station... */
556 station->sta.rate_n_flags =
557 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
558 station->current_rate.rate_n_flags =
559 le16_to_cpu(station->sta.rate_n_flags);
560
561 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
562
563 /* Add station to device's station table */
564 iwl3945_send_add_station(priv, &station->sta, flags);
565 return index;
566
567 }
568
569 /*************** DRIVER STATUS FUNCTIONS *****/
570
571 static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
572 {
573 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
574 * set but EXIT_PENDING is not */
575 return test_bit(STATUS_READY, &priv->status) &&
576 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
577 !test_bit(STATUS_EXIT_PENDING, &priv->status);
578 }
579
580 static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
581 {
582 return test_bit(STATUS_ALIVE, &priv->status);
583 }
584
585 static inline int iwl3945_is_init(struct iwl3945_priv *priv)
586 {
587 return test_bit(STATUS_INIT, &priv->status);
588 }
589
590 static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
591 {
592 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
593 test_bit(STATUS_RF_KILL_SW, &priv->status);
594 }
595
596 static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
597 {
598
599 if (iwl3945_is_rfkill(priv))
600 return 0;
601
602 return iwl3945_is_ready(priv);
603 }
604
605 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
606
607 #define IWL_CMD(x) case x : return #x
608
609 static const char *get_cmd_string(u8 cmd)
610 {
611 switch (cmd) {
612 IWL_CMD(REPLY_ALIVE);
613 IWL_CMD(REPLY_ERROR);
614 IWL_CMD(REPLY_RXON);
615 IWL_CMD(REPLY_RXON_ASSOC);
616 IWL_CMD(REPLY_QOS_PARAM);
617 IWL_CMD(REPLY_RXON_TIMING);
618 IWL_CMD(REPLY_ADD_STA);
619 IWL_CMD(REPLY_REMOVE_STA);
620 IWL_CMD(REPLY_REMOVE_ALL_STA);
621 IWL_CMD(REPLY_3945_RX);
622 IWL_CMD(REPLY_TX);
623 IWL_CMD(REPLY_RATE_SCALE);
624 IWL_CMD(REPLY_LEDS_CMD);
625 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
626 IWL_CMD(RADAR_NOTIFICATION);
627 IWL_CMD(REPLY_QUIET_CMD);
628 IWL_CMD(REPLY_CHANNEL_SWITCH);
629 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
630 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
631 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
632 IWL_CMD(POWER_TABLE_CMD);
633 IWL_CMD(PM_SLEEP_NOTIFICATION);
634 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
635 IWL_CMD(REPLY_SCAN_CMD);
636 IWL_CMD(REPLY_SCAN_ABORT_CMD);
637 IWL_CMD(SCAN_START_NOTIFICATION);
638 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
639 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
640 IWL_CMD(BEACON_NOTIFICATION);
641 IWL_CMD(REPLY_TX_BEACON);
642 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
643 IWL_CMD(QUIET_NOTIFICATION);
644 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
645 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
646 IWL_CMD(REPLY_BT_CONFIG);
647 IWL_CMD(REPLY_STATISTICS_CMD);
648 IWL_CMD(STATISTICS_NOTIFICATION);
649 IWL_CMD(REPLY_CARD_STATE_CMD);
650 IWL_CMD(CARD_STATE_NOTIFICATION);
651 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
652 default:
653 return "UNKNOWN";
654
655 }
656 }
657
658 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
659
660 /**
661 * iwl3945_enqueue_hcmd - enqueue a uCode command
662 * @priv: device private data point
663 * @cmd: a point to the ucode command structure
664 *
665 * The function returns < 0 values to indicate the operation is
666 * failed. On success, it turns the index (> 0) of command in the
667 * command queue.
668 */
669 static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
670 {
671 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
672 struct iwl3945_queue *q = &txq->q;
673 struct iwl3945_tfd_frame *tfd;
674 u32 *control_flags;
675 struct iwl3945_cmd *out_cmd;
676 u32 idx;
677 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
678 dma_addr_t phys_addr;
679 int pad;
680 u16 count;
681 int ret;
682 unsigned long flags;
683
684 /* If any of the command structures end up being larger than
685 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
686 * we will need to increase the size of the TFD entries */
687 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
688 !(cmd->meta.flags & CMD_SIZE_HUGE));
689
690 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
691 IWL_ERROR("No space for Tx\n");
692 return -ENOSPC;
693 }
694
695 spin_lock_irqsave(&priv->hcmd_lock, flags);
696
697 tfd = &txq->bd[q->write_ptr];
698 memset(tfd, 0, sizeof(*tfd));
699
700 control_flags = (u32 *) tfd;
701
702 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
703 out_cmd = &txq->cmd[idx];
704
705 out_cmd->hdr.cmd = cmd->id;
706 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
707 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
708
709 /* At this point, the out_cmd now has all of the incoming cmd
710 * information */
711
712 out_cmd->hdr.flags = 0;
713 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
714 INDEX_TO_SEQ(q->write_ptr));
715 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
716 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
717
718 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
719 offsetof(struct iwl3945_cmd, hdr);
720 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
721
722 pad = U32_PAD(cmd->len);
723 count = TFD_CTL_COUNT_GET(*control_flags);
724 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
725
726 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
727 "%d bytes at %d[%d]:%d\n",
728 get_cmd_string(out_cmd->hdr.cmd),
729 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
730 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
731
732 txq->need_update = 1;
733
734 /* Increment and update queue's write index */
735 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
736 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
737
738 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
739 return ret ? ret : idx;
740 }
741
742 static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
743 {
744 int ret;
745
746 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
747
748 /* An asynchronous command can not expect an SKB to be set. */
749 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
750
751 /* An asynchronous command MUST have a callback. */
752 BUG_ON(!cmd->meta.u.callback);
753
754 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
755 return -EBUSY;
756
757 ret = iwl3945_enqueue_hcmd(priv, cmd);
758 if (ret < 0) {
759 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
760 get_cmd_string(cmd->id), ret);
761 return ret;
762 }
763 return 0;
764 }
765
766 static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
767 {
768 int cmd_idx;
769 int ret;
770 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
771
772 BUG_ON(cmd->meta.flags & CMD_ASYNC);
773
774 /* A synchronous command can not have a callback set. */
775 BUG_ON(cmd->meta.u.callback != NULL);
776
777 if (atomic_xchg(&entry, 1)) {
778 IWL_ERROR("Error sending %s: Already sending a host command\n",
779 get_cmd_string(cmd->id));
780 return -EBUSY;
781 }
782
783 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
784
785 if (cmd->meta.flags & CMD_WANT_SKB)
786 cmd->meta.source = &cmd->meta;
787
788 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
789 if (cmd_idx < 0) {
790 ret = cmd_idx;
791 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
792 get_cmd_string(cmd->id), ret);
793 goto out;
794 }
795
796 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
797 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
798 HOST_COMPLETE_TIMEOUT);
799 if (!ret) {
800 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
801 IWL_ERROR("Error sending %s: time out after %dms.\n",
802 get_cmd_string(cmd->id),
803 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
804
805 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
806 ret = -ETIMEDOUT;
807 goto cancel;
808 }
809 }
810
811 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
812 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
813 get_cmd_string(cmd->id));
814 ret = -ECANCELED;
815 goto fail;
816 }
817 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
818 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
819 get_cmd_string(cmd->id));
820 ret = -EIO;
821 goto fail;
822 }
823 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
824 IWL_ERROR("Error: Response NULL in '%s'\n",
825 get_cmd_string(cmd->id));
826 ret = -EIO;
827 goto out;
828 }
829
830 ret = 0;
831 goto out;
832
833 cancel:
834 if (cmd->meta.flags & CMD_WANT_SKB) {
835 struct iwl3945_cmd *qcmd;
836
837 /* Cancel the CMD_WANT_SKB flag for the cmd in the
838 * TX cmd queue. Otherwise in case the cmd comes
839 * in later, it will possibly set an invalid
840 * address (cmd->meta.source). */
841 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
842 qcmd->meta.flags &= ~CMD_WANT_SKB;
843 }
844 fail:
845 if (cmd->meta.u.skb) {
846 dev_kfree_skb_any(cmd->meta.u.skb);
847 cmd->meta.u.skb = NULL;
848 }
849 out:
850 atomic_set(&entry, 0);
851 return ret;
852 }
853
854 int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
855 {
856 if (cmd->meta.flags & CMD_ASYNC)
857 return iwl3945_send_cmd_async(priv, cmd);
858
859 return iwl3945_send_cmd_sync(priv, cmd);
860 }
861
862 int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
863 {
864 struct iwl3945_host_cmd cmd = {
865 .id = id,
866 .len = len,
867 .data = data,
868 };
869
870 return iwl3945_send_cmd_sync(priv, &cmd);
871 }
872
873 static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
874 {
875 struct iwl3945_host_cmd cmd = {
876 .id = id,
877 .len = sizeof(val),
878 .data = &val,
879 };
880
881 return iwl3945_send_cmd_sync(priv, &cmd);
882 }
883
884 int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
885 {
886 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
887 }
888
889 /**
890 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
891 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
892 * @channel: Any channel valid for the requested phymode
893
894 * In addition to setting the staging RXON, priv->phymode is also set.
895 *
896 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
897 * in the staging RXON flag structure based on the phymode
898 */
899 static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv, u8 phymode, u16 channel)
900 {
901 if (!iwl3945_get_channel_info(priv, phymode, channel)) {
902 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
903 channel, phymode);
904 return -EINVAL;
905 }
906
907 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
908 (priv->phymode == phymode))
909 return 0;
910
911 priv->staging_rxon.channel = cpu_to_le16(channel);
912 if (phymode == MODE_IEEE80211A)
913 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
914 else
915 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
916
917 priv->phymode = phymode;
918
919 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
920
921 return 0;
922 }
923
924 /**
925 * iwl3945_check_rxon_cmd - validate RXON structure is valid
926 *
927 * NOTE: This is really only useful during development and can eventually
928 * be #ifdef'd out once the driver is stable and folks aren't actively
929 * making changes
930 */
931 static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
932 {
933 int error = 0;
934 int counter = 1;
935
936 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
937 error |= le32_to_cpu(rxon->flags &
938 (RXON_FLG_TGJ_NARROW_BAND_MSK |
939 RXON_FLG_RADAR_DETECT_MSK));
940 if (error)
941 IWL_WARNING("check 24G fields %d | %d\n",
942 counter++, error);
943 } else {
944 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
945 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
946 if (error)
947 IWL_WARNING("check 52 fields %d | %d\n",
948 counter++, error);
949 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
950 if (error)
951 IWL_WARNING("check 52 CCK %d | %d\n",
952 counter++, error);
953 }
954 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
955 if (error)
956 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
957
958 /* make sure basic rates 6Mbps and 1Mbps are supported */
959 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
960 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
961 if (error)
962 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
963
964 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
965 if (error)
966 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
967
968 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
969 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
970 if (error)
971 IWL_WARNING("check CCK and short slot %d | %d\n",
972 counter++, error);
973
974 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
975 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
976 if (error)
977 IWL_WARNING("check CCK & auto detect %d | %d\n",
978 counter++, error);
979
980 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
981 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
982 if (error)
983 IWL_WARNING("check TGG and auto detect %d | %d\n",
984 counter++, error);
985
986 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
987 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
988 RXON_FLG_ANT_A_MSK)) == 0);
989 if (error)
990 IWL_WARNING("check antenna %d %d\n", counter++, error);
991
992 if (error)
993 IWL_WARNING("Tuning to channel %d\n",
994 le16_to_cpu(rxon->channel));
995
996 if (error) {
997 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
998 return -1;
999 }
1000 return 0;
1001 }
1002
1003 /**
1004 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
1005 * @priv: staging_rxon is compared to active_rxon
1006 *
1007 * If the RXON structure is changing enough to require a new tune,
1008 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1009 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
1010 */
1011 static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
1012 {
1013
1014 /* These items are only settable from the full RXON command */
1015 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1016 compare_ether_addr(priv->staging_rxon.bssid_addr,
1017 priv->active_rxon.bssid_addr) ||
1018 compare_ether_addr(priv->staging_rxon.node_addr,
1019 priv->active_rxon.node_addr) ||
1020 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1021 priv->active_rxon.wlap_bssid_addr) ||
1022 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1023 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1024 (priv->staging_rxon.air_propagation !=
1025 priv->active_rxon.air_propagation) ||
1026 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1027 return 1;
1028
1029 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1030 * be updated with the RXON_ASSOC command -- however only some
1031 * flag transitions are allowed using RXON_ASSOC */
1032
1033 /* Check if we are not switching bands */
1034 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1035 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1036 return 1;
1037
1038 /* Check if we are switching association toggle */
1039 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1040 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1041 return 1;
1042
1043 return 0;
1044 }
1045
1046 static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
1047 {
1048 int rc = 0;
1049 struct iwl3945_rx_packet *res = NULL;
1050 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1051 struct iwl3945_host_cmd cmd = {
1052 .id = REPLY_RXON_ASSOC,
1053 .len = sizeof(rxon_assoc),
1054 .meta.flags = CMD_WANT_SKB,
1055 .data = &rxon_assoc,
1056 };
1057 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1058 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
1059
1060 if ((rxon1->flags == rxon2->flags) &&
1061 (rxon1->filter_flags == rxon2->filter_flags) &&
1062 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1063 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1064 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1065 return 0;
1066 }
1067
1068 rxon_assoc.flags = priv->staging_rxon.flags;
1069 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1070 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1071 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1072 rxon_assoc.reserved = 0;
1073
1074 rc = iwl3945_send_cmd_sync(priv, &cmd);
1075 if (rc)
1076 return rc;
1077
1078 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1079 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1080 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1081 rc = -EIO;
1082 }
1083
1084 priv->alloc_rxb_skb--;
1085 dev_kfree_skb_any(cmd.meta.u.skb);
1086
1087 return rc;
1088 }
1089
1090 /**
1091 * iwl3945_commit_rxon - commit staging_rxon to hardware
1092 *
1093 * The RXON command in staging_rxon is committed to the hardware and
1094 * the active_rxon structure is updated with the new data. This
1095 * function correctly transitions out of the RXON_ASSOC_MSK state if
1096 * a HW tune is required based on the RXON structure changes.
1097 */
1098 static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1099 {
1100 /* cast away the const for active_rxon in this function */
1101 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1102 int rc = 0;
1103 DECLARE_MAC_BUF(mac);
1104
1105 if (!iwl3945_is_alive(priv))
1106 return -1;
1107
1108 /* always get timestamp with Rx frame */
1109 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1110
1111 /* select antenna */
1112 priv->staging_rxon.flags &=
1113 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1114 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1115
1116 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
1117 if (rc) {
1118 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1119 return -EINVAL;
1120 }
1121
1122 /* If we don't need to send a full RXON, we can use
1123 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1124 * and other flags for the current radio configuration. */
1125 if (!iwl3945_full_rxon_required(priv)) {
1126 rc = iwl3945_send_rxon_assoc(priv);
1127 if (rc) {
1128 IWL_ERROR("Error setting RXON_ASSOC "
1129 "configuration (%d).\n", rc);
1130 return rc;
1131 }
1132
1133 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1134
1135 return 0;
1136 }
1137
1138 /* If we are currently associated and the new config requires
1139 * an RXON_ASSOC and the new config wants the associated mask enabled,
1140 * we must clear the associated from the active configuration
1141 * before we apply the new config */
1142 if (iwl3945_is_associated(priv) &&
1143 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1144 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1145 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1146
1147 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1148 sizeof(struct iwl3945_rxon_cmd),
1149 &priv->active_rxon);
1150
1151 /* If the mask clearing failed then we set
1152 * active_rxon back to what it was previously */
1153 if (rc) {
1154 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1155 IWL_ERROR("Error clearing ASSOC_MSK on current "
1156 "configuration (%d).\n", rc);
1157 return rc;
1158 }
1159 }
1160
1161 IWL_DEBUG_INFO("Sending RXON\n"
1162 "* with%s RXON_FILTER_ASSOC_MSK\n"
1163 "* channel = %d\n"
1164 "* bssid = %s\n",
1165 ((priv->staging_rxon.filter_flags &
1166 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1167 le16_to_cpu(priv->staging_rxon.channel),
1168 print_mac(mac, priv->staging_rxon.bssid_addr));
1169
1170 /* Apply the new configuration */
1171 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1172 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1173 if (rc) {
1174 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1175 return rc;
1176 }
1177
1178 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1179
1180 iwl3945_clear_stations_table(priv);
1181
1182 /* If we issue a new RXON command which required a tune then we must
1183 * send a new TXPOWER command or we won't be able to Tx any frames */
1184 rc = iwl3945_hw_reg_send_txpower(priv);
1185 if (rc) {
1186 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1187 return rc;
1188 }
1189
1190 /* Add the broadcast address so we can send broadcast frames */
1191 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1192 IWL_INVALID_STATION) {
1193 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1194 return -EIO;
1195 }
1196
1197 /* If we have set the ASSOC_MSK and we are in BSS mode then
1198 * add the IWL_AP_ID to the station rate table */
1199 if (iwl3945_is_associated(priv) &&
1200 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
1201 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1202 == IWL_INVALID_STATION) {
1203 IWL_ERROR("Error adding AP address for transmit.\n");
1204 return -EIO;
1205 }
1206
1207 /* Init the hardware's rate fallback order based on the
1208 * phymode */
1209 rc = iwl3945_init_hw_rate_table(priv);
1210 if (rc) {
1211 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1212 return -EIO;
1213 }
1214
1215 return 0;
1216 }
1217
1218 static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1219 {
1220 struct iwl3945_bt_cmd bt_cmd = {
1221 .flags = 3,
1222 .lead_time = 0xAA,
1223 .max_kill = 1,
1224 .kill_ack_mask = 0,
1225 .kill_cts_mask = 0,
1226 };
1227
1228 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1229 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
1230 }
1231
1232 static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1233 {
1234 int rc = 0;
1235 struct iwl3945_rx_packet *res;
1236 struct iwl3945_host_cmd cmd = {
1237 .id = REPLY_SCAN_ABORT_CMD,
1238 .meta.flags = CMD_WANT_SKB,
1239 };
1240
1241 /* If there isn't a scan actively going on in the hardware
1242 * then we are in between scan bands and not actually
1243 * actively scanning, so don't send the abort command */
1244 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1245 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1246 return 0;
1247 }
1248
1249 rc = iwl3945_send_cmd_sync(priv, &cmd);
1250 if (rc) {
1251 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1252 return rc;
1253 }
1254
1255 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1256 if (res->u.status != CAN_ABORT_STATUS) {
1257 /* The scan abort will return 1 for success or
1258 * 2 for "failure". A failure condition can be
1259 * due to simply not being in an active scan which
1260 * can occur if we send the scan abort before we
1261 * the microcode has notified us that a scan is
1262 * completed. */
1263 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1264 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1265 clear_bit(STATUS_SCAN_HW, &priv->status);
1266 }
1267
1268 dev_kfree_skb_any(cmd.meta.u.skb);
1269
1270 return rc;
1271 }
1272
1273 static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1274 struct iwl3945_cmd *cmd,
1275 struct sk_buff *skb)
1276 {
1277 return 1;
1278 }
1279
1280 /*
1281 * CARD_STATE_CMD
1282 *
1283 * Use: Sets the device's internal card state to enable, disable, or halt
1284 *
1285 * When in the 'enable' state the card operates as normal.
1286 * When in the 'disable' state, the card enters into a low power mode.
1287 * When in the 'halt' state, the card is shut down and must be fully
1288 * restarted to come back on.
1289 */
1290 static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1291 {
1292 struct iwl3945_host_cmd cmd = {
1293 .id = REPLY_CARD_STATE_CMD,
1294 .len = sizeof(u32),
1295 .data = &flags,
1296 .meta.flags = meta_flag,
1297 };
1298
1299 if (meta_flag & CMD_ASYNC)
1300 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1301
1302 return iwl3945_send_cmd(priv, &cmd);
1303 }
1304
1305 static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1306 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1307 {
1308 struct iwl3945_rx_packet *res = NULL;
1309
1310 if (!skb) {
1311 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1312 return 1;
1313 }
1314
1315 res = (struct iwl3945_rx_packet *)skb->data;
1316 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1317 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1318 res->hdr.flags);
1319 return 1;
1320 }
1321
1322 switch (res->u.add_sta.status) {
1323 case ADD_STA_SUCCESS_MSK:
1324 break;
1325 default:
1326 break;
1327 }
1328
1329 /* We didn't cache the SKB; let the caller free it */
1330 return 1;
1331 }
1332
1333 int iwl3945_send_add_station(struct iwl3945_priv *priv,
1334 struct iwl3945_addsta_cmd *sta, u8 flags)
1335 {
1336 struct iwl3945_rx_packet *res = NULL;
1337 int rc = 0;
1338 struct iwl3945_host_cmd cmd = {
1339 .id = REPLY_ADD_STA,
1340 .len = sizeof(struct iwl3945_addsta_cmd),
1341 .meta.flags = flags,
1342 .data = sta,
1343 };
1344
1345 if (flags & CMD_ASYNC)
1346 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1347 else
1348 cmd.meta.flags |= CMD_WANT_SKB;
1349
1350 rc = iwl3945_send_cmd(priv, &cmd);
1351
1352 if (rc || (flags & CMD_ASYNC))
1353 return rc;
1354
1355 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1356 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1357 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1358 res->hdr.flags);
1359 rc = -EIO;
1360 }
1361
1362 if (rc == 0) {
1363 switch (res->u.add_sta.status) {
1364 case ADD_STA_SUCCESS_MSK:
1365 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1366 break;
1367 default:
1368 rc = -EIO;
1369 IWL_WARNING("REPLY_ADD_STA failed\n");
1370 break;
1371 }
1372 }
1373
1374 priv->alloc_rxb_skb--;
1375 dev_kfree_skb_any(cmd.meta.u.skb);
1376
1377 return rc;
1378 }
1379
1380 static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1381 struct ieee80211_key_conf *keyconf,
1382 u8 sta_id)
1383 {
1384 unsigned long flags;
1385 __le16 key_flags = 0;
1386
1387 switch (keyconf->alg) {
1388 case ALG_CCMP:
1389 key_flags |= STA_KEY_FLG_CCMP;
1390 key_flags |= cpu_to_le16(
1391 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1392 key_flags &= ~STA_KEY_FLG_INVALID;
1393 break;
1394 case ALG_TKIP:
1395 case ALG_WEP:
1396 default:
1397 return -EINVAL;
1398 }
1399 spin_lock_irqsave(&priv->sta_lock, flags);
1400 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1401 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1402 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1403 keyconf->keylen);
1404
1405 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1406 keyconf->keylen);
1407 priv->stations[sta_id].sta.key.key_flags = key_flags;
1408 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1409 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1410
1411 spin_unlock_irqrestore(&priv->sta_lock, flags);
1412
1413 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1414 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1415 return 0;
1416 }
1417
1418 static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1419 {
1420 unsigned long flags;
1421
1422 spin_lock_irqsave(&priv->sta_lock, flags);
1423 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1424 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
1425 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1426 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1427 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1428 spin_unlock_irqrestore(&priv->sta_lock, flags);
1429
1430 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1431 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1432 return 0;
1433 }
1434
1435 static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1436 {
1437 struct list_head *element;
1438
1439 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1440 priv->frames_count);
1441
1442 while (!list_empty(&priv->free_frames)) {
1443 element = priv->free_frames.next;
1444 list_del(element);
1445 kfree(list_entry(element, struct iwl3945_frame, list));
1446 priv->frames_count--;
1447 }
1448
1449 if (priv->frames_count) {
1450 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1451 priv->frames_count);
1452 priv->frames_count = 0;
1453 }
1454 }
1455
1456 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1457 {
1458 struct iwl3945_frame *frame;
1459 struct list_head *element;
1460 if (list_empty(&priv->free_frames)) {
1461 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1462 if (!frame) {
1463 IWL_ERROR("Could not allocate frame!\n");
1464 return NULL;
1465 }
1466
1467 priv->frames_count++;
1468 return frame;
1469 }
1470
1471 element = priv->free_frames.next;
1472 list_del(element);
1473 return list_entry(element, struct iwl3945_frame, list);
1474 }
1475
1476 static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1477 {
1478 memset(frame, 0, sizeof(*frame));
1479 list_add(&frame->list, &priv->free_frames);
1480 }
1481
1482 unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1483 struct ieee80211_hdr *hdr,
1484 const u8 *dest, int left)
1485 {
1486
1487 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1488 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1489 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1490 return 0;
1491
1492 if (priv->ibss_beacon->len > left)
1493 return 0;
1494
1495 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1496
1497 return priv->ibss_beacon->len;
1498 }
1499
1500 static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
1501 {
1502 u8 i;
1503
1504 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1505 i = iwl3945_rates[i].next_ieee) {
1506 if (rate_mask & (1 << i))
1507 return iwl3945_rates[i].plcp;
1508 }
1509
1510 return IWL_RATE_INVALID;
1511 }
1512
1513 static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1514 {
1515 struct iwl3945_frame *frame;
1516 unsigned int frame_size;
1517 int rc;
1518 u8 rate;
1519
1520 frame = iwl3945_get_free_frame(priv);
1521
1522 if (!frame) {
1523 IWL_ERROR("Could not obtain free frame buffer for beacon "
1524 "command.\n");
1525 return -ENOMEM;
1526 }
1527
1528 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1529 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
1530 0xFF0);
1531 if (rate == IWL_INVALID_RATE)
1532 rate = IWL_RATE_6M_PLCP;
1533 } else {
1534 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1535 if (rate == IWL_INVALID_RATE)
1536 rate = IWL_RATE_1M_PLCP;
1537 }
1538
1539 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1540
1541 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1542 &frame->u.cmd[0]);
1543
1544 iwl3945_free_frame(priv, frame);
1545
1546 return rc;
1547 }
1548
1549 /******************************************************************************
1550 *
1551 * EEPROM related functions
1552 *
1553 ******************************************************************************/
1554
1555 static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1556 {
1557 memcpy(mac, priv->eeprom.mac_address, 6);
1558 }
1559
1560 /**
1561 * iwl3945_eeprom_init - read EEPROM contents
1562 *
1563 * Load the EEPROM contents from adapter into priv->eeprom
1564 *
1565 * NOTE: This routine uses the non-debug IO access functions.
1566 */
1567 int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1568 {
1569 __le16 *e = (__le16 *)&priv->eeprom;
1570 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1571 u32 r;
1572 int sz = sizeof(priv->eeprom);
1573 int rc;
1574 int i;
1575 u16 addr;
1576
1577 /* The EEPROM structure has several padding buffers within it
1578 * and when adding new EEPROM maps is subject to programmer errors
1579 * which may be very difficult to identify without explicitly
1580 * checking the resulting size of the eeprom map. */
1581 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1582
1583 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1584 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1585 return -ENOENT;
1586 }
1587
1588 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1589 rc = iwl3945_eeprom_acquire_semaphore(priv);
1590 if (rc < 0) {
1591 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1592 return -ENOENT;
1593 }
1594
1595 /* eeprom is an array of 16bit values */
1596 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1597 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1598 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1599
1600 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1601 i += IWL_EEPROM_ACCESS_DELAY) {
1602 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1603 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1604 break;
1605 udelay(IWL_EEPROM_ACCESS_DELAY);
1606 }
1607
1608 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1609 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1610 return -ETIMEDOUT;
1611 }
1612 e[addr / 2] = cpu_to_le16(r >> 16);
1613 }
1614
1615 return 0;
1616 }
1617
1618 /******************************************************************************
1619 *
1620 * Misc. internal state and helper functions
1621 *
1622 ******************************************************************************/
1623 #ifdef CONFIG_IWL3945_DEBUG
1624
1625 /**
1626 * iwl3945_report_frame - dump frame to syslog during debug sessions
1627 *
1628 * You may hack this function to show different aspects of received frames,
1629 * including selective frame dumps.
1630 * group100 parameter selects whether to show 1 out of 100 good frames.
1631 */
1632 void iwl3945_report_frame(struct iwl3945_priv *priv,
1633 struct iwl3945_rx_packet *pkt,
1634 struct ieee80211_hdr *header, int group100)
1635 {
1636 u32 to_us;
1637 u32 print_summary = 0;
1638 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1639 u32 hundred = 0;
1640 u32 dataframe = 0;
1641 u16 fc;
1642 u16 seq_ctl;
1643 u16 channel;
1644 u16 phy_flags;
1645 int rate_sym;
1646 u16 length;
1647 u16 status;
1648 u16 bcn_tmr;
1649 u32 tsf_low;
1650 u64 tsf;
1651 u8 rssi;
1652 u8 agc;
1653 u16 sig_avg;
1654 u16 noise_diff;
1655 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1656 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1657 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
1658 u8 *data = IWL_RX_DATA(pkt);
1659
1660 /* MAC header */
1661 fc = le16_to_cpu(header->frame_control);
1662 seq_ctl = le16_to_cpu(header->seq_ctrl);
1663
1664 /* metadata */
1665 channel = le16_to_cpu(rx_hdr->channel);
1666 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1667 rate_sym = rx_hdr->rate;
1668 length = le16_to_cpu(rx_hdr->len);
1669
1670 /* end-of-frame status and timestamp */
1671 status = le32_to_cpu(rx_end->status);
1672 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1673 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1674 tsf = le64_to_cpu(rx_end->timestamp);
1675
1676 /* signal statistics */
1677 rssi = rx_stats->rssi;
1678 agc = rx_stats->agc;
1679 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1680 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1681
1682 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1683
1684 /* if data frame is to us and all is good,
1685 * (optionally) print summary for only 1 out of every 100 */
1686 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1687 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1688 dataframe = 1;
1689 if (!group100)
1690 print_summary = 1; /* print each frame */
1691 else if (priv->framecnt_to_us < 100) {
1692 priv->framecnt_to_us++;
1693 print_summary = 0;
1694 } else {
1695 priv->framecnt_to_us = 0;
1696 print_summary = 1;
1697 hundred = 1;
1698 }
1699 } else {
1700 /* print summary for all other frames */
1701 print_summary = 1;
1702 }
1703
1704 if (print_summary) {
1705 char *title;
1706 u32 rate;
1707
1708 if (hundred)
1709 title = "100Frames";
1710 else if (fc & IEEE80211_FCTL_RETRY)
1711 title = "Retry";
1712 else if (ieee80211_is_assoc_response(fc))
1713 title = "AscRsp";
1714 else if (ieee80211_is_reassoc_response(fc))
1715 title = "RasRsp";
1716 else if (ieee80211_is_probe_response(fc)) {
1717 title = "PrbRsp";
1718 print_dump = 1; /* dump frame contents */
1719 } else if (ieee80211_is_beacon(fc)) {
1720 title = "Beacon";
1721 print_dump = 1; /* dump frame contents */
1722 } else if (ieee80211_is_atim(fc))
1723 title = "ATIM";
1724 else if (ieee80211_is_auth(fc))
1725 title = "Auth";
1726 else if (ieee80211_is_deauth(fc))
1727 title = "DeAuth";
1728 else if (ieee80211_is_disassoc(fc))
1729 title = "DisAssoc";
1730 else
1731 title = "Frame";
1732
1733 rate = iwl3945_rate_index_from_plcp(rate_sym);
1734 if (rate == -1)
1735 rate = 0;
1736 else
1737 rate = iwl3945_rates[rate].ieee / 2;
1738
1739 /* print frame summary.
1740 * MAC addresses show just the last byte (for brevity),
1741 * but you can hack it to show more, if you'd like to. */
1742 if (dataframe)
1743 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1744 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1745 title, fc, header->addr1[5],
1746 length, rssi, channel, rate);
1747 else {
1748 /* src/dst addresses assume managed mode */
1749 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1750 "src=0x%02x, rssi=%u, tim=%lu usec, "
1751 "phy=0x%02x, chnl=%d\n",
1752 title, fc, header->addr1[5],
1753 header->addr3[5], rssi,
1754 tsf_low - priv->scan_start_tsf,
1755 phy_flags, channel);
1756 }
1757 }
1758 if (print_dump)
1759 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
1760 }
1761 #endif
1762
1763 static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1764 {
1765 if (priv->hw_setting.shared_virt)
1766 pci_free_consistent(priv->pci_dev,
1767 sizeof(struct iwl3945_shared),
1768 priv->hw_setting.shared_virt,
1769 priv->hw_setting.shared_phys);
1770 }
1771
1772 /**
1773 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1774 *
1775 * return : set the bit for each supported rate insert in ie
1776 */
1777 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1778 u16 basic_rate, int *left)
1779 {
1780 u16 ret_rates = 0, bit;
1781 int i;
1782 u8 *cnt = ie;
1783 u8 *rates = ie + 1;
1784
1785 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1786 if (bit & supported_rate) {
1787 ret_rates |= bit;
1788 rates[*cnt] = iwl3945_rates[i].ieee |
1789 ((bit & basic_rate) ? 0x80 : 0x00);
1790 (*cnt)++;
1791 (*left)--;
1792 if ((*left <= 0) ||
1793 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1794 break;
1795 }
1796 }
1797
1798 return ret_rates;
1799 }
1800
1801 /**
1802 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1803 */
1804 static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1805 struct ieee80211_mgmt *frame,
1806 int left, int is_direct)
1807 {
1808 int len = 0;
1809 u8 *pos = NULL;
1810 u16 active_rates, ret_rates, cck_rates;
1811
1812 /* Make sure there is enough space for the probe request,
1813 * two mandatory IEs and the data */
1814 left -= 24;
1815 if (left < 0)
1816 return 0;
1817 len += 24;
1818
1819 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1820 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1821 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1822 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1823 frame->seq_ctrl = 0;
1824
1825 /* fill in our indirect SSID IE */
1826 /* ...next IE... */
1827
1828 left -= 2;
1829 if (left < 0)
1830 return 0;
1831 len += 2;
1832 pos = &(frame->u.probe_req.variable[0]);
1833 *pos++ = WLAN_EID_SSID;
1834 *pos++ = 0;
1835
1836 /* fill in our direct SSID IE... */
1837 if (is_direct) {
1838 /* ...next IE... */
1839 left -= 2 + priv->essid_len;
1840 if (left < 0)
1841 return 0;
1842 /* ... fill it in... */
1843 *pos++ = WLAN_EID_SSID;
1844 *pos++ = priv->essid_len;
1845 memcpy(pos, priv->essid, priv->essid_len);
1846 pos += priv->essid_len;
1847 len += 2 + priv->essid_len;
1848 }
1849
1850 /* fill in supported rate */
1851 /* ...next IE... */
1852 left -= 2;
1853 if (left < 0)
1854 return 0;
1855
1856 /* ... fill it in... */
1857 *pos++ = WLAN_EID_SUPP_RATES;
1858 *pos = 0;
1859
1860 priv->active_rate = priv->rates_mask;
1861 active_rates = priv->active_rate;
1862 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1863
1864 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1865 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1866 priv->active_rate_basic, &left);
1867 active_rates &= ~ret_rates;
1868
1869 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1870 priv->active_rate_basic, &left);
1871 active_rates &= ~ret_rates;
1872
1873 len += 2 + *pos;
1874 pos += (*pos) + 1;
1875 if (active_rates == 0)
1876 goto fill_end;
1877
1878 /* fill in supported extended rate */
1879 /* ...next IE... */
1880 left -= 2;
1881 if (left < 0)
1882 return 0;
1883 /* ... fill it in... */
1884 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1885 *pos = 0;
1886 iwl3945_supported_rate_to_ie(pos, active_rates,
1887 priv->active_rate_basic, &left);
1888 if (*pos > 0)
1889 len += 2 + *pos;
1890
1891 fill_end:
1892 return (u16)len;
1893 }
1894
1895 /*
1896 * QoS support
1897 */
1898 #ifdef CONFIG_IWL3945_QOS
1899 static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1900 struct iwl3945_qosparam_cmd *qos)
1901 {
1902
1903 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1904 sizeof(struct iwl3945_qosparam_cmd), qos);
1905 }
1906
1907 static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1908 {
1909 u16 cw_min = 15;
1910 u16 cw_max = 1023;
1911 u8 aifs = 2;
1912 u8 is_legacy = 0;
1913 unsigned long flags;
1914 int i;
1915
1916 spin_lock_irqsave(&priv->lock, flags);
1917 priv->qos_data.qos_active = 0;
1918
1919 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1920 if (priv->qos_data.qos_enable)
1921 priv->qos_data.qos_active = 1;
1922 if (!(priv->active_rate & 0xfff0)) {
1923 cw_min = 31;
1924 is_legacy = 1;
1925 }
1926 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1927 if (priv->qos_data.qos_enable)
1928 priv->qos_data.qos_active = 1;
1929 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1930 cw_min = 31;
1931 is_legacy = 1;
1932 }
1933
1934 if (priv->qos_data.qos_active)
1935 aifs = 3;
1936
1937 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1938 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1939 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1940 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1941 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1942
1943 if (priv->qos_data.qos_active) {
1944 i = 1;
1945 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1946 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1947 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1948 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1949 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1950
1951 i = 2;
1952 priv->qos_data.def_qos_parm.ac[i].cw_min =
1953 cpu_to_le16((cw_min + 1) / 2 - 1);
1954 priv->qos_data.def_qos_parm.ac[i].cw_max =
1955 cpu_to_le16(cw_max);
1956 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1957 if (is_legacy)
1958 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1959 cpu_to_le16(6016);
1960 else
1961 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1962 cpu_to_le16(3008);
1963 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1964
1965 i = 3;
1966 priv->qos_data.def_qos_parm.ac[i].cw_min =
1967 cpu_to_le16((cw_min + 1) / 4 - 1);
1968 priv->qos_data.def_qos_parm.ac[i].cw_max =
1969 cpu_to_le16((cw_max + 1) / 2 - 1);
1970 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1971 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1972 if (is_legacy)
1973 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1974 cpu_to_le16(3264);
1975 else
1976 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1977 cpu_to_le16(1504);
1978 } else {
1979 for (i = 1; i < 4; i++) {
1980 priv->qos_data.def_qos_parm.ac[i].cw_min =
1981 cpu_to_le16(cw_min);
1982 priv->qos_data.def_qos_parm.ac[i].cw_max =
1983 cpu_to_le16(cw_max);
1984 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1985 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1986 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1987 }
1988 }
1989 IWL_DEBUG_QOS("set QoS to default \n");
1990
1991 spin_unlock_irqrestore(&priv->lock, flags);
1992 }
1993
1994 static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
1995 {
1996 unsigned long flags;
1997
1998 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1999 return;
2000
2001 if (!priv->qos_data.qos_enable)
2002 return;
2003
2004 spin_lock_irqsave(&priv->lock, flags);
2005 priv->qos_data.def_qos_parm.qos_flags = 0;
2006
2007 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2008 !priv->qos_data.qos_cap.q_AP.txop_request)
2009 priv->qos_data.def_qos_parm.qos_flags |=
2010 QOS_PARAM_FLG_TXOP_TYPE_MSK;
2011
2012 if (priv->qos_data.qos_active)
2013 priv->qos_data.def_qos_parm.qos_flags |=
2014 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2015
2016 spin_unlock_irqrestore(&priv->lock, flags);
2017
2018 if (force || iwl3945_is_associated(priv)) {
2019 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
2020 priv->qos_data.qos_active);
2021
2022 iwl3945_send_qos_params_command(priv,
2023 &(priv->qos_data.def_qos_parm));
2024 }
2025 }
2026
2027 #endif /* CONFIG_IWL3945_QOS */
2028 /*
2029 * Power management (not Tx power!) functions
2030 */
2031 #define MSEC_TO_USEC 1024
2032
2033 #define NOSLP __constant_cpu_to_le32(0)
2034 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
2035 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2036 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2037 __constant_cpu_to_le32(X1), \
2038 __constant_cpu_to_le32(X2), \
2039 __constant_cpu_to_le32(X3), \
2040 __constant_cpu_to_le32(X4)}
2041
2042
2043 /* default power management (not Tx power) table values */
2044 /* for tim 0-10 */
2045 static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
2046 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2047 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2048 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2049 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2050 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2051 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2052 };
2053
2054 /* for tim > 10 */
2055 static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
2056 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2057 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2058 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2059 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2060 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2061 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2062 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2063 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2064 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2065 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2066 };
2067
2068 int iwl3945_power_init_handle(struct iwl3945_priv *priv)
2069 {
2070 int rc = 0, i;
2071 struct iwl3945_power_mgr *pow_data;
2072 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
2073 u16 pci_pm;
2074
2075 IWL_DEBUG_POWER("Initialize power \n");
2076
2077 pow_data = &(priv->power_data);
2078
2079 memset(pow_data, 0, sizeof(*pow_data));
2080
2081 pow_data->active_index = IWL_POWER_RANGE_0;
2082 pow_data->dtim_val = 0xffff;
2083
2084 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2085 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2086
2087 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2088 if (rc != 0)
2089 return 0;
2090 else {
2091 struct iwl3945_powertable_cmd *cmd;
2092
2093 IWL_DEBUG_POWER("adjust power command flags\n");
2094
2095 for (i = 0; i < IWL_POWER_AC; i++) {
2096 cmd = &pow_data->pwr_range_0[i].cmd;
2097
2098 if (pci_pm & 0x1)
2099 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2100 else
2101 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2102 }
2103 }
2104 return rc;
2105 }
2106
2107 static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
2108 struct iwl3945_powertable_cmd *cmd, u32 mode)
2109 {
2110 int rc = 0, i;
2111 u8 skip;
2112 u32 max_sleep = 0;
2113 struct iwl3945_power_vec_entry *range;
2114 u8 period = 0;
2115 struct iwl3945_power_mgr *pow_data;
2116
2117 if (mode > IWL_POWER_INDEX_5) {
2118 IWL_DEBUG_POWER("Error invalid power mode \n");
2119 return -1;
2120 }
2121 pow_data = &(priv->power_data);
2122
2123 if (pow_data->active_index == IWL_POWER_RANGE_0)
2124 range = &pow_data->pwr_range_0[0];
2125 else
2126 range = &pow_data->pwr_range_1[1];
2127
2128 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
2129
2130 #ifdef IWL_MAC80211_DISABLE
2131 if (priv->assoc_network != NULL) {
2132 unsigned long flags;
2133
2134 period = priv->assoc_network->tim.tim_period;
2135 }
2136 #endif /*IWL_MAC80211_DISABLE */
2137 skip = range[mode].no_dtim;
2138
2139 if (period == 0) {
2140 period = 1;
2141 skip = 0;
2142 }
2143
2144 if (skip == 0) {
2145 max_sleep = period;
2146 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2147 } else {
2148 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2149 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2150 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2151 }
2152
2153 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2154 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2155 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2156 }
2157
2158 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2159 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2160 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2161 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2162 le32_to_cpu(cmd->sleep_interval[0]),
2163 le32_to_cpu(cmd->sleep_interval[1]),
2164 le32_to_cpu(cmd->sleep_interval[2]),
2165 le32_to_cpu(cmd->sleep_interval[3]),
2166 le32_to_cpu(cmd->sleep_interval[4]));
2167
2168 return rc;
2169 }
2170
2171 static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
2172 {
2173 u32 uninitialized_var(final_mode);
2174 int rc;
2175 struct iwl3945_powertable_cmd cmd;
2176
2177 /* If on battery, set to 3,
2178 * if plugged into AC power, set to CAM ("continuously aware mode"),
2179 * else user level */
2180 switch (mode) {
2181 case IWL_POWER_BATTERY:
2182 final_mode = IWL_POWER_INDEX_3;
2183 break;
2184 case IWL_POWER_AC:
2185 final_mode = IWL_POWER_MODE_CAM;
2186 break;
2187 default:
2188 final_mode = mode;
2189 break;
2190 }
2191
2192 iwl3945_update_power_cmd(priv, &cmd, final_mode);
2193
2194 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2195
2196 if (final_mode == IWL_POWER_MODE_CAM)
2197 clear_bit(STATUS_POWER_PMI, &priv->status);
2198 else
2199 set_bit(STATUS_POWER_PMI, &priv->status);
2200
2201 return rc;
2202 }
2203
2204 int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
2205 {
2206 /* Filter incoming packets to determine if they are targeted toward
2207 * this network, discarding packets coming from ourselves */
2208 switch (priv->iw_mode) {
2209 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2210 /* packets from our adapter are dropped (echo) */
2211 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2212 return 0;
2213 /* {broad,multi}cast packets to our IBSS go through */
2214 if (is_multicast_ether_addr(header->addr1))
2215 return !compare_ether_addr(header->addr3, priv->bssid);
2216 /* packets to our adapter go through */
2217 return !compare_ether_addr(header->addr1, priv->mac_addr);
2218 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2219 /* packets from our adapter are dropped (echo) */
2220 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2221 return 0;
2222 /* {broad,multi}cast packets to our BSS go through */
2223 if (is_multicast_ether_addr(header->addr1))
2224 return !compare_ether_addr(header->addr2, priv->bssid);
2225 /* packets to our adapter go through */
2226 return !compare_ether_addr(header->addr1, priv->mac_addr);
2227 }
2228
2229 return 1;
2230 }
2231
2232 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2233
2234 static const char *iwl3945_get_tx_fail_reason(u32 status)
2235 {
2236 switch (status & TX_STATUS_MSK) {
2237 case TX_STATUS_SUCCESS:
2238 return "SUCCESS";
2239 TX_STATUS_ENTRY(SHORT_LIMIT);
2240 TX_STATUS_ENTRY(LONG_LIMIT);
2241 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2242 TX_STATUS_ENTRY(MGMNT_ABORT);
2243 TX_STATUS_ENTRY(NEXT_FRAG);
2244 TX_STATUS_ENTRY(LIFE_EXPIRE);
2245 TX_STATUS_ENTRY(DEST_PS);
2246 TX_STATUS_ENTRY(ABORTED);
2247 TX_STATUS_ENTRY(BT_RETRY);
2248 TX_STATUS_ENTRY(STA_INVALID);
2249 TX_STATUS_ENTRY(FRAG_DROPPED);
2250 TX_STATUS_ENTRY(TID_DISABLE);
2251 TX_STATUS_ENTRY(FRAME_FLUSHED);
2252 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2253 TX_STATUS_ENTRY(TX_LOCKED);
2254 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2255 }
2256
2257 return "UNKNOWN";
2258 }
2259
2260 /**
2261 * iwl3945_scan_cancel - Cancel any currently executing HW scan
2262 *
2263 * NOTE: priv->mutex is not required before calling this function
2264 */
2265 static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
2266 {
2267 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2268 clear_bit(STATUS_SCANNING, &priv->status);
2269 return 0;
2270 }
2271
2272 if (test_bit(STATUS_SCANNING, &priv->status)) {
2273 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2274 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2275 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2276 queue_work(priv->workqueue, &priv->abort_scan);
2277
2278 } else
2279 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2280
2281 return test_bit(STATUS_SCANNING, &priv->status);
2282 }
2283
2284 return 0;
2285 }
2286
2287 /**
2288 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2289 * @ms: amount of time to wait (in milliseconds) for scan to abort
2290 *
2291 * NOTE: priv->mutex must be held before calling this function
2292 */
2293 static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2294 {
2295 unsigned long now = jiffies;
2296 int ret;
2297
2298 ret = iwl3945_scan_cancel(priv);
2299 if (ret && ms) {
2300 mutex_unlock(&priv->mutex);
2301 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2302 test_bit(STATUS_SCANNING, &priv->status))
2303 msleep(1);
2304 mutex_lock(&priv->mutex);
2305
2306 return test_bit(STATUS_SCANNING, &priv->status);
2307 }
2308
2309 return ret;
2310 }
2311
2312 static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
2313 {
2314 /* Reset ieee stats */
2315
2316 /* We don't reset the net_device_stats (ieee->stats) on
2317 * re-association */
2318
2319 priv->last_seq_num = -1;
2320 priv->last_frag_num = -1;
2321 priv->last_packet_time = 0;
2322
2323 iwl3945_scan_cancel(priv);
2324 }
2325
2326 #define MAX_UCODE_BEACON_INTERVAL 1024
2327 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2328
2329 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2330 {
2331 u16 new_val = 0;
2332 u16 beacon_factor = 0;
2333
2334 beacon_factor =
2335 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2336 / MAX_UCODE_BEACON_INTERVAL;
2337 new_val = beacon_val / beacon_factor;
2338
2339 return cpu_to_le16(new_val);
2340 }
2341
2342 static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2343 {
2344 u64 interval_tm_unit;
2345 u64 tsf, result;
2346 unsigned long flags;
2347 struct ieee80211_conf *conf = NULL;
2348 u16 beacon_int = 0;
2349
2350 conf = ieee80211_get_hw_conf(priv->hw);
2351
2352 spin_lock_irqsave(&priv->lock, flags);
2353 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2354 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2355
2356 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2357
2358 tsf = priv->timestamp1;
2359 tsf = ((tsf << 32) | priv->timestamp0);
2360
2361 beacon_int = priv->beacon_int;
2362 spin_unlock_irqrestore(&priv->lock, flags);
2363
2364 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2365 if (beacon_int == 0) {
2366 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2367 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2368 } else {
2369 priv->rxon_timing.beacon_interval =
2370 cpu_to_le16(beacon_int);
2371 priv->rxon_timing.beacon_interval =
2372 iwl3945_adjust_beacon_interval(
2373 le16_to_cpu(priv->rxon_timing.beacon_interval));
2374 }
2375
2376 priv->rxon_timing.atim_window = 0;
2377 } else {
2378 priv->rxon_timing.beacon_interval =
2379 iwl3945_adjust_beacon_interval(conf->beacon_int);
2380 /* TODO: we need to get atim_window from upper stack
2381 * for now we set to 0 */
2382 priv->rxon_timing.atim_window = 0;
2383 }
2384
2385 interval_tm_unit =
2386 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2387 result = do_div(tsf, interval_tm_unit);
2388 priv->rxon_timing.beacon_init_val =
2389 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2390
2391 IWL_DEBUG_ASSOC
2392 ("beacon interval %d beacon timer %d beacon tim %d\n",
2393 le16_to_cpu(priv->rxon_timing.beacon_interval),
2394 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2395 le16_to_cpu(priv->rxon_timing.atim_window));
2396 }
2397
2398 static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2399 {
2400 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2401 IWL_ERROR("APs don't scan.\n");
2402 return 0;
2403 }
2404
2405 if (!iwl3945_is_ready_rf(priv)) {
2406 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2407 return -EIO;
2408 }
2409
2410 if (test_bit(STATUS_SCANNING, &priv->status)) {
2411 IWL_DEBUG_SCAN("Scan already in progress.\n");
2412 return -EAGAIN;
2413 }
2414
2415 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2416 IWL_DEBUG_SCAN("Scan request while abort pending. "
2417 "Queuing.\n");
2418 return -EAGAIN;
2419 }
2420
2421 IWL_DEBUG_INFO("Starting scan...\n");
2422 priv->scan_bands = 2;
2423 set_bit(STATUS_SCANNING, &priv->status);
2424 priv->scan_start = jiffies;
2425 priv->scan_pass_start = priv->scan_start;
2426
2427 queue_work(priv->workqueue, &priv->request_scan);
2428
2429 return 0;
2430 }
2431
2432 static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2433 {
2434 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2435
2436 if (hw_decrypt)
2437 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2438 else
2439 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2440
2441 return 0;
2442 }
2443
2444 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode)
2445 {
2446 if (phymode == MODE_IEEE80211A) {
2447 priv->staging_rxon.flags &=
2448 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2449 | RXON_FLG_CCK_MSK);
2450 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2451 } else {
2452 /* Copied from iwl3945_bg_post_associate() */
2453 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2454 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2455 else
2456 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2457
2458 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2459 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2460
2461 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2462 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2463 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2464 }
2465 }
2466
2467 /*
2468 * initialize rxon structure with default values from eeprom
2469 */
2470 static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
2471 {
2472 const struct iwl3945_channel_info *ch_info;
2473
2474 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2475
2476 switch (priv->iw_mode) {
2477 case IEEE80211_IF_TYPE_AP:
2478 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2479 break;
2480
2481 case IEEE80211_IF_TYPE_STA:
2482 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2483 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2484 break;
2485
2486 case IEEE80211_IF_TYPE_IBSS:
2487 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2488 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2489 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2490 RXON_FILTER_ACCEPT_GRP_MSK;
2491 break;
2492
2493 case IEEE80211_IF_TYPE_MNTR:
2494 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2495 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2496 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2497 break;
2498 }
2499
2500 #if 0
2501 /* TODO: Figure out when short_preamble would be set and cache from
2502 * that */
2503 if (!hw_to_local(priv->hw)->short_preamble)
2504 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2505 else
2506 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2507 #endif
2508
2509 ch_info = iwl3945_get_channel_info(priv, priv->phymode,
2510 le16_to_cpu(priv->staging_rxon.channel));
2511
2512 if (!ch_info)
2513 ch_info = &priv->channel_info[0];
2514
2515 /*
2516 * in some case A channels are all non IBSS
2517 * in this case force B/G channel
2518 */
2519 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2520 !(is_channel_ibss(ch_info)))
2521 ch_info = &priv->channel_info[0];
2522
2523 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2524 if (is_channel_a_band(ch_info))
2525 priv->phymode = MODE_IEEE80211A;
2526 else
2527 priv->phymode = MODE_IEEE80211G;
2528
2529 iwl3945_set_flags_for_phymode(priv, priv->phymode);
2530
2531 priv->staging_rxon.ofdm_basic_rates =
2532 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2533 priv->staging_rxon.cck_basic_rates =
2534 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2535 }
2536
2537 static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2538 {
2539 if (mode == IEEE80211_IF_TYPE_IBSS) {
2540 const struct iwl3945_channel_info *ch_info;
2541
2542 ch_info = iwl3945_get_channel_info(priv,
2543 priv->phymode,
2544 le16_to_cpu(priv->staging_rxon.channel));
2545
2546 if (!ch_info || !is_channel_ibss(ch_info)) {
2547 IWL_ERROR("channel %d not IBSS channel\n",
2548 le16_to_cpu(priv->staging_rxon.channel));
2549 return -EINVAL;
2550 }
2551 }
2552
2553 priv->iw_mode = mode;
2554
2555 iwl3945_connection_init_rx_config(priv);
2556 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2557
2558 iwl3945_clear_stations_table(priv);
2559
2560 /* dont commit rxon if rf-kill is on*/
2561 if (!iwl3945_is_ready_rf(priv))
2562 return -EAGAIN;
2563
2564 cancel_delayed_work(&priv->scan_check);
2565 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2566 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2567 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2568 return -EAGAIN;
2569 }
2570
2571 iwl3945_commit_rxon(priv);
2572
2573 return 0;
2574 }
2575
2576 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2577 struct ieee80211_tx_control *ctl,
2578 struct iwl3945_cmd *cmd,
2579 struct sk_buff *skb_frag,
2580 int last_frag)
2581 {
2582 struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
2583
2584 switch (keyinfo->alg) {
2585 case ALG_CCMP:
2586 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2587 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2588 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2589 break;
2590
2591 case ALG_TKIP:
2592 #if 0
2593 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2594
2595 if (last_frag)
2596 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2597 8);
2598 else
2599 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2600 #endif
2601 break;
2602
2603 case ALG_WEP:
2604 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2605 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2606
2607 if (keyinfo->keylen == 13)
2608 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2609
2610 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2611
2612 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2613 "with key %d\n", ctl->key_idx);
2614 break;
2615
2616 default:
2617 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2618 break;
2619 }
2620 }
2621
2622 /*
2623 * handle build REPLY_TX command notification.
2624 */
2625 static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2626 struct iwl3945_cmd *cmd,
2627 struct ieee80211_tx_control *ctrl,
2628 struct ieee80211_hdr *hdr,
2629 int is_unicast, u8 std_id)
2630 {
2631 __le16 *qc;
2632 u16 fc = le16_to_cpu(hdr->frame_control);
2633 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2634
2635 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2636 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2637 tx_flags |= TX_CMD_FLG_ACK_MSK;
2638 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2639 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2640 if (ieee80211_is_probe_response(fc) &&
2641 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2642 tx_flags |= TX_CMD_FLG_TSF_MSK;
2643 } else {
2644 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2645 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2646 }
2647
2648 cmd->cmd.tx.sta_id = std_id;
2649 if (ieee80211_get_morefrag(hdr))
2650 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2651
2652 qc = ieee80211_get_qos_ctrl(hdr);
2653 if (qc) {
2654 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2655 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2656 } else
2657 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2658
2659 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2660 tx_flags |= TX_CMD_FLG_RTS_MSK;
2661 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2662 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2663 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2664 tx_flags |= TX_CMD_FLG_CTS_MSK;
2665 }
2666
2667 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2668 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2669
2670 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2671 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2672 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2673 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
2674 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2675 else
2676 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2677 } else
2678 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2679
2680 cmd->cmd.tx.driver_txop = 0;
2681 cmd->cmd.tx.tx_flags = tx_flags;
2682 cmd->cmd.tx.next_frame_len = 0;
2683 }
2684
2685 /**
2686 * iwl3945_get_sta_id - Find station's index within station table
2687 */
2688 static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2689 {
2690 int sta_id;
2691 u16 fc = le16_to_cpu(hdr->frame_control);
2692
2693 /* If this frame is broadcast or management, use broadcast station id */
2694 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2695 is_multicast_ether_addr(hdr->addr1))
2696 return priv->hw_setting.bcast_sta_id;
2697
2698 switch (priv->iw_mode) {
2699
2700 /* If we are a client station in a BSS network, use the special
2701 * AP station entry (that's the only station we communicate with) */
2702 case IEEE80211_IF_TYPE_STA:
2703 return IWL_AP_ID;
2704
2705 /* If we are an AP, then find the station, or use BCAST */
2706 case IEEE80211_IF_TYPE_AP:
2707 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2708 if (sta_id != IWL_INVALID_STATION)
2709 return sta_id;
2710 return priv->hw_setting.bcast_sta_id;
2711
2712 /* If this frame is going out to an IBSS network, find the station,
2713 * or create a new station table entry */
2714 case IEEE80211_IF_TYPE_IBSS: {
2715 DECLARE_MAC_BUF(mac);
2716
2717 /* Create new station table entry */
2718 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2719 if (sta_id != IWL_INVALID_STATION)
2720 return sta_id;
2721
2722 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2723
2724 if (sta_id != IWL_INVALID_STATION)
2725 return sta_id;
2726
2727 IWL_DEBUG_DROP("Station %s not in station map. "
2728 "Defaulting to broadcast...\n",
2729 print_mac(mac, hdr->addr1));
2730 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2731 return priv->hw_setting.bcast_sta_id;
2732 }
2733 default:
2734 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2735 return priv->hw_setting.bcast_sta_id;
2736 }
2737 }
2738
2739 /*
2740 * start REPLY_TX command process
2741 */
2742 static int iwl3945_tx_skb(struct iwl3945_priv *priv,
2743 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2744 {
2745 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2746 struct iwl3945_tfd_frame *tfd;
2747 u32 *control_flags;
2748 int txq_id = ctl->queue;
2749 struct iwl3945_tx_queue *txq = NULL;
2750 struct iwl3945_queue *q = NULL;
2751 dma_addr_t phys_addr;
2752 dma_addr_t txcmd_phys;
2753 struct iwl3945_cmd *out_cmd = NULL;
2754 u16 len, idx, len_org;
2755 u8 id, hdr_len, unicast;
2756 u8 sta_id;
2757 u16 seq_number = 0;
2758 u16 fc;
2759 __le16 *qc;
2760 u8 wait_write_ptr = 0;
2761 unsigned long flags;
2762 int rc;
2763
2764 spin_lock_irqsave(&priv->lock, flags);
2765 if (iwl3945_is_rfkill(priv)) {
2766 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2767 goto drop_unlock;
2768 }
2769
2770 if (!priv->vif) {
2771 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
2772 goto drop_unlock;
2773 }
2774
2775 if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2776 IWL_ERROR("ERROR: No TX rate available.\n");
2777 goto drop_unlock;
2778 }
2779
2780 unicast = !is_multicast_ether_addr(hdr->addr1);
2781 id = 0;
2782
2783 fc = le16_to_cpu(hdr->frame_control);
2784
2785 #ifdef CONFIG_IWL3945_DEBUG
2786 if (ieee80211_is_auth(fc))
2787 IWL_DEBUG_TX("Sending AUTH frame\n");
2788 else if (ieee80211_is_assoc_request(fc))
2789 IWL_DEBUG_TX("Sending ASSOC frame\n");
2790 else if (ieee80211_is_reassoc_request(fc))
2791 IWL_DEBUG_TX("Sending REASSOC frame\n");
2792 #endif
2793
2794 /* drop all data frame if we are not associated */
2795 if (!iwl3945_is_associated(priv) && !priv->assoc_id &&
2796 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
2797 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2798 goto drop_unlock;
2799 }
2800
2801 spin_unlock_irqrestore(&priv->lock, flags);
2802
2803 hdr_len = ieee80211_get_hdrlen(fc);
2804
2805 /* Find (or create) index into station table for destination station */
2806 sta_id = iwl3945_get_sta_id(priv, hdr);
2807 if (sta_id == IWL_INVALID_STATION) {
2808 DECLARE_MAC_BUF(mac);
2809
2810 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2811 print_mac(mac, hdr->addr1));
2812 goto drop;
2813 }
2814
2815 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2816
2817 qc = ieee80211_get_qos_ctrl(hdr);
2818 if (qc) {
2819 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2820 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2821 IEEE80211_SCTL_SEQ;
2822 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2823 (hdr->seq_ctrl &
2824 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2825 seq_number += 0x10;
2826 }
2827
2828 /* Descriptor for chosen Tx queue */
2829 txq = &priv->txq[txq_id];
2830 q = &txq->q;
2831
2832 spin_lock_irqsave(&priv->lock, flags);
2833
2834 /* Set up first empty TFD within this queue's circular TFD buffer */
2835 tfd = &txq->bd[q->write_ptr];
2836 memset(tfd, 0, sizeof(*tfd));
2837 control_flags = (u32 *) tfd;
2838 idx = get_cmd_index(q, q->write_ptr, 0);
2839
2840 /* Set up driver data for this TFD */
2841 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2842 txq->txb[q->write_ptr].skb[0] = skb;
2843 memcpy(&(txq->txb[q->write_ptr].status.control),
2844 ctl, sizeof(struct ieee80211_tx_control));
2845
2846 /* Init first empty entry in queue's array of Tx/cmd buffers */
2847 out_cmd = &txq->cmd[idx];
2848 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2849 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2850
2851 /*
2852 * Set up the Tx-command (not MAC!) header.
2853 * Store the chosen Tx queue and TFD index within the sequence field;
2854 * after Tx, uCode's Tx response will return this value so driver can
2855 * locate the frame within the tx queue and do post-tx processing.
2856 */
2857 out_cmd->hdr.cmd = REPLY_TX;
2858 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2859 INDEX_TO_SEQ(q->write_ptr)));
2860
2861 /* Copy MAC header from skb into command buffer */
2862 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2863
2864 /*
2865 * Use the first empty entry in this queue's command buffer array
2866 * to contain the Tx command and MAC header concatenated together
2867 * (payload data will be in another buffer).
2868 * Size of this varies, due to varying MAC header length.
2869 * If end is not dword aligned, we'll have 2 extra bytes at the end
2870 * of the MAC header (device reads on dword boundaries).
2871 * We'll tell device about this padding later.
2872 */
2873 len = priv->hw_setting.tx_cmd_len +
2874 sizeof(struct iwl3945_cmd_header) + hdr_len;
2875
2876 len_org = len;
2877 len = (len + 3) & ~3;
2878
2879 if (len_org != len)
2880 len_org = 1;
2881 else
2882 len_org = 0;
2883
2884 /* Physical address of this Tx command's header (not MAC header!),
2885 * within command buffer array. */
2886 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2887 offsetof(struct iwl3945_cmd, hdr);
2888
2889 /* Add buffer containing Tx command and MAC(!) header to TFD's
2890 * first entry */
2891 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2892
2893 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
2894 iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
2895
2896 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2897 * if any (802.11 null frames have no payload). */
2898 len = skb->len - hdr_len;
2899 if (len) {
2900 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2901 len, PCI_DMA_TODEVICE);
2902 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2903 }
2904
2905 if (!len)
2906 /* If there is no payload, then we use only one Tx buffer */
2907 *control_flags = TFD_CTL_COUNT_SET(1);
2908 else
2909 /* Else use 2 buffers.
2910 * Tell 3945 about any padding after MAC header */
2911 *control_flags = TFD_CTL_COUNT_SET(2) |
2912 TFD_CTL_PAD_SET(U32_PAD(len));
2913
2914 /* Total # bytes to be transmitted */
2915 len = (u16)skb->len;
2916 out_cmd->cmd.tx.len = cpu_to_le16(len);
2917
2918 /* TODO need this for burst mode later on */
2919 iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
2920
2921 /* set is_hcca to 0; it probably will never be implemented */
2922 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
2923
2924 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2925 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2926
2927 if (!ieee80211_get_morefrag(hdr)) {
2928 txq->need_update = 1;
2929 if (qc) {
2930 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2931 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2932 }
2933 } else {
2934 wait_write_ptr = 1;
2935 txq->need_update = 0;
2936 }
2937
2938 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
2939 sizeof(out_cmd->cmd.tx));
2940
2941 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2942 ieee80211_get_hdrlen(fc));
2943
2944 /* Tell device the write index *just past* this latest filled TFD */
2945 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
2946 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2947 spin_unlock_irqrestore(&priv->lock, flags);
2948
2949 if (rc)
2950 return rc;
2951
2952 if ((iwl3945_queue_space(q) < q->high_mark)
2953 && priv->mac80211_registered) {
2954 if (wait_write_ptr) {
2955 spin_lock_irqsave(&priv->lock, flags);
2956 txq->need_update = 1;
2957 iwl3945_tx_queue_update_write_ptr(priv, txq);
2958 spin_unlock_irqrestore(&priv->lock, flags);
2959 }
2960
2961 ieee80211_stop_queue(priv->hw, ctl->queue);
2962 }
2963
2964 return 0;
2965
2966 drop_unlock:
2967 spin_unlock_irqrestore(&priv->lock, flags);
2968 drop:
2969 return -1;
2970 }
2971
2972 static void iwl3945_set_rate(struct iwl3945_priv *priv)
2973 {
2974 const struct ieee80211_hw_mode *hw = NULL;
2975 struct ieee80211_rate *rate;
2976 int i;
2977
2978 hw = iwl3945_get_hw_mode(priv, priv->phymode);
2979 if (!hw) {
2980 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2981 return;
2982 }
2983
2984 priv->active_rate = 0;
2985 priv->active_rate_basic = 0;
2986
2987 IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
2988 hw->mode == MODE_IEEE80211A ?
2989 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
2990
2991 for (i = 0; i < hw->num_rates; i++) {
2992 rate = &(hw->rates[i]);
2993 if ((rate->val < IWL_RATE_COUNT) &&
2994 (rate->flags & IEEE80211_RATE_SUPPORTED)) {
2995 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
2996 rate->val, iwl3945_rates[rate->val].plcp,
2997 (rate->flags & IEEE80211_RATE_BASIC) ?
2998 "*" : "");
2999 priv->active_rate |= (1 << rate->val);
3000 if (rate->flags & IEEE80211_RATE_BASIC)
3001 priv->active_rate_basic |= (1 << rate->val);
3002 } else
3003 IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
3004 rate->val, iwl3945_rates[rate->val].plcp);
3005 }
3006
3007 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3008 priv->active_rate, priv->active_rate_basic);
3009
3010 /*
3011 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3012 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3013 * OFDM
3014 */
3015 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3016 priv->staging_rxon.cck_basic_rates =
3017 ((priv->active_rate_basic &
3018 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3019 else
3020 priv->staging_rxon.cck_basic_rates =
3021 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3022
3023 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3024 priv->staging_rxon.ofdm_basic_rates =
3025 ((priv->active_rate_basic &
3026 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3027 IWL_FIRST_OFDM_RATE) & 0xFF;
3028 else
3029 priv->staging_rxon.ofdm_basic_rates =
3030 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3031 }
3032
3033 static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
3034 {
3035 unsigned long flags;
3036
3037 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3038 return;
3039
3040 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3041 disable_radio ? "OFF" : "ON");
3042
3043 if (disable_radio) {
3044 iwl3945_scan_cancel(priv);
3045 /* FIXME: This is a workaround for AP */
3046 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3047 spin_lock_irqsave(&priv->lock, flags);
3048 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3049 CSR_UCODE_SW_BIT_RFKILL);
3050 spin_unlock_irqrestore(&priv->lock, flags);
3051 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
3052 set_bit(STATUS_RF_KILL_SW, &priv->status);
3053 }
3054 return;
3055 }
3056
3057 spin_lock_irqsave(&priv->lock, flags);
3058 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3059
3060 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3061 spin_unlock_irqrestore(&priv->lock, flags);
3062
3063 /* wake up ucode */
3064 msleep(10);
3065
3066 spin_lock_irqsave(&priv->lock, flags);
3067 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3068 if (!iwl3945_grab_nic_access(priv))
3069 iwl3945_release_nic_access(priv);
3070 spin_unlock_irqrestore(&priv->lock, flags);
3071
3072 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3073 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3074 "disabled by HW switch\n");
3075 return;
3076 }
3077
3078 queue_work(priv->workqueue, &priv->restart);
3079 return;
3080 }
3081
3082 void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
3083 u32 decrypt_res, struct ieee80211_rx_status *stats)
3084 {
3085 u16 fc =
3086 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3087
3088 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3089 return;
3090
3091 if (!(fc & IEEE80211_FCTL_PROTECTED))
3092 return;
3093
3094 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3095 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3096 case RX_RES_STATUS_SEC_TYPE_TKIP:
3097 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3098 RX_RES_STATUS_BAD_ICV_MIC)
3099 stats->flag |= RX_FLAG_MMIC_ERROR;
3100 case RX_RES_STATUS_SEC_TYPE_WEP:
3101 case RX_RES_STATUS_SEC_TYPE_CCMP:
3102 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3103 RX_RES_STATUS_DECRYPT_OK) {
3104 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3105 stats->flag |= RX_FLAG_DECRYPTED;
3106 }
3107 break;
3108
3109 default:
3110 break;
3111 }
3112 }
3113
3114 #define IWL_PACKET_RETRY_TIME HZ
3115
3116 int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
3117 {
3118 u16 sc = le16_to_cpu(header->seq_ctrl);
3119 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3120 u16 frag = sc & IEEE80211_SCTL_FRAG;
3121 u16 *last_seq, *last_frag;
3122 unsigned long *last_time;
3123
3124 switch (priv->iw_mode) {
3125 case IEEE80211_IF_TYPE_IBSS:{
3126 struct list_head *p;
3127 struct iwl3945_ibss_seq *entry = NULL;
3128 u8 *mac = header->addr2;
3129 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3130
3131 __list_for_each(p, &priv->ibss_mac_hash[index]) {
3132 entry = list_entry(p, struct iwl3945_ibss_seq, list);
3133 if (!compare_ether_addr(entry->mac, mac))
3134 break;
3135 }
3136 if (p == &priv->ibss_mac_hash[index]) {
3137 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3138 if (!entry) {
3139 IWL_ERROR("Cannot malloc new mac entry\n");
3140 return 0;
3141 }
3142 memcpy(entry->mac, mac, ETH_ALEN);
3143 entry->seq_num = seq;
3144 entry->frag_num = frag;
3145 entry->packet_time = jiffies;
3146 list_add(&entry->list, &priv->ibss_mac_hash[index]);
3147 return 0;
3148 }
3149 last_seq = &entry->seq_num;
3150 last_frag = &entry->frag_num;
3151 last_time = &entry->packet_time;
3152 break;
3153 }
3154 case IEEE80211_IF_TYPE_STA:
3155 last_seq = &priv->last_seq_num;
3156 last_frag = &priv->last_frag_num;
3157 last_time = &priv->last_packet_time;
3158 break;
3159 default:
3160 return 0;
3161 }
3162 if ((*last_seq == seq) &&
3163 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3164 if (*last_frag == frag)
3165 goto drop;
3166 if (*last_frag + 1 != frag)
3167 /* out-of-order fragment */
3168 goto drop;
3169 } else
3170 *last_seq = seq;
3171
3172 *last_frag = frag;
3173 *last_time = jiffies;
3174 return 0;
3175
3176 drop:
3177 return 1;
3178 }
3179
3180 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3181
3182 #include "iwl-spectrum.h"
3183
3184 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
3185 #define BEACON_TIME_MASK_HIGH 0xFF000000
3186 #define TIME_UNIT 1024
3187
3188 /*
3189 * extended beacon time format
3190 * time in usec will be changed into a 32-bit value in 8:24 format
3191 * the high 1 byte is the beacon counts
3192 * the lower 3 bytes is the time in usec within one beacon interval
3193 */
3194
3195 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
3196 {
3197 u32 quot;
3198 u32 rem;
3199 u32 interval = beacon_interval * 1024;
3200
3201 if (!interval || !usec)
3202 return 0;
3203
3204 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3205 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3206
3207 return (quot << 24) + rem;
3208 }
3209
3210 /* base is usually what we get from ucode with each received frame,
3211 * the same as HW timer counter counting down
3212 */
3213
3214 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
3215 {
3216 u32 base_low = base & BEACON_TIME_MASK_LOW;
3217 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3218 u32 interval = beacon_interval * TIME_UNIT;
3219 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3220 (addon & BEACON_TIME_MASK_HIGH);
3221
3222 if (base_low > addon_low)
3223 res += base_low - addon_low;
3224 else if (base_low < addon_low) {
3225 res += interval + base_low - addon_low;
3226 res += (1 << 24);
3227 } else
3228 res += (1 << 24);
3229
3230 return cpu_to_le32(res);
3231 }
3232
3233 static int iwl3945_get_measurement(struct iwl3945_priv *priv,
3234 struct ieee80211_measurement_params *params,
3235 u8 type)
3236 {
3237 struct iwl3945_spectrum_cmd spectrum;
3238 struct iwl3945_rx_packet *res;
3239 struct iwl3945_host_cmd cmd = {
3240 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3241 .data = (void *)&spectrum,
3242 .meta.flags = CMD_WANT_SKB,
3243 };
3244 u32 add_time = le64_to_cpu(params->start_time);
3245 int rc;
3246 int spectrum_resp_status;
3247 int duration = le16_to_cpu(params->duration);
3248
3249 if (iwl3945_is_associated(priv))
3250 add_time =
3251 iwl3945_usecs_to_beacons(
3252 le64_to_cpu(params->start_time) - priv->last_tsf,
3253 le16_to_cpu(priv->rxon_timing.beacon_interval));
3254
3255 memset(&spectrum, 0, sizeof(spectrum));
3256
3257 spectrum.channel_count = cpu_to_le16(1);
3258 spectrum.flags =
3259 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3260 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3261 cmd.len = sizeof(spectrum);
3262 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3263
3264 if (iwl3945_is_associated(priv))
3265 spectrum.start_time =
3266 iwl3945_add_beacon_time(priv->last_beacon_time,
3267 add_time,
3268 le16_to_cpu(priv->rxon_timing.beacon_interval));
3269 else
3270 spectrum.start_time = 0;
3271
3272 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3273 spectrum.channels[0].channel = params->channel;
3274 spectrum.channels[0].type = type;
3275 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3276 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3277 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3278
3279 rc = iwl3945_send_cmd_sync(priv, &cmd);
3280 if (rc)
3281 return rc;
3282
3283 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
3284 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3285 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3286 rc = -EIO;
3287 }
3288
3289 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3290 switch (spectrum_resp_status) {
3291 case 0: /* Command will be handled */
3292 if (res->u.spectrum.id != 0xff) {
3293 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3294 res->u.spectrum.id);
3295 priv->measurement_status &= ~MEASUREMENT_READY;
3296 }
3297 priv->measurement_status |= MEASUREMENT_ACTIVE;
3298 rc = 0;
3299 break;
3300
3301 case 1: /* Command will not be handled */
3302 rc = -EAGAIN;
3303 break;
3304 }
3305
3306 dev_kfree_skb_any(cmd.meta.u.skb);
3307
3308 return rc;
3309 }
3310 #endif
3311
3312 static void iwl3945_txstatus_to_ieee(struct iwl3945_priv *priv,
3313 struct iwl3945_tx_info *tx_sta)
3314 {
3315
3316 tx_sta->status.ack_signal = 0;
3317 tx_sta->status.excessive_retries = 0;
3318 tx_sta->status.queue_length = 0;
3319 tx_sta->status.queue_number = 0;
3320
3321 if (in_interrupt())
3322 ieee80211_tx_status_irqsafe(priv->hw,
3323 tx_sta->skb[0], &(tx_sta->status));
3324 else
3325 ieee80211_tx_status(priv->hw,
3326 tx_sta->skb[0], &(tx_sta->status));
3327
3328 tx_sta->skb[0] = NULL;
3329 }
3330
3331 /**
3332 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
3333 *
3334 * When FW advances 'R' index, all entries between old and new 'R' index
3335 * need to be reclaimed. As result, some free space forms. If there is
3336 * enough free space (> low mark), wake the stack that feeds us.
3337 */
3338 static int iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, int txq_id, int index)
3339 {
3340 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3341 struct iwl3945_queue *q = &txq->q;
3342 int nfreed = 0;
3343
3344 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3345 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3346 "is out of range [0-%d] %d %d.\n", txq_id,
3347 index, q->n_bd, q->write_ptr, q->read_ptr);
3348 return 0;
3349 }
3350
3351 for (index = iwl3945_queue_inc_wrap(index, q->n_bd);
3352 q->read_ptr != index;
3353 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3354 if (txq_id != IWL_CMD_QUEUE_NUM) {
3355 iwl3945_txstatus_to_ieee(priv,
3356 &(txq->txb[txq->q.read_ptr]));
3357 iwl3945_hw_txq_free_tfd(priv, txq);
3358 } else if (nfreed > 1) {
3359 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3360 q->write_ptr, q->read_ptr);
3361 queue_work(priv->workqueue, &priv->restart);
3362 }
3363 nfreed++;
3364 }
3365
3366 if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
3367 (txq_id != IWL_CMD_QUEUE_NUM) &&
3368 priv->mac80211_registered)
3369 ieee80211_wake_queue(priv->hw, txq_id);
3370
3371
3372 return nfreed;
3373 }
3374
3375 static int iwl3945_is_tx_success(u32 status)
3376 {
3377 return (status & 0xFF) == 0x1;
3378 }
3379
3380 /******************************************************************************
3381 *
3382 * Generic RX handler implementations
3383 *
3384 ******************************************************************************/
3385 /**
3386 * iwl3945_rx_reply_tx - Handle Tx response
3387 */
3388 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
3389 struct iwl3945_rx_mem_buffer *rxb)
3390 {
3391 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3392 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3393 int txq_id = SEQ_TO_QUEUE(sequence);
3394 int index = SEQ_TO_INDEX(sequence);
3395 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3396 struct ieee80211_tx_status *tx_status;
3397 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3398 u32 status = le32_to_cpu(tx_resp->status);
3399
3400 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3401 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3402 "is out of range [0-%d] %d %d\n", txq_id,
3403 index, txq->q.n_bd, txq->q.write_ptr,
3404 txq->q.read_ptr);
3405 return;
3406 }
3407
3408 tx_status = &(txq->txb[txq->q.read_ptr].status);
3409
3410 tx_status->retry_count = tx_resp->failure_frame;
3411 tx_status->queue_number = status;
3412 tx_status->queue_length = tx_resp->bt_kill_count;
3413 tx_status->queue_length |= tx_resp->failure_rts;
3414
3415 tx_status->flags =
3416 iwl3945_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
3417
3418 tx_status->control.tx_rate = iwl3945_rate_index_from_plcp(tx_resp->rate);
3419
3420 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
3421 txq_id, iwl3945_get_tx_fail_reason(status), status,
3422 tx_resp->rate, tx_resp->failure_frame);
3423
3424 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3425 if (index != -1)
3426 iwl3945_tx_queue_reclaim(priv, txq_id, index);
3427
3428 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3429 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3430 }
3431
3432
3433 static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3434 struct iwl3945_rx_mem_buffer *rxb)
3435 {
3436 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3437 struct iwl3945_alive_resp *palive;
3438 struct delayed_work *pwork;
3439
3440 palive = &pkt->u.alive_frame;
3441
3442 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3443 "0x%01X 0x%01X\n",
3444 palive->is_valid, palive->ver_type,
3445 palive->ver_subtype);
3446
3447 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3448 IWL_DEBUG_INFO("Initialization Alive received.\n");
3449 memcpy(&priv->card_alive_init,
3450 &pkt->u.alive_frame,
3451 sizeof(struct iwl3945_init_alive_resp));
3452 pwork = &priv->init_alive_start;
3453 } else {
3454 IWL_DEBUG_INFO("Runtime Alive received.\n");
3455 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3456 sizeof(struct iwl3945_alive_resp));
3457 pwork = &priv->alive_start;
3458 iwl3945_disable_events(priv);
3459 }
3460
3461 /* We delay the ALIVE response by 5ms to
3462 * give the HW RF Kill time to activate... */
3463 if (palive->is_valid == UCODE_VALID_OK)
3464 queue_delayed_work(priv->workqueue, pwork,
3465 msecs_to_jiffies(5));
3466 else
3467 IWL_WARNING("uCode did not respond OK.\n");
3468 }
3469
3470 static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3471 struct iwl3945_rx_mem_buffer *rxb)
3472 {
3473 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3474
3475 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3476 return;
3477 }
3478
3479 static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3480 struct iwl3945_rx_mem_buffer *rxb)
3481 {
3482 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3483
3484 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3485 "seq 0x%04X ser 0x%08X\n",
3486 le32_to_cpu(pkt->u.err_resp.error_type),
3487 get_cmd_string(pkt->u.err_resp.cmd_id),
3488 pkt->u.err_resp.cmd_id,
3489 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3490 le32_to_cpu(pkt->u.err_resp.error_info));
3491 }
3492
3493 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3494
3495 static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3496 {
3497 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3498 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3499 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
3500 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3501 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3502 rxon->channel = csa->channel;
3503 priv->staging_rxon.channel = csa->channel;
3504 }
3505
3506 static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3507 struct iwl3945_rx_mem_buffer *rxb)
3508 {
3509 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3510 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3511 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
3512
3513 if (!report->state) {
3514 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3515 "Spectrum Measure Notification: Start\n");
3516 return;
3517 }
3518
3519 memcpy(&priv->measure_report, report, sizeof(*report));
3520 priv->measurement_status |= MEASUREMENT_READY;
3521 #endif
3522 }
3523
3524 static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3525 struct iwl3945_rx_mem_buffer *rxb)
3526 {
3527 #ifdef CONFIG_IWL3945_DEBUG
3528 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3529 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
3530 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3531 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3532 #endif
3533 }
3534
3535 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3536 struct iwl3945_rx_mem_buffer *rxb)
3537 {
3538 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3539 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3540 "notification for %s:\n",
3541 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3542 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3543 }
3544
3545 static void iwl3945_bg_beacon_update(struct work_struct *work)
3546 {
3547 struct iwl3945_priv *priv =
3548 container_of(work, struct iwl3945_priv, beacon_update);
3549 struct sk_buff *beacon;
3550
3551 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3552 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
3553
3554 if (!beacon) {
3555 IWL_ERROR("update beacon failed\n");
3556 return;
3557 }
3558
3559 mutex_lock(&priv->mutex);
3560 /* new beacon skb is allocated every time; dispose previous.*/
3561 if (priv->ibss_beacon)
3562 dev_kfree_skb(priv->ibss_beacon);
3563
3564 priv->ibss_beacon = beacon;
3565 mutex_unlock(&priv->mutex);
3566
3567 iwl3945_send_beacon_cmd(priv);
3568 }
3569
3570 static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3571 struct iwl3945_rx_mem_buffer *rxb)
3572 {
3573 #ifdef CONFIG_IWL3945_DEBUG
3574 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3575 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3576 u8 rate = beacon->beacon_notify_hdr.rate;
3577
3578 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3579 "tsf %d %d rate %d\n",
3580 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3581 beacon->beacon_notify_hdr.failure_frame,
3582 le32_to_cpu(beacon->ibss_mgr_status),
3583 le32_to_cpu(beacon->high_tsf),
3584 le32_to_cpu(beacon->low_tsf), rate);
3585 #endif
3586
3587 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3588 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3589 queue_work(priv->workqueue, &priv->beacon_update);
3590 }
3591
3592 /* Service response to REPLY_SCAN_CMD (0x80) */
3593 static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3594 struct iwl3945_rx_mem_buffer *rxb)
3595 {
3596 #ifdef CONFIG_IWL3945_DEBUG
3597 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3598 struct iwl3945_scanreq_notification *notif =
3599 (struct iwl3945_scanreq_notification *)pkt->u.raw;
3600
3601 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3602 #endif
3603 }
3604
3605 /* Service SCAN_START_NOTIFICATION (0x82) */
3606 static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3607 struct iwl3945_rx_mem_buffer *rxb)
3608 {
3609 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3610 struct iwl3945_scanstart_notification *notif =
3611 (struct iwl3945_scanstart_notification *)pkt->u.raw;
3612 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3613 IWL_DEBUG_SCAN("Scan start: "
3614 "%d [802.11%s] "
3615 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3616 notif->channel,
3617 notif->band ? "bg" : "a",
3618 notif->tsf_high,
3619 notif->tsf_low, notif->status, notif->beacon_timer);
3620 }
3621
3622 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3623 static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3624 struct iwl3945_rx_mem_buffer *rxb)
3625 {
3626 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3627 struct iwl3945_scanresults_notification *notif =
3628 (struct iwl3945_scanresults_notification *)pkt->u.raw;
3629
3630 IWL_DEBUG_SCAN("Scan ch.res: "
3631 "%d [802.11%s] "
3632 "(TSF: 0x%08X:%08X) - %d "
3633 "elapsed=%lu usec (%dms since last)\n",
3634 notif->channel,
3635 notif->band ? "bg" : "a",
3636 le32_to_cpu(notif->tsf_high),
3637 le32_to_cpu(notif->tsf_low),
3638 le32_to_cpu(notif->statistics[0]),
3639 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3640 jiffies_to_msecs(elapsed_jiffies
3641 (priv->last_scan_jiffies, jiffies)));
3642
3643 priv->last_scan_jiffies = jiffies;
3644 priv->next_scan_jiffies = 0;
3645 }
3646
3647 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3648 static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3649 struct iwl3945_rx_mem_buffer *rxb)
3650 {
3651 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3652 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3653
3654 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3655 scan_notif->scanned_channels,
3656 scan_notif->tsf_low,
3657 scan_notif->tsf_high, scan_notif->status);
3658
3659 /* The HW is no longer scanning */
3660 clear_bit(STATUS_SCAN_HW, &priv->status);
3661
3662 /* The scan completion notification came in, so kill that timer... */
3663 cancel_delayed_work(&priv->scan_check);
3664
3665 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3666 (priv->scan_bands == 2) ? "2.4" : "5.2",
3667 jiffies_to_msecs(elapsed_jiffies
3668 (priv->scan_pass_start, jiffies)));
3669
3670 /* Remove this scanned band from the list
3671 * of pending bands to scan */
3672 priv->scan_bands--;
3673
3674 /* If a request to abort was given, or the scan did not succeed
3675 * then we reset the scan state machine and terminate,
3676 * re-queuing another scan if one has been requested */
3677 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3678 IWL_DEBUG_INFO("Aborted scan completed.\n");
3679 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3680 } else {
3681 /* If there are more bands on this scan pass reschedule */
3682 if (priv->scan_bands > 0)
3683 goto reschedule;
3684 }
3685
3686 priv->last_scan_jiffies = jiffies;
3687 priv->next_scan_jiffies = 0;
3688 IWL_DEBUG_INFO("Setting scan to off\n");
3689
3690 clear_bit(STATUS_SCANNING, &priv->status);
3691
3692 IWL_DEBUG_INFO("Scan took %dms\n",
3693 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3694
3695 queue_work(priv->workqueue, &priv->scan_completed);
3696
3697 return;
3698
3699 reschedule:
3700 priv->scan_pass_start = jiffies;
3701 queue_work(priv->workqueue, &priv->request_scan);
3702 }
3703
3704 /* Handle notification from uCode that card's power state is changing
3705 * due to software, hardware, or critical temperature RFKILL */
3706 static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3707 struct iwl3945_rx_mem_buffer *rxb)
3708 {
3709 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3710 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3711 unsigned long status = priv->status;
3712
3713 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3714 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3715 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3716
3717 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3718 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3719
3720 if (flags & HW_CARD_DISABLED)
3721 set_bit(STATUS_RF_KILL_HW, &priv->status);
3722 else
3723 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3724
3725
3726 if (flags & SW_CARD_DISABLED)
3727 set_bit(STATUS_RF_KILL_SW, &priv->status);
3728 else
3729 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3730
3731 iwl3945_scan_cancel(priv);
3732
3733 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3734 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3735 (test_bit(STATUS_RF_KILL_SW, &status) !=
3736 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3737 queue_work(priv->workqueue, &priv->rf_kill);
3738 else
3739 wake_up_interruptible(&priv->wait_command_queue);
3740 }
3741
3742 /**
3743 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3744 *
3745 * Setup the RX handlers for each of the reply types sent from the uCode
3746 * to the host.
3747 *
3748 * This function chains into the hardware specific files for them to setup
3749 * any hardware specific handlers as well.
3750 */
3751 static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3752 {
3753 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3754 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3755 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3756 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3757 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3758 iwl3945_rx_spectrum_measure_notif;
3759 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3760 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3761 iwl3945_rx_pm_debug_statistics_notif;
3762 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3763
3764 /*
3765 * The same handler is used for both the REPLY to a discrete
3766 * statistics request from the host as well as for the periodic
3767 * statistics notifications (after received beacons) from the uCode.
3768 */
3769 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3770 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3771
3772 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3773 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3774 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3775 iwl3945_rx_scan_results_notif;
3776 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3777 iwl3945_rx_scan_complete_notif;
3778 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3779 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
3780
3781 /* Set up hardware specific Rx handlers */
3782 iwl3945_hw_rx_handler_setup(priv);
3783 }
3784
3785 /**
3786 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3787 * @rxb: Rx buffer to reclaim
3788 *
3789 * If an Rx buffer has an async callback associated with it the callback
3790 * will be executed. The attached skb (if present) will only be freed
3791 * if the callback returns 1
3792 */
3793 static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3794 struct iwl3945_rx_mem_buffer *rxb)
3795 {
3796 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3797 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3798 int txq_id = SEQ_TO_QUEUE(sequence);
3799 int index = SEQ_TO_INDEX(sequence);
3800 int huge = sequence & SEQ_HUGE_FRAME;
3801 int cmd_index;
3802 struct iwl3945_cmd *cmd;
3803
3804 /* If a Tx command is being handled and it isn't in the actual
3805 * command queue then there a command routing bug has been introduced
3806 * in the queue management code. */
3807 if (txq_id != IWL_CMD_QUEUE_NUM)
3808 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3809 txq_id, pkt->hdr.cmd);
3810 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3811
3812 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3813 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3814
3815 /* Input error checking is done when commands are added to queue. */
3816 if (cmd->meta.flags & CMD_WANT_SKB) {
3817 cmd->meta.source->u.skb = rxb->skb;
3818 rxb->skb = NULL;
3819 } else if (cmd->meta.u.callback &&
3820 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3821 rxb->skb = NULL;
3822
3823 iwl3945_tx_queue_reclaim(priv, txq_id, index);
3824
3825 if (!(cmd->meta.flags & CMD_ASYNC)) {
3826 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3827 wake_up_interruptible(&priv->wait_command_queue);
3828 }
3829 }
3830
3831 /************************** RX-FUNCTIONS ****************************/
3832 /*
3833 * Rx theory of operation
3834 *
3835 * The host allocates 32 DMA target addresses and passes the host address
3836 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3837 * 0 to 31
3838 *
3839 * Rx Queue Indexes
3840 * The host/firmware share two index registers for managing the Rx buffers.
3841 *
3842 * The READ index maps to the first position that the firmware may be writing
3843 * to -- the driver can read up to (but not including) this position and get
3844 * good data.
3845 * The READ index is managed by the firmware once the card is enabled.
3846 *
3847 * The WRITE index maps to the last position the driver has read from -- the
3848 * position preceding WRITE is the last slot the firmware can place a packet.
3849 *
3850 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3851 * WRITE = READ.
3852 *
3853 * During initialization, the host sets up the READ queue position to the first
3854 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3855 *
3856 * When the firmware places a packet in a buffer, it will advance the READ index
3857 * and fire the RX interrupt. The driver can then query the READ index and
3858 * process as many packets as possible, moving the WRITE index forward as it
3859 * resets the Rx queue buffers with new memory.
3860 *
3861 * The management in the driver is as follows:
3862 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3863 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3864 * to replenish the iwl->rxq->rx_free.
3865 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3866 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3867 * 'processed' and 'read' driver indexes as well)
3868 * + A received packet is processed and handed to the kernel network stack,
3869 * detached from the iwl->rxq. The driver 'processed' index is updated.
3870 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3871 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3872 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3873 * were enough free buffers and RX_STALLED is set it is cleared.
3874 *
3875 *
3876 * Driver sequence:
3877 *
3878 * iwl3945_rx_queue_alloc() Allocates rx_free
3879 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3880 * iwl3945_rx_queue_restock
3881 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3882 * queue, updates firmware pointers, and updates
3883 * the WRITE index. If insufficient rx_free buffers
3884 * are available, schedules iwl3945_rx_replenish
3885 *
3886 * -- enable interrupts --
3887 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
3888 * READ INDEX, detaching the SKB from the pool.
3889 * Moves the packet buffer from queue to rx_used.
3890 * Calls iwl3945_rx_queue_restock to refill any empty
3891 * slots.
3892 * ...
3893 *
3894 */
3895
3896 /**
3897 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3898 */
3899 static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
3900 {
3901 int s = q->read - q->write;
3902 if (s <= 0)
3903 s += RX_QUEUE_SIZE;
3904 /* keep some buffer to not confuse full and empty queue */
3905 s -= 2;
3906 if (s < 0)
3907 s = 0;
3908 return s;
3909 }
3910
3911 /**
3912 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3913 */
3914 int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
3915 {
3916 u32 reg = 0;
3917 int rc = 0;
3918 unsigned long flags;
3919
3920 spin_lock_irqsave(&q->lock, flags);
3921
3922 if (q->need_update == 0)
3923 goto exit_unlock;
3924
3925 /* If power-saving is in use, make sure device is awake */
3926 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3927 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3928
3929 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3930 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3931 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3932 goto exit_unlock;
3933 }
3934
3935 rc = iwl3945_grab_nic_access(priv);
3936 if (rc)
3937 goto exit_unlock;
3938
3939 /* Device expects a multiple of 8 */
3940 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
3941 q->write & ~0x7);
3942 iwl3945_release_nic_access(priv);
3943
3944 /* Else device is assumed to be awake */
3945 } else
3946 /* Device expects a multiple of 8 */
3947 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3948
3949
3950 q->need_update = 0;
3951
3952 exit_unlock:
3953 spin_unlock_irqrestore(&q->lock, flags);
3954 return rc;
3955 }
3956
3957 /**
3958 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3959 */
3960 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
3961 dma_addr_t dma_addr)
3962 {
3963 return cpu_to_le32((u32)dma_addr);
3964 }
3965
3966 /**
3967 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3968 *
3969 * If there are slots in the RX queue that need to be restocked,
3970 * and we have free pre-allocated buffers, fill the ranks as much
3971 * as we can, pulling from rx_free.
3972 *
3973 * This moves the 'write' index forward to catch up with 'processed', and
3974 * also updates the memory address in the firmware to reference the new
3975 * target buffer.
3976 */
3977 static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
3978 {
3979 struct iwl3945_rx_queue *rxq = &priv->rxq;
3980 struct list_head *element;
3981 struct iwl3945_rx_mem_buffer *rxb;
3982 unsigned long flags;
3983 int write, rc;
3984
3985 spin_lock_irqsave(&rxq->lock, flags);
3986 write = rxq->write & ~0x7;
3987 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3988 /* Get next free Rx buffer, remove from free list */
3989 element = rxq->rx_free.next;
3990 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3991 list_del(element);
3992
3993 /* Point to Rx buffer via next RBD in circular buffer */
3994 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
3995 rxq->queue[rxq->write] = rxb;
3996 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3997 rxq->free_count--;
3998 }
3999 spin_unlock_irqrestore(&rxq->lock, flags);
4000 /* If the pre-allocated buffer pool is dropping low, schedule to
4001 * refill it */
4002 if (rxq->free_count <= RX_LOW_WATERMARK)
4003 queue_work(priv->workqueue, &priv->rx_replenish);
4004
4005
4006 /* If we've added more space for the firmware to place data, tell it.
4007 * Increment device's write pointer in multiples of 8. */
4008 if ((write != (rxq->write & ~0x7))
4009 || (abs(rxq->write - rxq->read) > 7)) {
4010 spin_lock_irqsave(&rxq->lock, flags);
4011 rxq->need_update = 1;
4012 spin_unlock_irqrestore(&rxq->lock, flags);
4013 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
4014 if (rc)
4015 return rc;
4016 }
4017
4018 return 0;
4019 }
4020
4021 /**
4022 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
4023 *
4024 * When moving to rx_free an SKB is allocated for the slot.
4025 *
4026 * Also restock the Rx queue via iwl3945_rx_queue_restock.
4027 * This is called as a scheduled work item (except for during initialization)
4028 */
4029 static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
4030 {
4031 struct iwl3945_rx_queue *rxq = &priv->rxq;
4032 struct list_head *element;
4033 struct iwl3945_rx_mem_buffer *rxb;
4034 unsigned long flags;
4035 spin_lock_irqsave(&rxq->lock, flags);
4036 while (!list_empty(&rxq->rx_used)) {
4037 element = rxq->rx_used.next;
4038 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
4039
4040 /* Alloc a new receive buffer */
4041 rxb->skb =
4042 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
4043 if (!rxb->skb) {
4044 if (net_ratelimit())
4045 printk(KERN_CRIT DRV_NAME
4046 ": Can not allocate SKB buffers\n");
4047 /* We don't reschedule replenish work here -- we will
4048 * call the restock method and if it still needs
4049 * more buffers it will schedule replenish */
4050 break;
4051 }
4052
4053 /* If radiotap head is required, reserve some headroom here.
4054 * The physical head count is a variable rx_stats->phy_count.
4055 * We reserve 4 bytes here. Plus these extra bytes, the
4056 * headroom of the physical head should be enough for the
4057 * radiotap head that iwl3945 supported. See iwl3945_rt.
4058 */
4059 skb_reserve(rxb->skb, 4);
4060
4061 priv->alloc_rxb_skb++;
4062 list_del(element);
4063
4064 /* Get physical address of RB/SKB */
4065 rxb->dma_addr =
4066 pci_map_single(priv->pci_dev, rxb->skb->data,
4067 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4068 list_add_tail(&rxb->list, &rxq->rx_free);
4069 rxq->free_count++;
4070 }
4071 spin_unlock_irqrestore(&rxq->lock, flags);
4072 }
4073
4074 /*
4075 * this should be called while priv->lock is locked
4076 */
4077 static void __iwl3945_rx_replenish(void *data)
4078 {
4079 struct iwl3945_priv *priv = data;
4080
4081 iwl3945_rx_allocate(priv);
4082 iwl3945_rx_queue_restock(priv);
4083 }
4084
4085
4086 void iwl3945_rx_replenish(void *data)
4087 {
4088 struct iwl3945_priv *priv = data;
4089 unsigned long flags;
4090
4091 iwl3945_rx_allocate(priv);
4092
4093 spin_lock_irqsave(&priv->lock, flags);
4094 iwl3945_rx_queue_restock(priv);
4095 spin_unlock_irqrestore(&priv->lock, flags);
4096 }
4097
4098 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
4099 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
4100 * This free routine walks the list of POOL entries and if SKB is set to
4101 * non NULL it is unmapped and freed
4102 */
4103 static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
4104 {
4105 int i;
4106 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4107 if (rxq->pool[i].skb != NULL) {
4108 pci_unmap_single(priv->pci_dev,
4109 rxq->pool[i].dma_addr,
4110 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4111 dev_kfree_skb(rxq->pool[i].skb);
4112 }
4113 }
4114
4115 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4116 rxq->dma_addr);
4117 rxq->bd = NULL;
4118 }
4119
4120 int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
4121 {
4122 struct iwl3945_rx_queue *rxq = &priv->rxq;
4123 struct pci_dev *dev = priv->pci_dev;
4124 int i;
4125
4126 spin_lock_init(&rxq->lock);
4127 INIT_LIST_HEAD(&rxq->rx_free);
4128 INIT_LIST_HEAD(&rxq->rx_used);
4129
4130 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
4131 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4132 if (!rxq->bd)
4133 return -ENOMEM;
4134
4135 /* Fill the rx_used queue with _all_ of the Rx buffers */
4136 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4137 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4138
4139 /* Set us so that we have processed and used all buffers, but have
4140 * not restocked the Rx queue with fresh buffers */
4141 rxq->read = rxq->write = 0;
4142 rxq->free_count = 0;
4143 rxq->need_update = 0;
4144 return 0;
4145 }
4146
4147 void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
4148 {
4149 unsigned long flags;
4150 int i;
4151 spin_lock_irqsave(&rxq->lock, flags);
4152 INIT_LIST_HEAD(&rxq->rx_free);
4153 INIT_LIST_HEAD(&rxq->rx_used);
4154 /* Fill the rx_used queue with _all_ of the Rx buffers */
4155 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4156 /* In the reset function, these buffers may have been allocated
4157 * to an SKB, so we need to unmap and free potential storage */
4158 if (rxq->pool[i].skb != NULL) {
4159 pci_unmap_single(priv->pci_dev,
4160 rxq->pool[i].dma_addr,
4161 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4162 priv->alloc_rxb_skb--;
4163 dev_kfree_skb(rxq->pool[i].skb);
4164 rxq->pool[i].skb = NULL;
4165 }
4166 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4167 }
4168
4169 /* Set us so that we have processed and used all buffers, but have
4170 * not restocked the Rx queue with fresh buffers */
4171 rxq->read = rxq->write = 0;
4172 rxq->free_count = 0;
4173 spin_unlock_irqrestore(&rxq->lock, flags);
4174 }
4175
4176 /* Convert linear signal-to-noise ratio into dB */
4177 static u8 ratio2dB[100] = {
4178 /* 0 1 2 3 4 5 6 7 8 9 */
4179 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4180 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4181 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4182 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4183 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4184 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4185 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4186 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4187 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4188 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4189 };
4190
4191 /* Calculates a relative dB value from a ratio of linear
4192 * (i.e. not dB) signal levels.
4193 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
4194 int iwl3945_calc_db_from_ratio(int sig_ratio)
4195 {
4196 /* Anything above 1000:1 just report as 60 dB */
4197 if (sig_ratio > 1000)
4198 return 60;
4199
4200 /* Above 100:1, divide by 10 and use table,
4201 * add 20 dB to make up for divide by 10 */
4202 if (sig_ratio > 100)
4203 return (20 + (int)ratio2dB[sig_ratio/10]);
4204
4205 /* We shouldn't see this */
4206 if (sig_ratio < 1)
4207 return 0;
4208
4209 /* Use table for ratios 1:1 - 99:1 */
4210 return (int)ratio2dB[sig_ratio];
4211 }
4212
4213 #define PERFECT_RSSI (-20) /* dBm */
4214 #define WORST_RSSI (-95) /* dBm */
4215 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4216
4217 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
4218 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4219 * about formulas used below. */
4220 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
4221 {
4222 int sig_qual;
4223 int degradation = PERFECT_RSSI - rssi_dbm;
4224
4225 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4226 * as indicator; formula is (signal dbm - noise dbm).
4227 * SNR at or above 40 is a great signal (100%).
4228 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4229 * Weakest usable signal is usually 10 - 15 dB SNR. */
4230 if (noise_dbm) {
4231 if (rssi_dbm - noise_dbm >= 40)
4232 return 100;
4233 else if (rssi_dbm < noise_dbm)
4234 return 0;
4235 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4236
4237 /* Else use just the signal level.
4238 * This formula is a least squares fit of data points collected and
4239 * compared with a reference system that had a percentage (%) display
4240 * for signal quality. */
4241 } else
4242 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4243 (15 * RSSI_RANGE + 62 * degradation)) /
4244 (RSSI_RANGE * RSSI_RANGE);
4245
4246 if (sig_qual > 100)
4247 sig_qual = 100;
4248 else if (sig_qual < 1)
4249 sig_qual = 0;
4250
4251 return sig_qual;
4252 }
4253
4254 /**
4255 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
4256 *
4257 * Uses the priv->rx_handlers callback function array to invoke
4258 * the appropriate handlers, including command responses,
4259 * frame-received notifications, and other notifications.
4260 */
4261 static void iwl3945_rx_handle(struct iwl3945_priv *priv)
4262 {
4263 struct iwl3945_rx_mem_buffer *rxb;
4264 struct iwl3945_rx_packet *pkt;
4265 struct iwl3945_rx_queue *rxq = &priv->rxq;
4266 u32 r, i;
4267 int reclaim;
4268 unsigned long flags;
4269 u8 fill_rx = 0;
4270 u32 count = 0;
4271
4272 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4273 * buffer that the driver may process (last buffer filled by ucode). */
4274 r = iwl3945_hw_get_rx_read(priv);
4275 i = rxq->read;
4276
4277 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4278 fill_rx = 1;
4279 /* Rx interrupt, but nothing sent from uCode */
4280 if (i == r)
4281 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4282
4283 while (i != r) {
4284 rxb = rxq->queue[i];
4285
4286 /* If an RXB doesn't have a Rx queue slot associated with it,
4287 * then a bug has been introduced in the queue refilling
4288 * routines -- catch it here */
4289 BUG_ON(rxb == NULL);
4290
4291 rxq->queue[i] = NULL;
4292
4293 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4294 IWL_RX_BUF_SIZE,
4295 PCI_DMA_FROMDEVICE);
4296 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
4297
4298 /* Reclaim a command buffer only if this packet is a response
4299 * to a (driver-originated) command.
4300 * If the packet (e.g. Rx frame) originated from uCode,
4301 * there is no command buffer to reclaim.
4302 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4303 * but apparently a few don't get set; catch them here. */
4304 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4305 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4306 (pkt->hdr.cmd != REPLY_TX);
4307
4308 /* Based on type of command response or notification,
4309 * handle those that need handling via function in
4310 * rx_handlers table. See iwl3945_setup_rx_handlers() */
4311 if (priv->rx_handlers[pkt->hdr.cmd]) {
4312 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4313 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4314 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4315 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4316 } else {
4317 /* No handling needed */
4318 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4319 "r %d i %d No handler needed for %s, 0x%02x\n",
4320 r, i, get_cmd_string(pkt->hdr.cmd),
4321 pkt->hdr.cmd);
4322 }
4323
4324 if (reclaim) {
4325 /* Invoke any callbacks, transfer the skb to caller, and
4326 * fire off the (possibly) blocking iwl3945_send_cmd()
4327 * as we reclaim the driver command queue */
4328 if (rxb && rxb->skb)
4329 iwl3945_tx_cmd_complete(priv, rxb);
4330 else
4331 IWL_WARNING("Claim null rxb?\n");
4332 }
4333
4334 /* For now we just don't re-use anything. We can tweak this
4335 * later to try and re-use notification packets and SKBs that
4336 * fail to Rx correctly */
4337 if (rxb->skb != NULL) {
4338 priv->alloc_rxb_skb--;
4339 dev_kfree_skb_any(rxb->skb);
4340 rxb->skb = NULL;
4341 }
4342
4343 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4344 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4345 spin_lock_irqsave(&rxq->lock, flags);
4346 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4347 spin_unlock_irqrestore(&rxq->lock, flags);
4348 i = (i + 1) & RX_QUEUE_MASK;
4349 /* If there are a lot of unused frames,
4350 * restock the Rx queue so ucode won't assert. */
4351 if (fill_rx) {
4352 count++;
4353 if (count >= 8) {
4354 priv->rxq.read = i;
4355 __iwl3945_rx_replenish(priv);
4356 count = 0;
4357 }
4358 }
4359 }
4360
4361 /* Backtrack one entry */
4362 priv->rxq.read = i;
4363 iwl3945_rx_queue_restock(priv);
4364 }
4365
4366 /**
4367 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4368 */
4369 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4370 struct iwl3945_tx_queue *txq)
4371 {
4372 u32 reg = 0;
4373 int rc = 0;
4374 int txq_id = txq->q.id;
4375
4376 if (txq->need_update == 0)
4377 return rc;
4378
4379 /* if we're trying to save power */
4380 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4381 /* wake up nic if it's powered down ...
4382 * uCode will wake up, and interrupt us again, so next
4383 * time we'll skip this part. */
4384 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
4385
4386 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4387 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4388 iwl3945_set_bit(priv, CSR_GP_CNTRL,
4389 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4390 return rc;
4391 }
4392
4393 /* restore this queue's parameters in nic hardware. */
4394 rc = iwl3945_grab_nic_access(priv);
4395 if (rc)
4396 return rc;
4397 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
4398 txq->q.write_ptr | (txq_id << 8));
4399 iwl3945_release_nic_access(priv);
4400
4401 /* else not in power-save mode, uCode will never sleep when we're
4402 * trying to tx (during RFKILL, we're not trying to tx). */
4403 } else
4404 iwl3945_write32(priv, HBUS_TARG_WRPTR,
4405 txq->q.write_ptr | (txq_id << 8));
4406
4407 txq->need_update = 0;
4408
4409 return rc;
4410 }
4411
4412 #ifdef CONFIG_IWL3945_DEBUG
4413 static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
4414 {
4415 DECLARE_MAC_BUF(mac);
4416
4417 IWL_DEBUG_RADIO("RX CONFIG:\n");
4418 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4419 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4420 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4421 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4422 le32_to_cpu(rxon->filter_flags));
4423 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4424 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4425 rxon->ofdm_basic_rates);
4426 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4427 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4428 print_mac(mac, rxon->node_addr));
4429 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4430 print_mac(mac, rxon->bssid_addr));
4431 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4432 }
4433 #endif
4434
4435 static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
4436 {
4437 IWL_DEBUG_ISR("Enabling interrupts\n");
4438 set_bit(STATUS_INT_ENABLED, &priv->status);
4439 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4440 }
4441
4442 static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
4443 {
4444 clear_bit(STATUS_INT_ENABLED, &priv->status);
4445
4446 /* disable interrupts from uCode/NIC to host */
4447 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4448
4449 /* acknowledge/clear/reset any interrupts still pending
4450 * from uCode or flow handler (Rx/Tx DMA) */
4451 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4452 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4453 IWL_DEBUG_ISR("Disabled interrupts\n");
4454 }
4455
4456 static const char *desc_lookup(int i)
4457 {
4458 switch (i) {
4459 case 1:
4460 return "FAIL";
4461 case 2:
4462 return "BAD_PARAM";
4463 case 3:
4464 return "BAD_CHECKSUM";
4465 case 4:
4466 return "NMI_INTERRUPT";
4467 case 5:
4468 return "SYSASSERT";
4469 case 6:
4470 return "FATAL_ERROR";
4471 }
4472
4473 return "UNKNOWN";
4474 }
4475
4476 #define ERROR_START_OFFSET (1 * sizeof(u32))
4477 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4478
4479 static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4480 {
4481 u32 i;
4482 u32 desc, time, count, base, data1;
4483 u32 blink1, blink2, ilink1, ilink2;
4484 int rc;
4485
4486 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4487
4488 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4489 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4490 return;
4491 }
4492
4493 rc = iwl3945_grab_nic_access(priv);
4494 if (rc) {
4495 IWL_WARNING("Can not read from adapter at this time.\n");
4496 return;
4497 }
4498
4499 count = iwl3945_read_targ_mem(priv, base);
4500
4501 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4502 IWL_ERROR("Start IWL Error Log Dump:\n");
4503 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4504 priv->status, priv->config, count);
4505 }
4506
4507 IWL_ERROR("Desc Time asrtPC blink2 "
4508 "ilink1 nmiPC Line\n");
4509 for (i = ERROR_START_OFFSET;
4510 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4511 i += ERROR_ELEM_SIZE) {
4512 desc = iwl3945_read_targ_mem(priv, base + i);
4513 time =
4514 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4515 blink1 =
4516 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4517 blink2 =
4518 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4519 ilink1 =
4520 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4521 ilink2 =
4522 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4523 data1 =
4524 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4525
4526 IWL_ERROR
4527 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4528 desc_lookup(desc), desc, time, blink1, blink2,
4529 ilink1, ilink2, data1);
4530 }
4531
4532 iwl3945_release_nic_access(priv);
4533
4534 }
4535
4536 #define EVENT_START_OFFSET (6 * sizeof(u32))
4537
4538 /**
4539 * iwl3945_print_event_log - Dump error event log to syslog
4540 *
4541 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4542 */
4543 static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4544 u32 num_events, u32 mode)
4545 {
4546 u32 i;
4547 u32 base; /* SRAM byte address of event log header */
4548 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4549 u32 ptr; /* SRAM byte address of log data */
4550 u32 ev, time, data; /* event log data */
4551
4552 if (num_events == 0)
4553 return;
4554
4555 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4556
4557 if (mode == 0)
4558 event_size = 2 * sizeof(u32);
4559 else
4560 event_size = 3 * sizeof(u32);
4561
4562 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4563
4564 /* "time" is actually "data" for mode 0 (no timestamp).
4565 * place event id # at far right for easier visual parsing. */
4566 for (i = 0; i < num_events; i++) {
4567 ev = iwl3945_read_targ_mem(priv, ptr);
4568 ptr += sizeof(u32);
4569 time = iwl3945_read_targ_mem(priv, ptr);
4570 ptr += sizeof(u32);
4571 if (mode == 0)
4572 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4573 else {
4574 data = iwl3945_read_targ_mem(priv, ptr);
4575 ptr += sizeof(u32);
4576 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4577 }
4578 }
4579 }
4580
4581 static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4582 {
4583 int rc;
4584 u32 base; /* SRAM byte address of event log header */
4585 u32 capacity; /* event log capacity in # entries */
4586 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4587 u32 num_wraps; /* # times uCode wrapped to top of log */
4588 u32 next_entry; /* index of next entry to be written by uCode */
4589 u32 size; /* # entries that we'll print */
4590
4591 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4592 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4593 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4594 return;
4595 }
4596
4597 rc = iwl3945_grab_nic_access(priv);
4598 if (rc) {
4599 IWL_WARNING("Can not read from adapter at this time.\n");
4600 return;
4601 }
4602
4603 /* event log header */
4604 capacity = iwl3945_read_targ_mem(priv, base);
4605 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4606 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4607 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4608
4609 size = num_wraps ? capacity : next_entry;
4610
4611 /* bail out if nothing in log */
4612 if (size == 0) {
4613 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4614 iwl3945_release_nic_access(priv);
4615 return;
4616 }
4617
4618 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4619 size, num_wraps);
4620
4621 /* if uCode has wrapped back to top of log, start at the oldest entry,
4622 * i.e the next one that uCode would fill. */
4623 if (num_wraps)
4624 iwl3945_print_event_log(priv, next_entry,
4625 capacity - next_entry, mode);
4626
4627 /* (then/else) start at top of log */
4628 iwl3945_print_event_log(priv, 0, next_entry, mode);
4629
4630 iwl3945_release_nic_access(priv);
4631 }
4632
4633 /**
4634 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4635 */
4636 static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4637 {
4638 /* Set the FW error flag -- cleared on iwl3945_down */
4639 set_bit(STATUS_FW_ERROR, &priv->status);
4640
4641 /* Cancel currently queued command. */
4642 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4643
4644 #ifdef CONFIG_IWL3945_DEBUG
4645 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4646 iwl3945_dump_nic_error_log(priv);
4647 iwl3945_dump_nic_event_log(priv);
4648 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
4649 }
4650 #endif
4651
4652 wake_up_interruptible(&priv->wait_command_queue);
4653
4654 /* Keep the restart process from trying to send host
4655 * commands by clearing the INIT status bit */
4656 clear_bit(STATUS_READY, &priv->status);
4657
4658 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4659 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4660 "Restarting adapter due to uCode error.\n");
4661
4662 if (iwl3945_is_associated(priv)) {
4663 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4664 sizeof(priv->recovery_rxon));
4665 priv->error_recovering = 1;
4666 }
4667 queue_work(priv->workqueue, &priv->restart);
4668 }
4669 }
4670
4671 static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4672 {
4673 unsigned long flags;
4674
4675 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4676 sizeof(priv->staging_rxon));
4677 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4678 iwl3945_commit_rxon(priv);
4679
4680 iwl3945_add_station(priv, priv->bssid, 1, 0);
4681
4682 spin_lock_irqsave(&priv->lock, flags);
4683 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4684 priv->error_recovering = 0;
4685 spin_unlock_irqrestore(&priv->lock, flags);
4686 }
4687
4688 static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4689 {
4690 u32 inta, handled = 0;
4691 u32 inta_fh;
4692 unsigned long flags;
4693 #ifdef CONFIG_IWL3945_DEBUG
4694 u32 inta_mask;
4695 #endif
4696
4697 spin_lock_irqsave(&priv->lock, flags);
4698
4699 /* Ack/clear/reset pending uCode interrupts.
4700 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4701 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4702 inta = iwl3945_read32(priv, CSR_INT);
4703 iwl3945_write32(priv, CSR_INT, inta);
4704
4705 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4706 * Any new interrupts that happen after this, either while we're
4707 * in this tasklet, or later, will show up in next ISR/tasklet. */
4708 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4709 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4710
4711 #ifdef CONFIG_IWL3945_DEBUG
4712 if (iwl3945_debug_level & IWL_DL_ISR) {
4713 /* just for debug */
4714 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4715 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4716 inta, inta_mask, inta_fh);
4717 }
4718 #endif
4719
4720 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4721 * atomic, make sure that inta covers all the interrupts that
4722 * we've discovered, even if FH interrupt came in just after
4723 * reading CSR_INT. */
4724 if (inta_fh & CSR_FH_INT_RX_MASK)
4725 inta |= CSR_INT_BIT_FH_RX;
4726 if (inta_fh & CSR_FH_INT_TX_MASK)
4727 inta |= CSR_INT_BIT_FH_TX;
4728
4729 /* Now service all interrupt bits discovered above. */
4730 if (inta & CSR_INT_BIT_HW_ERR) {
4731 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4732
4733 /* Tell the device to stop sending interrupts */
4734 iwl3945_disable_interrupts(priv);
4735
4736 iwl3945_irq_handle_error(priv);
4737
4738 handled |= CSR_INT_BIT_HW_ERR;
4739
4740 spin_unlock_irqrestore(&priv->lock, flags);
4741
4742 return;
4743 }
4744
4745 #ifdef CONFIG_IWL3945_DEBUG
4746 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4747 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4748 if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
4749 IWL_DEBUG_ISR("Microcode started or stopped.\n");
4750
4751 /* Alive notification via Rx interrupt will do the real work */
4752 if (inta & CSR_INT_BIT_ALIVE)
4753 IWL_DEBUG_ISR("Alive interrupt\n");
4754 }
4755 #endif
4756 /* Safely ignore these bits for debug checks below */
4757 inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
4758
4759 /* HW RF KILL switch toggled (4965 only) */
4760 if (inta & CSR_INT_BIT_RF_KILL) {
4761 int hw_rf_kill = 0;
4762 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
4763 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4764 hw_rf_kill = 1;
4765
4766 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4767 "RF_KILL bit toggled to %s.\n",
4768 hw_rf_kill ? "disable radio":"enable radio");
4769
4770 /* Queue restart only if RF_KILL switch was set to "kill"
4771 * when we loaded driver, and is now set to "enable".
4772 * After we're Alive, RF_KILL gets handled by
4773 * iwl_rx_card_state_notif() */
4774 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4775 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4776 queue_work(priv->workqueue, &priv->restart);
4777 }
4778
4779 handled |= CSR_INT_BIT_RF_KILL;
4780 }
4781
4782 /* Chip got too hot and stopped itself (4965 only) */
4783 if (inta & CSR_INT_BIT_CT_KILL) {
4784 IWL_ERROR("Microcode CT kill error detected.\n");
4785 handled |= CSR_INT_BIT_CT_KILL;
4786 }
4787
4788 /* Error detected by uCode */
4789 if (inta & CSR_INT_BIT_SW_ERR) {
4790 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4791 inta);
4792 iwl3945_irq_handle_error(priv);
4793 handled |= CSR_INT_BIT_SW_ERR;
4794 }
4795
4796 /* uCode wakes up after power-down sleep */
4797 if (inta & CSR_INT_BIT_WAKEUP) {
4798 IWL_DEBUG_ISR("Wakeup interrupt\n");
4799 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4800 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4801 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4802 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4803 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4804 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4805 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4806
4807 handled |= CSR_INT_BIT_WAKEUP;
4808 }
4809
4810 /* All uCode command responses, including Tx command responses,
4811 * Rx "responses" (frame-received notification), and other
4812 * notifications from uCode come through here*/
4813 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4814 iwl3945_rx_handle(priv);
4815 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4816 }
4817
4818 if (inta & CSR_INT_BIT_FH_TX) {
4819 IWL_DEBUG_ISR("Tx interrupt\n");
4820
4821 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4822 if (!iwl3945_grab_nic_access(priv)) {
4823 iwl3945_write_direct32(priv,
4824 FH_TCSR_CREDIT
4825 (ALM_FH_SRVC_CHNL), 0x0);
4826 iwl3945_release_nic_access(priv);
4827 }
4828 handled |= CSR_INT_BIT_FH_TX;
4829 }
4830
4831 if (inta & ~handled)
4832 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4833
4834 if (inta & ~CSR_INI_SET_MASK) {
4835 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4836 inta & ~CSR_INI_SET_MASK);
4837 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4838 }
4839
4840 /* Re-enable all interrupts */
4841 iwl3945_enable_interrupts(priv);
4842
4843 #ifdef CONFIG_IWL3945_DEBUG
4844 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4845 inta = iwl3945_read32(priv, CSR_INT);
4846 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4847 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4848 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4849 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4850 }
4851 #endif
4852 spin_unlock_irqrestore(&priv->lock, flags);
4853 }
4854
4855 static irqreturn_t iwl3945_isr(int irq, void *data)
4856 {
4857 struct iwl3945_priv *priv = data;
4858 u32 inta, inta_mask;
4859 u32 inta_fh;
4860 if (!priv)
4861 return IRQ_NONE;
4862
4863 spin_lock(&priv->lock);
4864
4865 /* Disable (but don't clear!) interrupts here to avoid
4866 * back-to-back ISRs and sporadic interrupts from our NIC.
4867 * If we have something to service, the tasklet will re-enable ints.
4868 * If we *don't* have something, we'll re-enable before leaving here. */
4869 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4870 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4871
4872 /* Discover which interrupts are active/pending */
4873 inta = iwl3945_read32(priv, CSR_INT);
4874 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4875
4876 /* Ignore interrupt if there's nothing in NIC to service.
4877 * This may be due to IRQ shared with another device,
4878 * or due to sporadic interrupts thrown from our NIC. */
4879 if (!inta && !inta_fh) {
4880 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4881 goto none;
4882 }
4883
4884 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4885 /* Hardware disappeared */
4886 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
4887 goto unplugged;
4888 }
4889
4890 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4891 inta, inta_mask, inta_fh);
4892
4893 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4894 tasklet_schedule(&priv->irq_tasklet);
4895 unplugged:
4896 spin_unlock(&priv->lock);
4897
4898 return IRQ_HANDLED;
4899
4900 none:
4901 /* re-enable interrupts here since we don't have anything to service. */
4902 iwl3945_enable_interrupts(priv);
4903 spin_unlock(&priv->lock);
4904 return IRQ_NONE;
4905 }
4906
4907 /************************** EEPROM BANDS ****************************
4908 *
4909 * The iwl3945_eeprom_band definitions below provide the mapping from the
4910 * EEPROM contents to the specific channel number supported for each
4911 * band.
4912 *
4913 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
4914 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4915 * The specific geography and calibration information for that channel
4916 * is contained in the eeprom map itself.
4917 *
4918 * During init, we copy the eeprom information and channel map
4919 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4920 *
4921 * channel_map_24/52 provides the index in the channel_info array for a
4922 * given channel. We have to have two separate maps as there is channel
4923 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4924 * band_2
4925 *
4926 * A value of 0xff stored in the channel_map indicates that the channel
4927 * is not supported by the hardware at all.
4928 *
4929 * A value of 0xfe in the channel_map indicates that the channel is not
4930 * valid for Tx with the current hardware. This means that
4931 * while the system can tune and receive on a given channel, it may not
4932 * be able to associate or transmit any frames on that
4933 * channel. There is no corresponding channel information for that
4934 * entry.
4935 *
4936 *********************************************************************/
4937
4938 /* 2.4 GHz */
4939 static const u8 iwl3945_eeprom_band_1[14] = {
4940 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4941 };
4942
4943 /* 5.2 GHz bands */
4944 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4945 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4946 };
4947
4948 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4949 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4950 };
4951
4952 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4953 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4954 };
4955
4956 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4957 145, 149, 153, 157, 161, 165
4958 };
4959
4960 static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
4961 int *eeprom_ch_count,
4962 const struct iwl3945_eeprom_channel
4963 **eeprom_ch_info,
4964 const u8 **eeprom_ch_index)
4965 {
4966 switch (band) {
4967 case 1: /* 2.4GHz band */
4968 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4969 *eeprom_ch_info = priv->eeprom.band_1_channels;
4970 *eeprom_ch_index = iwl3945_eeprom_band_1;
4971 break;
4972 case 2: /* 4.9GHz band */
4973 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4974 *eeprom_ch_info = priv->eeprom.band_2_channels;
4975 *eeprom_ch_index = iwl3945_eeprom_band_2;
4976 break;
4977 case 3: /* 5.2GHz band */
4978 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4979 *eeprom_ch_info = priv->eeprom.band_3_channels;
4980 *eeprom_ch_index = iwl3945_eeprom_band_3;
4981 break;
4982 case 4: /* 5.5GHz band */
4983 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4984 *eeprom_ch_info = priv->eeprom.band_4_channels;
4985 *eeprom_ch_index = iwl3945_eeprom_band_4;
4986 break;
4987 case 5: /* 5.7GHz band */
4988 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4989 *eeprom_ch_info = priv->eeprom.band_5_channels;
4990 *eeprom_ch_index = iwl3945_eeprom_band_5;
4991 break;
4992 default:
4993 BUG();
4994 return;
4995 }
4996 }
4997
4998 /**
4999 * iwl3945_get_channel_info - Find driver's private channel info
5000 *
5001 * Based on band and channel number.
5002 */
5003 const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
5004 int phymode, u16 channel)
5005 {
5006 int i;
5007
5008 switch (phymode) {
5009 case MODE_IEEE80211A:
5010 for (i = 14; i < priv->channel_count; i++) {
5011 if (priv->channel_info[i].channel == channel)
5012 return &priv->channel_info[i];
5013 }
5014 break;
5015
5016 case MODE_IEEE80211B:
5017 case MODE_IEEE80211G:
5018 if (channel >= 1 && channel <= 14)
5019 return &priv->channel_info[channel - 1];
5020 break;
5021
5022 }
5023
5024 return NULL;
5025 }
5026
5027 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5028 ? # x " " : "")
5029
5030 /**
5031 * iwl3945_init_channel_map - Set up driver's info for all possible channels
5032 */
5033 static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
5034 {
5035 int eeprom_ch_count = 0;
5036 const u8 *eeprom_ch_index = NULL;
5037 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
5038 int band, ch;
5039 struct iwl3945_channel_info *ch_info;
5040
5041 if (priv->channel_count) {
5042 IWL_DEBUG_INFO("Channel map already initialized.\n");
5043 return 0;
5044 }
5045
5046 if (priv->eeprom.version < 0x2f) {
5047 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5048 priv->eeprom.version);
5049 return -EINVAL;
5050 }
5051
5052 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5053
5054 priv->channel_count =
5055 ARRAY_SIZE(iwl3945_eeprom_band_1) +
5056 ARRAY_SIZE(iwl3945_eeprom_band_2) +
5057 ARRAY_SIZE(iwl3945_eeprom_band_3) +
5058 ARRAY_SIZE(iwl3945_eeprom_band_4) +
5059 ARRAY_SIZE(iwl3945_eeprom_band_5);
5060
5061 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5062
5063 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
5064 priv->channel_count, GFP_KERNEL);
5065 if (!priv->channel_info) {
5066 IWL_ERROR("Could not allocate channel_info\n");
5067 priv->channel_count = 0;
5068 return -ENOMEM;
5069 }
5070
5071 ch_info = priv->channel_info;
5072
5073 /* Loop through the 5 EEPROM bands adding them in order to the
5074 * channel map we maintain (that contains additional information than
5075 * what just in the EEPROM) */
5076 for (band = 1; band <= 5; band++) {
5077
5078 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
5079 &eeprom_ch_info, &eeprom_ch_index);
5080
5081 /* Loop through each band adding each of the channels */
5082 for (ch = 0; ch < eeprom_ch_count; ch++) {
5083 ch_info->channel = eeprom_ch_index[ch];
5084 ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5085 MODE_IEEE80211A;
5086
5087 /* permanently store EEPROM's channel regulatory flags
5088 * and max power in channel info database. */
5089 ch_info->eeprom = eeprom_ch_info[ch];
5090
5091 /* Copy the run-time flags so they are there even on
5092 * invalid channels */
5093 ch_info->flags = eeprom_ch_info[ch].flags;
5094
5095 if (!(is_channel_valid(ch_info))) {
5096 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5097 "No traffic\n",
5098 ch_info->channel,
5099 ch_info->flags,
5100 is_channel_a_band(ch_info) ?
5101 "5.2" : "2.4");
5102 ch_info++;
5103 continue;
5104 }
5105
5106 /* Initialize regulatory-based run-time data */
5107 ch_info->max_power_avg = ch_info->curr_txpow =
5108 eeprom_ch_info[ch].max_power_avg;
5109 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5110 ch_info->min_power = 0;
5111
5112 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5113 " %ddBm): Ad-Hoc %ssupported\n",
5114 ch_info->channel,
5115 is_channel_a_band(ch_info) ?
5116 "5.2" : "2.4",
5117 CHECK_AND_PRINT(IBSS),
5118 CHECK_AND_PRINT(ACTIVE),
5119 CHECK_AND_PRINT(RADAR),
5120 CHECK_AND_PRINT(WIDE),
5121 CHECK_AND_PRINT(NARROW),
5122 CHECK_AND_PRINT(DFS),
5123 eeprom_ch_info[ch].flags,
5124 eeprom_ch_info[ch].max_power_avg,
5125 ((eeprom_ch_info[ch].
5126 flags & EEPROM_CHANNEL_IBSS)
5127 && !(eeprom_ch_info[ch].
5128 flags & EEPROM_CHANNEL_RADAR))
5129 ? "" : "not ");
5130
5131 /* Set the user_txpower_limit to the highest power
5132 * supported by any channel */
5133 if (eeprom_ch_info[ch].max_power_avg >
5134 priv->user_txpower_limit)
5135 priv->user_txpower_limit =
5136 eeprom_ch_info[ch].max_power_avg;
5137
5138 ch_info++;
5139 }
5140 }
5141
5142 /* Set up txpower settings in driver for all channels */
5143 if (iwl3945_txpower_set_from_eeprom(priv))
5144 return -EIO;
5145
5146 return 0;
5147 }
5148
5149 /*
5150 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
5151 */
5152 static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
5153 {
5154 kfree(priv->channel_info);
5155 priv->channel_count = 0;
5156 }
5157
5158 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5159 * sending probe req. This should be set long enough to hear probe responses
5160 * from more than one AP. */
5161 #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5162 #define IWL_ACTIVE_DWELL_TIME_52 (10)
5163
5164 /* For faster active scanning, scan will move to the next channel if fewer than
5165 * PLCP_QUIET_THRESH packets are heard on this channel within
5166 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5167 * time if it's a quiet channel (nothing responded to our probe, and there's
5168 * no other traffic).
5169 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5170 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5171 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5172
5173 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5174 * Must be set longer than active dwell time.
5175 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5176 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5177 #define IWL_PASSIVE_DWELL_TIME_52 (10)
5178 #define IWL_PASSIVE_DWELL_BASE (100)
5179 #define IWL_CHANNEL_TUNE_TIME 5
5180
5181 static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv, int phymode)
5182 {
5183 if (phymode == MODE_IEEE80211A)
5184 return IWL_ACTIVE_DWELL_TIME_52;
5185 else
5186 return IWL_ACTIVE_DWELL_TIME_24;
5187 }
5188
5189 static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv, int phymode)
5190 {
5191 u16 active = iwl3945_get_active_dwell_time(priv, phymode);
5192 u16 passive = (phymode != MODE_IEEE80211A) ?
5193 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5194 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5195
5196 if (iwl3945_is_associated(priv)) {
5197 /* If we're associated, we clamp the maximum passive
5198 * dwell time to be 98% of the beacon interval (minus
5199 * 2 * channel tune time) */
5200 passive = priv->beacon_int;
5201 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5202 passive = IWL_PASSIVE_DWELL_BASE;
5203 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5204 }
5205
5206 if (passive <= active)
5207 passive = active + 1;
5208
5209 return passive;
5210 }
5211
5212 static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, int phymode,
5213 u8 is_active, u8 direct_mask,
5214 struct iwl3945_scan_channel *scan_ch)
5215 {
5216 const struct ieee80211_channel *channels = NULL;
5217 const struct ieee80211_hw_mode *hw_mode;
5218 const struct iwl3945_channel_info *ch_info;
5219 u16 passive_dwell = 0;
5220 u16 active_dwell = 0;
5221 int added, i;
5222
5223 hw_mode = iwl3945_get_hw_mode(priv, phymode);
5224 if (!hw_mode)
5225 return 0;
5226
5227 channels = hw_mode->channels;
5228
5229 active_dwell = iwl3945_get_active_dwell_time(priv, phymode);
5230 passive_dwell = iwl3945_get_passive_dwell_time(priv, phymode);
5231
5232 for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5233 if (channels[i].chan ==
5234 le16_to_cpu(priv->active_rxon.channel)) {
5235 if (iwl3945_is_associated(priv)) {
5236 IWL_DEBUG_SCAN
5237 ("Skipping current channel %d\n",
5238 le16_to_cpu(priv->active_rxon.channel));
5239 continue;
5240 }
5241 } else if (priv->only_active_channel)
5242 continue;
5243
5244 scan_ch->channel = channels[i].chan;
5245
5246 ch_info = iwl3945_get_channel_info(priv, phymode, scan_ch->channel);
5247 if (!is_channel_valid(ch_info)) {
5248 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5249 scan_ch->channel);
5250 continue;
5251 }
5252
5253 if (!is_active || is_channel_passive(ch_info) ||
5254 !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5255 scan_ch->type = 0; /* passive */
5256 else
5257 scan_ch->type = 1; /* active */
5258
5259 if (scan_ch->type & 1)
5260 scan_ch->type |= (direct_mask << 1);
5261
5262 if (is_channel_narrow(ch_info))
5263 scan_ch->type |= (1 << 7);
5264
5265 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5266 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5267
5268 /* Set txpower levels to defaults */
5269 scan_ch->tpc.dsp_atten = 110;
5270 /* scan_pwr_info->tpc.dsp_atten; */
5271
5272 /*scan_pwr_info->tpc.tx_gain; */
5273 if (phymode == MODE_IEEE80211A)
5274 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5275 else {
5276 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5277 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
5278 * power level:
5279 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
5280 */
5281 }
5282
5283 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5284 scan_ch->channel,
5285 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5286 (scan_ch->type & 1) ?
5287 active_dwell : passive_dwell);
5288
5289 scan_ch++;
5290 added++;
5291 }
5292
5293 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5294 return added;
5295 }
5296
5297 static void iwl3945_reset_channel_flag(struct iwl3945_priv *priv)
5298 {
5299 int i, j;
5300 for (i = 0; i < 3; i++) {
5301 struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5302 for (j = 0; j < hw_mode->num_channels; j++)
5303 hw_mode->channels[j].flag = hw_mode->channels[j].val;
5304 }
5305 }
5306
5307 static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
5308 struct ieee80211_rate *rates)
5309 {
5310 int i;
5311
5312 for (i = 0; i < IWL_RATE_COUNT; i++) {
5313 rates[i].rate = iwl3945_rates[i].ieee * 5;
5314 rates[i].val = i; /* Rate scaling will work on indexes */
5315 rates[i].val2 = i;
5316 rates[i].flags = IEEE80211_RATE_SUPPORTED;
5317 /* Only OFDM have the bits-per-symbol set */
5318 if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5319 rates[i].flags |= IEEE80211_RATE_OFDM;
5320 else {
5321 /*
5322 * If CCK 1M then set rate flag to CCK else CCK_2
5323 * which is CCK | PREAMBLE2
5324 */
5325 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
5326 IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5327 }
5328
5329 /* Set up which ones are basic rates... */
5330 if (IWL_BASIC_RATES_MASK & (1 << i))
5331 rates[i].flags |= IEEE80211_RATE_BASIC;
5332 }
5333 }
5334
5335 /**
5336 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
5337 */
5338 static int iwl3945_init_geos(struct iwl3945_priv *priv)
5339 {
5340 struct iwl3945_channel_info *ch;
5341 struct ieee80211_hw_mode *modes;
5342 struct ieee80211_channel *channels;
5343 struct ieee80211_channel *geo_ch;
5344 struct ieee80211_rate *rates;
5345 int i = 0;
5346 enum {
5347 A = 0,
5348 B = 1,
5349 G = 2,
5350 };
5351 int mode_count = 3;
5352
5353 if (priv->modes) {
5354 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5355 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5356 return 0;
5357 }
5358
5359 modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5360 GFP_KERNEL);
5361 if (!modes)
5362 return -ENOMEM;
5363
5364 channels = kzalloc(sizeof(struct ieee80211_channel) *
5365 priv->channel_count, GFP_KERNEL);
5366 if (!channels) {
5367 kfree(modes);
5368 return -ENOMEM;
5369 }
5370
5371 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5372 GFP_KERNEL);
5373 if (!rates) {
5374 kfree(modes);
5375 kfree(channels);
5376 return -ENOMEM;
5377 }
5378
5379 /* 0 = 802.11a
5380 * 1 = 802.11b
5381 * 2 = 802.11g
5382 */
5383
5384 /* 5.2GHz channels start after the 2.4GHz channels */
5385 modes[A].mode = MODE_IEEE80211A;
5386 modes[A].channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5387 modes[A].rates = &rates[4];
5388 modes[A].num_rates = 8; /* just OFDM */
5389 modes[A].num_channels = 0;
5390
5391 modes[B].mode = MODE_IEEE80211B;
5392 modes[B].channels = channels;
5393 modes[B].rates = rates;
5394 modes[B].num_rates = 4; /* just CCK */
5395 modes[B].num_channels = 0;
5396
5397 modes[G].mode = MODE_IEEE80211G;
5398 modes[G].channels = channels;
5399 modes[G].rates = rates;
5400 modes[G].num_rates = 12; /* OFDM & CCK */
5401 modes[G].num_channels = 0;
5402
5403 priv->ieee_channels = channels;
5404 priv->ieee_rates = rates;
5405
5406 iwl3945_init_hw_rates(priv, rates);
5407
5408 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5409 ch = &priv->channel_info[i];
5410
5411 if (!is_channel_valid(ch)) {
5412 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5413 "skipping.\n",
5414 ch->channel, is_channel_a_band(ch) ?
5415 "5.2" : "2.4");
5416 continue;
5417 }
5418
5419 if (is_channel_a_band(ch))
5420 geo_ch = &modes[A].channels[modes[A].num_channels++];
5421 else {
5422 geo_ch = &modes[B].channels[modes[B].num_channels++];
5423 modes[G].num_channels++;
5424 }
5425
5426 geo_ch->freq = ieee80211chan2mhz(ch->channel);
5427 geo_ch->chan = ch->channel;
5428 geo_ch->power_level = ch->max_power_avg;
5429 geo_ch->antenna_max = 0xff;
5430
5431 if (is_channel_valid(ch)) {
5432 geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5433 if (ch->flags & EEPROM_CHANNEL_IBSS)
5434 geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5435
5436 if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5437 geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5438
5439 if (ch->flags & EEPROM_CHANNEL_RADAR)
5440 geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5441
5442 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5443 priv->max_channel_txpower_limit =
5444 ch->max_power_avg;
5445 }
5446
5447 geo_ch->val = geo_ch->flag;
5448 }
5449
5450 if ((modes[A].num_channels == 0) && priv->is_abg) {
5451 printk(KERN_INFO DRV_NAME
5452 ": Incorrectly detected BG card as ABG. Please send "
5453 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5454 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5455 priv->is_abg = 0;
5456 }
5457
5458 printk(KERN_INFO DRV_NAME
5459 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5460 modes[G].num_channels, modes[A].num_channels);
5461
5462 /*
5463 * NOTE: We register these in preference of order -- the
5464 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5465 * a phymode based on rates or AP capabilities but seems to
5466 * configure it purely on if the channel being configured
5467 * is supported by a mode -- and the first match is taken
5468 */
5469
5470 if (modes[G].num_channels)
5471 ieee80211_register_hwmode(priv->hw, &modes[G]);
5472 if (modes[B].num_channels)
5473 ieee80211_register_hwmode(priv->hw, &modes[B]);
5474 if (modes[A].num_channels)
5475 ieee80211_register_hwmode(priv->hw, &modes[A]);
5476
5477 priv->modes = modes;
5478 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5479
5480 return 0;
5481 }
5482
5483 /*
5484 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5485 */
5486 static void iwl3945_free_geos(struct iwl3945_priv *priv)
5487 {
5488 kfree(priv->modes);
5489 kfree(priv->ieee_channels);
5490 kfree(priv->ieee_rates);
5491 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5492 }
5493
5494 /******************************************************************************
5495 *
5496 * uCode download functions
5497 *
5498 ******************************************************************************/
5499
5500 static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
5501 {
5502 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5503 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5504 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5505 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5506 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5507 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5508 }
5509
5510 /**
5511 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5512 * looking at all data.
5513 */
5514 static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
5515 {
5516 u32 val;
5517 u32 save_len = len;
5518 int rc = 0;
5519 u32 errcnt;
5520
5521 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5522
5523 rc = iwl3945_grab_nic_access(priv);
5524 if (rc)
5525 return rc;
5526
5527 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5528
5529 errcnt = 0;
5530 for (; len > 0; len -= sizeof(u32), image++) {
5531 /* read data comes through single port, auto-incr addr */
5532 /* NOTE: Use the debugless read so we don't flood kernel log
5533 * if IWL_DL_IO is set */
5534 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5535 if (val != le32_to_cpu(*image)) {
5536 IWL_ERROR("uCode INST section is invalid at "
5537 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5538 save_len - len, val, le32_to_cpu(*image));
5539 rc = -EIO;
5540 errcnt++;
5541 if (errcnt >= 20)
5542 break;
5543 }
5544 }
5545
5546 iwl3945_release_nic_access(priv);
5547
5548 if (!errcnt)
5549 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5550
5551 return rc;
5552 }
5553
5554
5555 /**
5556 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5557 * using sample data 100 bytes apart. If these sample points are good,
5558 * it's a pretty good bet that everything between them is good, too.
5559 */
5560 static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5561 {
5562 u32 val;
5563 int rc = 0;
5564 u32 errcnt = 0;
5565 u32 i;
5566
5567 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5568
5569 rc = iwl3945_grab_nic_access(priv);
5570 if (rc)
5571 return rc;
5572
5573 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5574 /* read data comes through single port, auto-incr addr */
5575 /* NOTE: Use the debugless read so we don't flood kernel log
5576 * if IWL_DL_IO is set */
5577 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5578 i + RTC_INST_LOWER_BOUND);
5579 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5580 if (val != le32_to_cpu(*image)) {
5581 #if 0 /* Enable this if you want to see details */
5582 IWL_ERROR("uCode INST section is invalid at "
5583 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5584 i, val, *image);
5585 #endif
5586 rc = -EIO;
5587 errcnt++;
5588 if (errcnt >= 3)
5589 break;
5590 }
5591 }
5592
5593 iwl3945_release_nic_access(priv);
5594
5595 return rc;
5596 }
5597
5598
5599 /**
5600 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5601 * and verify its contents
5602 */
5603 static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5604 {
5605 __le32 *image;
5606 u32 len;
5607 int rc = 0;
5608
5609 /* Try bootstrap */
5610 image = (__le32 *)priv->ucode_boot.v_addr;
5611 len = priv->ucode_boot.len;
5612 rc = iwl3945_verify_inst_sparse(priv, image, len);
5613 if (rc == 0) {
5614 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5615 return 0;
5616 }
5617
5618 /* Try initialize */
5619 image = (__le32 *)priv->ucode_init.v_addr;
5620 len = priv->ucode_init.len;
5621 rc = iwl3945_verify_inst_sparse(priv, image, len);
5622 if (rc == 0) {
5623 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5624 return 0;
5625 }
5626
5627 /* Try runtime/protocol */
5628 image = (__le32 *)priv->ucode_code.v_addr;
5629 len = priv->ucode_code.len;
5630 rc = iwl3945_verify_inst_sparse(priv, image, len);
5631 if (rc == 0) {
5632 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5633 return 0;
5634 }
5635
5636 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5637
5638 /* Since nothing seems to match, show first several data entries in
5639 * instruction SRAM, so maybe visual inspection will give a clue.
5640 * Selection of bootstrap image (vs. other images) is arbitrary. */
5641 image = (__le32 *)priv->ucode_boot.v_addr;
5642 len = priv->ucode_boot.len;
5643 rc = iwl3945_verify_inst_full(priv, image, len);
5644
5645 return rc;
5646 }
5647
5648
5649 /* check contents of special bootstrap uCode SRAM */
5650 static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5651 {
5652 __le32 *image = priv->ucode_boot.v_addr;
5653 u32 len = priv->ucode_boot.len;
5654 u32 reg;
5655 u32 val;
5656
5657 IWL_DEBUG_INFO("Begin verify bsm\n");
5658
5659 /* verify BSM SRAM contents */
5660 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5661 for (reg = BSM_SRAM_LOWER_BOUND;
5662 reg < BSM_SRAM_LOWER_BOUND + len;
5663 reg += sizeof(u32), image ++) {
5664 val = iwl3945_read_prph(priv, reg);
5665 if (val != le32_to_cpu(*image)) {
5666 IWL_ERROR("BSM uCode verification failed at "
5667 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5668 BSM_SRAM_LOWER_BOUND,
5669 reg - BSM_SRAM_LOWER_BOUND, len,
5670 val, le32_to_cpu(*image));
5671 return -EIO;
5672 }
5673 }
5674
5675 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5676
5677 return 0;
5678 }
5679
5680 /**
5681 * iwl3945_load_bsm - Load bootstrap instructions
5682 *
5683 * BSM operation:
5684 *
5685 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5686 * in special SRAM that does not power down during RFKILL. When powering back
5687 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5688 * the bootstrap program into the on-board processor, and starts it.
5689 *
5690 * The bootstrap program loads (via DMA) instructions and data for a new
5691 * program from host DRAM locations indicated by the host driver in the
5692 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5693 * automatically.
5694 *
5695 * When initializing the NIC, the host driver points the BSM to the
5696 * "initialize" uCode image. This uCode sets up some internal data, then
5697 * notifies host via "initialize alive" that it is complete.
5698 *
5699 * The host then replaces the BSM_DRAM_* pointer values to point to the
5700 * normal runtime uCode instructions and a backup uCode data cache buffer
5701 * (filled initially with starting data values for the on-board processor),
5702 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5703 * which begins normal operation.
5704 *
5705 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5706 * the backup data cache in DRAM before SRAM is powered down.
5707 *
5708 * When powering back up, the BSM loads the bootstrap program. This reloads
5709 * the runtime uCode instructions and the backup data cache into SRAM,
5710 * and re-launches the runtime uCode from where it left off.
5711 */
5712 static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5713 {
5714 __le32 *image = priv->ucode_boot.v_addr;
5715 u32 len = priv->ucode_boot.len;
5716 dma_addr_t pinst;
5717 dma_addr_t pdata;
5718 u32 inst_len;
5719 u32 data_len;
5720 int rc;
5721 int i;
5722 u32 done;
5723 u32 reg_offset;
5724
5725 IWL_DEBUG_INFO("Begin load bsm\n");
5726
5727 /* make sure bootstrap program is no larger than BSM's SRAM size */
5728 if (len > IWL_MAX_BSM_SIZE)
5729 return -EINVAL;
5730
5731 /* Tell bootstrap uCode where to find the "Initialize" uCode
5732 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5733 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5734 * after the "initialize" uCode has run, to point to
5735 * runtime/protocol instructions and backup data cache. */
5736 pinst = priv->ucode_init.p_addr;
5737 pdata = priv->ucode_init_data.p_addr;
5738 inst_len = priv->ucode_init.len;
5739 data_len = priv->ucode_init_data.len;
5740
5741 rc = iwl3945_grab_nic_access(priv);
5742 if (rc)
5743 return rc;
5744
5745 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5746 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5747 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5748 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5749
5750 /* Fill BSM memory with bootstrap instructions */
5751 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5752 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5753 reg_offset += sizeof(u32), image++)
5754 _iwl3945_write_prph(priv, reg_offset,
5755 le32_to_cpu(*image));
5756
5757 rc = iwl3945_verify_bsm(priv);
5758 if (rc) {
5759 iwl3945_release_nic_access(priv);
5760 return rc;
5761 }
5762
5763 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5764 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5765 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5766 RTC_INST_LOWER_BOUND);
5767 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5768
5769 /* Load bootstrap code into instruction SRAM now,
5770 * to prepare to load "initialize" uCode */
5771 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5772 BSM_WR_CTRL_REG_BIT_START);
5773
5774 /* Wait for load of bootstrap uCode to finish */
5775 for (i = 0; i < 100; i++) {
5776 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5777 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5778 break;
5779 udelay(10);
5780 }
5781 if (i < 100)
5782 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5783 else {
5784 IWL_ERROR("BSM write did not complete!\n");
5785 return -EIO;
5786 }
5787
5788 /* Enable future boot loads whenever power management unit triggers it
5789 * (e.g. when powering back up after power-save shutdown) */
5790 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5791 BSM_WR_CTRL_REG_BIT_START_EN);
5792
5793 iwl3945_release_nic_access(priv);
5794
5795 return 0;
5796 }
5797
5798 static void iwl3945_nic_start(struct iwl3945_priv *priv)
5799 {
5800 /* Remove all resets to allow NIC to operate */
5801 iwl3945_write32(priv, CSR_RESET, 0);
5802 }
5803
5804 /**
5805 * iwl3945_read_ucode - Read uCode images from disk file.
5806 *
5807 * Copy into buffers for card to fetch via bus-mastering
5808 */
5809 static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5810 {
5811 struct iwl3945_ucode *ucode;
5812 int ret = 0;
5813 const struct firmware *ucode_raw;
5814 /* firmware file name contains uCode/driver compatibility version */
5815 const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
5816 u8 *src;
5817 size_t len;
5818 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5819
5820 /* Ask kernel firmware_class module to get the boot firmware off disk.
5821 * request_firmware() is synchronous, file is in memory on return. */
5822 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5823 if (ret < 0) {
5824 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5825 name, ret);
5826 goto error;
5827 }
5828
5829 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5830 name, ucode_raw->size);
5831
5832 /* Make sure that we got at least our header! */
5833 if (ucode_raw->size < sizeof(*ucode)) {
5834 IWL_ERROR("File size way too small!\n");
5835 ret = -EINVAL;
5836 goto err_release;
5837 }
5838
5839 /* Data from ucode file: header followed by uCode images */
5840 ucode = (void *)ucode_raw->data;
5841
5842 ver = le32_to_cpu(ucode->ver);
5843 inst_size = le32_to_cpu(ucode->inst_size);
5844 data_size = le32_to_cpu(ucode->data_size);
5845 init_size = le32_to_cpu(ucode->init_size);
5846 init_data_size = le32_to_cpu(ucode->init_data_size);
5847 boot_size = le32_to_cpu(ucode->boot_size);
5848
5849 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5850 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5851 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5852 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5853 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5854 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5855
5856 /* Verify size of file vs. image size info in file's header */
5857 if (ucode_raw->size < sizeof(*ucode) +
5858 inst_size + data_size + init_size +
5859 init_data_size + boot_size) {
5860
5861 IWL_DEBUG_INFO("uCode file size %d too small\n",
5862 (int)ucode_raw->size);
5863 ret = -EINVAL;
5864 goto err_release;
5865 }
5866
5867 /* Verify that uCode images will fit in card's SRAM */
5868 if (inst_size > IWL_MAX_INST_SIZE) {
5869 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5870 inst_size);
5871 ret = -EINVAL;
5872 goto err_release;
5873 }
5874
5875 if (data_size > IWL_MAX_DATA_SIZE) {
5876 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5877 data_size);
5878 ret = -EINVAL;
5879 goto err_release;
5880 }
5881 if (init_size > IWL_MAX_INST_SIZE) {
5882 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5883 init_size);
5884 ret = -EINVAL;
5885 goto err_release;
5886 }
5887 if (init_data_size > IWL_MAX_DATA_SIZE) {
5888 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5889 init_data_size);
5890 ret = -EINVAL;
5891 goto err_release;
5892 }
5893 if (boot_size > IWL_MAX_BSM_SIZE) {
5894 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5895 boot_size);
5896 ret = -EINVAL;
5897 goto err_release;
5898 }
5899
5900 /* Allocate ucode buffers for card's bus-master loading ... */
5901
5902 /* Runtime instructions and 2 copies of data:
5903 * 1) unmodified from disk
5904 * 2) backup cache for save/restore during power-downs */
5905 priv->ucode_code.len = inst_size;
5906 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5907
5908 priv->ucode_data.len = data_size;
5909 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5910
5911 priv->ucode_data_backup.len = data_size;
5912 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5913
5914 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5915 !priv->ucode_data_backup.v_addr)
5916 goto err_pci_alloc;
5917
5918 /* Initialization instructions and data */
5919 if (init_size && init_data_size) {
5920 priv->ucode_init.len = init_size;
5921 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5922
5923 priv->ucode_init_data.len = init_data_size;
5924 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5925
5926 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5927 goto err_pci_alloc;
5928 }
5929
5930 /* Bootstrap (instructions only, no data) */
5931 if (boot_size) {
5932 priv->ucode_boot.len = boot_size;
5933 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5934
5935 if (!priv->ucode_boot.v_addr)
5936 goto err_pci_alloc;
5937 }
5938
5939 /* Copy images into buffers for card's bus-master reads ... */
5940
5941 /* Runtime instructions (first block of data in file) */
5942 src = &ucode->data[0];
5943 len = priv->ucode_code.len;
5944 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5945 memcpy(priv->ucode_code.v_addr, src, len);
5946 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5947 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5948
5949 /* Runtime data (2nd block)
5950 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5951 src = &ucode->data[inst_size];
5952 len = priv->ucode_data.len;
5953 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5954 memcpy(priv->ucode_data.v_addr, src, len);
5955 memcpy(priv->ucode_data_backup.v_addr, src, len);
5956
5957 /* Initialization instructions (3rd block) */
5958 if (init_size) {
5959 src = &ucode->data[inst_size + data_size];
5960 len = priv->ucode_init.len;
5961 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5962 len);
5963 memcpy(priv->ucode_init.v_addr, src, len);
5964 }
5965
5966 /* Initialization data (4th block) */
5967 if (init_data_size) {
5968 src = &ucode->data[inst_size + data_size + init_size];
5969 len = priv->ucode_init_data.len;
5970 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5971 (int)len);
5972 memcpy(priv->ucode_init_data.v_addr, src, len);
5973 }
5974
5975 /* Bootstrap instructions (5th block) */
5976 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5977 len = priv->ucode_boot.len;
5978 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5979 (int)len);
5980 memcpy(priv->ucode_boot.v_addr, src, len);
5981
5982 /* We have our copies now, allow OS release its copies */
5983 release_firmware(ucode_raw);
5984 return 0;
5985
5986 err_pci_alloc:
5987 IWL_ERROR("failed to allocate pci memory\n");
5988 ret = -ENOMEM;
5989 iwl3945_dealloc_ucode_pci(priv);
5990
5991 err_release:
5992 release_firmware(ucode_raw);
5993
5994 error:
5995 return ret;
5996 }
5997
5998
5999 /**
6000 * iwl3945_set_ucode_ptrs - Set uCode address location
6001 *
6002 * Tell initialization uCode where to find runtime uCode.
6003 *
6004 * BSM registers initially contain pointers to initialization uCode.
6005 * We need to replace them to load runtime uCode inst and data,
6006 * and to save runtime data when powering down.
6007 */
6008 static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
6009 {
6010 dma_addr_t pinst;
6011 dma_addr_t pdata;
6012 int rc = 0;
6013 unsigned long flags;
6014
6015 /* bits 31:0 for 3945 */
6016 pinst = priv->ucode_code.p_addr;
6017 pdata = priv->ucode_data_backup.p_addr;
6018
6019 spin_lock_irqsave(&priv->lock, flags);
6020 rc = iwl3945_grab_nic_access(priv);
6021 if (rc) {
6022 spin_unlock_irqrestore(&priv->lock, flags);
6023 return rc;
6024 }
6025
6026 /* Tell bootstrap uCode where to find image to load */
6027 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6028 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6029 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
6030 priv->ucode_data.len);
6031
6032 /* Inst bytecount must be last to set up, bit 31 signals uCode
6033 * that all new ptr/size info is in place */
6034 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
6035 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6036
6037 iwl3945_release_nic_access(priv);
6038
6039 spin_unlock_irqrestore(&priv->lock, flags);
6040
6041 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6042
6043 return rc;
6044 }
6045
6046 /**
6047 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
6048 *
6049 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6050 *
6051 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6052 */
6053 static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
6054 {
6055 /* Check alive response for "valid" sign from uCode */
6056 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6057 /* We had an error bringing up the hardware, so take it
6058 * all the way back down so we can try again */
6059 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6060 goto restart;
6061 }
6062
6063 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6064 * This is a paranoid check, because we would not have gotten the
6065 * "initialize" alive if code weren't properly loaded. */
6066 if (iwl3945_verify_ucode(priv)) {
6067 /* Runtime instruction load was bad;
6068 * take it all the way back down so we can try again */
6069 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6070 goto restart;
6071 }
6072
6073 /* Send pointers to protocol/runtime uCode image ... init code will
6074 * load and launch runtime uCode, which will send us another "Alive"
6075 * notification. */
6076 IWL_DEBUG_INFO("Initialization Alive received.\n");
6077 if (iwl3945_set_ucode_ptrs(priv)) {
6078 /* Runtime instruction load won't happen;
6079 * take it all the way back down so we can try again */
6080 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6081 goto restart;
6082 }
6083 return;
6084
6085 restart:
6086 queue_work(priv->workqueue, &priv->restart);
6087 }
6088
6089
6090 /**
6091 * iwl3945_alive_start - called after REPLY_ALIVE notification received
6092 * from protocol/runtime uCode (initialization uCode's
6093 * Alive gets handled by iwl3945_init_alive_start()).
6094 */
6095 static void iwl3945_alive_start(struct iwl3945_priv *priv)
6096 {
6097 int rc = 0;
6098 int thermal_spin = 0;
6099 u32 rfkill;
6100
6101 IWL_DEBUG_INFO("Runtime Alive received.\n");
6102
6103 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6104 /* We had an error bringing up the hardware, so take it
6105 * all the way back down so we can try again */
6106 IWL_DEBUG_INFO("Alive failed.\n");
6107 goto restart;
6108 }
6109
6110 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6111 * This is a paranoid check, because we would not have gotten the
6112 * "runtime" alive if code weren't properly loaded. */
6113 if (iwl3945_verify_ucode(priv)) {
6114 /* Runtime instruction load was bad;
6115 * take it all the way back down so we can try again */
6116 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6117 goto restart;
6118 }
6119
6120 iwl3945_clear_stations_table(priv);
6121
6122 rc = iwl3945_grab_nic_access(priv);
6123 if (rc) {
6124 IWL_WARNING("Can not read rfkill status from adapter\n");
6125 return;
6126 }
6127
6128 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
6129 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
6130 iwl3945_release_nic_access(priv);
6131
6132 if (rfkill & 0x1) {
6133 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6134 /* if rfkill is not on, then wait for thermal
6135 * sensor in adapter to kick in */
6136 while (iwl3945_hw_get_temperature(priv) == 0) {
6137 thermal_spin++;
6138 udelay(10);
6139 }
6140
6141 if (thermal_spin)
6142 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
6143 thermal_spin * 10);
6144 } else
6145 set_bit(STATUS_RF_KILL_HW, &priv->status);
6146
6147 /* After the ALIVE response, we can send commands to 3945 uCode */
6148 set_bit(STATUS_ALIVE, &priv->status);
6149
6150 /* Clear out the uCode error bit if it is set */
6151 clear_bit(STATUS_FW_ERROR, &priv->status);
6152
6153 if (iwl3945_is_rfkill(priv))
6154 return;
6155
6156 ieee80211_start_queues(priv->hw);
6157
6158 priv->active_rate = priv->rates_mask;
6159 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6160
6161 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
6162
6163 if (iwl3945_is_associated(priv)) {
6164 struct iwl3945_rxon_cmd *active_rxon =
6165 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
6166
6167 memcpy(&priv->staging_rxon, &priv->active_rxon,
6168 sizeof(priv->staging_rxon));
6169 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6170 } else {
6171 /* Initialize our rx_config data */
6172 iwl3945_connection_init_rx_config(priv);
6173 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6174 }
6175
6176 /* Configure Bluetooth device coexistence support */
6177 iwl3945_send_bt_config(priv);
6178
6179 /* Configure the adapter for unassociated operation */
6180 iwl3945_commit_rxon(priv);
6181
6182 /* At this point, the NIC is initialized and operational */
6183 priv->notif_missed_beacons = 0;
6184 set_bit(STATUS_READY, &priv->status);
6185
6186 iwl3945_reg_txpower_periodic(priv);
6187
6188 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6189 wake_up_interruptible(&priv->wait_command_queue);
6190
6191 if (priv->error_recovering)
6192 iwl3945_error_recovery(priv);
6193
6194 return;
6195
6196 restart:
6197 queue_work(priv->workqueue, &priv->restart);
6198 }
6199
6200 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
6201
6202 static void __iwl3945_down(struct iwl3945_priv *priv)
6203 {
6204 unsigned long flags;
6205 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6206 struct ieee80211_conf *conf = NULL;
6207
6208 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6209
6210 conf = ieee80211_get_hw_conf(priv->hw);
6211
6212 if (!exit_pending)
6213 set_bit(STATUS_EXIT_PENDING, &priv->status);
6214
6215 iwl3945_clear_stations_table(priv);
6216
6217 /* Unblock any waiting calls */
6218 wake_up_interruptible_all(&priv->wait_command_queue);
6219
6220 /* Wipe out the EXIT_PENDING status bit if we are not actually
6221 * exiting the module */
6222 if (!exit_pending)
6223 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6224
6225 /* stop and reset the on-board processor */
6226 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6227
6228 /* tell the device to stop sending interrupts */
6229 iwl3945_disable_interrupts(priv);
6230
6231 if (priv->mac80211_registered)
6232 ieee80211_stop_queues(priv->hw);
6233
6234 /* If we have not previously called iwl3945_init() then
6235 * clear all bits but the RF Kill and SUSPEND bits and return */
6236 if (!iwl3945_is_init(priv)) {
6237 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6238 STATUS_RF_KILL_HW |
6239 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6240 STATUS_RF_KILL_SW |
6241 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6242 STATUS_IN_SUSPEND;
6243 goto exit;
6244 }
6245
6246 /* ...otherwise clear out all the status bits but the RF Kill and
6247 * SUSPEND bits and continue taking the NIC down. */
6248 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6249 STATUS_RF_KILL_HW |
6250 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6251 STATUS_RF_KILL_SW |
6252 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6253 STATUS_IN_SUSPEND |
6254 test_bit(STATUS_FW_ERROR, &priv->status) <<
6255 STATUS_FW_ERROR;
6256
6257 spin_lock_irqsave(&priv->lock, flags);
6258 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
6259 spin_unlock_irqrestore(&priv->lock, flags);
6260
6261 iwl3945_hw_txq_ctx_stop(priv);
6262 iwl3945_hw_rxq_stop(priv);
6263
6264 spin_lock_irqsave(&priv->lock, flags);
6265 if (!iwl3945_grab_nic_access(priv)) {
6266 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
6267 APMG_CLK_VAL_DMA_CLK_RQT);
6268 iwl3945_release_nic_access(priv);
6269 }
6270 spin_unlock_irqrestore(&priv->lock, flags);
6271
6272 udelay(5);
6273
6274 iwl3945_hw_nic_stop_master(priv);
6275 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6276 iwl3945_hw_nic_reset(priv);
6277
6278 exit:
6279 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
6280
6281 if (priv->ibss_beacon)
6282 dev_kfree_skb(priv->ibss_beacon);
6283 priv->ibss_beacon = NULL;
6284
6285 /* clear out any free frames */
6286 iwl3945_clear_free_frames(priv);
6287 }
6288
6289 static void iwl3945_down(struct iwl3945_priv *priv)
6290 {
6291 mutex_lock(&priv->mutex);
6292 __iwl3945_down(priv);
6293 mutex_unlock(&priv->mutex);
6294
6295 iwl3945_cancel_deferred_work(priv);
6296 }
6297
6298 #define MAX_HW_RESTARTS 5
6299
6300 static int __iwl3945_up(struct iwl3945_priv *priv)
6301 {
6302 int rc, i;
6303
6304 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6305 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6306 return -EIO;
6307 }
6308
6309 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6310 IWL_WARNING("Radio disabled by SW RF kill (module "
6311 "parameter)\n");
6312 return -ENODEV;
6313 }
6314
6315 /* If platform's RF_KILL switch is NOT set to KILL */
6316 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
6317 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6318 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6319 else {
6320 set_bit(STATUS_RF_KILL_HW, &priv->status);
6321 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6322 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6323 return -ENODEV;
6324 }
6325 }
6326
6327 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6328 IWL_ERROR("ucode not available for device bringup\n");
6329 return -EIO;
6330 }
6331
6332 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6333
6334 rc = iwl3945_hw_nic_init(priv);
6335 if (rc) {
6336 IWL_ERROR("Unable to int nic\n");
6337 return rc;
6338 }
6339
6340 /* make sure rfkill handshake bits are cleared */
6341 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6342 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
6343 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6344
6345 /* clear (again), then enable host interrupts */
6346 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6347 iwl3945_enable_interrupts(priv);
6348
6349 /* really make sure rfkill handshake bits are cleared */
6350 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6351 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6352
6353 /* Copy original ucode data image from disk into backup cache.
6354 * This will be used to initialize the on-board processor's
6355 * data SRAM for a clean start when the runtime program first loads. */
6356 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6357 priv->ucode_data.len);
6358
6359 /* We return success when we resume from suspend and rf_kill is on. */
6360 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6361 return 0;
6362
6363 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6364
6365 iwl3945_clear_stations_table(priv);
6366
6367 /* load bootstrap state machine,
6368 * load bootstrap program into processor's memory,
6369 * prepare to load the "initialize" uCode */
6370 rc = iwl3945_load_bsm(priv);
6371
6372 if (rc) {
6373 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6374 continue;
6375 }
6376
6377 /* start card; "initialize" will load runtime ucode */
6378 iwl3945_nic_start(priv);
6379
6380 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6381
6382 return 0;
6383 }
6384
6385 set_bit(STATUS_EXIT_PENDING, &priv->status);
6386 __iwl3945_down(priv);
6387
6388 /* tried to restart and config the device for as long as our
6389 * patience could withstand */
6390 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6391 return -EIO;
6392 }
6393
6394
6395 /*****************************************************************************
6396 *
6397 * Workqueue callbacks
6398 *
6399 *****************************************************************************/
6400
6401 static void iwl3945_bg_init_alive_start(struct work_struct *data)
6402 {
6403 struct iwl3945_priv *priv =
6404 container_of(data, struct iwl3945_priv, init_alive_start.work);
6405
6406 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6407 return;
6408
6409 mutex_lock(&priv->mutex);
6410 iwl3945_init_alive_start(priv);
6411 mutex_unlock(&priv->mutex);
6412 }
6413
6414 static void iwl3945_bg_alive_start(struct work_struct *data)
6415 {
6416 struct iwl3945_priv *priv =
6417 container_of(data, struct iwl3945_priv, alive_start.work);
6418
6419 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6420 return;
6421
6422 mutex_lock(&priv->mutex);
6423 iwl3945_alive_start(priv);
6424 mutex_unlock(&priv->mutex);
6425 }
6426
6427 static void iwl3945_bg_rf_kill(struct work_struct *work)
6428 {
6429 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
6430
6431 wake_up_interruptible(&priv->wait_command_queue);
6432
6433 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6434 return;
6435
6436 mutex_lock(&priv->mutex);
6437
6438 if (!iwl3945_is_rfkill(priv)) {
6439 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6440 "HW and/or SW RF Kill no longer active, restarting "
6441 "device\n");
6442 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6443 queue_work(priv->workqueue, &priv->restart);
6444 } else {
6445
6446 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6447 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6448 "disabled by SW switch\n");
6449 else
6450 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6451 "Kill switch must be turned off for "
6452 "wireless networking to work.\n");
6453 }
6454 mutex_unlock(&priv->mutex);
6455 }
6456
6457 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6458
6459 static void iwl3945_bg_scan_check(struct work_struct *data)
6460 {
6461 struct iwl3945_priv *priv =
6462 container_of(data, struct iwl3945_priv, scan_check.work);
6463
6464 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6465 return;
6466
6467 mutex_lock(&priv->mutex);
6468 if (test_bit(STATUS_SCANNING, &priv->status) ||
6469 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6470 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6471 "Scan completion watchdog resetting adapter (%dms)\n",
6472 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6473
6474 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6475 iwl3945_send_scan_abort(priv);
6476 }
6477 mutex_unlock(&priv->mutex);
6478 }
6479
6480 static void iwl3945_bg_request_scan(struct work_struct *data)
6481 {
6482 struct iwl3945_priv *priv =
6483 container_of(data, struct iwl3945_priv, request_scan);
6484 struct iwl3945_host_cmd cmd = {
6485 .id = REPLY_SCAN_CMD,
6486 .len = sizeof(struct iwl3945_scan_cmd),
6487 .meta.flags = CMD_SIZE_HUGE,
6488 };
6489 int rc = 0;
6490 struct iwl3945_scan_cmd *scan;
6491 struct ieee80211_conf *conf = NULL;
6492 u8 direct_mask;
6493 int phymode;
6494
6495 conf = ieee80211_get_hw_conf(priv->hw);
6496
6497 mutex_lock(&priv->mutex);
6498
6499 if (!iwl3945_is_ready(priv)) {
6500 IWL_WARNING("request scan called when driver not ready.\n");
6501 goto done;
6502 }
6503
6504 /* Make sure the scan wasn't cancelled before this queued work
6505 * was given the chance to run... */
6506 if (!test_bit(STATUS_SCANNING, &priv->status))
6507 goto done;
6508
6509 /* This should never be called or scheduled if there is currently
6510 * a scan active in the hardware. */
6511 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6512 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6513 "Ignoring second request.\n");
6514 rc = -EIO;
6515 goto done;
6516 }
6517
6518 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6519 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6520 goto done;
6521 }
6522
6523 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6524 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6525 goto done;
6526 }
6527
6528 if (iwl3945_is_rfkill(priv)) {
6529 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6530 goto done;
6531 }
6532
6533 if (!test_bit(STATUS_READY, &priv->status)) {
6534 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6535 goto done;
6536 }
6537
6538 if (!priv->scan_bands) {
6539 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6540 goto done;
6541 }
6542
6543 if (!priv->scan) {
6544 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6545 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6546 if (!priv->scan) {
6547 rc = -ENOMEM;
6548 goto done;
6549 }
6550 }
6551 scan = priv->scan;
6552 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6553
6554 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6555 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6556
6557 if (iwl3945_is_associated(priv)) {
6558 u16 interval = 0;
6559 u32 extra;
6560 u32 suspend_time = 100;
6561 u32 scan_suspend_time = 100;
6562 unsigned long flags;
6563
6564 IWL_DEBUG_INFO("Scanning while associated...\n");
6565
6566 spin_lock_irqsave(&priv->lock, flags);
6567 interval = priv->beacon_int;
6568 spin_unlock_irqrestore(&priv->lock, flags);
6569
6570 scan->suspend_time = 0;
6571 scan->max_out_time = cpu_to_le32(200 * 1024);
6572 if (!interval)
6573 interval = suspend_time;
6574 /*
6575 * suspend time format:
6576 * 0-19: beacon interval in usec (time before exec.)
6577 * 20-23: 0
6578 * 24-31: number of beacons (suspend between channels)
6579 */
6580
6581 extra = (suspend_time / interval) << 24;
6582 scan_suspend_time = 0xFF0FFFFF &
6583 (extra | ((suspend_time % interval) * 1024));
6584
6585 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6586 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6587 scan_suspend_time, interval);
6588 }
6589
6590 /* We should add the ability for user to lock to PASSIVE ONLY */
6591 if (priv->one_direct_scan) {
6592 IWL_DEBUG_SCAN
6593 ("Kicking off one direct scan for '%s'\n",
6594 iwl3945_escape_essid(priv->direct_ssid,
6595 priv->direct_ssid_len));
6596 scan->direct_scan[0].id = WLAN_EID_SSID;
6597 scan->direct_scan[0].len = priv->direct_ssid_len;
6598 memcpy(scan->direct_scan[0].ssid,
6599 priv->direct_ssid, priv->direct_ssid_len);
6600 direct_mask = 1;
6601 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
6602 scan->direct_scan[0].id = WLAN_EID_SSID;
6603 scan->direct_scan[0].len = priv->essid_len;
6604 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6605 direct_mask = 1;
6606 } else
6607 direct_mask = 0;
6608
6609 /* We don't build a direct scan probe request; the uCode will do
6610 * that based on the direct_mask added to each channel entry */
6611 scan->tx_cmd.len = cpu_to_le16(
6612 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6613 IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
6614 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6615 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6616 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6617
6618 /* flags + rate selection */
6619
6620 switch (priv->scan_bands) {
6621 case 2:
6622 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6623 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6624 scan->good_CRC_th = 0;
6625 phymode = MODE_IEEE80211G;
6626 break;
6627
6628 case 1:
6629 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6630 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6631 phymode = MODE_IEEE80211A;
6632 break;
6633
6634 default:
6635 IWL_WARNING("Invalid scan band count\n");
6636 goto done;
6637 }
6638
6639 /* select Rx antennas */
6640 scan->flags |= iwl3945_get_antenna_flags(priv);
6641
6642 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6643 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6644
6645 if (direct_mask)
6646 IWL_DEBUG_SCAN
6647 ("Initiating direct scan for %s.\n",
6648 iwl3945_escape_essid(priv->essid, priv->essid_len));
6649 else
6650 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
6651
6652 scan->channel_count =
6653 iwl3945_get_channels_for_scan(
6654 priv, phymode, 1, /* active */
6655 direct_mask,
6656 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6657
6658 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6659 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6660 cmd.data = scan;
6661 scan->len = cpu_to_le16(cmd.len);
6662
6663 set_bit(STATUS_SCAN_HW, &priv->status);
6664 rc = iwl3945_send_cmd_sync(priv, &cmd);
6665 if (rc)
6666 goto done;
6667
6668 queue_delayed_work(priv->workqueue, &priv->scan_check,
6669 IWL_SCAN_CHECK_WATCHDOG);
6670
6671 mutex_unlock(&priv->mutex);
6672 return;
6673
6674 done:
6675 /* inform mac80211 scan aborted */
6676 queue_work(priv->workqueue, &priv->scan_completed);
6677 mutex_unlock(&priv->mutex);
6678 }
6679
6680 static void iwl3945_bg_up(struct work_struct *data)
6681 {
6682 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6683
6684 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6685 return;
6686
6687 mutex_lock(&priv->mutex);
6688 __iwl3945_up(priv);
6689 mutex_unlock(&priv->mutex);
6690 }
6691
6692 static void iwl3945_bg_restart(struct work_struct *data)
6693 {
6694 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6695
6696 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6697 return;
6698
6699 iwl3945_down(priv);
6700 queue_work(priv->workqueue, &priv->up);
6701 }
6702
6703 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6704 {
6705 struct iwl3945_priv *priv =
6706 container_of(data, struct iwl3945_priv, rx_replenish);
6707
6708 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6709 return;
6710
6711 mutex_lock(&priv->mutex);
6712 iwl3945_rx_replenish(priv);
6713 mutex_unlock(&priv->mutex);
6714 }
6715
6716 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6717
6718 static void iwl3945_bg_post_associate(struct work_struct *data)
6719 {
6720 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
6721 post_associate.work);
6722
6723 int rc = 0;
6724 struct ieee80211_conf *conf = NULL;
6725 DECLARE_MAC_BUF(mac);
6726
6727 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6728 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6729 return;
6730 }
6731
6732
6733 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6734 priv->assoc_id,
6735 print_mac(mac, priv->active_rxon.bssid_addr));
6736
6737 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6738 return;
6739
6740 mutex_lock(&priv->mutex);
6741
6742 if (!priv->vif || !priv->is_open) {
6743 mutex_unlock(&priv->mutex);
6744 return;
6745 }
6746 iwl3945_scan_cancel_timeout(priv, 200);
6747
6748 conf = ieee80211_get_hw_conf(priv->hw);
6749
6750 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6751 iwl3945_commit_rxon(priv);
6752
6753 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6754 iwl3945_setup_rxon_timing(priv);
6755 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6756 sizeof(priv->rxon_timing), &priv->rxon_timing);
6757 if (rc)
6758 IWL_WARNING("REPLY_RXON_TIMING failed - "
6759 "Attempting to continue.\n");
6760
6761 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6762
6763 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6764
6765 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6766 priv->assoc_id, priv->beacon_int);
6767
6768 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6769 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6770 else
6771 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6772
6773 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6774 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6775 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6776 else
6777 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6778
6779 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6780 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6781
6782 }
6783
6784 iwl3945_commit_rxon(priv);
6785
6786 switch (priv->iw_mode) {
6787 case IEEE80211_IF_TYPE_STA:
6788 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6789 break;
6790
6791 case IEEE80211_IF_TYPE_IBSS:
6792
6793 /* clear out the station table */
6794 iwl3945_clear_stations_table(priv);
6795
6796 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6797 iwl3945_add_station(priv, priv->bssid, 0, 0);
6798 iwl3945_sync_sta(priv, IWL_STA_ID,
6799 (priv->phymode == MODE_IEEE80211A)?
6800 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6801 CMD_ASYNC);
6802 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6803 iwl3945_send_beacon_cmd(priv);
6804
6805 break;
6806
6807 default:
6808 IWL_ERROR("%s Should not be called in %d mode\n",
6809 __FUNCTION__, priv->iw_mode);
6810 break;
6811 }
6812
6813 iwl3945_sequence_reset(priv);
6814
6815 #ifdef CONFIG_IWL3945_QOS
6816 iwl3945_activate_qos(priv, 0);
6817 #endif /* CONFIG_IWL3945_QOS */
6818 /* we have just associated, don't start scan too early */
6819 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6820 mutex_unlock(&priv->mutex);
6821 }
6822
6823 static void iwl3945_bg_abort_scan(struct work_struct *work)
6824 {
6825 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6826
6827 if (!iwl3945_is_ready(priv))
6828 return;
6829
6830 mutex_lock(&priv->mutex);
6831
6832 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6833 iwl3945_send_scan_abort(priv);
6834
6835 mutex_unlock(&priv->mutex);
6836 }
6837
6838 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6839
6840 static void iwl3945_bg_scan_completed(struct work_struct *work)
6841 {
6842 struct iwl3945_priv *priv =
6843 container_of(work, struct iwl3945_priv, scan_completed);
6844
6845 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6846
6847 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6848 return;
6849
6850 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6851 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
6852
6853 ieee80211_scan_completed(priv->hw);
6854
6855 /* Since setting the TXPOWER may have been deferred while
6856 * performing the scan, fire one off */
6857 mutex_lock(&priv->mutex);
6858 iwl3945_hw_reg_send_txpower(priv);
6859 mutex_unlock(&priv->mutex);
6860 }
6861
6862 /*****************************************************************************
6863 *
6864 * mac80211 entry point functions
6865 *
6866 *****************************************************************************/
6867
6868 #define UCODE_READY_TIMEOUT (2 * HZ)
6869
6870 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6871 {
6872 struct iwl3945_priv *priv = hw->priv;
6873 int ret;
6874
6875 IWL_DEBUG_MAC80211("enter\n");
6876
6877 if (pci_enable_device(priv->pci_dev)) {
6878 IWL_ERROR("Fail to pci_enable_device\n");
6879 return -ENODEV;
6880 }
6881 pci_restore_state(priv->pci_dev);
6882 pci_enable_msi(priv->pci_dev);
6883
6884 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6885 DRV_NAME, priv);
6886 if (ret) {
6887 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6888 goto out_disable_msi;
6889 }
6890
6891 /* we should be verifying the device is ready to be opened */
6892 mutex_lock(&priv->mutex);
6893
6894 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6895 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6896 * ucode filename and max sizes are card-specific. */
6897
6898 if (!priv->ucode_code.len) {
6899 ret = iwl3945_read_ucode(priv);
6900 if (ret) {
6901 IWL_ERROR("Could not read microcode: %d\n", ret);
6902 mutex_unlock(&priv->mutex);
6903 goto out_release_irq;
6904 }
6905 }
6906
6907 ret = __iwl3945_up(priv);
6908
6909 mutex_unlock(&priv->mutex);
6910
6911 if (ret)
6912 goto out_release_irq;
6913
6914 IWL_DEBUG_INFO("Start UP work.\n");
6915
6916 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6917 return 0;
6918
6919 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6920 * mac80211 will not be run successfully. */
6921 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6922 test_bit(STATUS_READY, &priv->status),
6923 UCODE_READY_TIMEOUT);
6924 if (!ret) {
6925 if (!test_bit(STATUS_READY, &priv->status)) {
6926 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6927 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6928 ret = -ETIMEDOUT;
6929 goto out_release_irq;
6930 }
6931 }
6932
6933 priv->is_open = 1;
6934 IWL_DEBUG_MAC80211("leave\n");
6935 return 0;
6936
6937 out_release_irq:
6938 free_irq(priv->pci_dev->irq, priv);
6939 out_disable_msi:
6940 pci_disable_msi(priv->pci_dev);
6941 pci_disable_device(priv->pci_dev);
6942 priv->is_open = 0;
6943 IWL_DEBUG_MAC80211("leave - failed\n");
6944 return ret;
6945 }
6946
6947 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6948 {
6949 struct iwl3945_priv *priv = hw->priv;
6950
6951 IWL_DEBUG_MAC80211("enter\n");
6952
6953 if (!priv->is_open) {
6954 IWL_DEBUG_MAC80211("leave - skip\n");
6955 return;
6956 }
6957
6958 priv->is_open = 0;
6959
6960 if (iwl3945_is_ready_rf(priv)) {
6961 /* stop mac, cancel any scan request and clear
6962 * RXON_FILTER_ASSOC_MSK BIT
6963 */
6964 mutex_lock(&priv->mutex);
6965 iwl3945_scan_cancel_timeout(priv, 100);
6966 cancel_delayed_work(&priv->post_associate);
6967 mutex_unlock(&priv->mutex);
6968 }
6969
6970 iwl3945_down(priv);
6971
6972 flush_workqueue(priv->workqueue);
6973 free_irq(priv->pci_dev->irq, priv);
6974 pci_disable_msi(priv->pci_dev);
6975 pci_save_state(priv->pci_dev);
6976 pci_disable_device(priv->pci_dev);
6977
6978 IWL_DEBUG_MAC80211("leave\n");
6979 }
6980
6981 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
6982 struct ieee80211_tx_control *ctl)
6983 {
6984 struct iwl3945_priv *priv = hw->priv;
6985
6986 IWL_DEBUG_MAC80211("enter\n");
6987
6988 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6989 IWL_DEBUG_MAC80211("leave - monitor\n");
6990 return -1;
6991 }
6992
6993 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6994 ctl->tx_rate);
6995
6996 if (iwl3945_tx_skb(priv, skb, ctl))
6997 dev_kfree_skb_any(skb);
6998
6999 IWL_DEBUG_MAC80211("leave\n");
7000 return 0;
7001 }
7002
7003 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
7004 struct ieee80211_if_init_conf *conf)
7005 {
7006 struct iwl3945_priv *priv = hw->priv;
7007 unsigned long flags;
7008 DECLARE_MAC_BUF(mac);
7009
7010 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
7011
7012 if (priv->vif) {
7013 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
7014 return -EOPNOTSUPP;
7015 }
7016
7017 spin_lock_irqsave(&priv->lock, flags);
7018 priv->vif = conf->vif;
7019
7020 spin_unlock_irqrestore(&priv->lock, flags);
7021
7022 mutex_lock(&priv->mutex);
7023
7024 if (conf->mac_addr) {
7025 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
7026 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7027 }
7028
7029 if (iwl3945_is_ready(priv))
7030 iwl3945_set_mode(priv, conf->type);
7031
7032 mutex_unlock(&priv->mutex);
7033
7034 IWL_DEBUG_MAC80211("leave\n");
7035 return 0;
7036 }
7037
7038 /**
7039 * iwl3945_mac_config - mac80211 config callback
7040 *
7041 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7042 * be set inappropriately and the driver currently sets the hardware up to
7043 * use it whenever needed.
7044 */
7045 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
7046 {
7047 struct iwl3945_priv *priv = hw->priv;
7048 const struct iwl3945_channel_info *ch_info;
7049 unsigned long flags;
7050 int ret = 0;
7051
7052 mutex_lock(&priv->mutex);
7053 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7054
7055 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7056
7057 if (!iwl3945_is_ready(priv)) {
7058 IWL_DEBUG_MAC80211("leave - not ready\n");
7059 ret = -EIO;
7060 goto out;
7061 }
7062
7063 if (unlikely(!iwl3945_param_disable_hw_scan &&
7064 test_bit(STATUS_SCANNING, &priv->status))) {
7065 IWL_DEBUG_MAC80211("leave - scanning\n");
7066 set_bit(STATUS_CONF_PENDING, &priv->status);
7067 mutex_unlock(&priv->mutex);
7068 return 0;
7069 }
7070
7071 spin_lock_irqsave(&priv->lock, flags);
7072
7073 ch_info = iwl3945_get_channel_info(priv, conf->phymode, conf->channel);
7074 if (!is_channel_valid(ch_info)) {
7075 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7076 conf->channel, conf->phymode);
7077 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7078 spin_unlock_irqrestore(&priv->lock, flags);
7079 ret = -EINVAL;
7080 goto out;
7081 }
7082
7083 iwl3945_set_rxon_channel(priv, conf->phymode, conf->channel);
7084
7085 iwl3945_set_flags_for_phymode(priv, conf->phymode);
7086
7087 /* The list of supported rates and rate mask can be different
7088 * for each phymode; since the phymode may have changed, reset
7089 * the rate mask to what mac80211 lists */
7090 iwl3945_set_rate(priv);
7091
7092 spin_unlock_irqrestore(&priv->lock, flags);
7093
7094 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7095 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
7096 iwl3945_hw_channel_switch(priv, conf->channel);
7097 goto out;
7098 }
7099 #endif
7100
7101 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
7102
7103 if (!conf->radio_enabled) {
7104 IWL_DEBUG_MAC80211("leave - radio disabled\n");
7105 goto out;
7106 }
7107
7108 if (iwl3945_is_rfkill(priv)) {
7109 IWL_DEBUG_MAC80211("leave - RF kill\n");
7110 ret = -EIO;
7111 goto out;
7112 }
7113
7114 iwl3945_set_rate(priv);
7115
7116 if (memcmp(&priv->active_rxon,
7117 &priv->staging_rxon, sizeof(priv->staging_rxon)))
7118 iwl3945_commit_rxon(priv);
7119 else
7120 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7121
7122 IWL_DEBUG_MAC80211("leave\n");
7123
7124 out:
7125 clear_bit(STATUS_CONF_PENDING, &priv->status);
7126 mutex_unlock(&priv->mutex);
7127 return ret;
7128 }
7129
7130 static void iwl3945_config_ap(struct iwl3945_priv *priv)
7131 {
7132 int rc = 0;
7133
7134 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7135 return;
7136
7137 /* The following should be done only at AP bring up */
7138 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7139
7140 /* RXON - unassoc (to set timing command) */
7141 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7142 iwl3945_commit_rxon(priv);
7143
7144 /* RXON Timing */
7145 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
7146 iwl3945_setup_rxon_timing(priv);
7147 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7148 sizeof(priv->rxon_timing), &priv->rxon_timing);
7149 if (rc)
7150 IWL_WARNING("REPLY_RXON_TIMING failed - "
7151 "Attempting to continue.\n");
7152
7153 /* FIXME: what should be the assoc_id for AP? */
7154 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7155 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7156 priv->staging_rxon.flags |=
7157 RXON_FLG_SHORT_PREAMBLE_MSK;
7158 else
7159 priv->staging_rxon.flags &=
7160 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7161
7162 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7163 if (priv->assoc_capability &
7164 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7165 priv->staging_rxon.flags |=
7166 RXON_FLG_SHORT_SLOT_MSK;
7167 else
7168 priv->staging_rxon.flags &=
7169 ~RXON_FLG_SHORT_SLOT_MSK;
7170
7171 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7172 priv->staging_rxon.flags &=
7173 ~RXON_FLG_SHORT_SLOT_MSK;
7174 }
7175 /* restore RXON assoc */
7176 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7177 iwl3945_commit_rxon(priv);
7178 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
7179 }
7180 iwl3945_send_beacon_cmd(priv);
7181
7182 /* FIXME - we need to add code here to detect a totally new
7183 * configuration, reset the AP, unassoc, rxon timing, assoc,
7184 * clear sta table, add BCAST sta... */
7185 }
7186
7187 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
7188 struct ieee80211_vif *vif,
7189 struct ieee80211_if_conf *conf)
7190 {
7191 struct iwl3945_priv *priv = hw->priv;
7192 DECLARE_MAC_BUF(mac);
7193 unsigned long flags;
7194 int rc;
7195
7196 if (conf == NULL)
7197 return -EIO;
7198
7199 /* XXX: this MUST use conf->mac_addr */
7200
7201 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7202 (!conf->beacon || !conf->ssid_len)) {
7203 IWL_DEBUG_MAC80211
7204 ("Leaving in AP mode because HostAPD is not ready.\n");
7205 return 0;
7206 }
7207
7208 if (!iwl3945_is_alive(priv))
7209 return -EAGAIN;
7210
7211 mutex_lock(&priv->mutex);
7212
7213 if (conf->bssid)
7214 IWL_DEBUG_MAC80211("bssid: %s\n",
7215 print_mac(mac, conf->bssid));
7216
7217 /*
7218 * very dubious code was here; the probe filtering flag is never set:
7219 *
7220 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7221 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
7222 */
7223 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
7224 IWL_DEBUG_MAC80211("leave - scanning\n");
7225 mutex_unlock(&priv->mutex);
7226 return 0;
7227 }
7228
7229 if (priv->vif != vif) {
7230 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
7231 mutex_unlock(&priv->mutex);
7232 return 0;
7233 }
7234
7235 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7236 if (!conf->bssid) {
7237 conf->bssid = priv->mac_addr;
7238 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
7239 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7240 print_mac(mac, conf->bssid));
7241 }
7242 if (priv->ibss_beacon)
7243 dev_kfree_skb(priv->ibss_beacon);
7244
7245 priv->ibss_beacon = conf->beacon;
7246 }
7247
7248 if (iwl3945_is_rfkill(priv))
7249 goto done;
7250
7251 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7252 !is_multicast_ether_addr(conf->bssid)) {
7253 /* If there is currently a HW scan going on in the background
7254 * then we need to cancel it else the RXON below will fail. */
7255 if (iwl3945_scan_cancel_timeout(priv, 100)) {
7256 IWL_WARNING("Aborted scan still in progress "
7257 "after 100ms\n");
7258 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7259 mutex_unlock(&priv->mutex);
7260 return -EAGAIN;
7261 }
7262 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7263
7264 /* TODO: Audit driver for usage of these members and see
7265 * if mac80211 deprecates them (priv->bssid looks like it
7266 * shouldn't be there, but I haven't scanned the IBSS code
7267 * to verify) - jpk */
7268 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7269
7270 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7271 iwl3945_config_ap(priv);
7272 else {
7273 rc = iwl3945_commit_rxon(priv);
7274 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
7275 iwl3945_add_station(priv,
7276 priv->active_rxon.bssid_addr, 1, 0);
7277 }
7278
7279 } else {
7280 iwl3945_scan_cancel_timeout(priv, 100);
7281 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7282 iwl3945_commit_rxon(priv);
7283 }
7284
7285 done:
7286 spin_lock_irqsave(&priv->lock, flags);
7287 if (!conf->ssid_len)
7288 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7289 else
7290 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7291
7292 priv->essid_len = conf->ssid_len;
7293 spin_unlock_irqrestore(&priv->lock, flags);
7294
7295 IWL_DEBUG_MAC80211("leave\n");
7296 mutex_unlock(&priv->mutex);
7297
7298 return 0;
7299 }
7300
7301 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
7302 unsigned int changed_flags,
7303 unsigned int *total_flags,
7304 int mc_count, struct dev_addr_list *mc_list)
7305 {
7306 /*
7307 * XXX: dummy
7308 * see also iwl3945_connection_init_rx_config
7309 */
7310 *total_flags = 0;
7311 }
7312
7313 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
7314 struct ieee80211_if_init_conf *conf)
7315 {
7316 struct iwl3945_priv *priv = hw->priv;
7317
7318 IWL_DEBUG_MAC80211("enter\n");
7319
7320 mutex_lock(&priv->mutex);
7321
7322 if (iwl3945_is_ready_rf(priv)) {
7323 iwl3945_scan_cancel_timeout(priv, 100);
7324 cancel_delayed_work(&priv->post_associate);
7325 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7326 iwl3945_commit_rxon(priv);
7327 }
7328 if (priv->vif == conf->vif) {
7329 priv->vif = NULL;
7330 memset(priv->bssid, 0, ETH_ALEN);
7331 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7332 priv->essid_len = 0;
7333 }
7334 mutex_unlock(&priv->mutex);
7335
7336 IWL_DEBUG_MAC80211("leave\n");
7337 }
7338
7339 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
7340 {
7341 int rc = 0;
7342 unsigned long flags;
7343 struct iwl3945_priv *priv = hw->priv;
7344
7345 IWL_DEBUG_MAC80211("enter\n");
7346
7347 mutex_lock(&priv->mutex);
7348 spin_lock_irqsave(&priv->lock, flags);
7349
7350 if (!iwl3945_is_ready_rf(priv)) {
7351 rc = -EIO;
7352 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7353 goto out_unlock;
7354 }
7355
7356 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7357 rc = -EIO;
7358 IWL_ERROR("ERROR: APs don't scan\n");
7359 goto out_unlock;
7360 }
7361
7362 /* we don't schedule scan within next_scan_jiffies period */
7363 if (priv->next_scan_jiffies &&
7364 time_after(priv->next_scan_jiffies, jiffies)) {
7365 rc = -EAGAIN;
7366 goto out_unlock;
7367 }
7368 /* if we just finished scan ask for delay */
7369 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7370 IWL_DELAY_NEXT_SCAN, jiffies)) {
7371 rc = -EAGAIN;
7372 goto out_unlock;
7373 }
7374 if (len) {
7375 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
7376 iwl3945_escape_essid(ssid, len), (int)len);
7377
7378 priv->one_direct_scan = 1;
7379 priv->direct_ssid_len = (u8)
7380 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7381 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7382 } else
7383 priv->one_direct_scan = 0;
7384
7385 rc = iwl3945_scan_initiate(priv);
7386
7387 IWL_DEBUG_MAC80211("leave\n");
7388
7389 out_unlock:
7390 spin_unlock_irqrestore(&priv->lock, flags);
7391 mutex_unlock(&priv->mutex);
7392
7393 return rc;
7394 }
7395
7396 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7397 const u8 *local_addr, const u8 *addr,
7398 struct ieee80211_key_conf *key)
7399 {
7400 struct iwl3945_priv *priv = hw->priv;
7401 int rc = 0;
7402 u8 sta_id;
7403
7404 IWL_DEBUG_MAC80211("enter\n");
7405
7406 if (!iwl3945_param_hwcrypto) {
7407 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7408 return -EOPNOTSUPP;
7409 }
7410
7411 if (is_zero_ether_addr(addr))
7412 /* only support pairwise keys */
7413 return -EOPNOTSUPP;
7414
7415 sta_id = iwl3945_hw_find_station(priv, addr);
7416 if (sta_id == IWL_INVALID_STATION) {
7417 DECLARE_MAC_BUF(mac);
7418
7419 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7420 print_mac(mac, addr));
7421 return -EINVAL;
7422 }
7423
7424 mutex_lock(&priv->mutex);
7425
7426 iwl3945_scan_cancel_timeout(priv, 100);
7427
7428 switch (cmd) {
7429 case SET_KEY:
7430 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7431 if (!rc) {
7432 iwl3945_set_rxon_hwcrypto(priv, 1);
7433 iwl3945_commit_rxon(priv);
7434 key->hw_key_idx = sta_id;
7435 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7436 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7437 }
7438 break;
7439 case DISABLE_KEY:
7440 rc = iwl3945_clear_sta_key_info(priv, sta_id);
7441 if (!rc) {
7442 iwl3945_set_rxon_hwcrypto(priv, 0);
7443 iwl3945_commit_rxon(priv);
7444 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7445 }
7446 break;
7447 default:
7448 rc = -EINVAL;
7449 }
7450
7451 IWL_DEBUG_MAC80211("leave\n");
7452 mutex_unlock(&priv->mutex);
7453
7454 return rc;
7455 }
7456
7457 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
7458 const struct ieee80211_tx_queue_params *params)
7459 {
7460 struct iwl3945_priv *priv = hw->priv;
7461 #ifdef CONFIG_IWL3945_QOS
7462 unsigned long flags;
7463 int q;
7464 #endif /* CONFIG_IWL3945_QOS */
7465
7466 IWL_DEBUG_MAC80211("enter\n");
7467
7468 if (!iwl3945_is_ready_rf(priv)) {
7469 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7470 return -EIO;
7471 }
7472
7473 if (queue >= AC_NUM) {
7474 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7475 return 0;
7476 }
7477
7478 #ifdef CONFIG_IWL3945_QOS
7479 if (!priv->qos_data.qos_enable) {
7480 priv->qos_data.qos_active = 0;
7481 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7482 return 0;
7483 }
7484 q = AC_NUM - 1 - queue;
7485
7486 spin_lock_irqsave(&priv->lock, flags);
7487
7488 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7489 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7490 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7491 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7492 cpu_to_le16((params->burst_time * 100));
7493
7494 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7495 priv->qos_data.qos_active = 1;
7496
7497 spin_unlock_irqrestore(&priv->lock, flags);
7498
7499 mutex_lock(&priv->mutex);
7500 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7501 iwl3945_activate_qos(priv, 1);
7502 else if (priv->assoc_id && iwl3945_is_associated(priv))
7503 iwl3945_activate_qos(priv, 0);
7504
7505 mutex_unlock(&priv->mutex);
7506
7507 #endif /*CONFIG_IWL3945_QOS */
7508
7509 IWL_DEBUG_MAC80211("leave\n");
7510 return 0;
7511 }
7512
7513 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7514 struct ieee80211_tx_queue_stats *stats)
7515 {
7516 struct iwl3945_priv *priv = hw->priv;
7517 int i, avail;
7518 struct iwl3945_tx_queue *txq;
7519 struct iwl3945_queue *q;
7520 unsigned long flags;
7521
7522 IWL_DEBUG_MAC80211("enter\n");
7523
7524 if (!iwl3945_is_ready_rf(priv)) {
7525 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7526 return -EIO;
7527 }
7528
7529 spin_lock_irqsave(&priv->lock, flags);
7530
7531 for (i = 0; i < AC_NUM; i++) {
7532 txq = &priv->txq[i];
7533 q = &txq->q;
7534 avail = iwl3945_queue_space(q);
7535
7536 stats->data[i].len = q->n_window - avail;
7537 stats->data[i].limit = q->n_window - q->high_mark;
7538 stats->data[i].count = q->n_window;
7539
7540 }
7541 spin_unlock_irqrestore(&priv->lock, flags);
7542
7543 IWL_DEBUG_MAC80211("leave\n");
7544
7545 return 0;
7546 }
7547
7548 static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7549 struct ieee80211_low_level_stats *stats)
7550 {
7551 IWL_DEBUG_MAC80211("enter\n");
7552 IWL_DEBUG_MAC80211("leave\n");
7553
7554 return 0;
7555 }
7556
7557 static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
7558 {
7559 IWL_DEBUG_MAC80211("enter\n");
7560 IWL_DEBUG_MAC80211("leave\n");
7561
7562 return 0;
7563 }
7564
7565 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7566 {
7567 struct iwl3945_priv *priv = hw->priv;
7568 unsigned long flags;
7569
7570 mutex_lock(&priv->mutex);
7571 IWL_DEBUG_MAC80211("enter\n");
7572
7573 #ifdef CONFIG_IWL3945_QOS
7574 iwl3945_reset_qos(priv);
7575 #endif
7576 cancel_delayed_work(&priv->post_associate);
7577
7578 spin_lock_irqsave(&priv->lock, flags);
7579 priv->assoc_id = 0;
7580 priv->assoc_capability = 0;
7581 priv->call_post_assoc_from_beacon = 0;
7582
7583 /* new association get rid of ibss beacon skb */
7584 if (priv->ibss_beacon)
7585 dev_kfree_skb(priv->ibss_beacon);
7586
7587 priv->ibss_beacon = NULL;
7588
7589 priv->beacon_int = priv->hw->conf.beacon_int;
7590 priv->timestamp1 = 0;
7591 priv->timestamp0 = 0;
7592 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7593 priv->beacon_int = 0;
7594
7595 spin_unlock_irqrestore(&priv->lock, flags);
7596
7597 if (!iwl3945_is_ready_rf(priv)) {
7598 IWL_DEBUG_MAC80211("leave - not ready\n");
7599 mutex_unlock(&priv->mutex);
7600 return;
7601 }
7602
7603 /* we are restarting association process
7604 * clear RXON_FILTER_ASSOC_MSK bit
7605 */
7606 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
7607 iwl3945_scan_cancel_timeout(priv, 100);
7608 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7609 iwl3945_commit_rxon(priv);
7610 }
7611
7612 /* Per mac80211.h: This is only used in IBSS mode... */
7613 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7614
7615 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7616 mutex_unlock(&priv->mutex);
7617 return;
7618 }
7619
7620 priv->only_active_channel = 0;
7621
7622 iwl3945_set_rate(priv);
7623
7624 mutex_unlock(&priv->mutex);
7625
7626 IWL_DEBUG_MAC80211("leave\n");
7627
7628 }
7629
7630 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
7631 struct ieee80211_tx_control *control)
7632 {
7633 struct iwl3945_priv *priv = hw->priv;
7634 unsigned long flags;
7635
7636 mutex_lock(&priv->mutex);
7637 IWL_DEBUG_MAC80211("enter\n");
7638
7639 if (!iwl3945_is_ready_rf(priv)) {
7640 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7641 mutex_unlock(&priv->mutex);
7642 return -EIO;
7643 }
7644
7645 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7646 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7647 mutex_unlock(&priv->mutex);
7648 return -EIO;
7649 }
7650
7651 spin_lock_irqsave(&priv->lock, flags);
7652
7653 if (priv->ibss_beacon)
7654 dev_kfree_skb(priv->ibss_beacon);
7655
7656 priv->ibss_beacon = skb;
7657
7658 priv->assoc_id = 0;
7659
7660 IWL_DEBUG_MAC80211("leave\n");
7661 spin_unlock_irqrestore(&priv->lock, flags);
7662
7663 #ifdef CONFIG_IWL3945_QOS
7664 iwl3945_reset_qos(priv);
7665 #endif
7666
7667 queue_work(priv->workqueue, &priv->post_associate.work);
7668
7669 mutex_unlock(&priv->mutex);
7670
7671 return 0;
7672 }
7673
7674 /*****************************************************************************
7675 *
7676 * sysfs attributes
7677 *
7678 *****************************************************************************/
7679
7680 #ifdef CONFIG_IWL3945_DEBUG
7681
7682 /*
7683 * The following adds a new attribute to the sysfs representation
7684 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7685 * used for controlling the debug level.
7686 *
7687 * See the level definitions in iwl for details.
7688 */
7689
7690 static ssize_t show_debug_level(struct device_driver *d, char *buf)
7691 {
7692 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
7693 }
7694 static ssize_t store_debug_level(struct device_driver *d,
7695 const char *buf, size_t count)
7696 {
7697 char *p = (char *)buf;
7698 u32 val;
7699
7700 val = simple_strtoul(p, &p, 0);
7701 if (p == buf)
7702 printk(KERN_INFO DRV_NAME
7703 ": %s is not in hex or decimal form.\n", buf);
7704 else
7705 iwl3945_debug_level = val;
7706
7707 return strnlen(buf, count);
7708 }
7709
7710 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7711 show_debug_level, store_debug_level);
7712
7713 #endif /* CONFIG_IWL3945_DEBUG */
7714
7715 static ssize_t show_rf_kill(struct device *d,
7716 struct device_attribute *attr, char *buf)
7717 {
7718 /*
7719 * 0 - RF kill not enabled
7720 * 1 - SW based RF kill active (sysfs)
7721 * 2 - HW based RF kill active
7722 * 3 - Both HW and SW based RF kill active
7723 */
7724 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7725 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7726 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7727
7728 return sprintf(buf, "%i\n", val);
7729 }
7730
7731 static ssize_t store_rf_kill(struct device *d,
7732 struct device_attribute *attr,
7733 const char *buf, size_t count)
7734 {
7735 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7736
7737 mutex_lock(&priv->mutex);
7738 iwl3945_radio_kill_sw(priv, buf[0] == '1');
7739 mutex_unlock(&priv->mutex);
7740
7741 return count;
7742 }
7743
7744 static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7745
7746 static ssize_t show_temperature(struct device *d,
7747 struct device_attribute *attr, char *buf)
7748 {
7749 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7750
7751 if (!iwl3945_is_alive(priv))
7752 return -EAGAIN;
7753
7754 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7755 }
7756
7757 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7758
7759 static ssize_t show_rs_window(struct device *d,
7760 struct device_attribute *attr,
7761 char *buf)
7762 {
7763 struct iwl3945_priv *priv = d->driver_data;
7764 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
7765 }
7766 static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7767
7768 static ssize_t show_tx_power(struct device *d,
7769 struct device_attribute *attr, char *buf)
7770 {
7771 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7772 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7773 }
7774
7775 static ssize_t store_tx_power(struct device *d,
7776 struct device_attribute *attr,
7777 const char *buf, size_t count)
7778 {
7779 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7780 char *p = (char *)buf;
7781 u32 val;
7782
7783 val = simple_strtoul(p, &p, 10);
7784 if (p == buf)
7785 printk(KERN_INFO DRV_NAME
7786 ": %s is not in decimal form.\n", buf);
7787 else
7788 iwl3945_hw_reg_set_txpower(priv, val);
7789
7790 return count;
7791 }
7792
7793 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7794
7795 static ssize_t show_flags(struct device *d,
7796 struct device_attribute *attr, char *buf)
7797 {
7798 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7799
7800 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7801 }
7802
7803 static ssize_t store_flags(struct device *d,
7804 struct device_attribute *attr,
7805 const char *buf, size_t count)
7806 {
7807 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7808 u32 flags = simple_strtoul(buf, NULL, 0);
7809
7810 mutex_lock(&priv->mutex);
7811 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7812 /* Cancel any currently running scans... */
7813 if (iwl3945_scan_cancel_timeout(priv, 100))
7814 IWL_WARNING("Could not cancel scan.\n");
7815 else {
7816 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7817 flags);
7818 priv->staging_rxon.flags = cpu_to_le32(flags);
7819 iwl3945_commit_rxon(priv);
7820 }
7821 }
7822 mutex_unlock(&priv->mutex);
7823
7824 return count;
7825 }
7826
7827 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7828
7829 static ssize_t show_filter_flags(struct device *d,
7830 struct device_attribute *attr, char *buf)
7831 {
7832 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7833
7834 return sprintf(buf, "0x%04X\n",
7835 le32_to_cpu(priv->active_rxon.filter_flags));
7836 }
7837
7838 static ssize_t store_filter_flags(struct device *d,
7839 struct device_attribute *attr,
7840 const char *buf, size_t count)
7841 {
7842 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7843 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7844
7845 mutex_lock(&priv->mutex);
7846 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7847 /* Cancel any currently running scans... */
7848 if (iwl3945_scan_cancel_timeout(priv, 100))
7849 IWL_WARNING("Could not cancel scan.\n");
7850 else {
7851 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7852 "0x%04X\n", filter_flags);
7853 priv->staging_rxon.filter_flags =
7854 cpu_to_le32(filter_flags);
7855 iwl3945_commit_rxon(priv);
7856 }
7857 }
7858 mutex_unlock(&priv->mutex);
7859
7860 return count;
7861 }
7862
7863 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7864 store_filter_flags);
7865
7866 static ssize_t show_tune(struct device *d,
7867 struct device_attribute *attr, char *buf)
7868 {
7869 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7870
7871 return sprintf(buf, "0x%04X\n",
7872 (priv->phymode << 8) |
7873 le16_to_cpu(priv->active_rxon.channel));
7874 }
7875
7876 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode);
7877
7878 static ssize_t store_tune(struct device *d,
7879 struct device_attribute *attr,
7880 const char *buf, size_t count)
7881 {
7882 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7883 char *p = (char *)buf;
7884 u16 tune = simple_strtoul(p, &p, 0);
7885 u8 phymode = (tune >> 8) & 0xff;
7886 u16 channel = tune & 0xff;
7887
7888 IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
7889
7890 mutex_lock(&priv->mutex);
7891 if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
7892 (priv->phymode != phymode)) {
7893 const struct iwl3945_channel_info *ch_info;
7894
7895 ch_info = iwl3945_get_channel_info(priv, phymode, channel);
7896 if (!ch_info) {
7897 IWL_WARNING("Requested invalid phymode/channel "
7898 "combination: %d %d\n", phymode, channel);
7899 mutex_unlock(&priv->mutex);
7900 return -EINVAL;
7901 }
7902
7903 /* Cancel any currently running scans... */
7904 if (iwl3945_scan_cancel_timeout(priv, 100))
7905 IWL_WARNING("Could not cancel scan.\n");
7906 else {
7907 IWL_DEBUG_INFO("Committing phymode and "
7908 "rxon.channel = %d %d\n",
7909 phymode, channel);
7910
7911 iwl3945_set_rxon_channel(priv, phymode, channel);
7912 iwl3945_set_flags_for_phymode(priv, phymode);
7913
7914 iwl3945_set_rate(priv);
7915 iwl3945_commit_rxon(priv);
7916 }
7917 }
7918 mutex_unlock(&priv->mutex);
7919
7920 return count;
7921 }
7922
7923 static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
7924
7925 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7926
7927 static ssize_t show_measurement(struct device *d,
7928 struct device_attribute *attr, char *buf)
7929 {
7930 struct iwl3945_priv *priv = dev_get_drvdata(d);
7931 struct iwl3945_spectrum_notification measure_report;
7932 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7933 u8 *data = (u8 *) & measure_report;
7934 unsigned long flags;
7935
7936 spin_lock_irqsave(&priv->lock, flags);
7937 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7938 spin_unlock_irqrestore(&priv->lock, flags);
7939 return 0;
7940 }
7941 memcpy(&measure_report, &priv->measure_report, size);
7942 priv->measurement_status = 0;
7943 spin_unlock_irqrestore(&priv->lock, flags);
7944
7945 while (size && (PAGE_SIZE - len)) {
7946 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7947 PAGE_SIZE - len, 1);
7948 len = strlen(buf);
7949 if (PAGE_SIZE - len)
7950 buf[len++] = '\n';
7951
7952 ofs += 16;
7953 size -= min(size, 16U);
7954 }
7955
7956 return len;
7957 }
7958
7959 static ssize_t store_measurement(struct device *d,
7960 struct device_attribute *attr,
7961 const char *buf, size_t count)
7962 {
7963 struct iwl3945_priv *priv = dev_get_drvdata(d);
7964 struct ieee80211_measurement_params params = {
7965 .channel = le16_to_cpu(priv->active_rxon.channel),
7966 .start_time = cpu_to_le64(priv->last_tsf),
7967 .duration = cpu_to_le16(1),
7968 };
7969 u8 type = IWL_MEASURE_BASIC;
7970 u8 buffer[32];
7971 u8 channel;
7972
7973 if (count) {
7974 char *p = buffer;
7975 strncpy(buffer, buf, min(sizeof(buffer), count));
7976 channel = simple_strtoul(p, NULL, 0);
7977 if (channel)
7978 params.channel = channel;
7979
7980 p = buffer;
7981 while (*p && *p != ' ')
7982 p++;
7983 if (*p)
7984 type = simple_strtoul(p + 1, NULL, 0);
7985 }
7986
7987 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7988 "channel %d (for '%s')\n", type, params.channel, buf);
7989 iwl3945_get_measurement(priv, &params, type);
7990
7991 return count;
7992 }
7993
7994 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7995 show_measurement, store_measurement);
7996 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7997
7998 static ssize_t show_rate(struct device *d,
7999 struct device_attribute *attr, char *buf)
8000 {
8001 struct iwl3945_priv *priv = dev_get_drvdata(d);
8002 unsigned long flags;
8003 int i;
8004
8005 spin_lock_irqsave(&priv->sta_lock, flags);
8006 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
8007 i = priv->stations[IWL_AP_ID].current_rate.s.rate;
8008 else
8009 i = priv->stations[IWL_STA_ID].current_rate.s.rate;
8010 spin_unlock_irqrestore(&priv->sta_lock, flags);
8011
8012 i = iwl3945_rate_index_from_plcp(i);
8013 if (i == -1)
8014 return sprintf(buf, "0\n");
8015
8016 return sprintf(buf, "%d%s\n",
8017 (iwl3945_rates[i].ieee >> 1),
8018 (iwl3945_rates[i].ieee & 0x1) ? ".5" : "");
8019 }
8020
8021 static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
8022
8023 static ssize_t store_retry_rate(struct device *d,
8024 struct device_attribute *attr,
8025 const char *buf, size_t count)
8026 {
8027 struct iwl3945_priv *priv = dev_get_drvdata(d);
8028
8029 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8030 if (priv->retry_rate <= 0)
8031 priv->retry_rate = 1;
8032
8033 return count;
8034 }
8035
8036 static ssize_t show_retry_rate(struct device *d,
8037 struct device_attribute *attr, char *buf)
8038 {
8039 struct iwl3945_priv *priv = dev_get_drvdata(d);
8040 return sprintf(buf, "%d", priv->retry_rate);
8041 }
8042
8043 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8044 store_retry_rate);
8045
8046 static ssize_t store_power_level(struct device *d,
8047 struct device_attribute *attr,
8048 const char *buf, size_t count)
8049 {
8050 struct iwl3945_priv *priv = dev_get_drvdata(d);
8051 int rc;
8052 int mode;
8053
8054 mode = simple_strtoul(buf, NULL, 0);
8055 mutex_lock(&priv->mutex);
8056
8057 if (!iwl3945_is_ready(priv)) {
8058 rc = -EAGAIN;
8059 goto out;
8060 }
8061
8062 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8063 mode = IWL_POWER_AC;
8064 else
8065 mode |= IWL_POWER_ENABLED;
8066
8067 if (mode != priv->power_mode) {
8068 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
8069 if (rc) {
8070 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8071 goto out;
8072 }
8073 priv->power_mode = mode;
8074 }
8075
8076 rc = count;
8077
8078 out:
8079 mutex_unlock(&priv->mutex);
8080 return rc;
8081 }
8082
8083 #define MAX_WX_STRING 80
8084
8085 /* Values are in microsecond */
8086 static const s32 timeout_duration[] = {
8087 350000,
8088 250000,
8089 75000,
8090 37000,
8091 25000,
8092 };
8093 static const s32 period_duration[] = {
8094 400000,
8095 700000,
8096 1000000,
8097 1000000,
8098 1000000
8099 };
8100
8101 static ssize_t show_power_level(struct device *d,
8102 struct device_attribute *attr, char *buf)
8103 {
8104 struct iwl3945_priv *priv = dev_get_drvdata(d);
8105 int level = IWL_POWER_LEVEL(priv->power_mode);
8106 char *p = buf;
8107
8108 p += sprintf(p, "%d ", level);
8109 switch (level) {
8110 case IWL_POWER_MODE_CAM:
8111 case IWL_POWER_AC:
8112 p += sprintf(p, "(AC)");
8113 break;
8114 case IWL_POWER_BATTERY:
8115 p += sprintf(p, "(BATTERY)");
8116 break;
8117 default:
8118 p += sprintf(p,
8119 "(Timeout %dms, Period %dms)",
8120 timeout_duration[level - 1] / 1000,
8121 period_duration[level - 1] / 1000);
8122 }
8123
8124 if (!(priv->power_mode & IWL_POWER_ENABLED))
8125 p += sprintf(p, " OFF\n");
8126 else
8127 p += sprintf(p, " \n");
8128
8129 return (p - buf + 1);
8130
8131 }
8132
8133 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8134 store_power_level);
8135
8136 static ssize_t show_channels(struct device *d,
8137 struct device_attribute *attr, char *buf)
8138 {
8139 struct iwl3945_priv *priv = dev_get_drvdata(d);
8140 int len = 0, i;
8141 struct ieee80211_channel *channels = NULL;
8142 const struct ieee80211_hw_mode *hw_mode = NULL;
8143 int count = 0;
8144
8145 if (!iwl3945_is_ready(priv))
8146 return -EAGAIN;
8147
8148 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211G);
8149 if (!hw_mode)
8150 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211B);
8151 if (hw_mode) {
8152 channels = hw_mode->channels;
8153 count = hw_mode->num_channels;
8154 }
8155
8156 len +=
8157 sprintf(&buf[len],
8158 "Displaying %d channels in 2.4GHz band "
8159 "(802.11bg):\n", count);
8160
8161 for (i = 0; i < count; i++)
8162 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8163 channels[i].chan,
8164 channels[i].power_level,
8165 channels[i].
8166 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8167 " (IEEE 802.11h required)" : "",
8168 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8169 || (channels[i].
8170 flag &
8171 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8172 ", IBSS",
8173 channels[i].
8174 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8175 "active/passive" : "passive only");
8176
8177 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211A);
8178 if (hw_mode) {
8179 channels = hw_mode->channels;
8180 count = hw_mode->num_channels;
8181 } else {
8182 channels = NULL;
8183 count = 0;
8184 }
8185
8186 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8187 "(802.11a):\n", count);
8188
8189 for (i = 0; i < count; i++)
8190 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8191 channels[i].chan,
8192 channels[i].power_level,
8193 channels[i].
8194 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8195 " (IEEE 802.11h required)" : "",
8196 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8197 || (channels[i].
8198 flag &
8199 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8200 ", IBSS",
8201 channels[i].
8202 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8203 "active/passive" : "passive only");
8204
8205 return len;
8206 }
8207
8208 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8209
8210 static ssize_t show_statistics(struct device *d,
8211 struct device_attribute *attr, char *buf)
8212 {
8213 struct iwl3945_priv *priv = dev_get_drvdata(d);
8214 u32 size = sizeof(struct iwl3945_notif_statistics);
8215 u32 len = 0, ofs = 0;
8216 u8 *data = (u8 *) & priv->statistics;
8217 int rc = 0;
8218
8219 if (!iwl3945_is_alive(priv))
8220 return -EAGAIN;
8221
8222 mutex_lock(&priv->mutex);
8223 rc = iwl3945_send_statistics_request(priv);
8224 mutex_unlock(&priv->mutex);
8225
8226 if (rc) {
8227 len = sprintf(buf,
8228 "Error sending statistics request: 0x%08X\n", rc);
8229 return len;
8230 }
8231
8232 while (size && (PAGE_SIZE - len)) {
8233 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8234 PAGE_SIZE - len, 1);
8235 len = strlen(buf);
8236 if (PAGE_SIZE - len)
8237 buf[len++] = '\n';
8238
8239 ofs += 16;
8240 size -= min(size, 16U);
8241 }
8242
8243 return len;
8244 }
8245
8246 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8247
8248 static ssize_t show_antenna(struct device *d,
8249 struct device_attribute *attr, char *buf)
8250 {
8251 struct iwl3945_priv *priv = dev_get_drvdata(d);
8252
8253 if (!iwl3945_is_alive(priv))
8254 return -EAGAIN;
8255
8256 return sprintf(buf, "%d\n", priv->antenna);
8257 }
8258
8259 static ssize_t store_antenna(struct device *d,
8260 struct device_attribute *attr,
8261 const char *buf, size_t count)
8262 {
8263 int ant;
8264 struct iwl3945_priv *priv = dev_get_drvdata(d);
8265
8266 if (count == 0)
8267 return 0;
8268
8269 if (sscanf(buf, "%1i", &ant) != 1) {
8270 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8271 return count;
8272 }
8273
8274 if ((ant >= 0) && (ant <= 2)) {
8275 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
8276 priv->antenna = (enum iwl3945_antenna)ant;
8277 } else
8278 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8279
8280
8281 return count;
8282 }
8283
8284 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8285
8286 static ssize_t show_status(struct device *d,
8287 struct device_attribute *attr, char *buf)
8288 {
8289 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
8290 if (!iwl3945_is_alive(priv))
8291 return -EAGAIN;
8292 return sprintf(buf, "0x%08x\n", (int)priv->status);
8293 }
8294
8295 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8296
8297 static ssize_t dump_error_log(struct device *d,
8298 struct device_attribute *attr,
8299 const char *buf, size_t count)
8300 {
8301 char *p = (char *)buf;
8302
8303 if (p[0] == '1')
8304 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
8305
8306 return strnlen(buf, count);
8307 }
8308
8309 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8310
8311 static ssize_t dump_event_log(struct device *d,
8312 struct device_attribute *attr,
8313 const char *buf, size_t count)
8314 {
8315 char *p = (char *)buf;
8316
8317 if (p[0] == '1')
8318 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
8319
8320 return strnlen(buf, count);
8321 }
8322
8323 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8324
8325 /*****************************************************************************
8326 *
8327 * driver setup and teardown
8328 *
8329 *****************************************************************************/
8330
8331 static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
8332 {
8333 priv->workqueue = create_workqueue(DRV_NAME);
8334
8335 init_waitqueue_head(&priv->wait_command_queue);
8336
8337 INIT_WORK(&priv->up, iwl3945_bg_up);
8338 INIT_WORK(&priv->restart, iwl3945_bg_restart);
8339 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
8340 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
8341 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
8342 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
8343 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
8344 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
8345 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
8346 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
8347 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
8348 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
8349
8350 iwl3945_hw_setup_deferred_work(priv);
8351
8352 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
8353 iwl3945_irq_tasklet, (unsigned long)priv);
8354 }
8355
8356 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
8357 {
8358 iwl3945_hw_cancel_deferred_work(priv);
8359
8360 cancel_delayed_work_sync(&priv->init_alive_start);
8361 cancel_delayed_work(&priv->scan_check);
8362 cancel_delayed_work(&priv->alive_start);
8363 cancel_delayed_work(&priv->post_associate);
8364 cancel_work_sync(&priv->beacon_update);
8365 }
8366
8367 static struct attribute *iwl3945_sysfs_entries[] = {
8368 &dev_attr_antenna.attr,
8369 &dev_attr_channels.attr,
8370 &dev_attr_dump_errors.attr,
8371 &dev_attr_dump_events.attr,
8372 &dev_attr_flags.attr,
8373 &dev_attr_filter_flags.attr,
8374 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
8375 &dev_attr_measurement.attr,
8376 #endif
8377 &dev_attr_power_level.attr,
8378 &dev_attr_rate.attr,
8379 &dev_attr_retry_rate.attr,
8380 &dev_attr_rf_kill.attr,
8381 &dev_attr_rs_window.attr,
8382 &dev_attr_statistics.attr,
8383 &dev_attr_status.attr,
8384 &dev_attr_temperature.attr,
8385 &dev_attr_tune.attr,
8386 &dev_attr_tx_power.attr,
8387
8388 NULL
8389 };
8390
8391 static struct attribute_group iwl3945_attribute_group = {
8392 .name = NULL, /* put in device directory */
8393 .attrs = iwl3945_sysfs_entries,
8394 };
8395
8396 static struct ieee80211_ops iwl3945_hw_ops = {
8397 .tx = iwl3945_mac_tx,
8398 .start = iwl3945_mac_start,
8399 .stop = iwl3945_mac_stop,
8400 .add_interface = iwl3945_mac_add_interface,
8401 .remove_interface = iwl3945_mac_remove_interface,
8402 .config = iwl3945_mac_config,
8403 .config_interface = iwl3945_mac_config_interface,
8404 .configure_filter = iwl3945_configure_filter,
8405 .set_key = iwl3945_mac_set_key,
8406 .get_stats = iwl3945_mac_get_stats,
8407 .get_tx_stats = iwl3945_mac_get_tx_stats,
8408 .conf_tx = iwl3945_mac_conf_tx,
8409 .get_tsf = iwl3945_mac_get_tsf,
8410 .reset_tsf = iwl3945_mac_reset_tsf,
8411 .beacon_update = iwl3945_mac_beacon_update,
8412 .hw_scan = iwl3945_mac_hw_scan
8413 };
8414
8415 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8416 {
8417 int err = 0;
8418 u32 pci_id;
8419 struct iwl3945_priv *priv;
8420 struct ieee80211_hw *hw;
8421 int i;
8422 DECLARE_MAC_BUF(mac);
8423
8424 /* Disabling hardware scan means that mac80211 will perform scans
8425 * "the hard way", rather than using device's scan. */
8426 if (iwl3945_param_disable_hw_scan) {
8427 IWL_DEBUG_INFO("Disabling hw_scan\n");
8428 iwl3945_hw_ops.hw_scan = NULL;
8429 }
8430
8431 if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8432 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
8433 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8434 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8435 err = -EINVAL;
8436 goto out;
8437 }
8438
8439 /* mac80211 allocates memory for this device instance, including
8440 * space for this driver's private structure */
8441 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
8442 if (hw == NULL) {
8443 IWL_ERROR("Can not allocate network device\n");
8444 err = -ENOMEM;
8445 goto out;
8446 }
8447 SET_IEEE80211_DEV(hw, &pdev->dev);
8448
8449 hw->rate_control_algorithm = "iwl-3945-rs";
8450
8451 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8452 priv = hw->priv;
8453 priv->hw = hw;
8454
8455 priv->pci_dev = pdev;
8456
8457 /* Select antenna (may be helpful if only one antenna is connected) */
8458 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
8459 #ifdef CONFIG_IWL3945_DEBUG
8460 iwl3945_debug_level = iwl3945_param_debug;
8461 atomic_set(&priv->restrict_refcnt, 0);
8462 #endif
8463 priv->retry_rate = 1;
8464
8465 priv->ibss_beacon = NULL;
8466
8467 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8468 * the range of signal quality values that we'll provide.
8469 * Negative values for level/noise indicate that we'll provide dBm.
8470 * For WE, at least, non-0 values here *enable* display of values
8471 * in app (iwconfig). */
8472 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8473 hw->max_noise = -20; /* noise level, negative indicates dBm */
8474 hw->max_signal = 100; /* link quality indication (%) */
8475
8476 /* Tell mac80211 our Tx characteristics */
8477 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8478
8479 /* 4 EDCA QOS priorities */
8480 hw->queues = 4;
8481
8482 spin_lock_init(&priv->lock);
8483 spin_lock_init(&priv->power_data.lock);
8484 spin_lock_init(&priv->sta_lock);
8485 spin_lock_init(&priv->hcmd_lock);
8486
8487 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8488 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8489
8490 INIT_LIST_HEAD(&priv->free_frames);
8491
8492 mutex_init(&priv->mutex);
8493 if (pci_enable_device(pdev)) {
8494 err = -ENODEV;
8495 goto out_ieee80211_free_hw;
8496 }
8497
8498 pci_set_master(pdev);
8499
8500 /* Clear the driver's (not device's) station table */
8501 iwl3945_clear_stations_table(priv);
8502
8503 priv->data_retry_limit = -1;
8504 priv->ieee_channels = NULL;
8505 priv->ieee_rates = NULL;
8506 priv->phymode = -1;
8507
8508 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8509 if (!err)
8510 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8511 if (err) {
8512 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8513 goto out_pci_disable_device;
8514 }
8515
8516 pci_set_drvdata(pdev, priv);
8517 err = pci_request_regions(pdev, DRV_NAME);
8518 if (err)
8519 goto out_pci_disable_device;
8520
8521 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8522 * PCI Tx retries from interfering with C3 CPU state */
8523 pci_write_config_byte(pdev, 0x41, 0x00);
8524
8525 priv->hw_base = pci_iomap(pdev, 0, 0);
8526 if (!priv->hw_base) {
8527 err = -ENODEV;
8528 goto out_pci_release_regions;
8529 }
8530
8531 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8532 (unsigned long long) pci_resource_len(pdev, 0));
8533 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8534
8535 /* Initialize module parameter values here */
8536
8537 /* Disable radio (SW RF KILL) via parameter when loading driver */
8538 if (iwl3945_param_disable) {
8539 set_bit(STATUS_RF_KILL_SW, &priv->status);
8540 IWL_DEBUG_INFO("Radio disabled.\n");
8541 }
8542
8543 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8544
8545 pci_id =
8546 (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
8547
8548 switch (pci_id) {
8549 case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
8550 case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
8551 case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
8552 case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
8553 priv->is_abg = 0;
8554 break;
8555
8556 /*
8557 * Rest are assumed ABG SKU -- if this is not the
8558 * case then the card will get the wrong 'Detected'
8559 * line in the kernel log however the code that
8560 * initializes the GEO table will detect no A-band
8561 * channels and remove the is_abg mask.
8562 */
8563 default:
8564 priv->is_abg = 1;
8565 break;
8566 }
8567
8568 printk(KERN_INFO DRV_NAME
8569 ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
8570 priv->is_abg ? "A" : "");
8571
8572 /* Device-specific setup */
8573 if (iwl3945_hw_set_hw_setting(priv)) {
8574 IWL_ERROR("failed to set hw settings\n");
8575 goto out_iounmap;
8576 }
8577
8578 #ifdef CONFIG_IWL3945_QOS
8579 if (iwl3945_param_qos_enable)
8580 priv->qos_data.qos_enable = 1;
8581
8582 iwl3945_reset_qos(priv);
8583
8584 priv->qos_data.qos_active = 0;
8585 priv->qos_data.qos_cap.val = 0;
8586 #endif /* CONFIG_IWL3945_QOS */
8587
8588 iwl3945_set_rxon_channel(priv, MODE_IEEE80211G, 6);
8589 iwl3945_setup_deferred_work(priv);
8590 iwl3945_setup_rx_handlers(priv);
8591
8592 priv->rates_mask = IWL_RATES_MASK;
8593 /* If power management is turned on, default to AC mode */
8594 priv->power_mode = IWL_POWER_AC;
8595 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8596
8597 iwl3945_disable_interrupts(priv);
8598
8599 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8600 if (err) {
8601 IWL_ERROR("failed to create sysfs device attributes\n");
8602 goto out_release_irq;
8603 }
8604
8605 /* nic init */
8606 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8607 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8608
8609 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8610 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8611 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8612 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8613 if (err < 0) {
8614 IWL_DEBUG_INFO("Failed to init the card\n");
8615 goto out_remove_sysfs;
8616 }
8617 /* Read the EEPROM */
8618 err = iwl3945_eeprom_init(priv);
8619 if (err) {
8620 IWL_ERROR("Unable to init EEPROM\n");
8621 goto out_remove_sysfs;
8622 }
8623 /* MAC Address location in EEPROM same for 3945/4965 */
8624 get_eeprom_mac(priv, priv->mac_addr);
8625 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8626 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8627
8628 err = iwl3945_init_channel_map(priv);
8629 if (err) {
8630 IWL_ERROR("initializing regulatory failed: %d\n", err);
8631 goto out_remove_sysfs;
8632 }
8633
8634 err = iwl3945_init_geos(priv);
8635 if (err) {
8636 IWL_ERROR("initializing geos failed: %d\n", err);
8637 goto out_free_channel_map;
8638 }
8639 iwl3945_reset_channel_flag(priv);
8640
8641 iwl3945_rate_control_register(priv->hw);
8642 err = ieee80211_register_hw(priv->hw);
8643 if (err) {
8644 IWL_ERROR("Failed to register network device (error %d)\n", err);
8645 goto out_free_geos;
8646 }
8647
8648 priv->hw->conf.beacon_int = 100;
8649 priv->mac80211_registered = 1;
8650 pci_save_state(pdev);
8651 pci_disable_device(pdev);
8652
8653 return 0;
8654
8655 out_free_geos:
8656 iwl3945_free_geos(priv);
8657 out_free_channel_map:
8658 iwl3945_free_channel_map(priv);
8659 out_remove_sysfs:
8660 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8661
8662 out_release_irq:
8663 destroy_workqueue(priv->workqueue);
8664 priv->workqueue = NULL;
8665 iwl3945_unset_hw_setting(priv);
8666
8667 out_iounmap:
8668 pci_iounmap(pdev, priv->hw_base);
8669 out_pci_release_regions:
8670 pci_release_regions(pdev);
8671 out_pci_disable_device:
8672 pci_disable_device(pdev);
8673 pci_set_drvdata(pdev, NULL);
8674 out_ieee80211_free_hw:
8675 ieee80211_free_hw(priv->hw);
8676 out:
8677 return err;
8678 }
8679
8680 static void iwl3945_pci_remove(struct pci_dev *pdev)
8681 {
8682 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8683 struct list_head *p, *q;
8684 int i;
8685
8686 if (!priv)
8687 return;
8688
8689 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8690
8691 set_bit(STATUS_EXIT_PENDING, &priv->status);
8692
8693 iwl3945_down(priv);
8694
8695 /* Free MAC hash list for ADHOC */
8696 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8697 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8698 list_del(p);
8699 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
8700 }
8701 }
8702
8703 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8704
8705 iwl3945_dealloc_ucode_pci(priv);
8706
8707 if (priv->rxq.bd)
8708 iwl3945_rx_queue_free(priv, &priv->rxq);
8709 iwl3945_hw_txq_ctx_free(priv);
8710
8711 iwl3945_unset_hw_setting(priv);
8712 iwl3945_clear_stations_table(priv);
8713
8714 if (priv->mac80211_registered) {
8715 ieee80211_unregister_hw(priv->hw);
8716 iwl3945_rate_control_unregister(priv->hw);
8717 }
8718
8719 /*netif_stop_queue(dev); */
8720 flush_workqueue(priv->workqueue);
8721
8722 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8723 * priv->workqueue... so we can't take down the workqueue
8724 * until now... */
8725 destroy_workqueue(priv->workqueue);
8726 priv->workqueue = NULL;
8727
8728 pci_iounmap(pdev, priv->hw_base);
8729 pci_release_regions(pdev);
8730 pci_disable_device(pdev);
8731 pci_set_drvdata(pdev, NULL);
8732
8733 iwl3945_free_channel_map(priv);
8734 iwl3945_free_geos(priv);
8735
8736 if (priv->ibss_beacon)
8737 dev_kfree_skb(priv->ibss_beacon);
8738
8739 ieee80211_free_hw(priv->hw);
8740 }
8741
8742 #ifdef CONFIG_PM
8743
8744 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8745 {
8746 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8747
8748 if (priv->is_open) {
8749 set_bit(STATUS_IN_SUSPEND, &priv->status);
8750 iwl3945_mac_stop(priv->hw);
8751 priv->is_open = 1;
8752 }
8753
8754 pci_set_power_state(pdev, PCI_D3hot);
8755
8756 return 0;
8757 }
8758
8759 static int iwl3945_pci_resume(struct pci_dev *pdev)
8760 {
8761 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8762
8763 pci_set_power_state(pdev, PCI_D0);
8764
8765 if (priv->is_open)
8766 iwl3945_mac_start(priv->hw);
8767
8768 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8769 return 0;
8770 }
8771
8772 #endif /* CONFIG_PM */
8773
8774 /*****************************************************************************
8775 *
8776 * driver and module entry point
8777 *
8778 *****************************************************************************/
8779
8780 static struct pci_driver iwl3945_driver = {
8781 .name = DRV_NAME,
8782 .id_table = iwl3945_hw_card_ids,
8783 .probe = iwl3945_pci_probe,
8784 .remove = __devexit_p(iwl3945_pci_remove),
8785 #ifdef CONFIG_PM
8786 .suspend = iwl3945_pci_suspend,
8787 .resume = iwl3945_pci_resume,
8788 #endif
8789 };
8790
8791 static int __init iwl3945_init(void)
8792 {
8793
8794 int ret;
8795 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8796 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8797 ret = pci_register_driver(&iwl3945_driver);
8798 if (ret) {
8799 IWL_ERROR("Unable to initialize PCI module\n");
8800 return ret;
8801 }
8802 #ifdef CONFIG_IWL3945_DEBUG
8803 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8804 if (ret) {
8805 IWL_ERROR("Unable to create driver sysfs file\n");
8806 pci_unregister_driver(&iwl3945_driver);
8807 return ret;
8808 }
8809 #endif
8810
8811 return ret;
8812 }
8813
8814 static void __exit iwl3945_exit(void)
8815 {
8816 #ifdef CONFIG_IWL3945_DEBUG
8817 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8818 #endif
8819 pci_unregister_driver(&iwl3945_driver);
8820 }
8821
8822 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8823 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8824 module_param_named(disable, iwl3945_param_disable, int, 0444);
8825 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8826 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8827 MODULE_PARM_DESC(hwcrypto,
8828 "using hardware crypto engine (default 0 [software])\n");
8829 module_param_named(debug, iwl3945_param_debug, int, 0444);
8830 MODULE_PARM_DESC(debug, "debug output mask");
8831 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8832 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8833
8834 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8835 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8836
8837 /* QoS */
8838 module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
8839 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8840
8841 module_exit(iwl3945_exit);
8842 module_init(iwl3945_init);
Verdex Pro support