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[PATCH] e1000: No-delay link detection at interface up
[linux-2.6/verdex.git] / drivers / net / e1000 / e1000_main.c
blob8c4924f1f7ed21f57a02f8c8dce47711eaeb2c3c
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.15-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
110 /* required last entry */
111 {0,}
112 };
113
114 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
115
116 int e1000_up(struct e1000_adapter *adapter);
117 void e1000_down(struct e1000_adapter *adapter);
118 void e1000_reinit_locked(struct e1000_adapter *adapter);
119 void e1000_reset(struct e1000_adapter *adapter);
120 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
121 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
122 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
123 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
124 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
125 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *txdr);
127 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rxdr);
129 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
133 void e1000_update_stats(struct e1000_adapter *adapter);
134
135 static int e1000_init_module(void);
136 static void e1000_exit_module(void);
137 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
138 static void __devexit e1000_remove(struct pci_dev *pdev);
139 static int e1000_alloc_queues(struct e1000_adapter *adapter);
140 static int e1000_sw_init(struct e1000_adapter *adapter);
141 static int e1000_open(struct net_device *netdev);
142 static int e1000_close(struct net_device *netdev);
143 static void e1000_configure_tx(struct e1000_adapter *adapter);
144 static void e1000_configure_rx(struct e1000_adapter *adapter);
145 static void e1000_setup_rctl(struct e1000_adapter *adapter);
146 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
147 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
148 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
149 struct e1000_tx_ring *tx_ring);
150 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
152 static void e1000_set_multi(struct net_device *netdev);
153 static void e1000_update_phy_info(unsigned long data);
154 static void e1000_watchdog(unsigned long data);
155 static void e1000_82547_tx_fifo_stall(unsigned long data);
156 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
157 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
158 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
159 static int e1000_set_mac(struct net_device *netdev, void *p);
160 static irqreturn_t e1000_intr(int irq, void *data);
161 #ifdef CONFIG_PCI_MSI
162 static irqreturn_t e1000_intr_msi(int irq, void *data);
163 #endif
164 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
165 struct e1000_tx_ring *tx_ring);
166 #ifdef CONFIG_E1000_NAPI
167 static int e1000_clean(struct net_device *poll_dev, int *budget);
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring,
170 int *work_done, int work_to_do);
171 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
172 struct e1000_rx_ring *rx_ring,
173 int *work_done, int work_to_do);
174 #else
175 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
177 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
179 #endif
180 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
181 struct e1000_rx_ring *rx_ring,
182 int cleaned_count);
183 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
184 struct e1000_rx_ring *rx_ring,
185 int cleaned_count);
186 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
187 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
188 int cmd);
189 void e1000_set_ethtool_ops(struct net_device *netdev);
190 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
191 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
192 static void e1000_tx_timeout(struct net_device *dev);
193 static void e1000_reset_task(struct work_struct *work);
194 static void e1000_smartspeed(struct e1000_adapter *adapter);
195 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
196 struct sk_buff *skb);
197
198 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
199 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
200 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
201 static void e1000_restore_vlan(struct e1000_adapter *adapter);
202
203 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
204 #ifdef CONFIG_PM
205 static int e1000_resume(struct pci_dev *pdev);
206 #endif
207 static void e1000_shutdown(struct pci_dev *pdev);
208
209 #ifdef CONFIG_NET_POLL_CONTROLLER
210 /* for netdump / net console */
211 static void e1000_netpoll (struct net_device *netdev);
212 #endif
213
214 extern void e1000_check_options(struct e1000_adapter *adapter);
215
216 #define COPYBREAK_DEFAULT 256
217 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
218 module_param(copybreak, uint, 0644);
219 MODULE_PARM_DESC(copybreak,
220 "Maximum size of packet that is copied to a new buffer on receive");
221
222 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
223 pci_channel_state_t state);
224 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
225 static void e1000_io_resume(struct pci_dev *pdev);
226
227 static struct pci_error_handlers e1000_err_handler = {
228 .error_detected = e1000_io_error_detected,
229 .slot_reset = e1000_io_slot_reset,
230 .resume = e1000_io_resume,
231 };
232
233 static struct pci_driver e1000_driver = {
234 .name = e1000_driver_name,
235 .id_table = e1000_pci_tbl,
236 .probe = e1000_probe,
237 .remove = __devexit_p(e1000_remove),
238 #ifdef CONFIG_PM
239 /* Power Managment Hooks */
240 .suspend = e1000_suspend,
241 .resume = e1000_resume,
242 #endif
243 .shutdown = e1000_shutdown,
244 .err_handler = &e1000_err_handler
245 };
246
247 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
248 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
249 MODULE_LICENSE("GPL");
250 MODULE_VERSION(DRV_VERSION);
251
252 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
253 module_param(debug, int, 0);
254 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
255
256 /**
257 * e1000_init_module - Driver Registration Routine
258 *
259 * e1000_init_module is the first routine called when the driver is
260 * loaded. All it does is register with the PCI subsystem.
261 **/
262
263 static int __init
264 e1000_init_module(void)
265 {
266 int ret;
267 printk(KERN_INFO "%s - version %s\n",
268 e1000_driver_string, e1000_driver_version);
269
270 printk(KERN_INFO "%s\n", e1000_copyright);
271
272 ret = pci_register_driver(&e1000_driver);
273 if (copybreak != COPYBREAK_DEFAULT) {
274 if (copybreak == 0)
275 printk(KERN_INFO "e1000: copybreak disabled\n");
276 else
277 printk(KERN_INFO "e1000: copybreak enabled for "
278 "packets <= %u bytes\n", copybreak);
279 }
280 return ret;
281 }
282
283 module_init(e1000_init_module);
284
285 /**
286 * e1000_exit_module - Driver Exit Cleanup Routine
287 *
288 * e1000_exit_module is called just before the driver is removed
289 * from memory.
290 **/
291
292 static void __exit
293 e1000_exit_module(void)
294 {
295 pci_unregister_driver(&e1000_driver);
296 }
297
298 module_exit(e1000_exit_module);
299
300 static int e1000_request_irq(struct e1000_adapter *adapter)
301 {
302 struct net_device *netdev = adapter->netdev;
303 int flags, err = 0;
304
305 flags = IRQF_SHARED;
306 #ifdef CONFIG_PCI_MSI
307 if (adapter->hw.mac_type >= e1000_82571) {
308 adapter->have_msi = TRUE;
309 if ((err = pci_enable_msi(adapter->pdev))) {
310 DPRINTK(PROBE, ERR,
311 "Unable to allocate MSI interrupt Error: %d\n", err);
312 adapter->have_msi = FALSE;
313 }
314 }
315 if (adapter->have_msi) {
316 flags &= ~IRQF_SHARED;
317 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags,
318 netdev->name, netdev);
319 if (err)
320 DPRINTK(PROBE, ERR,
321 "Unable to allocate interrupt Error: %d\n", err);
322 } else
323 #endif
324 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
325 netdev->name, netdev)))
326 DPRINTK(PROBE, ERR,
327 "Unable to allocate interrupt Error: %d\n", err);
328
329 return err;
330 }
331
332 static void e1000_free_irq(struct e1000_adapter *adapter)
333 {
334 struct net_device *netdev = adapter->netdev;
335
336 free_irq(adapter->pdev->irq, netdev);
337
338 #ifdef CONFIG_PCI_MSI
339 if (adapter->have_msi)
340 pci_disable_msi(adapter->pdev);
341 #endif
342 }
343
344 /**
345 * e1000_irq_disable - Mask off interrupt generation on the NIC
346 * @adapter: board private structure
347 **/
348
349 static void
350 e1000_irq_disable(struct e1000_adapter *adapter)
351 {
352 atomic_inc(&adapter->irq_sem);
353 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
354 E1000_WRITE_FLUSH(&adapter->hw);
355 synchronize_irq(adapter->pdev->irq);
356 }
357
358 /**
359 * e1000_irq_enable - Enable default interrupt generation settings
360 * @adapter: board private structure
361 **/
362
363 static void
364 e1000_irq_enable(struct e1000_adapter *adapter)
365 {
366 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
367 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
368 E1000_WRITE_FLUSH(&adapter->hw);
369 }
370 }
371
372 static void
373 e1000_update_mng_vlan(struct e1000_adapter *adapter)
374 {
375 struct net_device *netdev = adapter->netdev;
376 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
377 uint16_t old_vid = adapter->mng_vlan_id;
378 if (adapter->vlgrp) {
379 if (!adapter->vlgrp->vlan_devices[vid]) {
380 if (adapter->hw.mng_cookie.status &
381 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
382 e1000_vlan_rx_add_vid(netdev, vid);
383 adapter->mng_vlan_id = vid;
384 } else
385 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
386
387 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
388 (vid != old_vid) &&
389 !adapter->vlgrp->vlan_devices[old_vid])
390 e1000_vlan_rx_kill_vid(netdev, old_vid);
391 } else
392 adapter->mng_vlan_id = vid;
393 }
394 }
395
396 /**
397 * e1000_release_hw_control - release control of the h/w to f/w
398 * @adapter: address of board private structure
399 *
400 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
401 * For ASF and Pass Through versions of f/w this means that the
402 * driver is no longer loaded. For AMT version (only with 82573) i
403 * of the f/w this means that the network i/f is closed.
404 *
405 **/
406
407 static void
408 e1000_release_hw_control(struct e1000_adapter *adapter)
409 {
410 uint32_t ctrl_ext;
411 uint32_t swsm;
412 uint32_t extcnf;
413
414 /* Let firmware taken over control of h/w */
415 switch (adapter->hw.mac_type) {
416 case e1000_82571:
417 case e1000_82572:
418 case e1000_80003es2lan:
419 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
420 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
421 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
422 break;
423 case e1000_82573:
424 swsm = E1000_READ_REG(&adapter->hw, SWSM);
425 E1000_WRITE_REG(&adapter->hw, SWSM,
426 swsm & ~E1000_SWSM_DRV_LOAD);
427 case e1000_ich8lan:
428 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
429 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
430 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
431 break;
432 default:
433 break;
434 }
435 }
436
437 /**
438 * e1000_get_hw_control - get control of the h/w from f/w
439 * @adapter: address of board private structure
440 *
441 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
442 * For ASF and Pass Through versions of f/w this means that
443 * the driver is loaded. For AMT version (only with 82573)
444 * of the f/w this means that the network i/f is open.
445 *
446 **/
447
448 static void
449 e1000_get_hw_control(struct e1000_adapter *adapter)
450 {
451 uint32_t ctrl_ext;
452 uint32_t swsm;
453 uint32_t extcnf;
454
455 /* Let firmware know the driver has taken over */
456 switch (adapter->hw.mac_type) {
457 case e1000_82571:
458 case e1000_82572:
459 case e1000_80003es2lan:
460 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
461 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
462 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
463 break;
464 case e1000_82573:
465 swsm = E1000_READ_REG(&adapter->hw, SWSM);
466 E1000_WRITE_REG(&adapter->hw, SWSM,
467 swsm | E1000_SWSM_DRV_LOAD);
468 break;
469 case e1000_ich8lan:
470 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
471 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
472 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
473 break;
474 default:
475 break;
476 }
477 }
478
479 static void
480 e1000_init_manageability(struct e1000_adapter *adapter)
481 {
482 if (adapter->en_mng_pt) {
483 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
484
485 /* disable hardware interception of ARP */
486 manc &= ~(E1000_MANC_ARP_EN);
487
488 /* enable receiving management packets to the host */
489 /* this will probably generate destination unreachable messages
490 * from the host OS, but the packets will be handled on SMBUS */
491 if (adapter->hw.has_manc2h) {
492 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
493
494 manc |= E1000_MANC_EN_MNG2HOST;
495 #define E1000_MNG2HOST_PORT_623 (1 << 5)
496 #define E1000_MNG2HOST_PORT_664 (1 << 6)
497 manc2h |= E1000_MNG2HOST_PORT_623;
498 manc2h |= E1000_MNG2HOST_PORT_664;
499 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
500 }
501
502 E1000_WRITE_REG(&adapter->hw, MANC, manc);
503 }
504 }
505
506 static void
507 e1000_release_manageability(struct e1000_adapter *adapter)
508 {
509 if (adapter->en_mng_pt) {
510 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
511
512 /* re-enable hardware interception of ARP */
513 manc |= E1000_MANC_ARP_EN;
514
515 if (adapter->hw.has_manc2h)
516 manc &= ~E1000_MANC_EN_MNG2HOST;
517
518 /* don't explicitly have to mess with MANC2H since
519 * MANC has an enable disable that gates MANC2H */
520
521 E1000_WRITE_REG(&adapter->hw, MANC, manc);
522 }
523 }
524
525 int
526 e1000_up(struct e1000_adapter *adapter)
527 {
528 struct net_device *netdev = adapter->netdev;
529 int i;
530
531 /* hardware has been reset, we need to reload some things */
532
533 e1000_set_multi(netdev);
534
535 e1000_restore_vlan(adapter);
536 e1000_init_manageability(adapter);
537
538 e1000_configure_tx(adapter);
539 e1000_setup_rctl(adapter);
540 e1000_configure_rx(adapter);
541 /* call E1000_DESC_UNUSED which always leaves
542 * at least 1 descriptor unused to make sure
543 * next_to_use != next_to_clean */
544 for (i = 0; i < adapter->num_rx_queues; i++) {
545 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
546 adapter->alloc_rx_buf(adapter, ring,
547 E1000_DESC_UNUSED(ring));
548 }
549
550 adapter->tx_queue_len = netdev->tx_queue_len;
551
552 #ifdef CONFIG_E1000_NAPI
553 netif_poll_enable(netdev);
554 #endif
555 e1000_irq_enable(adapter);
556
557 clear_bit(__E1000_DOWN, &adapter->flags);
558
559 /* fire a link change interrupt to start the watchdog */
560 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
561 return 0;
562 }
563
564 /**
565 * e1000_power_up_phy - restore link in case the phy was powered down
566 * @adapter: address of board private structure
567 *
568 * The phy may be powered down to save power and turn off link when the
569 * driver is unloaded and wake on lan is not enabled (among others)
570 * *** this routine MUST be followed by a call to e1000_reset ***
571 *
572 **/
573
574 void e1000_power_up_phy(struct e1000_adapter *adapter)
575 {
576 uint16_t mii_reg = 0;
577
578 /* Just clear the power down bit to wake the phy back up */
579 if (adapter->hw.media_type == e1000_media_type_copper) {
580 /* according to the manual, the phy will retain its
581 * settings across a power-down/up cycle */
582 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
583 mii_reg &= ~MII_CR_POWER_DOWN;
584 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
585 }
586 }
587
588 static void e1000_power_down_phy(struct e1000_adapter *adapter)
589 {
590 /* Power down the PHY so no link is implied when interface is down *
591 * The PHY cannot be powered down if any of the following is TRUE *
592 * (a) WoL is enabled
593 * (b) AMT is active
594 * (c) SoL/IDER session is active */
595 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
596 adapter->hw.media_type == e1000_media_type_copper) {
597 uint16_t mii_reg = 0;
598
599 switch (adapter->hw.mac_type) {
600 case e1000_82540:
601 case e1000_82545:
602 case e1000_82545_rev_3:
603 case e1000_82546:
604 case e1000_82546_rev_3:
605 case e1000_82541:
606 case e1000_82541_rev_2:
607 case e1000_82547:
608 case e1000_82547_rev_2:
609 if (E1000_READ_REG(&adapter->hw, MANC) &
610 E1000_MANC_SMBUS_EN)
611 goto out;
612 break;
613 case e1000_82571:
614 case e1000_82572:
615 case e1000_82573:
616 case e1000_80003es2lan:
617 case e1000_ich8lan:
618 if (e1000_check_mng_mode(&adapter->hw) ||
619 e1000_check_phy_reset_block(&adapter->hw))
620 goto out;
621 break;
622 default:
623 goto out;
624 }
625 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
626 mii_reg |= MII_CR_POWER_DOWN;
627 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
628 mdelay(1);
629 }
630 out:
631 return;
632 }
633
634 void
635 e1000_down(struct e1000_adapter *adapter)
636 {
637 struct net_device *netdev = adapter->netdev;
638
639 /* signal that we're down so the interrupt handler does not
640 * reschedule our watchdog timer */
641 set_bit(__E1000_DOWN, &adapter->flags);
642
643 e1000_irq_disable(adapter);
644
645 del_timer_sync(&adapter->tx_fifo_stall_timer);
646 del_timer_sync(&adapter->watchdog_timer);
647 del_timer_sync(&adapter->phy_info_timer);
648
649 #ifdef CONFIG_E1000_NAPI
650 netif_poll_disable(netdev);
651 #endif
652 netdev->tx_queue_len = adapter->tx_queue_len;
653 adapter->link_speed = 0;
654 adapter->link_duplex = 0;
655 netif_carrier_off(netdev);
656 netif_stop_queue(netdev);
657
658 e1000_reset(adapter);
659 e1000_clean_all_tx_rings(adapter);
660 e1000_clean_all_rx_rings(adapter);
661 }
662
663 void
664 e1000_reinit_locked(struct e1000_adapter *adapter)
665 {
666 WARN_ON(in_interrupt());
667 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
668 msleep(1);
669 e1000_down(adapter);
670 e1000_up(adapter);
671 clear_bit(__E1000_RESETTING, &adapter->flags);
672 }
673
674 void
675 e1000_reset(struct e1000_adapter *adapter)
676 {
677 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
678 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
679 boolean_t legacy_pba_adjust = FALSE;
680
681 /* Repartition Pba for greater than 9k mtu
682 * To take effect CTRL.RST is required.
683 */
684
685 switch (adapter->hw.mac_type) {
686 case e1000_82542_rev2_0:
687 case e1000_82542_rev2_1:
688 case e1000_82543:
689 case e1000_82544:
690 case e1000_82540:
691 case e1000_82541:
692 case e1000_82541_rev_2:
693 legacy_pba_adjust = TRUE;
694 pba = E1000_PBA_48K;
695 break;
696 case e1000_82545:
697 case e1000_82545_rev_3:
698 case e1000_82546:
699 case e1000_82546_rev_3:
700 pba = E1000_PBA_48K;
701 break;
702 case e1000_82547:
703 case e1000_82547_rev_2:
704 legacy_pba_adjust = TRUE;
705 pba = E1000_PBA_30K;
706 break;
707 case e1000_82571:
708 case e1000_82572:
709 case e1000_80003es2lan:
710 pba = E1000_PBA_38K;
711 break;
712 case e1000_82573:
713 pba = E1000_PBA_20K;
714 break;
715 case e1000_ich8lan:
716 pba = E1000_PBA_8K;
717 case e1000_undefined:
718 case e1000_num_macs:
719 break;
720 }
721
722 if (legacy_pba_adjust == TRUE) {
723 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
724 pba -= 8; /* allocate more FIFO for Tx */
725
726 if (adapter->hw.mac_type == e1000_82547) {
727 adapter->tx_fifo_head = 0;
728 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
729 adapter->tx_fifo_size =
730 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
731 atomic_set(&adapter->tx_fifo_stall, 0);
732 }
733 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
734 /* adjust PBA for jumbo frames */
735 E1000_WRITE_REG(&adapter->hw, PBA, pba);
736
737 /* To maintain wire speed transmits, the Tx FIFO should be
738 * large enough to accomodate two full transmit packets,
739 * rounded up to the next 1KB and expressed in KB. Likewise,
740 * the Rx FIFO should be large enough to accomodate at least
741 * one full receive packet and is similarly rounded up and
742 * expressed in KB. */
743 pba = E1000_READ_REG(&adapter->hw, PBA);
744 /* upper 16 bits has Tx packet buffer allocation size in KB */
745 tx_space = pba >> 16;
746 /* lower 16 bits has Rx packet buffer allocation size in KB */
747 pba &= 0xffff;
748 /* don't include ethernet FCS because hardware appends/strips */
749 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
750 VLAN_TAG_SIZE;
751 min_tx_space = min_rx_space;
752 min_tx_space *= 2;
753 E1000_ROUNDUP(min_tx_space, 1024);
754 min_tx_space >>= 10;
755 E1000_ROUNDUP(min_rx_space, 1024);
756 min_rx_space >>= 10;
757
758 /* If current Tx allocation is less than the min Tx FIFO size,
759 * and the min Tx FIFO size is less than the current Rx FIFO
760 * allocation, take space away from current Rx allocation */
761 if (tx_space < min_tx_space &&
762 ((min_tx_space - tx_space) < pba)) {
763 pba = pba - (min_tx_space - tx_space);
764
765 /* PCI/PCIx hardware has PBA alignment constraints */
766 switch (adapter->hw.mac_type) {
767 case e1000_82545 ... e1000_82546_rev_3:
768 pba &= ~(E1000_PBA_8K - 1);
769 break;
770 default:
771 break;
772 }
773
774 /* if short on rx space, rx wins and must trump tx
775 * adjustment or use Early Receive if available */
776 if (pba < min_rx_space) {
777 switch (adapter->hw.mac_type) {
778 case e1000_82573:
779 /* ERT enabled in e1000_configure_rx */
780 break;
781 default:
782 pba = min_rx_space;
783 break;
784 }
785 }
786 }
787 }
788
789 E1000_WRITE_REG(&adapter->hw, PBA, pba);
790
791 /* flow control settings */
792 /* Set the FC high water mark to 90% of the FIFO size.
793 * Required to clear last 3 LSB */
794 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
795 /* We can't use 90% on small FIFOs because the remainder
796 * would be less than 1 full frame. In this case, we size
797 * it to allow at least a full frame above the high water
798 * mark. */
799 if (pba < E1000_PBA_16K)
800 fc_high_water_mark = (pba * 1024) - 1600;
801
802 adapter->hw.fc_high_water = fc_high_water_mark;
803 adapter->hw.fc_low_water = fc_high_water_mark - 8;
804 if (adapter->hw.mac_type == e1000_80003es2lan)
805 adapter->hw.fc_pause_time = 0xFFFF;
806 else
807 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
808 adapter->hw.fc_send_xon = 1;
809 adapter->hw.fc = adapter->hw.original_fc;
810
811 /* Allow time for pending master requests to run */
812 e1000_reset_hw(&adapter->hw);
813 if (adapter->hw.mac_type >= e1000_82544)
814 E1000_WRITE_REG(&adapter->hw, WUC, 0);
815
816 if (e1000_init_hw(&adapter->hw))
817 DPRINTK(PROBE, ERR, "Hardware Error\n");
818 e1000_update_mng_vlan(adapter);
819
820 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
821 if (adapter->hw.mac_type >= e1000_82544 &&
822 adapter->hw.mac_type <= e1000_82547_rev_2 &&
823 adapter->hw.autoneg == 1 &&
824 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
825 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
826 /* clear phy power management bit if we are in gig only mode,
827 * which if enabled will attempt negotiation to 100Mb, which
828 * can cause a loss of link at power off or driver unload */
829 ctrl &= ~E1000_CTRL_SWDPIN3;
830 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
831 }
832
833 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
834 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
835
836 e1000_reset_adaptive(&adapter->hw);
837 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
838
839 if (!adapter->smart_power_down &&
840 (adapter->hw.mac_type == e1000_82571 ||
841 adapter->hw.mac_type == e1000_82572)) {
842 uint16_t phy_data = 0;
843 /* speed up time to link by disabling smart power down, ignore
844 * the return value of this function because there is nothing
845 * different we would do if it failed */
846 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
847 &phy_data);
848 phy_data &= ~IGP02E1000_PM_SPD;
849 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
850 phy_data);
851 }
852
853 e1000_release_manageability(adapter);
854 }
855
856 /**
857 * e1000_probe - Device Initialization Routine
858 * @pdev: PCI device information struct
859 * @ent: entry in e1000_pci_tbl
860 *
861 * Returns 0 on success, negative on failure
862 *
863 * e1000_probe initializes an adapter identified by a pci_dev structure.
864 * The OS initialization, configuring of the adapter private structure,
865 * and a hardware reset occur.
866 **/
867
868 static int __devinit
869 e1000_probe(struct pci_dev *pdev,
870 const struct pci_device_id *ent)
871 {
872 struct net_device *netdev;
873 struct e1000_adapter *adapter;
874 unsigned long mmio_start, mmio_len;
875 unsigned long flash_start, flash_len;
876
877 static int cards_found = 0;
878 static int global_quad_port_a = 0; /* global ksp3 port a indication */
879 int i, err, pci_using_dac;
880 uint16_t eeprom_data = 0;
881 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
882 if ((err = pci_enable_device(pdev)))
883 return err;
884
885 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
886 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
887 pci_using_dac = 1;
888 } else {
889 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
890 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
891 E1000_ERR("No usable DMA configuration, aborting\n");
892 goto err_dma;
893 }
894 pci_using_dac = 0;
895 }
896
897 if ((err = pci_request_regions(pdev, e1000_driver_name)))
898 goto err_pci_reg;
899
900 pci_set_master(pdev);
901
902 err = -ENOMEM;
903 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
904 if (!netdev)
905 goto err_alloc_etherdev;
906
907 SET_MODULE_OWNER(netdev);
908 SET_NETDEV_DEV(netdev, &pdev->dev);
909
910 pci_set_drvdata(pdev, netdev);
911 adapter = netdev_priv(netdev);
912 adapter->netdev = netdev;
913 adapter->pdev = pdev;
914 adapter->hw.back = adapter;
915 adapter->msg_enable = (1 << debug) - 1;
916
917 mmio_start = pci_resource_start(pdev, BAR_0);
918 mmio_len = pci_resource_len(pdev, BAR_0);
919
920 err = -EIO;
921 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
922 if (!adapter->hw.hw_addr)
923 goto err_ioremap;
924
925 for (i = BAR_1; i <= BAR_5; i++) {
926 if (pci_resource_len(pdev, i) == 0)
927 continue;
928 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
929 adapter->hw.io_base = pci_resource_start(pdev, i);
930 break;
931 }
932 }
933
934 netdev->open = &e1000_open;
935 netdev->stop = &e1000_close;
936 netdev->hard_start_xmit = &e1000_xmit_frame;
937 netdev->get_stats = &e1000_get_stats;
938 netdev->set_multicast_list = &e1000_set_multi;
939 netdev->set_mac_address = &e1000_set_mac;
940 netdev->change_mtu = &e1000_change_mtu;
941 netdev->do_ioctl = &e1000_ioctl;
942 e1000_set_ethtool_ops(netdev);
943 netdev->tx_timeout = &e1000_tx_timeout;
944 netdev->watchdog_timeo = 5 * HZ;
945 #ifdef CONFIG_E1000_NAPI
946 netdev->poll = &e1000_clean;
947 netdev->weight = 64;
948 #endif
949 netdev->vlan_rx_register = e1000_vlan_rx_register;
950 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
951 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
952 #ifdef CONFIG_NET_POLL_CONTROLLER
953 netdev->poll_controller = e1000_netpoll;
954 #endif
955 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
956
957 netdev->mem_start = mmio_start;
958 netdev->mem_end = mmio_start + mmio_len;
959 netdev->base_addr = adapter->hw.io_base;
960
961 adapter->bd_number = cards_found;
962
963 /* setup the private structure */
964
965 if ((err = e1000_sw_init(adapter)))
966 goto err_sw_init;
967
968 err = -EIO;
969 /* Flash BAR mapping must happen after e1000_sw_init
970 * because it depends on mac_type */
971 if ((adapter->hw.mac_type == e1000_ich8lan) &&
972 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
973 flash_start = pci_resource_start(pdev, 1);
974 flash_len = pci_resource_len(pdev, 1);
975 adapter->hw.flash_address = ioremap(flash_start, flash_len);
976 if (!adapter->hw.flash_address)
977 goto err_flashmap;
978 }
979
980 if (e1000_check_phy_reset_block(&adapter->hw))
981 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
982
983 if (adapter->hw.mac_type >= e1000_82543) {
984 netdev->features = NETIF_F_SG |
985 NETIF_F_HW_CSUM |
986 NETIF_F_HW_VLAN_TX |
987 NETIF_F_HW_VLAN_RX |
988 NETIF_F_HW_VLAN_FILTER;
989 if (adapter->hw.mac_type == e1000_ich8lan)
990 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
991 }
992
993 #ifdef NETIF_F_TSO
994 if ((adapter->hw.mac_type >= e1000_82544) &&
995 (adapter->hw.mac_type != e1000_82547))
996 netdev->features |= NETIF_F_TSO;
997
998 #ifdef CONFIG_DEBUG_SLAB
999 /* 82544's work arounds do not play nicely with DEBUG SLAB */
1000 if (adapter->hw.mac_type == e1000_82544)
1001 netdev->features &= ~NETIF_F_TSO;
1002 #endif
1003
1004 #ifdef NETIF_F_TSO6
1005 if (adapter->hw.mac_type > e1000_82547_rev_2)
1006 netdev->features |= NETIF_F_TSO6;
1007 #endif
1008 #endif
1009 if (pci_using_dac)
1010 netdev->features |= NETIF_F_HIGHDMA;
1011
1012 netdev->features |= NETIF_F_LLTX;
1013
1014 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
1015
1016 /* initialize eeprom parameters */
1017
1018 if (e1000_init_eeprom_params(&adapter->hw)) {
1019 E1000_ERR("EEPROM initialization failed\n");
1020 goto err_eeprom;
1021 }
1022
1023 /* before reading the EEPROM, reset the controller to
1024 * put the device in a known good starting state */
1025
1026 e1000_reset_hw(&adapter->hw);
1027
1028 /* make sure the EEPROM is good */
1029
1030 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1031 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1032 goto err_eeprom;
1033 }
1034
1035 /* copy the MAC address out of the EEPROM */
1036
1037 if (e1000_read_mac_addr(&adapter->hw))
1038 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1039 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1040 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1041
1042 if (!is_valid_ether_addr(netdev->perm_addr)) {
1043 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1044 goto err_eeprom;
1045 }
1046
1047 e1000_get_bus_info(&adapter->hw);
1048
1049 init_timer(&adapter->tx_fifo_stall_timer);
1050 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1051 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1052
1053 init_timer(&adapter->watchdog_timer);
1054 adapter->watchdog_timer.function = &e1000_watchdog;
1055 adapter->watchdog_timer.data = (unsigned long) adapter;
1056
1057 init_timer(&adapter->phy_info_timer);
1058 adapter->phy_info_timer.function = &e1000_update_phy_info;
1059 adapter->phy_info_timer.data = (unsigned long) adapter;
1060
1061 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1062
1063 e1000_check_options(adapter);
1064
1065 /* Initial Wake on LAN setting
1066 * If APM wake is enabled in the EEPROM,
1067 * enable the ACPI Magic Packet filter
1068 */
1069
1070 switch (adapter->hw.mac_type) {
1071 case e1000_82542_rev2_0:
1072 case e1000_82542_rev2_1:
1073 case e1000_82543:
1074 break;
1075 case e1000_82544:
1076 e1000_read_eeprom(&adapter->hw,
1077 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1078 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1079 break;
1080 case e1000_ich8lan:
1081 e1000_read_eeprom(&adapter->hw,
1082 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1083 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1084 break;
1085 case e1000_82546:
1086 case e1000_82546_rev_3:
1087 case e1000_82571:
1088 case e1000_80003es2lan:
1089 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1090 e1000_read_eeprom(&adapter->hw,
1091 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1092 break;
1093 }
1094 /* Fall Through */
1095 default:
1096 e1000_read_eeprom(&adapter->hw,
1097 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1098 break;
1099 }
1100 if (eeprom_data & eeprom_apme_mask)
1101 adapter->eeprom_wol |= E1000_WUFC_MAG;
1102
1103 /* now that we have the eeprom settings, apply the special cases
1104 * where the eeprom may be wrong or the board simply won't support
1105 * wake on lan on a particular port */
1106 switch (pdev->device) {
1107 case E1000_DEV_ID_82546GB_PCIE:
1108 adapter->eeprom_wol = 0;
1109 break;
1110 case E1000_DEV_ID_82546EB_FIBER:
1111 case E1000_DEV_ID_82546GB_FIBER:
1112 case E1000_DEV_ID_82571EB_FIBER:
1113 /* Wake events only supported on port A for dual fiber
1114 * regardless of eeprom setting */
1115 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1116 adapter->eeprom_wol = 0;
1117 break;
1118 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1119 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1120 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1121 /* if quad port adapter, disable WoL on all but port A */
1122 if (global_quad_port_a != 0)
1123 adapter->eeprom_wol = 0;
1124 else
1125 adapter->quad_port_a = 1;
1126 /* Reset for multiple quad port adapters */
1127 if (++global_quad_port_a == 4)
1128 global_quad_port_a = 0;
1129 break;
1130 }
1131
1132 /* initialize the wol settings based on the eeprom settings */
1133 adapter->wol = adapter->eeprom_wol;
1134
1135 /* print bus type/speed/width info */
1136 {
1137 struct e1000_hw *hw = &adapter->hw;
1138 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1139 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1140 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1141 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1142 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1143 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1144 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1145 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1146 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1147 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1148 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1149 "32-bit"));
1150 }
1151
1152 for (i = 0; i < 6; i++)
1153 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1154
1155 /* reset the hardware with the new settings */
1156 e1000_reset(adapter);
1157
1158 /* If the controller is 82573 and f/w is AMT, do not set
1159 * DRV_LOAD until the interface is up. For all other cases,
1160 * let the f/w know that the h/w is now under the control
1161 * of the driver. */
1162 if (adapter->hw.mac_type != e1000_82573 ||
1163 !e1000_check_mng_mode(&adapter->hw))
1164 e1000_get_hw_control(adapter);
1165
1166 strcpy(netdev->name, "eth%d");
1167 if ((err = register_netdev(netdev)))
1168 goto err_register;
1169
1170 /* tell the stack to leave us alone until e1000_open() is called */
1171 netif_carrier_off(netdev);
1172 netif_stop_queue(netdev);
1173
1174 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1175
1176 cards_found++;
1177 return 0;
1178
1179 err_register:
1180 e1000_release_hw_control(adapter);
1181 err_eeprom:
1182 if (!e1000_check_phy_reset_block(&adapter->hw))
1183 e1000_phy_hw_reset(&adapter->hw);
1184
1185 if (adapter->hw.flash_address)
1186 iounmap(adapter->hw.flash_address);
1187 err_flashmap:
1188 #ifdef CONFIG_E1000_NAPI
1189 for (i = 0; i < adapter->num_rx_queues; i++)
1190 dev_put(&adapter->polling_netdev[i]);
1191 #endif
1192
1193 kfree(adapter->tx_ring);
1194 kfree(adapter->rx_ring);
1195 #ifdef CONFIG_E1000_NAPI
1196 kfree(adapter->polling_netdev);
1197 #endif
1198 err_sw_init:
1199 iounmap(adapter->hw.hw_addr);
1200 err_ioremap:
1201 free_netdev(netdev);
1202 err_alloc_etherdev:
1203 pci_release_regions(pdev);
1204 err_pci_reg:
1205 err_dma:
1206 pci_disable_device(pdev);
1207 return err;
1208 }
1209
1210 /**
1211 * e1000_remove - Device Removal Routine
1212 * @pdev: PCI device information struct
1213 *
1214 * e1000_remove is called by the PCI subsystem to alert the driver
1215 * that it should release a PCI device. The could be caused by a
1216 * Hot-Plug event, or because the driver is going to be removed from
1217 * memory.
1218 **/
1219
1220 static void __devexit
1221 e1000_remove(struct pci_dev *pdev)
1222 {
1223 struct net_device *netdev = pci_get_drvdata(pdev);
1224 struct e1000_adapter *adapter = netdev_priv(netdev);
1225 #ifdef CONFIG_E1000_NAPI
1226 int i;
1227 #endif
1228
1229 flush_scheduled_work();
1230
1231 e1000_release_manageability(adapter);
1232
1233 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1234 * would have already happened in close and is redundant. */
1235 e1000_release_hw_control(adapter);
1236
1237 unregister_netdev(netdev);
1238 #ifdef CONFIG_E1000_NAPI
1239 for (i = 0; i < adapter->num_rx_queues; i++)
1240 dev_put(&adapter->polling_netdev[i]);
1241 #endif
1242
1243 if (!e1000_check_phy_reset_block(&adapter->hw))
1244 e1000_phy_hw_reset(&adapter->hw);
1245
1246 kfree(adapter->tx_ring);
1247 kfree(adapter->rx_ring);
1248 #ifdef CONFIG_E1000_NAPI
1249 kfree(adapter->polling_netdev);
1250 #endif
1251
1252 iounmap(adapter->hw.hw_addr);
1253 if (adapter->hw.flash_address)
1254 iounmap(adapter->hw.flash_address);
1255 pci_release_regions(pdev);
1256
1257 free_netdev(netdev);
1258
1259 pci_disable_device(pdev);
1260 }
1261
1262 /**
1263 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1264 * @adapter: board private structure to initialize
1265 *
1266 * e1000_sw_init initializes the Adapter private data structure.
1267 * Fields are initialized based on PCI device information and
1268 * OS network device settings (MTU size).
1269 **/
1270
1271 static int __devinit
1272 e1000_sw_init(struct e1000_adapter *adapter)
1273 {
1274 struct e1000_hw *hw = &adapter->hw;
1275 struct net_device *netdev = adapter->netdev;
1276 struct pci_dev *pdev = adapter->pdev;
1277 #ifdef CONFIG_E1000_NAPI
1278 int i;
1279 #endif
1280
1281 /* PCI config space info */
1282
1283 hw->vendor_id = pdev->vendor;
1284 hw->device_id = pdev->device;
1285 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1286 hw->subsystem_id = pdev->subsystem_device;
1287
1288 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1289
1290 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1291
1292 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1293 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1294 hw->max_frame_size = netdev->mtu +
1295 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1296 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1297
1298 /* identify the MAC */
1299
1300 if (e1000_set_mac_type(hw)) {
1301 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1302 return -EIO;
1303 }
1304
1305 switch (hw->mac_type) {
1306 default:
1307 break;
1308 case e1000_82541:
1309 case e1000_82547:
1310 case e1000_82541_rev_2:
1311 case e1000_82547_rev_2:
1312 hw->phy_init_script = 1;
1313 break;
1314 }
1315
1316 e1000_set_media_type(hw);
1317
1318 hw->wait_autoneg_complete = FALSE;
1319 hw->tbi_compatibility_en = TRUE;
1320 hw->adaptive_ifs = TRUE;
1321
1322 /* Copper options */
1323
1324 if (hw->media_type == e1000_media_type_copper) {
1325 hw->mdix = AUTO_ALL_MODES;
1326 hw->disable_polarity_correction = FALSE;
1327 hw->master_slave = E1000_MASTER_SLAVE;
1328 }
1329
1330 adapter->num_tx_queues = 1;
1331 adapter->num_rx_queues = 1;
1332
1333 if (e1000_alloc_queues(adapter)) {
1334 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1335 return -ENOMEM;
1336 }
1337
1338 #ifdef CONFIG_E1000_NAPI
1339 for (i = 0; i < adapter->num_rx_queues; i++) {
1340 adapter->polling_netdev[i].priv = adapter;
1341 adapter->polling_netdev[i].poll = &e1000_clean;
1342 adapter->polling_netdev[i].weight = 64;
1343 dev_hold(&adapter->polling_netdev[i]);
1344 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1345 }
1346 spin_lock_init(&adapter->tx_queue_lock);
1347 #endif
1348
1349 atomic_set(&adapter->irq_sem, 1);
1350 spin_lock_init(&adapter->stats_lock);
1351
1352 set_bit(__E1000_DOWN, &adapter->flags);
1353
1354 return 0;
1355 }
1356
1357 /**
1358 * e1000_alloc_queues - Allocate memory for all rings
1359 * @adapter: board private structure to initialize
1360 *
1361 * We allocate one ring per queue at run-time since we don't know the
1362 * number of queues at compile-time. The polling_netdev array is
1363 * intended for Multiqueue, but should work fine with a single queue.
1364 **/
1365
1366 static int __devinit
1367 e1000_alloc_queues(struct e1000_adapter *adapter)
1368 {
1369 int size;
1370
1371 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1372 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1373 if (!adapter->tx_ring)
1374 return -ENOMEM;
1375 memset(adapter->tx_ring, 0, size);
1376
1377 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1378 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1379 if (!adapter->rx_ring) {
1380 kfree(adapter->tx_ring);
1381 return -ENOMEM;
1382 }
1383 memset(adapter->rx_ring, 0, size);
1384
1385 #ifdef CONFIG_E1000_NAPI
1386 size = sizeof(struct net_device) * adapter->num_rx_queues;
1387 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1388 if (!adapter->polling_netdev) {
1389 kfree(adapter->tx_ring);
1390 kfree(adapter->rx_ring);
1391 return -ENOMEM;
1392 }
1393 memset(adapter->polling_netdev, 0, size);
1394 #endif
1395
1396 return E1000_SUCCESS;
1397 }
1398
1399 /**
1400 * e1000_open - Called when a network interface is made active
1401 * @netdev: network interface device structure
1402 *
1403 * Returns 0 on success, negative value on failure
1404 *
1405 * The open entry point is called when a network interface is made
1406 * active by the system (IFF_UP). At this point all resources needed
1407 * for transmit and receive operations are allocated, the interrupt
1408 * handler is registered with the OS, the watchdog timer is started,
1409 * and the stack is notified that the interface is ready.
1410 **/
1411
1412 static int
1413 e1000_open(struct net_device *netdev)
1414 {
1415 struct e1000_adapter *adapter = netdev_priv(netdev);
1416 int err;
1417
1418 /* disallow open during test */
1419 if (test_bit(__E1000_TESTING, &adapter->flags))
1420 return -EBUSY;
1421
1422 /* allocate transmit descriptors */
1423 if ((err = e1000_setup_all_tx_resources(adapter)))
1424 goto err_setup_tx;
1425
1426 /* allocate receive descriptors */
1427 if ((err = e1000_setup_all_rx_resources(adapter)))
1428 goto err_setup_rx;
1429
1430 err = e1000_request_irq(adapter);
1431 if (err)
1432 goto err_req_irq;
1433
1434 e1000_power_up_phy(adapter);
1435
1436 if ((err = e1000_up(adapter)))
1437 goto err_up;
1438 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1439 if ((adapter->hw.mng_cookie.status &
1440 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1441 e1000_update_mng_vlan(adapter);
1442 }
1443
1444 /* If AMT is enabled, let the firmware know that the network
1445 * interface is now open */
1446 if (adapter->hw.mac_type == e1000_82573 &&
1447 e1000_check_mng_mode(&adapter->hw))
1448 e1000_get_hw_control(adapter);
1449
1450 return E1000_SUCCESS;
1451
1452 err_up:
1453 e1000_power_down_phy(adapter);
1454 e1000_free_irq(adapter);
1455 err_req_irq:
1456 e1000_free_all_rx_resources(adapter);
1457 err_setup_rx:
1458 e1000_free_all_tx_resources(adapter);
1459 err_setup_tx:
1460 e1000_reset(adapter);
1461
1462 return err;
1463 }
1464
1465 /**
1466 * e1000_close - Disables a network interface
1467 * @netdev: network interface device structure
1468 *
1469 * Returns 0, this is not allowed to fail
1470 *
1471 * The close entry point is called when an interface is de-activated
1472 * by the OS. The hardware is still under the drivers control, but
1473 * needs to be disabled. A global MAC reset is issued to stop the
1474 * hardware, and all transmit and receive resources are freed.
1475 **/
1476
1477 static int
1478 e1000_close(struct net_device *netdev)
1479 {
1480 struct e1000_adapter *adapter = netdev_priv(netdev);
1481
1482 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1483 e1000_down(adapter);
1484 e1000_power_down_phy(adapter);
1485 e1000_free_irq(adapter);
1486
1487 e1000_free_all_tx_resources(adapter);
1488 e1000_free_all_rx_resources(adapter);
1489
1490 /* kill manageability vlan ID if supported, but not if a vlan with
1491 * the same ID is registered on the host OS (let 8021q kill it) */
1492 if ((adapter->hw.mng_cookie.status &
1493 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1494 !(adapter->vlgrp &&
1495 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
1496 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1497 }
1498
1499 /* If AMT is enabled, let the firmware know that the network
1500 * interface is now closed */
1501 if (adapter->hw.mac_type == e1000_82573 &&
1502 e1000_check_mng_mode(&adapter->hw))
1503 e1000_release_hw_control(adapter);
1504
1505 return 0;
1506 }
1507
1508 /**
1509 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1510 * @adapter: address of board private structure
1511 * @start: address of beginning of memory
1512 * @len: length of memory
1513 **/
1514 static boolean_t
1515 e1000_check_64k_bound(struct e1000_adapter *adapter,
1516 void *start, unsigned long len)
1517 {
1518 unsigned long begin = (unsigned long) start;
1519 unsigned long end = begin + len;
1520
1521 /* First rev 82545 and 82546 need to not allow any memory
1522 * write location to cross 64k boundary due to errata 23 */
1523 if (adapter->hw.mac_type == e1000_82545 ||
1524 adapter->hw.mac_type == e1000_82546) {
1525 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1526 }
1527
1528 return TRUE;
1529 }
1530
1531 /**
1532 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1533 * @adapter: board private structure
1534 * @txdr: tx descriptor ring (for a specific queue) to setup
1535 *
1536 * Return 0 on success, negative on failure
1537 **/
1538
1539 static int
1540 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1541 struct e1000_tx_ring *txdr)
1542 {
1543 struct pci_dev *pdev = adapter->pdev;
1544 int size;
1545
1546 size = sizeof(struct e1000_buffer) * txdr->count;
1547 txdr->buffer_info = vmalloc(size);
1548 if (!txdr->buffer_info) {
1549 DPRINTK(PROBE, ERR,
1550 "Unable to allocate memory for the transmit descriptor ring\n");
1551 return -ENOMEM;
1552 }
1553 memset(txdr->buffer_info, 0, size);
1554
1555 /* round up to nearest 4K */
1556
1557 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1558 E1000_ROUNDUP(txdr->size, 4096);
1559
1560 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1561 if (!txdr->desc) {
1562 setup_tx_desc_die:
1563 vfree(txdr->buffer_info);
1564 DPRINTK(PROBE, ERR,
1565 "Unable to allocate memory for the transmit descriptor ring\n");
1566 return -ENOMEM;
1567 }
1568
1569 /* Fix for errata 23, can't cross 64kB boundary */
1570 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1571 void *olddesc = txdr->desc;
1572 dma_addr_t olddma = txdr->dma;
1573 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1574 "at %p\n", txdr->size, txdr->desc);
1575 /* Try again, without freeing the previous */
1576 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1577 /* Failed allocation, critical failure */
1578 if (!txdr->desc) {
1579 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1580 goto setup_tx_desc_die;
1581 }
1582
1583 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1584 /* give up */
1585 pci_free_consistent(pdev, txdr->size, txdr->desc,
1586 txdr->dma);
1587 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1588 DPRINTK(PROBE, ERR,
1589 "Unable to allocate aligned memory "
1590 "for the transmit descriptor ring\n");
1591 vfree(txdr->buffer_info);
1592 return -ENOMEM;
1593 } else {
1594 /* Free old allocation, new allocation was successful */
1595 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1596 }
1597 }
1598 memset(txdr->desc, 0, txdr->size);
1599
1600 txdr->next_to_use = 0;
1601 txdr->next_to_clean = 0;
1602 spin_lock_init(&txdr->tx_lock);
1603
1604 return 0;
1605 }
1606
1607 /**
1608 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1609 * (Descriptors) for all queues
1610 * @adapter: board private structure
1611 *
1612 * Return 0 on success, negative on failure
1613 **/
1614
1615 int
1616 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1617 {
1618 int i, err = 0;
1619
1620 for (i = 0; i < adapter->num_tx_queues; i++) {
1621 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1622 if (err) {
1623 DPRINTK(PROBE, ERR,
1624 "Allocation for Tx Queue %u failed\n", i);
1625 for (i-- ; i >= 0; i--)
1626 e1000_free_tx_resources(adapter,
1627 &adapter->tx_ring[i]);
1628 break;
1629 }
1630 }
1631
1632 return err;
1633 }
1634
1635 /**
1636 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1637 * @adapter: board private structure
1638 *
1639 * Configure the Tx unit of the MAC after a reset.
1640 **/
1641
1642 static void
1643 e1000_configure_tx(struct e1000_adapter *adapter)
1644 {
1645 uint64_t tdba;
1646 struct e1000_hw *hw = &adapter->hw;
1647 uint32_t tdlen, tctl, tipg, tarc;
1648 uint32_t ipgr1, ipgr2;
1649
1650 /* Setup the HW Tx Head and Tail descriptor pointers */
1651
1652 switch (adapter->num_tx_queues) {
1653 case 1:
1654 default:
1655 tdba = adapter->tx_ring[0].dma;
1656 tdlen = adapter->tx_ring[0].count *
1657 sizeof(struct e1000_tx_desc);
1658 E1000_WRITE_REG(hw, TDLEN, tdlen);
1659 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1660 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1661 E1000_WRITE_REG(hw, TDT, 0);
1662 E1000_WRITE_REG(hw, TDH, 0);
1663 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1664 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1665 break;
1666 }
1667
1668 /* Set the default values for the Tx Inter Packet Gap timer */
1669 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1670 (hw->media_type == e1000_media_type_fiber ||
1671 hw->media_type == e1000_media_type_internal_serdes))
1672 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1673 else
1674 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1675
1676 switch (hw->mac_type) {
1677 case e1000_82542_rev2_0:
1678 case e1000_82542_rev2_1:
1679 tipg = DEFAULT_82542_TIPG_IPGT;
1680 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1681 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1682 break;
1683 case e1000_80003es2lan:
1684 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1685 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1686 break;
1687 default:
1688 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1689 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1690 break;
1691 }
1692 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1693 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1694 E1000_WRITE_REG(hw, TIPG, tipg);
1695
1696 /* Set the Tx Interrupt Delay register */
1697
1698 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1699 if (hw->mac_type >= e1000_82540)
1700 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1701
1702 /* Program the Transmit Control Register */
1703
1704 tctl = E1000_READ_REG(hw, TCTL);
1705 tctl &= ~E1000_TCTL_CT;
1706 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1707 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1708
1709 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1710 tarc = E1000_READ_REG(hw, TARC0);
1711 /* set the speed mode bit, we'll clear it if we're not at
1712 * gigabit link later */
1713 tarc |= (1 << 21);
1714 E1000_WRITE_REG(hw, TARC0, tarc);
1715 } else if (hw->mac_type == e1000_80003es2lan) {
1716 tarc = E1000_READ_REG(hw, TARC0);
1717 tarc |= 1;
1718 E1000_WRITE_REG(hw, TARC0, tarc);
1719 tarc = E1000_READ_REG(hw, TARC1);
1720 tarc |= 1;
1721 E1000_WRITE_REG(hw, TARC1, tarc);
1722 }
1723
1724 e1000_config_collision_dist(hw);
1725
1726 /* Setup Transmit Descriptor Settings for eop descriptor */
1727 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1728
1729 /* only set IDE if we are delaying interrupts using the timers */
1730 if (adapter->tx_int_delay)
1731 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1732
1733 if (hw->mac_type < e1000_82543)
1734 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1735 else
1736 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1737
1738 /* Cache if we're 82544 running in PCI-X because we'll
1739 * need this to apply a workaround later in the send path. */
1740 if (hw->mac_type == e1000_82544 &&
1741 hw->bus_type == e1000_bus_type_pcix)
1742 adapter->pcix_82544 = 1;
1743
1744 E1000_WRITE_REG(hw, TCTL, tctl);
1745
1746 }
1747
1748 /**
1749 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1750 * @adapter: board private structure
1751 * @rxdr: rx descriptor ring (for a specific queue) to setup
1752 *
1753 * Returns 0 on success, negative on failure
1754 **/
1755
1756 static int
1757 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1758 struct e1000_rx_ring *rxdr)
1759 {
1760 struct pci_dev *pdev = adapter->pdev;
1761 int size, desc_len;
1762
1763 size = sizeof(struct e1000_buffer) * rxdr->count;
1764 rxdr->buffer_info = vmalloc(size);
1765 if (!rxdr->buffer_info) {
1766 DPRINTK(PROBE, ERR,
1767 "Unable to allocate memory for the receive descriptor ring\n");
1768 return -ENOMEM;
1769 }
1770 memset(rxdr->buffer_info, 0, size);
1771
1772 size = sizeof(struct e1000_ps_page) * rxdr->count;
1773 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1774 if (!rxdr->ps_page) {
1775 vfree(rxdr->buffer_info);
1776 DPRINTK(PROBE, ERR,
1777 "Unable to allocate memory for the receive descriptor ring\n");
1778 return -ENOMEM;
1779 }
1780 memset(rxdr->ps_page, 0, size);
1781
1782 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1783 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1784 if (!rxdr->ps_page_dma) {
1785 vfree(rxdr->buffer_info);
1786 kfree(rxdr->ps_page);
1787 DPRINTK(PROBE, ERR,
1788 "Unable to allocate memory for the receive descriptor ring\n");
1789 return -ENOMEM;
1790 }
1791 memset(rxdr->ps_page_dma, 0, size);
1792
1793 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1794 desc_len = sizeof(struct e1000_rx_desc);
1795 else
1796 desc_len = sizeof(union e1000_rx_desc_packet_split);
1797
1798 /* Round up to nearest 4K */
1799
1800 rxdr->size = rxdr->count * desc_len;
1801 E1000_ROUNDUP(rxdr->size, 4096);
1802
1803 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1804
1805 if (!rxdr->desc) {
1806 DPRINTK(PROBE, ERR,
1807 "Unable to allocate memory for the receive descriptor ring\n");
1808 setup_rx_desc_die:
1809 vfree(rxdr->buffer_info);
1810 kfree(rxdr->ps_page);
1811 kfree(rxdr->ps_page_dma);
1812 return -ENOMEM;
1813 }
1814
1815 /* Fix for errata 23, can't cross 64kB boundary */
1816 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1817 void *olddesc = rxdr->desc;
1818 dma_addr_t olddma = rxdr->dma;
1819 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1820 "at %p\n", rxdr->size, rxdr->desc);
1821 /* Try again, without freeing the previous */
1822 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1823 /* Failed allocation, critical failure */
1824 if (!rxdr->desc) {
1825 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1826 DPRINTK(PROBE, ERR,
1827 "Unable to allocate memory "
1828 "for the receive descriptor ring\n");
1829 goto setup_rx_desc_die;
1830 }
1831
1832 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1833 /* give up */
1834 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1835 rxdr->dma);
1836 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1837 DPRINTK(PROBE, ERR,
1838 "Unable to allocate aligned memory "
1839 "for the receive descriptor ring\n");
1840 goto setup_rx_desc_die;
1841 } else {
1842 /* Free old allocation, new allocation was successful */
1843 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1844 }
1845 }
1846 memset(rxdr->desc, 0, rxdr->size);
1847
1848 rxdr->next_to_clean = 0;
1849 rxdr->next_to_use = 0;
1850
1851 return 0;
1852 }
1853
1854 /**
1855 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1856 * (Descriptors) for all queues
1857 * @adapter: board private structure
1858 *
1859 * Return 0 on success, negative on failure
1860 **/
1861
1862 int
1863 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1864 {
1865 int i, err = 0;
1866
1867 for (i = 0; i < adapter->num_rx_queues; i++) {
1868 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1869 if (err) {
1870 DPRINTK(PROBE, ERR,
1871 "Allocation for Rx Queue %u failed\n", i);
1872 for (i-- ; i >= 0; i--)
1873 e1000_free_rx_resources(adapter,
1874 &adapter->rx_ring[i]);
1875 break;
1876 }
1877 }
1878
1879 return err;
1880 }
1881
1882 /**
1883 * e1000_setup_rctl - configure the receive control registers
1884 * @adapter: Board private structure
1885 **/
1886 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1887 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1888 static void
1889 e1000_setup_rctl(struct e1000_adapter *adapter)
1890 {
1891 uint32_t rctl, rfctl;
1892 uint32_t psrctl = 0;
1893 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1894 uint32_t pages = 0;
1895 #endif
1896
1897 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1898
1899 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1900
1901 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1902 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1903 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1904
1905 if (adapter->hw.tbi_compatibility_on == 1)
1906 rctl |= E1000_RCTL_SBP;
1907 else
1908 rctl &= ~E1000_RCTL_SBP;
1909
1910 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1911 rctl &= ~E1000_RCTL_LPE;
1912 else
1913 rctl |= E1000_RCTL_LPE;
1914
1915 /* Setup buffer sizes */
1916 rctl &= ~E1000_RCTL_SZ_4096;
1917 rctl |= E1000_RCTL_BSEX;
1918 switch (adapter->rx_buffer_len) {
1919 case E1000_RXBUFFER_256:
1920 rctl |= E1000_RCTL_SZ_256;
1921 rctl &= ~E1000_RCTL_BSEX;
1922 break;
1923 case E1000_RXBUFFER_512:
1924 rctl |= E1000_RCTL_SZ_512;
1925 rctl &= ~E1000_RCTL_BSEX;
1926 break;
1927 case E1000_RXBUFFER_1024:
1928 rctl |= E1000_RCTL_SZ_1024;
1929 rctl &= ~E1000_RCTL_BSEX;
1930 break;
1931 case E1000_RXBUFFER_2048:
1932 default:
1933 rctl |= E1000_RCTL_SZ_2048;
1934 rctl &= ~E1000_RCTL_BSEX;
1935 break;
1936 case E1000_RXBUFFER_4096:
1937 rctl |= E1000_RCTL_SZ_4096;
1938 break;
1939 case E1000_RXBUFFER_8192:
1940 rctl |= E1000_RCTL_SZ_8192;
1941 break;
1942 case E1000_RXBUFFER_16384:
1943 rctl |= E1000_RCTL_SZ_16384;
1944 break;
1945 }
1946
1947 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1948 /* 82571 and greater support packet-split where the protocol
1949 * header is placed in skb->data and the packet data is
1950 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1951 * In the case of a non-split, skb->data is linearly filled,
1952 * followed by the page buffers. Therefore, skb->data is
1953 * sized to hold the largest protocol header.
1954 */
1955 /* allocations using alloc_page take too long for regular MTU
1956 * so only enable packet split for jumbo frames */
1957 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1958 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1959 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1960 adapter->rx_ps_pages = pages;
1961 else
1962 adapter->rx_ps_pages = 0;
1963 #endif
1964 if (adapter->rx_ps_pages) {
1965 /* Configure extra packet-split registers */
1966 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1967 rfctl |= E1000_RFCTL_EXTEN;
1968 /* disable packet split support for IPv6 extension headers,
1969 * because some malformed IPv6 headers can hang the RX */
1970 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1971 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1972
1973 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1974
1975 rctl |= E1000_RCTL_DTYP_PS;
1976
1977 psrctl |= adapter->rx_ps_bsize0 >>
1978 E1000_PSRCTL_BSIZE0_SHIFT;
1979
1980 switch (adapter->rx_ps_pages) {
1981 case 3:
1982 psrctl |= PAGE_SIZE <<
1983 E1000_PSRCTL_BSIZE3_SHIFT;
1984 case 2:
1985 psrctl |= PAGE_SIZE <<
1986 E1000_PSRCTL_BSIZE2_SHIFT;
1987 case 1:
1988 psrctl |= PAGE_SIZE >>
1989 E1000_PSRCTL_BSIZE1_SHIFT;
1990 break;
1991 }
1992
1993 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1994 }
1995
1996 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1997 }
1998
1999 /**
2000 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2001 * @adapter: board private structure
2002 *
2003 * Configure the Rx unit of the MAC after a reset.
2004 **/
2005
2006 static void
2007 e1000_configure_rx(struct e1000_adapter *adapter)
2008 {
2009 uint64_t rdba;
2010 struct e1000_hw *hw = &adapter->hw;
2011 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2012
2013 if (adapter->rx_ps_pages) {
2014 /* this is a 32 byte descriptor */
2015 rdlen = adapter->rx_ring[0].count *
2016 sizeof(union e1000_rx_desc_packet_split);
2017 adapter->clean_rx = e1000_clean_rx_irq_ps;
2018 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2019 } else {
2020 rdlen = adapter->rx_ring[0].count *
2021 sizeof(struct e1000_rx_desc);
2022 adapter->clean_rx = e1000_clean_rx_irq;
2023 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2024 }
2025
2026 /* disable receives while setting up the descriptors */
2027 rctl = E1000_READ_REG(hw, RCTL);
2028 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2029
2030 /* set the Receive Delay Timer Register */
2031 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2032
2033 if (hw->mac_type >= e1000_82540) {
2034 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2035 if (adapter->itr_setting != 0)
2036 E1000_WRITE_REG(hw, ITR,
2037 1000000000 / (adapter->itr * 256));
2038 }
2039
2040 if (hw->mac_type >= e1000_82571) {
2041 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2042 /* Reset delay timers after every interrupt */
2043 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2044 #ifdef CONFIG_E1000_NAPI
2045 /* Auto-Mask interrupts upon ICR access */
2046 ctrl_ext |= E1000_CTRL_EXT_IAME;
2047 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2048 #endif
2049 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2050 E1000_WRITE_FLUSH(hw);
2051 }
2052
2053 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2054 * the Base and Length of the Rx Descriptor Ring */
2055 switch (adapter->num_rx_queues) {
2056 case 1:
2057 default:
2058 rdba = adapter->rx_ring[0].dma;
2059 E1000_WRITE_REG(hw, RDLEN, rdlen);
2060 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2061 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2062 E1000_WRITE_REG(hw, RDT, 0);
2063 E1000_WRITE_REG(hw, RDH, 0);
2064 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2065 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2066 break;
2067 }
2068
2069 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2070 if (hw->mac_type >= e1000_82543) {
2071 rxcsum = E1000_READ_REG(hw, RXCSUM);
2072 if (adapter->rx_csum == TRUE) {
2073 rxcsum |= E1000_RXCSUM_TUOFL;
2074
2075 /* Enable 82571 IPv4 payload checksum for UDP fragments
2076 * Must be used in conjunction with packet-split. */
2077 if ((hw->mac_type >= e1000_82571) &&
2078 (adapter->rx_ps_pages)) {
2079 rxcsum |= E1000_RXCSUM_IPPCSE;
2080 }
2081 } else {
2082 rxcsum &= ~E1000_RXCSUM_TUOFL;
2083 /* don't need to clear IPPCSE as it defaults to 0 */
2084 }
2085 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2086 }
2087
2088 /* enable early receives on 82573, only takes effect if using > 2048
2089 * byte total frame size. for example only for jumbo frames */
2090 #define E1000_ERT_2048 0x100
2091 if (hw->mac_type == e1000_82573)
2092 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2093
2094 /* Enable Receives */
2095 E1000_WRITE_REG(hw, RCTL, rctl);
2096 }
2097
2098 /**
2099 * e1000_free_tx_resources - Free Tx Resources per Queue
2100 * @adapter: board private structure
2101 * @tx_ring: Tx descriptor ring for a specific queue
2102 *
2103 * Free all transmit software resources
2104 **/
2105
2106 static void
2107 e1000_free_tx_resources(struct e1000_adapter *adapter,
2108 struct e1000_tx_ring *tx_ring)
2109 {
2110 struct pci_dev *pdev = adapter->pdev;
2111
2112 e1000_clean_tx_ring(adapter, tx_ring);
2113
2114 vfree(tx_ring->buffer_info);
2115 tx_ring->buffer_info = NULL;
2116
2117 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2118
2119 tx_ring->desc = NULL;
2120 }
2121
2122 /**
2123 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2124 * @adapter: board private structure
2125 *
2126 * Free all transmit software resources
2127 **/
2128
2129 void
2130 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2131 {
2132 int i;
2133
2134 for (i = 0; i < adapter->num_tx_queues; i++)
2135 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2136 }
2137
2138 static void
2139 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2140 struct e1000_buffer *buffer_info)
2141 {
2142 if (buffer_info->dma) {
2143 pci_unmap_page(adapter->pdev,
2144 buffer_info->dma,
2145 buffer_info->length,
2146 PCI_DMA_TODEVICE);
2147 buffer_info->dma = 0;
2148 }
2149 if (buffer_info->skb) {
2150 dev_kfree_skb_any(buffer_info->skb);
2151 buffer_info->skb = NULL;
2152 }
2153 /* buffer_info must be completely set up in the transmit path */
2154 }
2155
2156 /**
2157 * e1000_clean_tx_ring - Free Tx Buffers
2158 * @adapter: board private structure
2159 * @tx_ring: ring to be cleaned
2160 **/
2161
2162 static void
2163 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2164 struct e1000_tx_ring *tx_ring)
2165 {
2166 struct e1000_buffer *buffer_info;
2167 unsigned long size;
2168 unsigned int i;
2169
2170 /* Free all the Tx ring sk_buffs */
2171
2172 for (i = 0; i < tx_ring->count; i++) {
2173 buffer_info = &tx_ring->buffer_info[i];
2174 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2175 }
2176
2177 size = sizeof(struct e1000_buffer) * tx_ring->count;
2178 memset(tx_ring->buffer_info, 0, size);
2179
2180 /* Zero out the descriptor ring */
2181
2182 memset(tx_ring->desc, 0, tx_ring->size);
2183
2184 tx_ring->next_to_use = 0;
2185 tx_ring->next_to_clean = 0;
2186 tx_ring->last_tx_tso = 0;
2187
2188 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2189 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2190 }
2191
2192 /**
2193 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2194 * @adapter: board private structure
2195 **/
2196
2197 static void
2198 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2199 {
2200 int i;
2201
2202 for (i = 0; i < adapter->num_tx_queues; i++)
2203 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2204 }
2205
2206 /**
2207 * e1000_free_rx_resources - Free Rx Resources
2208 * @adapter: board private structure
2209 * @rx_ring: ring to clean the resources from
2210 *
2211 * Free all receive software resources
2212 **/
2213
2214 static void
2215 e1000_free_rx_resources(struct e1000_adapter *adapter,
2216 struct e1000_rx_ring *rx_ring)
2217 {
2218 struct pci_dev *pdev = adapter->pdev;
2219
2220 e1000_clean_rx_ring(adapter, rx_ring);
2221
2222 vfree(rx_ring->buffer_info);
2223 rx_ring->buffer_info = NULL;
2224 kfree(rx_ring->ps_page);
2225 rx_ring->ps_page = NULL;
2226 kfree(rx_ring->ps_page_dma);
2227 rx_ring->ps_page_dma = NULL;
2228
2229 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2230
2231 rx_ring->desc = NULL;
2232 }
2233
2234 /**
2235 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2236 * @adapter: board private structure
2237 *
2238 * Free all receive software resources
2239 **/
2240
2241 void
2242 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2243 {
2244 int i;
2245
2246 for (i = 0; i < adapter->num_rx_queues; i++)
2247 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2248 }
2249
2250 /**
2251 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2252 * @adapter: board private structure
2253 * @rx_ring: ring to free buffers from
2254 **/
2255
2256 static void
2257 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2258 struct e1000_rx_ring *rx_ring)
2259 {
2260 struct e1000_buffer *buffer_info;
2261 struct e1000_ps_page *ps_page;
2262 struct e1000_ps_page_dma *ps_page_dma;
2263 struct pci_dev *pdev = adapter->pdev;
2264 unsigned long size;
2265 unsigned int i, j;
2266
2267 /* Free all the Rx ring sk_buffs */
2268 for (i = 0; i < rx_ring->count; i++) {
2269 buffer_info = &rx_ring->buffer_info[i];
2270 if (buffer_info->skb) {
2271 pci_unmap_single(pdev,
2272 buffer_info->dma,
2273 buffer_info->length,
2274 PCI_DMA_FROMDEVICE);
2275
2276 dev_kfree_skb(buffer_info->skb);
2277 buffer_info->skb = NULL;
2278 }
2279 ps_page = &rx_ring->ps_page[i];
2280 ps_page_dma = &rx_ring->ps_page_dma[i];
2281 for (j = 0; j < adapter->rx_ps_pages; j++) {
2282 if (!ps_page->ps_page[j]) break;
2283 pci_unmap_page(pdev,
2284 ps_page_dma->ps_page_dma[j],
2285 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2286 ps_page_dma->ps_page_dma[j] = 0;
2287 put_page(ps_page->ps_page[j]);
2288 ps_page->ps_page[j] = NULL;
2289 }
2290 }
2291
2292 size = sizeof(struct e1000_buffer) * rx_ring->count;
2293 memset(rx_ring->buffer_info, 0, size);
2294 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2295 memset(rx_ring->ps_page, 0, size);
2296 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2297 memset(rx_ring->ps_page_dma, 0, size);
2298
2299 /* Zero out the descriptor ring */
2300
2301 memset(rx_ring->desc, 0, rx_ring->size);
2302
2303 rx_ring->next_to_clean = 0;
2304 rx_ring->next_to_use = 0;
2305
2306 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2307 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2308 }
2309
2310 /**
2311 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2312 * @adapter: board private structure
2313 **/
2314
2315 static void
2316 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2317 {
2318 int i;
2319
2320 for (i = 0; i < adapter->num_rx_queues; i++)
2321 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2322 }
2323
2324 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2325 * and memory write and invalidate disabled for certain operations
2326 */
2327 static void
2328 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2329 {
2330 struct net_device *netdev = adapter->netdev;
2331 uint32_t rctl;
2332
2333 e1000_pci_clear_mwi(&adapter->hw);
2334
2335 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2336 rctl |= E1000_RCTL_RST;
2337 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2338 E1000_WRITE_FLUSH(&adapter->hw);
2339 mdelay(5);
2340
2341 if (netif_running(netdev))
2342 e1000_clean_all_rx_rings(adapter);
2343 }
2344
2345 static void
2346 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2347 {
2348 struct net_device *netdev = adapter->netdev;
2349 uint32_t rctl;
2350
2351 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2352 rctl &= ~E1000_RCTL_RST;
2353 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2354 E1000_WRITE_FLUSH(&adapter->hw);
2355 mdelay(5);
2356
2357 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2358 e1000_pci_set_mwi(&adapter->hw);
2359
2360 if (netif_running(netdev)) {
2361 /* No need to loop, because 82542 supports only 1 queue */
2362 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2363 e1000_configure_rx(adapter);
2364 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2365 }
2366 }
2367
2368 /**
2369 * e1000_set_mac - Change the Ethernet Address of the NIC
2370 * @netdev: network interface device structure
2371 * @p: pointer to an address structure
2372 *
2373 * Returns 0 on success, negative on failure
2374 **/
2375
2376 static int
2377 e1000_set_mac(struct net_device *netdev, void *p)
2378 {
2379 struct e1000_adapter *adapter = netdev_priv(netdev);
2380 struct sockaddr *addr = p;
2381
2382 if (!is_valid_ether_addr(addr->sa_data))
2383 return -EADDRNOTAVAIL;
2384
2385 /* 82542 2.0 needs to be in reset to write receive address registers */
2386
2387 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2388 e1000_enter_82542_rst(adapter);
2389
2390 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2391 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2392
2393 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2394
2395 /* With 82571 controllers, LAA may be overwritten (with the default)
2396 * due to controller reset from the other port. */
2397 if (adapter->hw.mac_type == e1000_82571) {
2398 /* activate the work around */
2399 adapter->hw.laa_is_present = 1;
2400
2401 /* Hold a copy of the LAA in RAR[14] This is done so that
2402 * between the time RAR[0] gets clobbered and the time it
2403 * gets fixed (in e1000_watchdog), the actual LAA is in one
2404 * of the RARs and no incoming packets directed to this port
2405 * are dropped. Eventaully the LAA will be in RAR[0] and
2406 * RAR[14] */
2407 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2408 E1000_RAR_ENTRIES - 1);
2409 }
2410
2411 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2412 e1000_leave_82542_rst(adapter);
2413
2414 return 0;
2415 }
2416
2417 /**
2418 * e1000_set_multi - Multicast and Promiscuous mode set
2419 * @netdev: network interface device structure
2420 *
2421 * The set_multi entry point is called whenever the multicast address
2422 * list or the network interface flags are updated. This routine is
2423 * responsible for configuring the hardware for proper multicast,
2424 * promiscuous mode, and all-multi behavior.
2425 **/
2426
2427 static void
2428 e1000_set_multi(struct net_device *netdev)
2429 {
2430 struct e1000_adapter *adapter = netdev_priv(netdev);
2431 struct e1000_hw *hw = &adapter->hw;
2432 struct dev_mc_list *mc_ptr;
2433 uint32_t rctl;
2434 uint32_t hash_value;
2435 int i, rar_entries = E1000_RAR_ENTRIES;
2436 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2437 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2438 E1000_NUM_MTA_REGISTERS;
2439
2440 if (adapter->hw.mac_type == e1000_ich8lan)
2441 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2442
2443 /* reserve RAR[14] for LAA over-write work-around */
2444 if (adapter->hw.mac_type == e1000_82571)
2445 rar_entries--;
2446
2447 /* Check for Promiscuous and All Multicast modes */
2448
2449 rctl = E1000_READ_REG(hw, RCTL);
2450
2451 if (netdev->flags & IFF_PROMISC) {
2452 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2453 } else if (netdev->flags & IFF_ALLMULTI) {
2454 rctl |= E1000_RCTL_MPE;
2455 rctl &= ~E1000_RCTL_UPE;
2456 } else {
2457 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2458 }
2459
2460 E1000_WRITE_REG(hw, RCTL, rctl);
2461
2462 /* 82542 2.0 needs to be in reset to write receive address registers */
2463
2464 if (hw->mac_type == e1000_82542_rev2_0)
2465 e1000_enter_82542_rst(adapter);
2466
2467 /* load the first 14 multicast address into the exact filters 1-14
2468 * RAR 0 is used for the station MAC adddress
2469 * if there are not 14 addresses, go ahead and clear the filters
2470 * -- with 82571 controllers only 0-13 entries are filled here
2471 */
2472 mc_ptr = netdev->mc_list;
2473
2474 for (i = 1; i < rar_entries; i++) {
2475 if (mc_ptr) {
2476 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2477 mc_ptr = mc_ptr->next;
2478 } else {
2479 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2480 E1000_WRITE_FLUSH(hw);
2481 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2482 E1000_WRITE_FLUSH(hw);
2483 }
2484 }
2485
2486 /* clear the old settings from the multicast hash table */
2487
2488 for (i = 0; i < mta_reg_count; i++) {
2489 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2490 E1000_WRITE_FLUSH(hw);
2491 }
2492
2493 /* load any remaining addresses into the hash table */
2494
2495 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2496 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2497 e1000_mta_set(hw, hash_value);
2498 }
2499
2500 if (hw->mac_type == e1000_82542_rev2_0)
2501 e1000_leave_82542_rst(adapter);
2502 }
2503
2504 /* Need to wait a few seconds after link up to get diagnostic information from
2505 * the phy */
2506
2507 static void
2508 e1000_update_phy_info(unsigned long data)
2509 {
2510 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2511 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2512 }
2513
2514 /**
2515 * e1000_82547_tx_fifo_stall - Timer Call-back
2516 * @data: pointer to adapter cast into an unsigned long
2517 **/
2518
2519 static void
2520 e1000_82547_tx_fifo_stall(unsigned long data)
2521 {
2522 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2523 struct net_device *netdev = adapter->netdev;
2524 uint32_t tctl;
2525
2526 if (atomic_read(&adapter->tx_fifo_stall)) {
2527 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2528 E1000_READ_REG(&adapter->hw, TDH)) &&
2529 (E1000_READ_REG(&adapter->hw, TDFT) ==
2530 E1000_READ_REG(&adapter->hw, TDFH)) &&
2531 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2532 E1000_READ_REG(&adapter->hw, TDFHS))) {
2533 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2534 E1000_WRITE_REG(&adapter->hw, TCTL,
2535 tctl & ~E1000_TCTL_EN);
2536 E1000_WRITE_REG(&adapter->hw, TDFT,
2537 adapter->tx_head_addr);
2538 E1000_WRITE_REG(&adapter->hw, TDFH,
2539 adapter->tx_head_addr);
2540 E1000_WRITE_REG(&adapter->hw, TDFTS,
2541 adapter->tx_head_addr);
2542 E1000_WRITE_REG(&adapter->hw, TDFHS,
2543 adapter->tx_head_addr);
2544 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2545 E1000_WRITE_FLUSH(&adapter->hw);
2546
2547 adapter->tx_fifo_head = 0;
2548 atomic_set(&adapter->tx_fifo_stall, 0);
2549 netif_wake_queue(netdev);
2550 } else {
2551 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2552 }
2553 }
2554 }
2555
2556 /**
2557 * e1000_watchdog - Timer Call-back
2558 * @data: pointer to adapter cast into an unsigned long
2559 **/
2560 static void
2561 e1000_watchdog(unsigned long data)
2562 {
2563 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2564 struct net_device *netdev = adapter->netdev;
2565 struct e1000_tx_ring *txdr = adapter->tx_ring;
2566 uint32_t link, tctl;
2567 int32_t ret_val;
2568
2569 ret_val = e1000_check_for_link(&adapter->hw);
2570 if ((ret_val == E1000_ERR_PHY) &&
2571 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2572 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2573 /* See e1000_kumeran_lock_loss_workaround() */
2574 DPRINTK(LINK, INFO,
2575 "Gigabit has been disabled, downgrading speed\n");
2576 }
2577
2578 if (adapter->hw.mac_type == e1000_82573) {
2579 e1000_enable_tx_pkt_filtering(&adapter->hw);
2580 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2581 e1000_update_mng_vlan(adapter);
2582 }
2583
2584 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2585 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2586 link = !adapter->hw.serdes_link_down;
2587 else
2588 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2589
2590 if (link) {
2591 if (!netif_carrier_ok(netdev)) {
2592 boolean_t txb2b = 1;
2593 e1000_get_speed_and_duplex(&adapter->hw,
2594 &adapter->link_speed,
2595 &adapter->link_duplex);
2596
2597 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2598 adapter->link_speed,
2599 adapter->link_duplex == FULL_DUPLEX ?
2600 "Full Duplex" : "Half Duplex");
2601
2602 /* tweak tx_queue_len according to speed/duplex
2603 * and adjust the timeout factor */
2604 netdev->tx_queue_len = adapter->tx_queue_len;
2605 adapter->tx_timeout_factor = 1;
2606 switch (adapter->link_speed) {
2607 case SPEED_10:
2608 txb2b = 0;
2609 netdev->tx_queue_len = 10;
2610 adapter->tx_timeout_factor = 8;
2611 break;
2612 case SPEED_100:
2613 txb2b = 0;
2614 netdev->tx_queue_len = 100;
2615 /* maybe add some timeout factor ? */
2616 break;
2617 }
2618
2619 if ((adapter->hw.mac_type == e1000_82571 ||
2620 adapter->hw.mac_type == e1000_82572) &&
2621 txb2b == 0) {
2622 uint32_t tarc0;
2623 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2624 tarc0 &= ~(1 << 21);
2625 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2626 }
2627
2628 #ifdef NETIF_F_TSO
2629 /* disable TSO for pcie and 10/100 speeds, to avoid
2630 * some hardware issues */
2631 if (!adapter->tso_force &&
2632 adapter->hw.bus_type == e1000_bus_type_pci_express){
2633 switch (adapter->link_speed) {
2634 case SPEED_10:
2635 case SPEED_100:
2636 DPRINTK(PROBE,INFO,
2637 "10/100 speed: disabling TSO\n");
2638 netdev->features &= ~NETIF_F_TSO;
2639 #ifdef NETIF_F_TSO6
2640 netdev->features &= ~NETIF_F_TSO6;
2641 #endif
2642 break;
2643 case SPEED_1000:
2644 netdev->features |= NETIF_F_TSO;
2645 #ifdef NETIF_F_TSO6
2646 netdev->features |= NETIF_F_TSO6;
2647 #endif
2648 break;
2649 default:
2650 /* oops */
2651 break;
2652 }
2653 }
2654 #endif
2655
2656 /* enable transmits in the hardware, need to do this
2657 * after setting TARC0 */
2658 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2659 tctl |= E1000_TCTL_EN;
2660 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2661
2662 netif_carrier_on(netdev);
2663 netif_wake_queue(netdev);
2664 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2665 adapter->smartspeed = 0;
2666 } else {
2667 /* make sure the receive unit is started */
2668 if (adapter->hw.rx_needs_kicking) {
2669 struct e1000_hw *hw = &adapter->hw;
2670 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2671 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2672 }
2673 }
2674 } else {
2675 if (netif_carrier_ok(netdev)) {
2676 adapter->link_speed = 0;
2677 adapter->link_duplex = 0;
2678 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2679 netif_carrier_off(netdev);
2680 netif_stop_queue(netdev);
2681 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2682
2683 /* 80003ES2LAN workaround--
2684 * For packet buffer work-around on link down event;
2685 * disable receives in the ISR and
2686 * reset device here in the watchdog
2687 */
2688 if (adapter->hw.mac_type == e1000_80003es2lan)
2689 /* reset device */
2690 schedule_work(&adapter->reset_task);
2691 }
2692
2693 e1000_smartspeed(adapter);
2694 }
2695
2696 e1000_update_stats(adapter);
2697
2698 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2699 adapter->tpt_old = adapter->stats.tpt;
2700 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2701 adapter->colc_old = adapter->stats.colc;
2702
2703 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2704 adapter->gorcl_old = adapter->stats.gorcl;
2705 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2706 adapter->gotcl_old = adapter->stats.gotcl;
2707
2708 e1000_update_adaptive(&adapter->hw);
2709
2710 if (!netif_carrier_ok(netdev)) {
2711 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2712 /* We've lost link, so the controller stops DMA,
2713 * but we've got queued Tx work that's never going
2714 * to get done, so reset controller to flush Tx.
2715 * (Do the reset outside of interrupt context). */
2716 adapter->tx_timeout_count++;
2717 schedule_work(&adapter->reset_task);
2718 }
2719 }
2720
2721 /* Cause software interrupt to ensure rx ring is cleaned */
2722 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2723
2724 /* Force detection of hung controller every watchdog period */
2725 adapter->detect_tx_hung = TRUE;
2726
2727 /* With 82571 controllers, LAA may be overwritten due to controller
2728 * reset from the other port. Set the appropriate LAA in RAR[0] */
2729 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2730 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2731
2732 /* Reset the timer */
2733 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2734 }
2735
2736 enum latency_range {
2737 lowest_latency = 0,
2738 low_latency = 1,
2739 bulk_latency = 2,
2740 latency_invalid = 255
2741 };
2742
2743 /**
2744 * e1000_update_itr - update the dynamic ITR value based on statistics
2745 * Stores a new ITR value based on packets and byte
2746 * counts during the last interrupt. The advantage of per interrupt
2747 * computation is faster updates and more accurate ITR for the current
2748 * traffic pattern. Constants in this function were computed
2749 * based on theoretical maximum wire speed and thresholds were set based
2750 * on testing data as well as attempting to minimize response time
2751 * while increasing bulk throughput.
2752 * this functionality is controlled by the InterruptThrottleRate module
2753 * parameter (see e1000_param.c)
2754 * @adapter: pointer to adapter
2755 * @itr_setting: current adapter->itr
2756 * @packets: the number of packets during this measurement interval
2757 * @bytes: the number of bytes during this measurement interval
2758 **/
2759 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2760 uint16_t itr_setting,
2761 int packets,
2762 int bytes)
2763 {
2764 unsigned int retval = itr_setting;
2765 struct e1000_hw *hw = &adapter->hw;
2766
2767 if (unlikely(hw->mac_type < e1000_82540))
2768 goto update_itr_done;
2769
2770 if (packets == 0)
2771 goto update_itr_done;
2772
2773 switch (itr_setting) {
2774 case lowest_latency:
2775 /* jumbo frames get bulk treatment*/
2776 if (bytes/packets > 8000)
2777 retval = bulk_latency;
2778 else if ((packets < 5) && (bytes > 512))
2779 retval = low_latency;
2780 break;
2781 case low_latency: /* 50 usec aka 20000 ints/s */
2782 if (bytes > 10000) {
2783 /* jumbo frames need bulk latency setting */
2784 if (bytes/packets > 8000)
2785 retval = bulk_latency;
2786 else if ((packets < 10) || ((bytes/packets) > 1200))
2787 retval = bulk_latency;
2788 else if ((packets > 35))
2789 retval = lowest_latency;
2790 } else if (bytes/packets > 2000)
2791 retval = bulk_latency;
2792 else if (packets <= 2 && bytes < 512)
2793 retval = lowest_latency;
2794 break;
2795 case bulk_latency: /* 250 usec aka 4000 ints/s */
2796 if (bytes > 25000) {
2797 if (packets > 35)
2798 retval = low_latency;
2799 } else if (bytes < 6000) {
2800 retval = low_latency;
2801 }
2802 break;
2803 }
2804
2805 update_itr_done:
2806 return retval;
2807 }
2808
2809 static void e1000_set_itr(struct e1000_adapter *adapter)
2810 {
2811 struct e1000_hw *hw = &adapter->hw;
2812 uint16_t current_itr;
2813 uint32_t new_itr = adapter->itr;
2814
2815 if (unlikely(hw->mac_type < e1000_82540))
2816 return;
2817
2818 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2819 if (unlikely(adapter->link_speed != SPEED_1000)) {
2820 current_itr = 0;
2821 new_itr = 4000;
2822 goto set_itr_now;
2823 }
2824
2825 adapter->tx_itr = e1000_update_itr(adapter,
2826 adapter->tx_itr,
2827 adapter->total_tx_packets,
2828 adapter->total_tx_bytes);
2829 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2830 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2831 adapter->tx_itr = low_latency;
2832
2833 adapter->rx_itr = e1000_update_itr(adapter,
2834 adapter->rx_itr,
2835 adapter->total_rx_packets,
2836 adapter->total_rx_bytes);
2837 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2838 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2839 adapter->rx_itr = low_latency;
2840
2841 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2842
2843 switch (current_itr) {
2844 /* counts and packets in update_itr are dependent on these numbers */
2845 case lowest_latency:
2846 new_itr = 70000;
2847 break;
2848 case low_latency:
2849 new_itr = 20000; /* aka hwitr = ~200 */
2850 break;
2851 case bulk_latency:
2852 new_itr = 4000;
2853 break;
2854 default:
2855 break;
2856 }
2857
2858 set_itr_now:
2859 if (new_itr != adapter->itr) {
2860 /* this attempts to bias the interrupt rate towards Bulk
2861 * by adding intermediate steps when interrupt rate is
2862 * increasing */
2863 new_itr = new_itr > adapter->itr ?
2864 min(adapter->itr + (new_itr >> 2), new_itr) :
2865 new_itr;
2866 adapter->itr = new_itr;
2867 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2868 }
2869
2870 return;
2871 }
2872
2873 #define E1000_TX_FLAGS_CSUM 0x00000001
2874 #define E1000_TX_FLAGS_VLAN 0x00000002
2875 #define E1000_TX_FLAGS_TSO 0x00000004
2876 #define E1000_TX_FLAGS_IPV4 0x00000008
2877 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2878 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2879
2880 static int
2881 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2882 struct sk_buff *skb)
2883 {
2884 #ifdef NETIF_F_TSO
2885 struct e1000_context_desc *context_desc;
2886 struct e1000_buffer *buffer_info;
2887 unsigned int i;
2888 uint32_t cmd_length = 0;
2889 uint16_t ipcse = 0, tucse, mss;
2890 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2891 int err;
2892
2893 if (skb_is_gso(skb)) {
2894 if (skb_header_cloned(skb)) {
2895 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2896 if (err)
2897 return err;
2898 }
2899
2900 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2901 mss = skb_shinfo(skb)->gso_size;
2902 if (skb->protocol == htons(ETH_P_IP)) {
2903 skb->nh.iph->tot_len = 0;
2904 skb->nh.iph->check = 0;
2905 skb->h.th->check =
2906 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2907 skb->nh.iph->daddr,
2908 0,
2909 IPPROTO_TCP,
2910 0);
2911 cmd_length = E1000_TXD_CMD_IP;
2912 ipcse = skb->h.raw - skb->data - 1;
2913 #ifdef NETIF_F_TSO6
2914 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2915 skb->nh.ipv6h->payload_len = 0;
2916 skb->h.th->check =
2917 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2918 &skb->nh.ipv6h->daddr,
2919 0,
2920 IPPROTO_TCP,
2921 0);
2922 ipcse = 0;
2923 #endif
2924 }
2925 ipcss = skb->nh.raw - skb->data;
2926 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2927 tucss = skb->h.raw - skb->data;
2928 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2929 tucse = 0;
2930
2931 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2932 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2933
2934 i = tx_ring->next_to_use;
2935 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2936 buffer_info = &tx_ring->buffer_info[i];
2937
2938 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2939 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2940 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2941 context_desc->upper_setup.tcp_fields.tucss = tucss;
2942 context_desc->upper_setup.tcp_fields.tucso = tucso;
2943 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2944 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2945 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2946 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2947
2948 buffer_info->time_stamp = jiffies;
2949 buffer_info->next_to_watch = i;
2950
2951 if (++i == tx_ring->count) i = 0;
2952 tx_ring->next_to_use = i;
2953
2954 return TRUE;
2955 }
2956 #endif
2957
2958 return FALSE;
2959 }
2960
2961 static boolean_t
2962 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2963 struct sk_buff *skb)
2964 {
2965 struct e1000_context_desc *context_desc;
2966 struct e1000_buffer *buffer_info;
2967 unsigned int i;
2968 uint8_t css;
2969
2970 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2971 css = skb->h.raw - skb->data;
2972
2973 i = tx_ring->next_to_use;
2974 buffer_info = &tx_ring->buffer_info[i];
2975 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2976
2977 context_desc->upper_setup.tcp_fields.tucss = css;
2978 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
2979 context_desc->upper_setup.tcp_fields.tucse = 0;
2980 context_desc->tcp_seg_setup.data = 0;
2981 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2982
2983 buffer_info->time_stamp = jiffies;
2984 buffer_info->next_to_watch = i;
2985
2986 if (unlikely(++i == tx_ring->count)) i = 0;
2987 tx_ring->next_to_use = i;
2988
2989 return TRUE;
2990 }
2991
2992 return FALSE;
2993 }
2994
2995 #define E1000_MAX_TXD_PWR 12
2996 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2997
2998 static int
2999 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3000 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
3001 unsigned int nr_frags, unsigned int mss)
3002 {
3003 struct e1000_buffer *buffer_info;
3004 unsigned int len = skb->len;
3005 unsigned int offset = 0, size, count = 0, i;
3006 unsigned int f;
3007 len -= skb->data_len;
3008
3009 i = tx_ring->next_to_use;
3010
3011 while (len) {
3012 buffer_info = &tx_ring->buffer_info[i];
3013 size = min(len, max_per_txd);
3014 #ifdef NETIF_F_TSO
3015 /* Workaround for Controller erratum --
3016 * descriptor for non-tso packet in a linear SKB that follows a
3017 * tso gets written back prematurely before the data is fully
3018 * DMA'd to the controller */
3019 if (!skb->data_len && tx_ring->last_tx_tso &&
3020 !skb_is_gso(skb)) {
3021 tx_ring->last_tx_tso = 0;
3022 size -= 4;
3023 }
3024
3025 /* Workaround for premature desc write-backs
3026 * in TSO mode. Append 4-byte sentinel desc */
3027 if (unlikely(mss && !nr_frags && size == len && size > 8))
3028 size -= 4;
3029 #endif
3030 /* work-around for errata 10 and it applies
3031 * to all controllers in PCI-X mode
3032 * The fix is to make sure that the first descriptor of a
3033 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3034 */
3035 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3036 (size > 2015) && count == 0))
3037 size = 2015;
3038
3039 /* Workaround for potential 82544 hang in PCI-X. Avoid
3040 * terminating buffers within evenly-aligned dwords. */
3041 if (unlikely(adapter->pcix_82544 &&
3042 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3043 size > 4))
3044 size -= 4;
3045
3046 buffer_info->length = size;
3047 buffer_info->dma =
3048 pci_map_single(adapter->pdev,
3049 skb->data + offset,
3050 size,
3051 PCI_DMA_TODEVICE);
3052 buffer_info->time_stamp = jiffies;
3053 buffer_info->next_to_watch = i;
3054
3055 len -= size;
3056 offset += size;
3057 count++;
3058 if (unlikely(++i == tx_ring->count)) i = 0;
3059 }
3060
3061 for (f = 0; f < nr_frags; f++) {
3062 struct skb_frag_struct *frag;
3063
3064 frag = &skb_shinfo(skb)->frags[f];
3065 len = frag->size;
3066 offset = frag->page_offset;
3067
3068 while (len) {
3069 buffer_info = &tx_ring->buffer_info[i];
3070 size = min(len, max_per_txd);
3071 #ifdef NETIF_F_TSO
3072 /* Workaround for premature desc write-backs
3073 * in TSO mode. Append 4-byte sentinel desc */
3074 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3075 size -= 4;
3076 #endif
3077 /* Workaround for potential 82544 hang in PCI-X.
3078 * Avoid terminating buffers within evenly-aligned
3079 * dwords. */
3080 if (unlikely(adapter->pcix_82544 &&
3081 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3082 size > 4))
3083 size -= 4;
3084
3085 buffer_info->length = size;
3086 buffer_info->dma =
3087 pci_map_page(adapter->pdev,
3088 frag->page,
3089 offset,
3090 size,
3091 PCI_DMA_TODEVICE);
3092 buffer_info->time_stamp = jiffies;
3093 buffer_info->next_to_watch = i;
3094
3095 len -= size;
3096 offset += size;
3097 count++;
3098 if (unlikely(++i == tx_ring->count)) i = 0;
3099 }
3100 }
3101
3102 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3103 tx_ring->buffer_info[i].skb = skb;
3104 tx_ring->buffer_info[first].next_to_watch = i;
3105
3106 return count;
3107 }
3108
3109 static void
3110 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3111 int tx_flags, int count)
3112 {
3113 struct e1000_tx_desc *tx_desc = NULL;
3114 struct e1000_buffer *buffer_info;
3115 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3116 unsigned int i;
3117
3118 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3119 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3120 E1000_TXD_CMD_TSE;
3121 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3122
3123 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3124 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3125 }
3126
3127 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3128 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3129 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3130 }
3131
3132 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3133 txd_lower |= E1000_TXD_CMD_VLE;
3134 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3135 }
3136
3137 i = tx_ring->next_to_use;
3138
3139 while (count--) {
3140 buffer_info = &tx_ring->buffer_info[i];
3141 tx_desc = E1000_TX_DESC(*tx_ring, i);
3142 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3143 tx_desc->lower.data =
3144 cpu_to_le32(txd_lower | buffer_info->length);
3145 tx_desc->upper.data = cpu_to_le32(txd_upper);
3146 if (unlikely(++i == tx_ring->count)) i = 0;
3147 }
3148
3149 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3150
3151 /* Force memory writes to complete before letting h/w
3152 * know there are new descriptors to fetch. (Only
3153 * applicable for weak-ordered memory model archs,
3154 * such as IA-64). */
3155 wmb();
3156
3157 tx_ring->next_to_use = i;
3158 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3159 /* we need this if more than one processor can write to our tail
3160 * at a time, it syncronizes IO on IA64/Altix systems */
3161 mmiowb();
3162 }
3163
3164 /**
3165 * 82547 workaround to avoid controller hang in half-duplex environment.
3166 * The workaround is to avoid queuing a large packet that would span
3167 * the internal Tx FIFO ring boundary by notifying the stack to resend
3168 * the packet at a later time. This gives the Tx FIFO an opportunity to
3169 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3170 * to the beginning of the Tx FIFO.
3171 **/
3172
3173 #define E1000_FIFO_HDR 0x10
3174 #define E1000_82547_PAD_LEN 0x3E0
3175
3176 static int
3177 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3178 {
3179 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3180 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3181
3182 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
3183
3184 if (adapter->link_duplex != HALF_DUPLEX)
3185 goto no_fifo_stall_required;
3186
3187 if (atomic_read(&adapter->tx_fifo_stall))
3188 return 1;
3189
3190 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3191 atomic_set(&adapter->tx_fifo_stall, 1);
3192 return 1;
3193 }
3194
3195 no_fifo_stall_required:
3196 adapter->tx_fifo_head += skb_fifo_len;
3197 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3198 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3199 return 0;
3200 }
3201
3202 #define MINIMUM_DHCP_PACKET_SIZE 282
3203 static int
3204 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3205 {
3206 struct e1000_hw *hw = &adapter->hw;
3207 uint16_t length, offset;
3208 if (vlan_tx_tag_present(skb)) {
3209 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3210 ( adapter->hw.mng_cookie.status &
3211 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3212 return 0;
3213 }
3214 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3215 struct ethhdr *eth = (struct ethhdr *) skb->data;
3216 if ((htons(ETH_P_IP) == eth->h_proto)) {
3217 const struct iphdr *ip =
3218 (struct iphdr *)((uint8_t *)skb->data+14);
3219 if (IPPROTO_UDP == ip->protocol) {
3220 struct udphdr *udp =
3221 (struct udphdr *)((uint8_t *)ip +
3222 (ip->ihl << 2));
3223 if (ntohs(udp->dest) == 67) {
3224 offset = (uint8_t *)udp + 8 - skb->data;
3225 length = skb->len - offset;
3226
3227 return e1000_mng_write_dhcp_info(hw,
3228 (uint8_t *)udp + 8,
3229 length);
3230 }
3231 }
3232 }
3233 }
3234 return 0;
3235 }
3236
3237 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3238 {
3239 struct e1000_adapter *adapter = netdev_priv(netdev);
3240 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3241
3242 netif_stop_queue(netdev);
3243 /* Herbert's original patch had:
3244 * smp_mb__after_netif_stop_queue();
3245 * but since that doesn't exist yet, just open code it. */
3246 smp_mb();
3247
3248 /* We need to check again in a case another CPU has just
3249 * made room available. */
3250 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3251 return -EBUSY;
3252
3253 /* A reprieve! */
3254 netif_start_queue(netdev);
3255 ++adapter->restart_queue;
3256 return 0;
3257 }
3258
3259 static int e1000_maybe_stop_tx(struct net_device *netdev,
3260 struct e1000_tx_ring *tx_ring, int size)
3261 {
3262 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3263 return 0;
3264 return __e1000_maybe_stop_tx(netdev, size);
3265 }
3266
3267 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3268 static int
3269 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3270 {
3271 struct e1000_adapter *adapter = netdev_priv(netdev);
3272 struct e1000_tx_ring *tx_ring;
3273 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3274 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3275 unsigned int tx_flags = 0;
3276 unsigned int len = skb->len;
3277 unsigned long flags;
3278 unsigned int nr_frags = 0;
3279 unsigned int mss = 0;
3280 int count = 0;
3281 int tso;
3282 unsigned int f;
3283 len -= skb->data_len;
3284
3285 /* This goes back to the question of how to logically map a tx queue
3286 * to a flow. Right now, performance is impacted slightly negatively
3287 * if using multiple tx queues. If the stack breaks away from a
3288 * single qdisc implementation, we can look at this again. */
3289 tx_ring = adapter->tx_ring;
3290
3291 if (unlikely(skb->len <= 0)) {
3292 dev_kfree_skb_any(skb);
3293 return NETDEV_TX_OK;
3294 }
3295
3296 /* 82571 and newer doesn't need the workaround that limited descriptor
3297 * length to 4kB */
3298 if (adapter->hw.mac_type >= e1000_82571)
3299 max_per_txd = 8192;
3300
3301 #ifdef NETIF_F_TSO
3302 mss = skb_shinfo(skb)->gso_size;
3303 /* The controller does a simple calculation to
3304 * make sure there is enough room in the FIFO before
3305 * initiating the DMA for each buffer. The calc is:
3306 * 4 = ceil(buffer len/mss). To make sure we don't
3307 * overrun the FIFO, adjust the max buffer len if mss
3308 * drops. */
3309 if (mss) {
3310 uint8_t hdr_len;
3311 max_per_txd = min(mss << 2, max_per_txd);
3312 max_txd_pwr = fls(max_per_txd) - 1;
3313
3314 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3315 * points to just header, pull a few bytes of payload from
3316 * frags into skb->data */
3317 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
3318 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3319 switch (adapter->hw.mac_type) {
3320 unsigned int pull_size;
3321 case e1000_82571:
3322 case e1000_82572:
3323 case e1000_82573:
3324 case e1000_ich8lan:
3325 pull_size = min((unsigned int)4, skb->data_len);
3326 if (!__pskb_pull_tail(skb, pull_size)) {
3327 DPRINTK(DRV, ERR,
3328 "__pskb_pull_tail failed.\n");
3329 dev_kfree_skb_any(skb);
3330 return NETDEV_TX_OK;
3331 }
3332 len = skb->len - skb->data_len;
3333 break;
3334 default:
3335 /* do nothing */
3336 break;
3337 }
3338 }
3339 }
3340
3341 /* reserve a descriptor for the offload context */
3342 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3343 count++;
3344 count++;
3345 #else
3346 if (skb->ip_summed == CHECKSUM_PARTIAL)
3347 count++;
3348 #endif
3349
3350 #ifdef NETIF_F_TSO
3351 /* Controller Erratum workaround */
3352 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3353 count++;
3354 #endif
3355
3356 count += TXD_USE_COUNT(len, max_txd_pwr);
3357
3358 if (adapter->pcix_82544)
3359 count++;
3360
3361 /* work-around for errata 10 and it applies to all controllers
3362 * in PCI-X mode, so add one more descriptor to the count
3363 */
3364 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3365 (len > 2015)))
3366 count++;
3367
3368 nr_frags = skb_shinfo(skb)->nr_frags;
3369 for (f = 0; f < nr_frags; f++)
3370 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3371 max_txd_pwr);
3372 if (adapter->pcix_82544)
3373 count += nr_frags;
3374
3375
3376 if (adapter->hw.tx_pkt_filtering &&
3377 (adapter->hw.mac_type == e1000_82573))
3378 e1000_transfer_dhcp_info(adapter, skb);
3379
3380 local_irq_save(flags);
3381 if (!spin_trylock(&tx_ring->tx_lock)) {
3382 /* Collision - tell upper layer to requeue */
3383 local_irq_restore(flags);
3384 return NETDEV_TX_LOCKED;
3385 }
3386
3387 /* need: count + 2 desc gap to keep tail from touching
3388 * head, otherwise try next time */
3389 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3390 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3391 return NETDEV_TX_BUSY;
3392 }
3393
3394 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3395 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3396 netif_stop_queue(netdev);
3397 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3398 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3399 return NETDEV_TX_BUSY;
3400 }
3401 }
3402
3403 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3404 tx_flags |= E1000_TX_FLAGS_VLAN;
3405 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3406 }
3407
3408 first = tx_ring->next_to_use;
3409
3410 tso = e1000_tso(adapter, tx_ring, skb);
3411 if (tso < 0) {
3412 dev_kfree_skb_any(skb);
3413 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3414 return NETDEV_TX_OK;
3415 }
3416
3417 if (likely(tso)) {
3418 tx_ring->last_tx_tso = 1;
3419 tx_flags |= E1000_TX_FLAGS_TSO;
3420 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3421 tx_flags |= E1000_TX_FLAGS_CSUM;
3422
3423 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3424 * 82571 hardware supports TSO capabilities for IPv6 as well...
3425 * no longer assume, we must. */
3426 if (likely(skb->protocol == htons(ETH_P_IP)))
3427 tx_flags |= E1000_TX_FLAGS_IPV4;
3428
3429 e1000_tx_queue(adapter, tx_ring, tx_flags,
3430 e1000_tx_map(adapter, tx_ring, skb, first,
3431 max_per_txd, nr_frags, mss));
3432
3433 netdev->trans_start = jiffies;
3434
3435 /* Make sure there is space in the ring for the next send. */
3436 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3437
3438 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3439 return NETDEV_TX_OK;
3440 }
3441
3442 /**
3443 * e1000_tx_timeout - Respond to a Tx Hang
3444 * @netdev: network interface device structure
3445 **/
3446
3447 static void
3448 e1000_tx_timeout(struct net_device *netdev)
3449 {
3450 struct e1000_adapter *adapter = netdev_priv(netdev);
3451
3452 /* Do the reset outside of interrupt context */
3453 adapter->tx_timeout_count++;
3454 schedule_work(&adapter->reset_task);
3455 }
3456
3457 static void
3458 e1000_reset_task(struct work_struct *work)
3459 {
3460 struct e1000_adapter *adapter =
3461 container_of(work, struct e1000_adapter, reset_task);
3462
3463 e1000_reinit_locked(adapter);
3464 }
3465
3466 /**
3467 * e1000_get_stats - Get System Network Statistics
3468 * @netdev: network interface device structure
3469 *
3470 * Returns the address of the device statistics structure.
3471 * The statistics are actually updated from the timer callback.
3472 **/
3473
3474 static struct net_device_stats *
3475 e1000_get_stats(struct net_device *netdev)
3476 {
3477 struct e1000_adapter *adapter = netdev_priv(netdev);
3478
3479 /* only return the current stats */
3480 return &adapter->net_stats;
3481 }
3482
3483 /**
3484 * e1000_change_mtu - Change the Maximum Transfer Unit
3485 * @netdev: network interface device structure
3486 * @new_mtu: new value for maximum frame size
3487 *
3488 * Returns 0 on success, negative on failure
3489 **/
3490
3491 static int
3492 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3493 {
3494 struct e1000_adapter *adapter = netdev_priv(netdev);
3495 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3496 uint16_t eeprom_data = 0;
3497
3498 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3499 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3500 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3501 return -EINVAL;
3502 }
3503
3504 /* Adapter-specific max frame size limits. */
3505 switch (adapter->hw.mac_type) {
3506 case e1000_undefined ... e1000_82542_rev2_1:
3507 case e1000_ich8lan:
3508 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3509 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3510 return -EINVAL;
3511 }
3512 break;
3513 case e1000_82573:
3514 /* Jumbo Frames not supported if:
3515 * - this is not an 82573L device
3516 * - ASPM is enabled in any way (0x1A bits 3:2) */
3517 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3518 &eeprom_data);
3519 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3520 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3521 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3522 DPRINTK(PROBE, ERR,
3523 "Jumbo Frames not supported.\n");
3524 return -EINVAL;
3525 }
3526 break;
3527 }
3528 /* ERT will be enabled later to enable wire speed receives */
3529
3530 /* fall through to get support */
3531 case e1000_82571:
3532 case e1000_82572:
3533 case e1000_80003es2lan:
3534 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3535 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3536 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3537 return -EINVAL;
3538 }
3539 break;
3540 default:
3541 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3542 break;
3543 }
3544
3545 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3546 * means we reserve 2 more, this pushes us to allocate from the next
3547 * larger slab size
3548 * i.e. RXBUFFER_2048 --> size-4096 slab */
3549
3550 if (max_frame <= E1000_RXBUFFER_256)
3551 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3552 else if (max_frame <= E1000_RXBUFFER_512)
3553 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3554 else if (max_frame <= E1000_RXBUFFER_1024)
3555 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3556 else if (max_frame <= E1000_RXBUFFER_2048)
3557 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3558 else if (max_frame <= E1000_RXBUFFER_4096)
3559 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3560 else if (max_frame <= E1000_RXBUFFER_8192)
3561 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3562 else if (max_frame <= E1000_RXBUFFER_16384)
3563 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3564
3565 /* adjust allocation if LPE protects us, and we aren't using SBP */
3566 if (!adapter->hw.tbi_compatibility_on &&
3567 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3568 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3569 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3570
3571 netdev->mtu = new_mtu;
3572 adapter->hw.max_frame_size = max_frame;
3573
3574 if (netif_running(netdev))
3575 e1000_reinit_locked(adapter);
3576
3577 return 0;
3578 }
3579
3580 /**
3581 * e1000_update_stats - Update the board statistics counters
3582 * @adapter: board private structure
3583 **/
3584
3585 void
3586 e1000_update_stats(struct e1000_adapter *adapter)
3587 {
3588 struct e1000_hw *hw = &adapter->hw;
3589 struct pci_dev *pdev = adapter->pdev;
3590 unsigned long flags;
3591 uint16_t phy_tmp;
3592
3593 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3594
3595 /*
3596 * Prevent stats update while adapter is being reset, or if the pci
3597 * connection is down.
3598 */
3599 if (adapter->link_speed == 0)
3600 return;
3601 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
3602 return;
3603
3604 spin_lock_irqsave(&adapter->stats_lock, flags);
3605
3606 /* these counters are modified from e1000_adjust_tbi_stats,
3607 * called from the interrupt context, so they must only
3608 * be written while holding adapter->stats_lock
3609 */
3610
3611 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3612 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3613 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3614 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3615 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3616 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3617 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3618
3619 if (adapter->hw.mac_type != e1000_ich8lan) {
3620 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3621 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3622 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3623 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3624 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3625 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3626 }
3627
3628 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3629 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3630 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3631 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3632 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3633 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3634 adapter->stats.dc += E1000_READ_REG(hw, DC);
3635 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3636 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3637 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3638 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3639 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3640 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3641 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3642 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3643 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3644 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3645 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3646 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3647 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3648 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3649 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3650 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3651 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3652 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3653 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3654
3655 if (adapter->hw.mac_type != e1000_ich8lan) {
3656 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3657 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3658 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3659 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3660 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3661 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3662 }
3663
3664 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3665 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3666
3667 /* used for adaptive IFS */
3668
3669 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3670 adapter->stats.tpt += hw->tx_packet_delta;
3671 hw->collision_delta = E1000_READ_REG(hw, COLC);
3672 adapter->stats.colc += hw->collision_delta;
3673
3674 if (hw->mac_type >= e1000_82543) {
3675 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3676 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3677 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3678 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3679 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3680 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3681 }
3682 if (hw->mac_type > e1000_82547_rev_2) {
3683 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3684 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3685
3686 if (adapter->hw.mac_type != e1000_ich8lan) {
3687 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3688 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3689 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3690 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3691 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3692 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3693 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3694 }
3695 }
3696
3697 /* Fill out the OS statistics structure */
3698 adapter->net_stats.rx_packets = adapter->stats.gprc;
3699 adapter->net_stats.tx_packets = adapter->stats.gptc;
3700 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3701 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3702 adapter->net_stats.multicast = adapter->stats.mprc;
3703 adapter->net_stats.collisions = adapter->stats.colc;
3704
3705 /* Rx Errors */
3706
3707 /* RLEC on some newer hardware can be incorrect so build
3708 * our own version based on RUC and ROC */
3709 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3710 adapter->stats.crcerrs + adapter->stats.algnerrc +
3711 adapter->stats.ruc + adapter->stats.roc +
3712 adapter->stats.cexterr;
3713 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3714 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3715 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3716 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3717 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3718
3719 /* Tx Errors */
3720 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3721 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3722 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3723 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3724 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3725 if (adapter->hw.bad_tx_carr_stats_fd &&
3726 adapter->link_duplex == FULL_DUPLEX) {
3727 adapter->net_stats.tx_carrier_errors = 0;
3728 adapter->stats.tncrs = 0;
3729 }
3730
3731 /* Tx Dropped needs to be maintained elsewhere */
3732
3733 /* Phy Stats */
3734 if (hw->media_type == e1000_media_type_copper) {
3735 if ((adapter->link_speed == SPEED_1000) &&
3736 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3737 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3738 adapter->phy_stats.idle_errors += phy_tmp;
3739 }
3740
3741 if ((hw->mac_type <= e1000_82546) &&
3742 (hw->phy_type == e1000_phy_m88) &&
3743 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3744 adapter->phy_stats.receive_errors += phy_tmp;
3745 }
3746
3747 /* Management Stats */
3748 if (adapter->hw.has_smbus) {
3749 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3750 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3751 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3752 }
3753
3754 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3755 }
3756 #ifdef CONFIG_PCI_MSI
3757
3758 /**
3759 * e1000_intr_msi - Interrupt Handler
3760 * @irq: interrupt number
3761 * @data: pointer to a network interface device structure
3762 **/
3763
3764 static
3765 irqreturn_t e1000_intr_msi(int irq, void *data)
3766 {
3767 struct net_device *netdev = data;
3768 struct e1000_adapter *adapter = netdev_priv(netdev);
3769 struct e1000_hw *hw = &adapter->hw;
3770 #ifndef CONFIG_E1000_NAPI
3771 int i;
3772 #endif
3773
3774 /* this code avoids the read of ICR but has to get 1000 interrupts
3775 * at every link change event before it will notice the change */
3776 if (++adapter->detect_link >= 1000) {
3777 uint32_t icr = E1000_READ_REG(hw, ICR);
3778 #ifdef CONFIG_E1000_NAPI
3779 /* read ICR disables interrupts using IAM, so keep up with our
3780 * enable/disable accounting */
3781 atomic_inc(&adapter->irq_sem);
3782 #endif
3783 adapter->detect_link = 0;
3784 if ((icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) &&
3785 (icr & E1000_ICR_INT_ASSERTED)) {
3786 hw->get_link_status = 1;
3787 /* 80003ES2LAN workaround--
3788 * For packet buffer work-around on link down event;
3789 * disable receives here in the ISR and
3790 * reset adapter in watchdog
3791 */
3792 if (netif_carrier_ok(netdev) &&
3793 (adapter->hw.mac_type == e1000_80003es2lan)) {
3794 /* disable receives */
3795 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3796 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3797 }
3798 /* guard against interrupt when we're going down */
3799 if (!test_bit(__E1000_DOWN, &adapter->flags))
3800 mod_timer(&adapter->watchdog_timer,
3801 jiffies + 1);
3802 }
3803 } else {
3804 E1000_WRITE_REG(hw, ICR, (0xffffffff & ~(E1000_ICR_RXSEQ |
3805 E1000_ICR_LSC)));
3806 /* bummer we have to flush here, but things break otherwise as
3807 * some event appears to be lost or delayed and throughput
3808 * drops. In almost all tests this flush is un-necessary */
3809 E1000_WRITE_FLUSH(hw);
3810 #ifdef CONFIG_E1000_NAPI
3811 /* Interrupt Auto-Mask (IAM)...upon writing ICR, interrupts are
3812 * masked. No need for the IMC write, but it does mean we
3813 * should account for it ASAP. */
3814 atomic_inc(&adapter->irq_sem);
3815 #endif
3816 }
3817
3818 #ifdef CONFIG_E1000_NAPI
3819 if (likely(netif_rx_schedule_prep(netdev))) {
3820 adapter->total_tx_bytes = 0;
3821 adapter->total_tx_packets = 0;
3822 adapter->total_rx_bytes = 0;
3823 adapter->total_rx_packets = 0;
3824 __netif_rx_schedule(netdev);
3825 } else
3826 e1000_irq_enable(adapter);
3827 #else
3828 adapter->total_tx_bytes = 0;
3829 adapter->total_rx_bytes = 0;
3830 adapter->total_tx_packets = 0;
3831 adapter->total_rx_packets = 0;
3832
3833 for (i = 0; i < E1000_MAX_INTR; i++)
3834 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3835 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3836 break;
3837
3838 if (likely(adapter->itr_setting & 3))
3839 e1000_set_itr(adapter);
3840 #endif
3841
3842 return IRQ_HANDLED;
3843 }
3844 #endif
3845
3846 /**
3847 * e1000_intr - Interrupt Handler
3848 * @irq: interrupt number
3849 * @data: pointer to a network interface device structure
3850 **/
3851
3852 static irqreturn_t
3853 e1000_intr(int irq, void *data)
3854 {
3855 struct net_device *netdev = data;
3856 struct e1000_adapter *adapter = netdev_priv(netdev);
3857 struct e1000_hw *hw = &adapter->hw;
3858 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3859 #ifndef CONFIG_E1000_NAPI
3860 int i;
3861 #endif
3862 if (unlikely(!icr))
3863 return IRQ_NONE; /* Not our interrupt */
3864
3865 #ifdef CONFIG_E1000_NAPI
3866 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3867 * not set, then the adapter didn't send an interrupt */
3868 if (unlikely(hw->mac_type >= e1000_82571 &&
3869 !(icr & E1000_ICR_INT_ASSERTED)))
3870 return IRQ_NONE;
3871
3872 /* Interrupt Auto-Mask...upon reading ICR,
3873 * interrupts are masked. No need for the
3874 * IMC write, but it does mean we should
3875 * account for it ASAP. */
3876 if (likely(hw->mac_type >= e1000_82571))
3877 atomic_inc(&adapter->irq_sem);
3878 #endif
3879
3880 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3881 hw->get_link_status = 1;
3882 /* 80003ES2LAN workaround--
3883 * For packet buffer work-around on link down event;
3884 * disable receives here in the ISR and
3885 * reset adapter in watchdog
3886 */
3887 if (netif_carrier_ok(netdev) &&
3888 (adapter->hw.mac_type == e1000_80003es2lan)) {
3889 /* disable receives */
3890 rctl = E1000_READ_REG(hw, RCTL);
3891 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3892 }
3893 /* guard against interrupt when we're going down */
3894 if (!test_bit(__E1000_DOWN, &adapter->flags))
3895 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3896 }
3897
3898 #ifdef CONFIG_E1000_NAPI
3899 if (unlikely(hw->mac_type < e1000_82571)) {
3900 /* disable interrupts, without the synchronize_irq bit */
3901 atomic_inc(&adapter->irq_sem);
3902 E1000_WRITE_REG(hw, IMC, ~0);
3903 E1000_WRITE_FLUSH(hw);
3904 }
3905 if (likely(netif_rx_schedule_prep(netdev))) {
3906 adapter->total_tx_bytes = 0;
3907 adapter->total_tx_packets = 0;
3908 adapter->total_rx_bytes = 0;
3909 adapter->total_rx_packets = 0;
3910 __netif_rx_schedule(netdev);
3911 } else
3912 /* this really should not happen! if it does it is basically a
3913 * bug, but not a hard error, so enable ints and continue */
3914 e1000_irq_enable(adapter);
3915 #else
3916 /* Writing IMC and IMS is needed for 82547.
3917 * Due to Hub Link bus being occupied, an interrupt
3918 * de-assertion message is not able to be sent.
3919 * When an interrupt assertion message is generated later,
3920 * two messages are re-ordered and sent out.
3921 * That causes APIC to think 82547 is in de-assertion
3922 * state, while 82547 is in assertion state, resulting
3923 * in dead lock. Writing IMC forces 82547 into
3924 * de-assertion state.
3925 */
3926 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3927 atomic_inc(&adapter->irq_sem);
3928 E1000_WRITE_REG(hw, IMC, ~0);
3929 }
3930
3931 adapter->total_tx_bytes = 0;
3932 adapter->total_rx_bytes = 0;
3933 adapter->total_tx_packets = 0;
3934 adapter->total_rx_packets = 0;
3935
3936 for (i = 0; i < E1000_MAX_INTR; i++)
3937 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3938 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3939 break;
3940
3941 if (likely(adapter->itr_setting & 3))
3942 e1000_set_itr(adapter);
3943
3944 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3945 e1000_irq_enable(adapter);
3946
3947 #endif
3948 return IRQ_HANDLED;
3949 }
3950
3951 #ifdef CONFIG_E1000_NAPI
3952 /**
3953 * e1000_clean - NAPI Rx polling callback
3954 * @adapter: board private structure
3955 **/
3956
3957 static int
3958 e1000_clean(struct net_device *poll_dev, int *budget)
3959 {
3960 struct e1000_adapter *adapter;
3961 int work_to_do = min(*budget, poll_dev->quota);
3962 int tx_cleaned = 0, work_done = 0;
3963
3964 /* Must NOT use netdev_priv macro here. */
3965 adapter = poll_dev->priv;
3966
3967 /* Keep link state information with original netdev */
3968 if (!netif_carrier_ok(poll_dev))
3969 goto quit_polling;
3970
3971 /* e1000_clean is called per-cpu. This lock protects
3972 * tx_ring[0] from being cleaned by multiple cpus
3973 * simultaneously. A failure obtaining the lock means
3974 * tx_ring[0] is currently being cleaned anyway. */
3975 if (spin_trylock(&adapter->tx_queue_lock)) {
3976 tx_cleaned = e1000_clean_tx_irq(adapter,
3977 &adapter->tx_ring[0]);
3978 spin_unlock(&adapter->tx_queue_lock);
3979 }
3980
3981 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3982 &work_done, work_to_do);
3983
3984 *budget -= work_done;
3985 poll_dev->quota -= work_done;
3986
3987 /* If no Tx and not enough Rx work done, exit the polling mode */
3988 if ((!tx_cleaned && (work_done == 0)) ||
3989 !netif_running(poll_dev)) {
3990 quit_polling:
3991 if (likely(adapter->itr_setting & 3))
3992 e1000_set_itr(adapter);
3993 netif_rx_complete(poll_dev);
3994 e1000_irq_enable(adapter);
3995 return 0;
3996 }
3997
3998 return 1;
3999 }
4000
4001 #endif
4002 /**
4003 * e1000_clean_tx_irq - Reclaim resources after transmit completes
4004 * @adapter: board private structure
4005 **/
4006
4007 static boolean_t
4008 e1000_clean_tx_irq(struct e1000_adapter *adapter,
4009 struct e1000_tx_ring *tx_ring)
4010 {
4011 struct net_device *netdev = adapter->netdev;
4012 struct e1000_tx_desc *tx_desc, *eop_desc;
4013 struct e1000_buffer *buffer_info;
4014 unsigned int i, eop;
4015 #ifdef CONFIG_E1000_NAPI
4016 unsigned int count = 0;
4017 #endif
4018 boolean_t cleaned = FALSE;
4019 unsigned int total_tx_bytes=0, total_tx_packets=0;
4020
4021 i = tx_ring->next_to_clean;
4022 eop = tx_ring->buffer_info[i].next_to_watch;
4023 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4024
4025 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
4026 for (cleaned = FALSE; !cleaned; ) {
4027 tx_desc = E1000_TX_DESC(*tx_ring, i);
4028 buffer_info = &tx_ring->buffer_info[i];
4029 cleaned = (i == eop);
4030
4031 if (cleaned) {
4032 struct sk_buff *skb = buffer_info->skb;
4033 unsigned int segs = skb_shinfo(skb)->gso_segs;
4034 total_tx_packets += segs;
4035 total_tx_packets++;
4036 total_tx_bytes += skb->len;
4037 }
4038 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4039 tx_desc->upper.data = 0;
4040
4041 if (unlikely(++i == tx_ring->count)) i = 0;
4042 }
4043
4044 eop = tx_ring->buffer_info[i].next_to_watch;
4045 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4046 #ifdef CONFIG_E1000_NAPI
4047 #define E1000_TX_WEIGHT 64
4048 /* weight of a sort for tx, to avoid endless transmit cleanup */
4049 if (count++ == E1000_TX_WEIGHT) break;
4050 #endif
4051 }
4052
4053 tx_ring->next_to_clean = i;
4054
4055 #define TX_WAKE_THRESHOLD 32
4056 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4057 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4058 /* Make sure that anybody stopping the queue after this
4059 * sees the new next_to_clean.
4060 */
4061 smp_mb();
4062 if (netif_queue_stopped(netdev)) {
4063 netif_wake_queue(netdev);
4064 ++adapter->restart_queue;
4065 }
4066 }
4067
4068 if (adapter->detect_tx_hung) {
4069 /* Detect a transmit hang in hardware, this serializes the
4070 * check with the clearing of time_stamp and movement of i */
4071 adapter->detect_tx_hung = FALSE;
4072 if (tx_ring->buffer_info[eop].dma &&
4073 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4074 (adapter->tx_timeout_factor * HZ))
4075 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4076 E1000_STATUS_TXOFF)) {
4077
4078 /* detected Tx unit hang */
4079 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4080 " Tx Queue <%lu>\n"
4081 " TDH <%x>\n"
4082 " TDT <%x>\n"
4083 " next_to_use <%x>\n"
4084 " next_to_clean <%x>\n"
4085 "buffer_info[next_to_clean]\n"
4086 " time_stamp <%lx>\n"
4087 " next_to_watch <%x>\n"
4088 " jiffies <%lx>\n"
4089 " next_to_watch.status <%x>\n",
4090 (unsigned long)((tx_ring - adapter->tx_ring) /
4091 sizeof(struct e1000_tx_ring)),
4092 readl(adapter->hw.hw_addr + tx_ring->tdh),
4093 readl(adapter->hw.hw_addr + tx_ring->tdt),
4094 tx_ring->next_to_use,
4095 tx_ring->next_to_clean,
4096 tx_ring->buffer_info[eop].time_stamp,
4097 eop,
4098 jiffies,
4099 eop_desc->upper.fields.status);
4100 netif_stop_queue(netdev);
4101 }
4102 }
4103 adapter->total_tx_bytes += total_tx_bytes;
4104 adapter->total_tx_packets += total_tx_packets;
4105 return cleaned;
4106 }
4107
4108 /**
4109 * e1000_rx_checksum - Receive Checksum Offload for 82543
4110 * @adapter: board private structure
4111 * @status_err: receive descriptor status and error fields
4112 * @csum: receive descriptor csum field
4113 * @sk_buff: socket buffer with received data
4114 **/
4115
4116 static void
4117 e1000_rx_checksum(struct e1000_adapter *adapter,
4118 uint32_t status_err, uint32_t csum,
4119 struct sk_buff *skb)
4120 {
4121 uint16_t status = (uint16_t)status_err;
4122 uint8_t errors = (uint8_t)(status_err >> 24);
4123 skb->ip_summed = CHECKSUM_NONE;
4124
4125 /* 82543 or newer only */
4126 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4127 /* Ignore Checksum bit is set */
4128 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4129 /* TCP/UDP checksum error bit is set */
4130 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4131 /* let the stack verify checksum errors */
4132 adapter->hw_csum_err++;
4133 return;
4134 }
4135 /* TCP/UDP Checksum has not been calculated */
4136 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4137 if (!(status & E1000_RXD_STAT_TCPCS))
4138 return;
4139 } else {
4140 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4141 return;
4142 }
4143 /* It must be a TCP or UDP packet with a valid checksum */
4144 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4145 /* TCP checksum is good */
4146 skb->ip_summed = CHECKSUM_UNNECESSARY;
4147 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4148 /* IP fragment with UDP payload */
4149 /* Hardware complements the payload checksum, so we undo it
4150 * and then put the value in host order for further stack use.
4151 */
4152 csum = ntohl(csum ^ 0xFFFF);
4153 skb->csum = csum;
4154 skb->ip_summed = CHECKSUM_COMPLETE;
4155 }
4156 adapter->hw_csum_good++;
4157 }
4158
4159 /**
4160 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4161 * @adapter: board private structure
4162 **/
4163
4164 static boolean_t
4165 #ifdef CONFIG_E1000_NAPI
4166 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4167 struct e1000_rx_ring *rx_ring,
4168 int *work_done, int work_to_do)
4169 #else
4170 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4171 struct e1000_rx_ring *rx_ring)
4172 #endif
4173 {
4174 struct net_device *netdev = adapter->netdev;
4175 struct pci_dev *pdev = adapter->pdev;
4176 struct e1000_rx_desc *rx_desc, *next_rxd;
4177 struct e1000_buffer *buffer_info, *next_buffer;
4178 unsigned long flags;
4179 uint32_t length;
4180 uint8_t last_byte;
4181 unsigned int i;
4182 int cleaned_count = 0;
4183 boolean_t cleaned = FALSE;
4184 unsigned int total_rx_bytes=0, total_rx_packets=0;
4185
4186 i = rx_ring->next_to_clean;
4187 rx_desc = E1000_RX_DESC(*rx_ring, i);
4188 buffer_info = &rx_ring->buffer_info[i];
4189
4190 while (rx_desc->status & E1000_RXD_STAT_DD) {
4191 struct sk_buff *skb;
4192 u8 status;
4193
4194 #ifdef CONFIG_E1000_NAPI
4195 if (*work_done >= work_to_do)
4196 break;
4197 (*work_done)++;
4198 #endif
4199 status = rx_desc->status;
4200 skb = buffer_info->skb;
4201 buffer_info->skb = NULL;
4202
4203 prefetch(skb->data - NET_IP_ALIGN);
4204
4205 if (++i == rx_ring->count) i = 0;
4206 next_rxd = E1000_RX_DESC(*rx_ring, i);
4207 prefetch(next_rxd);
4208
4209 next_buffer = &rx_ring->buffer_info[i];
4210
4211 cleaned = TRUE;
4212 cleaned_count++;
4213 pci_unmap_single(pdev,
4214 buffer_info->dma,
4215 buffer_info->length,
4216 PCI_DMA_FROMDEVICE);
4217
4218 length = le16_to_cpu(rx_desc->length);
4219
4220 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4221 /* All receives must fit into a single buffer */
4222 E1000_DBG("%s: Receive packet consumed multiple"
4223 " buffers\n", netdev->name);
4224 /* recycle */
4225 buffer_info->skb = skb;
4226 goto next_desc;
4227 }
4228
4229 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4230 last_byte = *(skb->data + length - 1);
4231 if (TBI_ACCEPT(&adapter->hw, status,
4232 rx_desc->errors, length, last_byte)) {
4233 spin_lock_irqsave(&adapter->stats_lock, flags);
4234 e1000_tbi_adjust_stats(&adapter->hw,
4235 &adapter->stats,
4236 length, skb->data);
4237 spin_unlock_irqrestore(&adapter->stats_lock,
4238 flags);
4239 length--;
4240 } else {
4241 /* recycle */
4242 buffer_info->skb = skb;
4243 goto next_desc;
4244 }
4245 }
4246
4247 /* adjust length to remove Ethernet CRC, this must be
4248 * done after the TBI_ACCEPT workaround above */
4249 length -= 4;
4250
4251 /* probably a little skewed due to removing CRC */
4252 total_rx_bytes += length;
4253 total_rx_packets++;
4254
4255 /* code added for copybreak, this should improve
4256 * performance for small packets with large amounts
4257 * of reassembly being done in the stack */
4258 if (length < copybreak) {
4259 struct sk_buff *new_skb =
4260 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4261 if (new_skb) {
4262 skb_reserve(new_skb, NET_IP_ALIGN);
4263 memcpy(new_skb->data - NET_IP_ALIGN,
4264 skb->data - NET_IP_ALIGN,
4265 length + NET_IP_ALIGN);
4266 /* save the skb in buffer_info as good */
4267 buffer_info->skb = skb;
4268 skb = new_skb;
4269 }
4270 /* else just continue with the old one */
4271 }
4272 /* end copybreak code */
4273 skb_put(skb, length);
4274
4275 /* Receive Checksum Offload */
4276 e1000_rx_checksum(adapter,
4277 (uint32_t)(status) |
4278 ((uint32_t)(rx_desc->errors) << 24),
4279 le16_to_cpu(rx_desc->csum), skb);
4280
4281 skb->protocol = eth_type_trans(skb, netdev);
4282 #ifdef CONFIG_E1000_NAPI
4283 if (unlikely(adapter->vlgrp &&
4284 (status & E1000_RXD_STAT_VP))) {
4285 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4286 le16_to_cpu(rx_desc->special) &
4287 E1000_RXD_SPC_VLAN_MASK);
4288 } else {
4289 netif_receive_skb(skb);
4290 }
4291 #else /* CONFIG_E1000_NAPI */
4292 if (unlikely(adapter->vlgrp &&
4293 (status & E1000_RXD_STAT_VP))) {
4294 vlan_hwaccel_rx(skb, adapter->vlgrp,
4295 le16_to_cpu(rx_desc->special) &
4296 E1000_RXD_SPC_VLAN_MASK);
4297 } else {
4298 netif_rx(skb);
4299 }
4300 #endif /* CONFIG_E1000_NAPI */
4301 netdev->last_rx = jiffies;
4302
4303 next_desc:
4304 rx_desc->status = 0;
4305
4306 /* return some buffers to hardware, one at a time is too slow */
4307 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4308 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4309 cleaned_count = 0;
4310 }
4311
4312 /* use prefetched values */
4313 rx_desc = next_rxd;
4314 buffer_info = next_buffer;
4315 }
4316 rx_ring->next_to_clean = i;
4317
4318 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4319 if (cleaned_count)
4320 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4321
4322 adapter->total_rx_packets += total_rx_packets;
4323 adapter->total_rx_bytes += total_rx_bytes;
4324 return cleaned;
4325 }
4326
4327 /**
4328 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4329 * @adapter: board private structure
4330 **/
4331
4332 static boolean_t
4333 #ifdef CONFIG_E1000_NAPI
4334 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4335 struct e1000_rx_ring *rx_ring,
4336 int *work_done, int work_to_do)
4337 #else
4338 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4339 struct e1000_rx_ring *rx_ring)
4340 #endif
4341 {
4342 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4343 struct net_device *netdev = adapter->netdev;
4344 struct pci_dev *pdev = adapter->pdev;
4345 struct e1000_buffer *buffer_info, *next_buffer;
4346 struct e1000_ps_page *ps_page;
4347 struct e1000_ps_page_dma *ps_page_dma;
4348 struct sk_buff *skb;
4349 unsigned int i, j;
4350 uint32_t length, staterr;
4351 int cleaned_count = 0;
4352 boolean_t cleaned = FALSE;
4353 unsigned int total_rx_bytes=0, total_rx_packets=0;
4354
4355 i = rx_ring->next_to_clean;
4356 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4357 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4358 buffer_info = &rx_ring->buffer_info[i];
4359
4360 while (staterr & E1000_RXD_STAT_DD) {
4361 ps_page = &rx_ring->ps_page[i];
4362 ps_page_dma = &rx_ring->ps_page_dma[i];
4363 #ifdef CONFIG_E1000_NAPI
4364 if (unlikely(*work_done >= work_to_do))
4365 break;
4366 (*work_done)++;
4367 #endif
4368 skb = buffer_info->skb;
4369
4370 /* in the packet split case this is header only */
4371 prefetch(skb->data - NET_IP_ALIGN);
4372
4373 if (++i == rx_ring->count) i = 0;
4374 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4375 prefetch(next_rxd);
4376
4377 next_buffer = &rx_ring->buffer_info[i];
4378
4379 cleaned = TRUE;
4380 cleaned_count++;
4381 pci_unmap_single(pdev, buffer_info->dma,
4382 buffer_info->length,
4383 PCI_DMA_FROMDEVICE);
4384
4385 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4386 E1000_DBG("%s: Packet Split buffers didn't pick up"
4387 " the full packet\n", netdev->name);
4388 dev_kfree_skb_irq(skb);
4389 goto next_desc;
4390 }
4391
4392 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4393 dev_kfree_skb_irq(skb);
4394 goto next_desc;
4395 }
4396
4397 length = le16_to_cpu(rx_desc->wb.middle.length0);
4398
4399 if (unlikely(!length)) {
4400 E1000_DBG("%s: Last part of the packet spanning"
4401 " multiple descriptors\n", netdev->name);
4402 dev_kfree_skb_irq(skb);
4403 goto next_desc;
4404 }
4405
4406 /* Good Receive */
4407 skb_put(skb, length);
4408
4409 {
4410 /* this looks ugly, but it seems compiler issues make it
4411 more efficient than reusing j */
4412 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4413
4414 /* page alloc/put takes too long and effects small packet
4415 * throughput, so unsplit small packets and save the alloc/put*/
4416 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4417 u8 *vaddr;
4418 /* there is no documentation about how to call
4419 * kmap_atomic, so we can't hold the mapping
4420 * very long */
4421 pci_dma_sync_single_for_cpu(pdev,
4422 ps_page_dma->ps_page_dma[0],
4423 PAGE_SIZE,
4424 PCI_DMA_FROMDEVICE);
4425 vaddr = kmap_atomic(ps_page->ps_page[0],
4426 KM_SKB_DATA_SOFTIRQ);
4427 memcpy(skb->tail, vaddr, l1);
4428 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4429 pci_dma_sync_single_for_device(pdev,
4430 ps_page_dma->ps_page_dma[0],
4431 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4432 /* remove the CRC */
4433 l1 -= 4;
4434 skb_put(skb, l1);
4435 goto copydone;
4436 } /* if */
4437 }
4438
4439 for (j = 0; j < adapter->rx_ps_pages; j++) {
4440 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4441 break;
4442 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4443 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4444 ps_page_dma->ps_page_dma[j] = 0;
4445 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4446 length);
4447 ps_page->ps_page[j] = NULL;
4448 skb->len += length;
4449 skb->data_len += length;
4450 skb->truesize += length;
4451 }
4452
4453 /* strip the ethernet crc, problem is we're using pages now so
4454 * this whole operation can get a little cpu intensive */
4455 pskb_trim(skb, skb->len - 4);
4456
4457 copydone:
4458 total_rx_bytes += skb->len;
4459 total_rx_packets++;
4460
4461 e1000_rx_checksum(adapter, staterr,
4462 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4463 skb->protocol = eth_type_trans(skb, netdev);
4464
4465 if (likely(rx_desc->wb.upper.header_status &
4466 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4467 adapter->rx_hdr_split++;
4468 #ifdef CONFIG_E1000_NAPI
4469 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4470 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4471 le16_to_cpu(rx_desc->wb.middle.vlan) &
4472 E1000_RXD_SPC_VLAN_MASK);
4473 } else {
4474 netif_receive_skb(skb);
4475 }
4476 #else /* CONFIG_E1000_NAPI */
4477 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4478 vlan_hwaccel_rx(skb, adapter->vlgrp,
4479 le16_to_cpu(rx_desc->wb.middle.vlan) &
4480 E1000_RXD_SPC_VLAN_MASK);
4481 } else {
4482 netif_rx(skb);
4483 }
4484 #endif /* CONFIG_E1000_NAPI */
4485 netdev->last_rx = jiffies;
4486
4487 next_desc:
4488 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4489 buffer_info->skb = NULL;
4490
4491 /* return some buffers to hardware, one at a time is too slow */
4492 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4493 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4494 cleaned_count = 0;
4495 }
4496
4497 /* use prefetched values */
4498 rx_desc = next_rxd;
4499 buffer_info = next_buffer;
4500
4501 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4502 }
4503 rx_ring->next_to_clean = i;
4504
4505 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4506 if (cleaned_count)
4507 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4508
4509 adapter->total_rx_packets += total_rx_packets;
4510 adapter->total_rx_bytes += total_rx_bytes;
4511 return cleaned;
4512 }
4513
4514 /**
4515 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4516 * @adapter: address of board private structure
4517 **/
4518
4519 static void
4520 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4521 struct e1000_rx_ring *rx_ring,
4522 int cleaned_count)
4523 {
4524 struct net_device *netdev = adapter->netdev;
4525 struct pci_dev *pdev = adapter->pdev;
4526 struct e1000_rx_desc *rx_desc;
4527 struct e1000_buffer *buffer_info;
4528 struct sk_buff *skb;
4529 unsigned int i;
4530 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4531
4532 i = rx_ring->next_to_use;
4533 buffer_info = &rx_ring->buffer_info[i];
4534
4535 while (cleaned_count--) {
4536 skb = buffer_info->skb;
4537 if (skb) {
4538 skb_trim(skb, 0);
4539 goto map_skb;
4540 }
4541
4542 skb = netdev_alloc_skb(netdev, bufsz);
4543 if (unlikely(!skb)) {
4544 /* Better luck next round */
4545 adapter->alloc_rx_buff_failed++;
4546 break;
4547 }
4548
4549 /* Fix for errata 23, can't cross 64kB boundary */
4550 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4551 struct sk_buff *oldskb = skb;
4552 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4553 "at %p\n", bufsz, skb->data);
4554 /* Try again, without freeing the previous */
4555 skb = netdev_alloc_skb(netdev, bufsz);
4556 /* Failed allocation, critical failure */
4557 if (!skb) {
4558 dev_kfree_skb(oldskb);
4559 break;
4560 }
4561
4562 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4563 /* give up */
4564 dev_kfree_skb(skb);
4565 dev_kfree_skb(oldskb);
4566 break; /* while !buffer_info->skb */
4567 }
4568
4569 /* Use new allocation */
4570 dev_kfree_skb(oldskb);
4571 }
4572 /* Make buffer alignment 2 beyond a 16 byte boundary
4573 * this will result in a 16 byte aligned IP header after
4574 * the 14 byte MAC header is removed
4575 */
4576 skb_reserve(skb, NET_IP_ALIGN);
4577
4578 buffer_info->skb = skb;
4579 buffer_info->length = adapter->rx_buffer_len;
4580 map_skb:
4581 buffer_info->dma = pci_map_single(pdev,
4582 skb->data,
4583 adapter->rx_buffer_len,
4584 PCI_DMA_FROMDEVICE);
4585
4586 /* Fix for errata 23, can't cross 64kB boundary */
4587 if (!e1000_check_64k_bound(adapter,
4588 (void *)(unsigned long)buffer_info->dma,
4589 adapter->rx_buffer_len)) {
4590 DPRINTK(RX_ERR, ERR,
4591 "dma align check failed: %u bytes at %p\n",
4592 adapter->rx_buffer_len,
4593 (void *)(unsigned long)buffer_info->dma);
4594 dev_kfree_skb(skb);
4595 buffer_info->skb = NULL;
4596
4597 pci_unmap_single(pdev, buffer_info->dma,
4598 adapter->rx_buffer_len,
4599 PCI_DMA_FROMDEVICE);
4600
4601 break; /* while !buffer_info->skb */
4602 }
4603 rx_desc = E1000_RX_DESC(*rx_ring, i);
4604 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4605
4606 if (unlikely(++i == rx_ring->count))
4607 i = 0;
4608 buffer_info = &rx_ring->buffer_info[i];
4609 }
4610
4611 if (likely(rx_ring->next_to_use != i)) {
4612 rx_ring->next_to_use = i;
4613 if (unlikely(i-- == 0))
4614 i = (rx_ring->count - 1);
4615
4616 /* Force memory writes to complete before letting h/w
4617 * know there are new descriptors to fetch. (Only
4618 * applicable for weak-ordered memory model archs,
4619 * such as IA-64). */
4620 wmb();
4621 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4622 }
4623 }
4624
4625 /**
4626 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4627 * @adapter: address of board private structure
4628 **/
4629
4630 static void
4631 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4632 struct e1000_rx_ring *rx_ring,
4633 int cleaned_count)
4634 {
4635 struct net_device *netdev = adapter->netdev;
4636 struct pci_dev *pdev = adapter->pdev;
4637 union e1000_rx_desc_packet_split *rx_desc;
4638 struct e1000_buffer *buffer_info;
4639 struct e1000_ps_page *ps_page;
4640 struct e1000_ps_page_dma *ps_page_dma;
4641 struct sk_buff *skb;
4642 unsigned int i, j;
4643
4644 i = rx_ring->next_to_use;
4645 buffer_info = &rx_ring->buffer_info[i];
4646 ps_page = &rx_ring->ps_page[i];
4647 ps_page_dma = &rx_ring->ps_page_dma[i];
4648
4649 while (cleaned_count--) {
4650 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4651
4652 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4653 if (j < adapter->rx_ps_pages) {
4654 if (likely(!ps_page->ps_page[j])) {
4655 ps_page->ps_page[j] =
4656 alloc_page(GFP_ATOMIC);
4657 if (unlikely(!ps_page->ps_page[j])) {
4658 adapter->alloc_rx_buff_failed++;
4659 goto no_buffers;
4660 }
4661 ps_page_dma->ps_page_dma[j] =
4662 pci_map_page(pdev,
4663 ps_page->ps_page[j],
4664 0, PAGE_SIZE,
4665 PCI_DMA_FROMDEVICE);
4666 }
4667 /* Refresh the desc even if buffer_addrs didn't
4668 * change because each write-back erases
4669 * this info.
4670 */
4671 rx_desc->read.buffer_addr[j+1] =
4672 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4673 } else
4674 rx_desc->read.buffer_addr[j+1] = ~0;
4675 }
4676
4677 skb = netdev_alloc_skb(netdev,
4678 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4679
4680 if (unlikely(!skb)) {
4681 adapter->alloc_rx_buff_failed++;
4682 break;
4683 }
4684
4685 /* Make buffer alignment 2 beyond a 16 byte boundary
4686 * this will result in a 16 byte aligned IP header after
4687 * the 14 byte MAC header is removed
4688 */
4689 skb_reserve(skb, NET_IP_ALIGN);
4690
4691 buffer_info->skb = skb;
4692 buffer_info->length = adapter->rx_ps_bsize0;
4693 buffer_info->dma = pci_map_single(pdev, skb->data,
4694 adapter->rx_ps_bsize0,
4695 PCI_DMA_FROMDEVICE);
4696
4697 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4698
4699 if (unlikely(++i == rx_ring->count)) i = 0;
4700 buffer_info = &rx_ring->buffer_info[i];
4701 ps_page = &rx_ring->ps_page[i];
4702 ps_page_dma = &rx_ring->ps_page_dma[i];
4703 }
4704
4705 no_buffers:
4706 if (likely(rx_ring->next_to_use != i)) {
4707 rx_ring->next_to_use = i;
4708 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4709
4710 /* Force memory writes to complete before letting h/w
4711 * know there are new descriptors to fetch. (Only
4712 * applicable for weak-ordered memory model archs,
4713 * such as IA-64). */
4714 wmb();
4715 /* Hardware increments by 16 bytes, but packet split
4716 * descriptors are 32 bytes...so we increment tail
4717 * twice as much.
4718 */
4719 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4720 }
4721 }
4722
4723 /**
4724 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4725 * @adapter:
4726 **/
4727
4728 static void
4729 e1000_smartspeed(struct e1000_adapter *adapter)
4730 {
4731 uint16_t phy_status;
4732 uint16_t phy_ctrl;
4733
4734 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4735 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4736 return;
4737
4738 if (adapter->smartspeed == 0) {
4739 /* If Master/Slave config fault is asserted twice,
4740 * we assume back-to-back */
4741 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4742 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4743 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4744 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4745 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4746 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4747 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4748 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4749 phy_ctrl);
4750 adapter->smartspeed++;
4751 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4752 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4753 &phy_ctrl)) {
4754 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4755 MII_CR_RESTART_AUTO_NEG);
4756 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4757 phy_ctrl);
4758 }
4759 }
4760 return;
4761 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4762 /* If still no link, perhaps using 2/3 pair cable */
4763 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4764 phy_ctrl |= CR_1000T_MS_ENABLE;
4765 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4766 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4767 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4768 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4769 MII_CR_RESTART_AUTO_NEG);
4770 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4771 }
4772 }
4773 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4774 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4775 adapter->smartspeed = 0;
4776 }
4777
4778 /**
4779 * e1000_ioctl -
4780 * @netdev:
4781 * @ifreq:
4782 * @cmd:
4783 **/
4784
4785 static int
4786 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4787 {
4788 switch (cmd) {
4789 case SIOCGMIIPHY:
4790 case SIOCGMIIREG:
4791 case SIOCSMIIREG:
4792 return e1000_mii_ioctl(netdev, ifr, cmd);
4793 default:
4794 return -EOPNOTSUPP;
4795 }
4796 }
4797
4798 /**
4799 * e1000_mii_ioctl -
4800 * @netdev:
4801 * @ifreq:
4802 * @cmd:
4803 **/
4804
4805 static int
4806 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4807 {
4808 struct e1000_adapter *adapter = netdev_priv(netdev);
4809 struct mii_ioctl_data *data = if_mii(ifr);
4810 int retval;
4811 uint16_t mii_reg;
4812 uint16_t spddplx;
4813 unsigned long flags;
4814
4815 if (adapter->hw.media_type != e1000_media_type_copper)
4816 return -EOPNOTSUPP;
4817
4818 switch (cmd) {
4819 case SIOCGMIIPHY:
4820 data->phy_id = adapter->hw.phy_addr;
4821 break;
4822 case SIOCGMIIREG:
4823 if (!capable(CAP_NET_ADMIN))
4824 return -EPERM;
4825 spin_lock_irqsave(&adapter->stats_lock, flags);
4826 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4827 &data->val_out)) {
4828 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4829 return -EIO;
4830 }
4831 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4832 break;
4833 case SIOCSMIIREG:
4834 if (!capable(CAP_NET_ADMIN))
4835 return -EPERM;
4836 if (data->reg_num & ~(0x1F))
4837 return -EFAULT;
4838 mii_reg = data->val_in;
4839 spin_lock_irqsave(&adapter->stats_lock, flags);
4840 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4841 mii_reg)) {
4842 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4843 return -EIO;
4844 }
4845 if (adapter->hw.media_type == e1000_media_type_copper) {
4846 switch (data->reg_num) {
4847 case PHY_CTRL:
4848 if (mii_reg & MII_CR_POWER_DOWN)
4849 break;
4850 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4851 adapter->hw.autoneg = 1;
4852 adapter->hw.autoneg_advertised = 0x2F;
4853 } else {
4854 if (mii_reg & 0x40)
4855 spddplx = SPEED_1000;
4856 else if (mii_reg & 0x2000)
4857 spddplx = SPEED_100;
4858 else
4859 spddplx = SPEED_10;
4860 spddplx += (mii_reg & 0x100)
4861 ? DUPLEX_FULL :
4862 DUPLEX_HALF;
4863 retval = e1000_set_spd_dplx(adapter,
4864 spddplx);
4865 if (retval) {
4866 spin_unlock_irqrestore(
4867 &adapter->stats_lock,
4868 flags);
4869 return retval;
4870 }
4871 }
4872 if (netif_running(adapter->netdev))
4873 e1000_reinit_locked(adapter);
4874 else
4875 e1000_reset(adapter);
4876 break;
4877 case M88E1000_PHY_SPEC_CTRL:
4878 case M88E1000_EXT_PHY_SPEC_CTRL:
4879 if (e1000_phy_reset(&adapter->hw)) {
4880 spin_unlock_irqrestore(
4881 &adapter->stats_lock, flags);
4882 return -EIO;
4883 }
4884 break;
4885 }
4886 } else {
4887 switch (data->reg_num) {
4888 case PHY_CTRL:
4889 if (mii_reg & MII_CR_POWER_DOWN)
4890 break;
4891 if (netif_running(adapter->netdev))
4892 e1000_reinit_locked(adapter);
4893 else
4894 e1000_reset(adapter);
4895 break;
4896 }
4897 }
4898 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4899 break;
4900 default:
4901 return -EOPNOTSUPP;
4902 }
4903 return E1000_SUCCESS;
4904 }
4905
4906 void
4907 e1000_pci_set_mwi(struct e1000_hw *hw)
4908 {
4909 struct e1000_adapter *adapter = hw->back;
4910 int ret_val = pci_set_mwi(adapter->pdev);
4911
4912 if (ret_val)
4913 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4914 }
4915
4916 void
4917 e1000_pci_clear_mwi(struct e1000_hw *hw)
4918 {
4919 struct e1000_adapter *adapter = hw->back;
4920
4921 pci_clear_mwi(adapter->pdev);
4922 }
4923
4924 void
4925 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4926 {
4927 struct e1000_adapter *adapter = hw->back;
4928
4929 pci_read_config_word(adapter->pdev, reg, value);
4930 }
4931
4932 void
4933 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4934 {
4935 struct e1000_adapter *adapter = hw->back;
4936
4937 pci_write_config_word(adapter->pdev, reg, *value);
4938 }
4939
4940 int32_t
4941 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4942 {
4943 struct e1000_adapter *adapter = hw->back;
4944 uint16_t cap_offset;
4945
4946 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4947 if (!cap_offset)
4948 return -E1000_ERR_CONFIG;
4949
4950 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4951
4952 return E1000_SUCCESS;
4953 }
4954
4955 void
4956 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4957 {
4958 outl(value, port);
4959 }
4960
4961 static void
4962 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4963 {
4964 struct e1000_adapter *adapter = netdev_priv(netdev);
4965 uint32_t ctrl, rctl;
4966
4967 e1000_irq_disable(adapter);
4968 adapter->vlgrp = grp;
4969
4970 if (grp) {
4971 /* enable VLAN tag insert/strip */
4972 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4973 ctrl |= E1000_CTRL_VME;
4974 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4975
4976 if (adapter->hw.mac_type != e1000_ich8lan) {
4977 /* enable VLAN receive filtering */
4978 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4979 rctl |= E1000_RCTL_VFE;
4980 rctl &= ~E1000_RCTL_CFIEN;
4981 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4982 e1000_update_mng_vlan(adapter);
4983 }
4984 } else {
4985 /* disable VLAN tag insert/strip */
4986 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4987 ctrl &= ~E1000_CTRL_VME;
4988 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4989
4990 if (adapter->hw.mac_type != e1000_ich8lan) {
4991 /* disable VLAN filtering */
4992 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4993 rctl &= ~E1000_RCTL_VFE;
4994 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4995 if (adapter->mng_vlan_id !=
4996 (uint16_t)E1000_MNG_VLAN_NONE) {
4997 e1000_vlan_rx_kill_vid(netdev,
4998 adapter->mng_vlan_id);
4999 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
5000 }
5001 }
5002 }
5003
5004 e1000_irq_enable(adapter);
5005 }
5006
5007 static void
5008 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
5009 {
5010 struct e1000_adapter *adapter = netdev_priv(netdev);
5011 uint32_t vfta, index;
5012
5013 if ((adapter->hw.mng_cookie.status &
5014 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5015 (vid == adapter->mng_vlan_id))
5016 return;
5017 /* add VID to filter table */
5018 index = (vid >> 5) & 0x7F;
5019 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5020 vfta |= (1 << (vid & 0x1F));
5021 e1000_write_vfta(&adapter->hw, index, vfta);
5022 }
5023
5024 static void
5025 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
5026 {
5027 struct e1000_adapter *adapter = netdev_priv(netdev);
5028 uint32_t vfta, index;
5029
5030 e1000_irq_disable(adapter);
5031
5032 if (adapter->vlgrp)
5033 adapter->vlgrp->vlan_devices[vid] = NULL;
5034
5035 e1000_irq_enable(adapter);
5036
5037 if ((adapter->hw.mng_cookie.status &
5038 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5039 (vid == adapter->mng_vlan_id)) {
5040 /* release control to f/w */
5041 e1000_release_hw_control(adapter);
5042 return;
5043 }
5044
5045 /* remove VID from filter table */
5046 index = (vid >> 5) & 0x7F;
5047 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5048 vfta &= ~(1 << (vid & 0x1F));
5049 e1000_write_vfta(&adapter->hw, index, vfta);
5050 }
5051
5052 static void
5053 e1000_restore_vlan(struct e1000_adapter *adapter)
5054 {
5055 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5056
5057 if (adapter->vlgrp) {
5058 uint16_t vid;
5059 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5060 if (!adapter->vlgrp->vlan_devices[vid])
5061 continue;
5062 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5063 }
5064 }
5065 }
5066
5067 int
5068 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5069 {
5070 adapter->hw.autoneg = 0;
5071
5072 /* Fiber NICs only allow 1000 gbps Full duplex */
5073 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5074 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5075 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5076 return -EINVAL;
5077 }
5078
5079 switch (spddplx) {
5080 case SPEED_10 + DUPLEX_HALF:
5081 adapter->hw.forced_speed_duplex = e1000_10_half;
5082 break;
5083 case SPEED_10 + DUPLEX_FULL:
5084 adapter->hw.forced_speed_duplex = e1000_10_full;
5085 break;
5086 case SPEED_100 + DUPLEX_HALF:
5087 adapter->hw.forced_speed_duplex = e1000_100_half;
5088 break;
5089 case SPEED_100 + DUPLEX_FULL:
5090 adapter->hw.forced_speed_duplex = e1000_100_full;
5091 break;
5092 case SPEED_1000 + DUPLEX_FULL:
5093 adapter->hw.autoneg = 1;
5094 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5095 break;
5096 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5097 default:
5098 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5099 return -EINVAL;
5100 }
5101 return 0;
5102 }
5103
5104 #ifdef CONFIG_PM
5105 /* Save/restore 16 or 64 dwords of PCI config space depending on which
5106 * bus we're on (PCI(X) vs. PCI-E)
5107 */
5108 #define PCIE_CONFIG_SPACE_LEN 256
5109 #define PCI_CONFIG_SPACE_LEN 64
5110 static int
5111 e1000_pci_save_state(struct e1000_adapter *adapter)
5112 {
5113 struct pci_dev *dev = adapter->pdev;
5114 int size;
5115 int i;
5116
5117 if (adapter->hw.mac_type >= e1000_82571)
5118 size = PCIE_CONFIG_SPACE_LEN;
5119 else
5120 size = PCI_CONFIG_SPACE_LEN;
5121
5122 WARN_ON(adapter->config_space != NULL);
5123
5124 adapter->config_space = kmalloc(size, GFP_KERNEL);
5125 if (!adapter->config_space) {
5126 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
5127 return -ENOMEM;
5128 }
5129 for (i = 0; i < (size / 4); i++)
5130 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
5131 return 0;
5132 }
5133
5134 static void
5135 e1000_pci_restore_state(struct e1000_adapter *adapter)
5136 {
5137 struct pci_dev *dev = adapter->pdev;
5138 int size;
5139 int i;
5140
5141 if (adapter->config_space == NULL)
5142 return;
5143
5144 if (adapter->hw.mac_type >= e1000_82571)
5145 size = PCIE_CONFIG_SPACE_LEN;
5146 else
5147 size = PCI_CONFIG_SPACE_LEN;
5148 for (i = 0; i < (size / 4); i++)
5149 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
5150 kfree(adapter->config_space);
5151 adapter->config_space = NULL;
5152 return;
5153 }
5154 #endif /* CONFIG_PM */
5155
5156 static int
5157 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5158 {
5159 struct net_device *netdev = pci_get_drvdata(pdev);
5160 struct e1000_adapter *adapter = netdev_priv(netdev);
5161 uint32_t ctrl, ctrl_ext, rctl, status;
5162 uint32_t wufc = adapter->wol;
5163 #ifdef CONFIG_PM
5164 int retval = 0;
5165 #endif
5166
5167 netif_device_detach(netdev);
5168
5169 if (netif_running(netdev)) {
5170 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5171 e1000_down(adapter);
5172 }
5173
5174 #ifdef CONFIG_PM
5175 /* Implement our own version of pci_save_state(pdev) because pci-
5176 * express adapters have 256-byte config spaces. */
5177 retval = e1000_pci_save_state(adapter);
5178 if (retval)
5179 return retval;
5180 #endif
5181
5182 status = E1000_READ_REG(&adapter->hw, STATUS);
5183 if (status & E1000_STATUS_LU)
5184 wufc &= ~E1000_WUFC_LNKC;
5185
5186 if (wufc) {
5187 e1000_setup_rctl(adapter);
5188 e1000_set_multi(netdev);
5189
5190 /* turn on all-multi mode if wake on multicast is enabled */
5191 if (wufc & E1000_WUFC_MC) {
5192 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5193 rctl |= E1000_RCTL_MPE;
5194 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5195 }
5196
5197 if (adapter->hw.mac_type >= e1000_82540) {
5198 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5199 /* advertise wake from D3Cold */
5200 #define E1000_CTRL_ADVD3WUC 0x00100000
5201 /* phy power management enable */
5202 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5203 ctrl |= E1000_CTRL_ADVD3WUC |
5204 E1000_CTRL_EN_PHY_PWR_MGMT;
5205 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5206 }
5207
5208 if (adapter->hw.media_type == e1000_media_type_fiber ||
5209 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5210 /* keep the laser running in D3 */
5211 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5212 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5213 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5214 }
5215
5216 /* Allow time for pending master requests to run */
5217 e1000_disable_pciex_master(&adapter->hw);
5218
5219 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5220 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5221 pci_enable_wake(pdev, PCI_D3hot, 1);
5222 pci_enable_wake(pdev, PCI_D3cold, 1);
5223 } else {
5224 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5225 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5226 pci_enable_wake(pdev, PCI_D3hot, 0);
5227 pci_enable_wake(pdev, PCI_D3cold, 0);
5228 }
5229
5230 e1000_release_manageability(adapter);
5231
5232 /* make sure adapter isn't asleep if manageability is enabled */
5233 if (adapter->en_mng_pt) {
5234 pci_enable_wake(pdev, PCI_D3hot, 1);
5235 pci_enable_wake(pdev, PCI_D3cold, 1);
5236 }
5237
5238 if (adapter->hw.phy_type == e1000_phy_igp_3)
5239 e1000_phy_powerdown_workaround(&adapter->hw);
5240
5241 if (netif_running(netdev))
5242 e1000_free_irq(adapter);
5243
5244 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5245 * would have already happened in close and is redundant. */
5246 e1000_release_hw_control(adapter);
5247
5248 pci_disable_device(pdev);
5249
5250 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5251
5252 return 0;
5253 }
5254
5255 #ifdef CONFIG_PM
5256 static int
5257 e1000_resume(struct pci_dev *pdev)
5258 {
5259 struct net_device *netdev = pci_get_drvdata(pdev);
5260 struct e1000_adapter *adapter = netdev_priv(netdev);
5261 uint32_t err;
5262
5263 pci_set_power_state(pdev, PCI_D0);
5264 e1000_pci_restore_state(adapter);
5265 if ((err = pci_enable_device(pdev))) {
5266 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5267 return err;
5268 }
5269 pci_set_master(pdev);
5270
5271 pci_enable_wake(pdev, PCI_D3hot, 0);
5272 pci_enable_wake(pdev, PCI_D3cold, 0);
5273
5274 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5275 return err;
5276
5277 e1000_power_up_phy(adapter);
5278 e1000_reset(adapter);
5279 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5280
5281 e1000_init_manageability(adapter);
5282
5283 if (netif_running(netdev))
5284 e1000_up(adapter);
5285
5286 netif_device_attach(netdev);
5287
5288 /* If the controller is 82573 and f/w is AMT, do not set
5289 * DRV_LOAD until the interface is up. For all other cases,
5290 * let the f/w know that the h/w is now under the control
5291 * of the driver. */
5292 if (adapter->hw.mac_type != e1000_82573 ||
5293 !e1000_check_mng_mode(&adapter->hw))
5294 e1000_get_hw_control(adapter);
5295
5296 return 0;
5297 }
5298 #endif
5299
5300 static void e1000_shutdown(struct pci_dev *pdev)
5301 {
5302 e1000_suspend(pdev, PMSG_SUSPEND);
5303 }
5304
5305 #ifdef CONFIG_NET_POLL_CONTROLLER
5306 /*
5307 * Polling 'interrupt' - used by things like netconsole to send skbs
5308 * without having to re-enable interrupts. It's not called while
5309 * the interrupt routine is executing.
5310 */
5311 static void
5312 e1000_netpoll(struct net_device *netdev)
5313 {
5314 struct e1000_adapter *adapter = netdev_priv(netdev);
5315
5316 disable_irq(adapter->pdev->irq);
5317 e1000_intr(adapter->pdev->irq, netdev);
5318 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5319 #ifndef CONFIG_E1000_NAPI
5320 adapter->clean_rx(adapter, adapter->rx_ring);
5321 #endif
5322 enable_irq(adapter->pdev->irq);
5323 }
5324 #endif
5325
5326 /**
5327 * e1000_io_error_detected - called when PCI error is detected
5328 * @pdev: Pointer to PCI device
5329 * @state: The current pci conneection state
5330 *
5331 * This function is called after a PCI bus error affecting
5332 * this device has been detected.
5333 */
5334 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5335 {
5336 struct net_device *netdev = pci_get_drvdata(pdev);
5337 struct e1000_adapter *adapter = netdev->priv;
5338
5339 netif_device_detach(netdev);
5340
5341 if (netif_running(netdev))
5342 e1000_down(adapter);
5343 pci_disable_device(pdev);
5344
5345 /* Request a slot slot reset. */
5346 return PCI_ERS_RESULT_NEED_RESET;
5347 }
5348
5349 /**
5350 * e1000_io_slot_reset - called after the pci bus has been reset.
5351 * @pdev: Pointer to PCI device
5352 *
5353 * Restart the card from scratch, as if from a cold-boot. Implementation
5354 * resembles the first-half of the e1000_resume routine.
5355 */
5356 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5357 {
5358 struct net_device *netdev = pci_get_drvdata(pdev);
5359 struct e1000_adapter *adapter = netdev->priv;
5360
5361 if (pci_enable_device(pdev)) {
5362 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5363 return PCI_ERS_RESULT_DISCONNECT;
5364 }
5365 pci_set_master(pdev);
5366
5367 pci_enable_wake(pdev, PCI_D3hot, 0);
5368 pci_enable_wake(pdev, PCI_D3cold, 0);
5369
5370 e1000_reset(adapter);
5371 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5372
5373 return PCI_ERS_RESULT_RECOVERED;
5374 }
5375
5376 /**
5377 * e1000_io_resume - called when traffic can start flowing again.
5378 * @pdev: Pointer to PCI device
5379 *
5380 * This callback is called when the error recovery driver tells us that
5381 * its OK to resume normal operation. Implementation resembles the
5382 * second-half of the e1000_resume routine.
5383 */
5384 static void e1000_io_resume(struct pci_dev *pdev)
5385 {
5386 struct net_device *netdev = pci_get_drvdata(pdev);
5387 struct e1000_adapter *adapter = netdev->priv;
5388
5389 e1000_init_manageability(adapter);
5390
5391 if (netif_running(netdev)) {
5392 if (e1000_up(adapter)) {
5393 printk("e1000: can't bring device back up after reset\n");
5394 return;
5395 }
5396 }
5397
5398 netif_device_attach(netdev);
5399
5400 /* If the controller is 82573 and f/w is AMT, do not set
5401 * DRV_LOAD until the interface is up. For all other cases,
5402 * let the f/w know that the h/w is now under the control
5403 * of the driver. */
5404 if (adapter->hw.mac_type != e1000_82573 ||
5405 !e1000_check_mng_mode(&adapter->hw))
5406 e1000_get_hw_control(adapter);
5407
5408 }
5409
5410 /* e1000_main.c */
Verdex Pro support