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V4L/DVB (10871): stv0900: delete debug messages not related to stv0900 tuning algorythm
[linux-2.6/verdex.git] / drivers / media / video / tvaudio.c
blobe8ab28532d94c6b3ef4beb8b0522a411f413f40d
1 /*
2 * Driver for simple i2c audio chips.
3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
10 * Copyright(c) 2005-2008 Mauro Carvalho Chehab
11 * - Some cleanups, code fixes, etc
12 * - Convert it to V4L2 API
13 *
14 * This code is placed under the terms of the GNU General Public License
15 *
16 * OPTIONS:
17 * debug - set to 1 if you'd like to see debug messages
18 *
19 */
20
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/sched.h>
24 #include <linux/string.h>
25 #include <linux/timer.h>
26 #include <linux/delay.h>
27 #include <linux/errno.h>
28 #include <linux/slab.h>
29 #include <linux/videodev2.h>
30 #include <linux/i2c.h>
31 #include <linux/init.h>
32 #include <linux/kthread.h>
33 #include <linux/freezer.h>
34
35 #include <media/tvaudio.h>
36 #include <media/v4l2-device.h>
37 #include <media/v4l2-chip-ident.h>
38 #include <media/v4l2-i2c-drv-legacy.h>
39
40 #include <media/i2c-addr.h>
41
42 /* ---------------------------------------------------------------------- */
43 /* insmod args */
44
45 static int debug; /* insmod parameter */
46 module_param(debug, int, 0644);
47
48 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
49 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
50 MODULE_LICENSE("GPL");
51
52 #define UNSET (-1U)
53
54 /* ---------------------------------------------------------------------- */
55 /* our structs */
56
57 #define MAXREGS 256
58
59 struct CHIPSTATE;
60 typedef int (*getvalue)(int);
61 typedef int (*checkit)(struct CHIPSTATE*);
62 typedef int (*initialize)(struct CHIPSTATE*);
63 typedef int (*getmode)(struct CHIPSTATE*);
64 typedef void (*setmode)(struct CHIPSTATE*, int mode);
65
66 /* i2c command */
67 typedef struct AUDIOCMD {
68 int count; /* # of bytes to send */
69 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
70 } audiocmd;
71
72 /* chip description */
73 struct CHIPDESC {
74 char *name; /* chip name */
75 int addr_lo, addr_hi; /* i2c address range */
76 int registers; /* # of registers */
77
78 int *insmodopt;
79 checkit checkit;
80 initialize initialize;
81 int flags;
82 #define CHIP_HAS_VOLUME 1
83 #define CHIP_HAS_BASSTREBLE 2
84 #define CHIP_HAS_INPUTSEL 4
85 #define CHIP_NEED_CHECKMODE 8
86
87 /* various i2c command sequences */
88 audiocmd init;
89
90 /* which register has which value */
91 int leftreg,rightreg,treblereg,bassreg;
92
93 /* initialize with (defaults to 65535/65535/32768/32768 */
94 int leftinit,rightinit,trebleinit,bassinit;
95
96 /* functions to convert the values (v4l -> chip) */
97 getvalue volfunc,treblefunc,bassfunc;
98
99 /* get/set mode */
100 getmode getmode;
101 setmode setmode;
102
103 /* input switch register + values for v4l inputs */
104 int inputreg;
105 int inputmap[4];
106 int inputmute;
107 int inputmask;
108 };
109
110 /* current state of the chip */
111 struct CHIPSTATE {
112 struct v4l2_subdev sd;
113
114 /* chip-specific description - should point to
115 an entry at CHIPDESC table */
116 struct CHIPDESC *desc;
117
118 /* shadow register set */
119 audiocmd shadow;
120
121 /* current settings */
122 __u16 left,right,treble,bass,muted,mode;
123 int prevmode;
124 int radio;
125 int input;
126
127 /* thread */
128 struct task_struct *thread;
129 struct timer_list wt;
130 int watch_stereo;
131 int audmode;
132 };
133
134 static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd)
135 {
136 return container_of(sd, struct CHIPSTATE, sd);
137 }
138
139 /* ---------------------------------------------------------------------- */
140 /* i2c addresses */
141
142 static unsigned short normal_i2c[] = {
143 I2C_ADDR_TDA8425 >> 1,
144 I2C_ADDR_TEA6300 >> 1,
145 I2C_ADDR_TEA6420 >> 1,
146 I2C_ADDR_TDA9840 >> 1,
147 I2C_ADDR_TDA985x_L >> 1,
148 I2C_ADDR_TDA985x_H >> 1,
149 I2C_ADDR_TDA9874 >> 1,
150 I2C_ADDR_PIC16C54 >> 1,
151 I2C_CLIENT_END };
152 I2C_CLIENT_INSMOD;
153
154 /* ---------------------------------------------------------------------- */
155 /* i2c I/O functions */
156
157 static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
158 {
159 struct v4l2_subdev *sd = &chip->sd;
160 struct i2c_client *c = v4l2_get_subdevdata(sd);
161 unsigned char buffer[2];
162
163 if (subaddr < 0) {
164 v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val);
165 chip->shadow.bytes[1] = val;
166 buffer[0] = val;
167 if (1 != i2c_master_send(c, buffer, 1)) {
168 v4l2_warn(sd, "I/O error (write 0x%x)\n", val);
169 return -1;
170 }
171 } else {
172 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
173 v4l2_info(sd,
174 "Tried to access a non-existent register: %d\n",
175 subaddr);
176 return -EINVAL;
177 }
178
179 v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n",
180 subaddr, val);
181 chip->shadow.bytes[subaddr+1] = val;
182 buffer[0] = subaddr;
183 buffer[1] = val;
184 if (2 != i2c_master_send(c, buffer, 2)) {
185 v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n",
186 subaddr, val);
187 return -1;
188 }
189 }
190 return 0;
191 }
192
193 static int chip_write_masked(struct CHIPSTATE *chip,
194 int subaddr, int val, int mask)
195 {
196 struct v4l2_subdev *sd = &chip->sd;
197
198 if (mask != 0) {
199 if (subaddr < 0) {
200 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
201 } else {
202 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
203 v4l2_info(sd,
204 "Tried to access a non-existent register: %d\n",
205 subaddr);
206 return -EINVAL;
207 }
208
209 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
210 }
211 }
212 return chip_write(chip, subaddr, val);
213 }
214
215 static int chip_read(struct CHIPSTATE *chip)
216 {
217 struct v4l2_subdev *sd = &chip->sd;
218 struct i2c_client *c = v4l2_get_subdevdata(sd);
219 unsigned char buffer;
220
221 if (1 != i2c_master_recv(c, &buffer, 1)) {
222 v4l2_warn(sd, "I/O error (read)\n");
223 return -1;
224 }
225 v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer);
226 return buffer;
227 }
228
229 static int chip_read2(struct CHIPSTATE *chip, int subaddr)
230 {
231 struct v4l2_subdev *sd = &chip->sd;
232 struct i2c_client *c = v4l2_get_subdevdata(sd);
233 unsigned char write[1];
234 unsigned char read[1];
235 struct i2c_msg msgs[2] = {
236 { c->addr, 0, 1, write },
237 { c->addr, I2C_M_RD, 1, read }
238 };
239
240 write[0] = subaddr;
241
242 if (2 != i2c_transfer(c->adapter, msgs, 2)) {
243 v4l2_warn(sd, "I/O error (read2)\n");
244 return -1;
245 }
246 v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n",
247 subaddr, read[0]);
248 return read[0];
249 }
250
251 static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
252 {
253 struct v4l2_subdev *sd = &chip->sd;
254 struct i2c_client *c = v4l2_get_subdevdata(sd);
255 int i;
256
257 if (0 == cmd->count)
258 return 0;
259
260 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
261 v4l2_info(sd,
262 "Tried to access a non-existent register range: %d to %d\n",
263 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
264 return -EINVAL;
265 }
266
267 /* FIXME: it seems that the shadow bytes are wrong bellow !*/
268
269 /* update our shadow register set; print bytes if (debug > 0) */
270 v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:",
271 name, cmd->bytes[0]);
272 for (i = 1; i < cmd->count; i++) {
273 if (debug)
274 printk(KERN_CONT " 0x%x", cmd->bytes[i]);
275 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
276 }
277 if (debug)
278 printk(KERN_CONT "\n");
279
280 /* send data to the chip */
281 if (cmd->count != i2c_master_send(c, cmd->bytes, cmd->count)) {
282 v4l2_warn(sd, "I/O error (%s)\n", name);
283 return -1;
284 }
285 return 0;
286 }
287
288 /* ---------------------------------------------------------------------- */
289 /* kernel thread for doing i2c stuff asyncronly
290 * right now it is used only to check the audio mode (mono/stereo/whatever)
291 * some time after switching to another TV channel, then turn on stereo
292 * if available, ...
293 */
294
295 static void chip_thread_wake(unsigned long data)
296 {
297 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
298 wake_up_process(chip->thread);
299 }
300
301 static int chip_thread(void *data)
302 {
303 struct CHIPSTATE *chip = data;
304 struct CHIPDESC *desc = chip->desc;
305 struct v4l2_subdev *sd = &chip->sd;
306 int mode;
307
308 v4l2_dbg(1, debug, sd, "thread started\n");
309 set_freezable();
310 for (;;) {
311 set_current_state(TASK_INTERRUPTIBLE);
312 if (!kthread_should_stop())
313 schedule();
314 set_current_state(TASK_RUNNING);
315 try_to_freeze();
316 if (kthread_should_stop())
317 break;
318 v4l2_dbg(1, debug, sd, "thread wakeup\n");
319
320 /* don't do anything for radio or if mode != auto */
321 if (chip->radio || chip->mode != 0)
322 continue;
323
324 /* have a look what's going on */
325 mode = desc->getmode(chip);
326 if (mode == chip->prevmode)
327 continue;
328
329 /* chip detected a new audio mode - set it */
330 v4l2_dbg(1, debug, sd, "thread checkmode\n");
331
332 chip->prevmode = mode;
333
334 if (mode & V4L2_TUNER_MODE_STEREO)
335 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
336 if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
337 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
338 else if (mode & V4L2_TUNER_MODE_LANG1)
339 desc->setmode(chip, V4L2_TUNER_MODE_LANG1);
340 else if (mode & V4L2_TUNER_MODE_LANG2)
341 desc->setmode(chip, V4L2_TUNER_MODE_LANG2);
342 else
343 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
344
345 /* schedule next check */
346 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
347 }
348
349 v4l2_dbg(1, debug, sd, "thread exiting\n");
350 return 0;
351 }
352
353 /* ---------------------------------------------------------------------- */
354 /* audio chip descriptions - defines+functions for tda9840 */
355
356 #define TDA9840_SW 0x00
357 #define TDA9840_LVADJ 0x02
358 #define TDA9840_STADJ 0x03
359 #define TDA9840_TEST 0x04
360
361 #define TDA9840_MONO 0x10
362 #define TDA9840_STEREO 0x2a
363 #define TDA9840_DUALA 0x12
364 #define TDA9840_DUALB 0x1e
365 #define TDA9840_DUALAB 0x1a
366 #define TDA9840_DUALBA 0x16
367 #define TDA9840_EXTERNAL 0x7a
368
369 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
370 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
371 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
372
373 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
374 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
375
376 static int tda9840_getmode(struct CHIPSTATE *chip)
377 {
378 struct v4l2_subdev *sd = &chip->sd;
379 int val, mode;
380
381 val = chip_read(chip);
382 mode = V4L2_TUNER_MODE_MONO;
383 if (val & TDA9840_DS_DUAL)
384 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
385 if (val & TDA9840_ST_STEREO)
386 mode |= V4L2_TUNER_MODE_STEREO;
387
388 v4l2_dbg(1, debug, sd, "tda9840_getmode(): raw chip read: %d, return: %d\n",
389 val, mode);
390 return mode;
391 }
392
393 static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
394 {
395 int update = 1;
396 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
397
398 switch (mode) {
399 case V4L2_TUNER_MODE_MONO:
400 t |= TDA9840_MONO;
401 break;
402 case V4L2_TUNER_MODE_STEREO:
403 t |= TDA9840_STEREO;
404 break;
405 case V4L2_TUNER_MODE_LANG1:
406 t |= TDA9840_DUALA;
407 break;
408 case V4L2_TUNER_MODE_LANG2:
409 t |= TDA9840_DUALB;
410 break;
411 default:
412 update = 0;
413 }
414
415 if (update)
416 chip_write(chip, TDA9840_SW, t);
417 }
418
419 static int tda9840_checkit(struct CHIPSTATE *chip)
420 {
421 int rc;
422 rc = chip_read(chip);
423 /* lower 5 bits should be 0 */
424 return ((rc & 0x1f) == 0) ? 1 : 0;
425 }
426
427 /* ---------------------------------------------------------------------- */
428 /* audio chip descriptions - defines+functions for tda985x */
429
430 /* subaddresses for TDA9855 */
431 #define TDA9855_VR 0x00 /* Volume, right */
432 #define TDA9855_VL 0x01 /* Volume, left */
433 #define TDA9855_BA 0x02 /* Bass */
434 #define TDA9855_TR 0x03 /* Treble */
435 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
436
437 /* subaddresses for TDA9850 */
438 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
439
440 /* subaddesses for both chips */
441 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
442 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
443 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
444 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
445 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
446 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
447
448 /* Masks for bits in TDA9855 subaddresses */
449 /* 0x00 - VR in TDA9855 */
450 /* 0x01 - VL in TDA9855 */
451 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
452 * in 1dB steps - mute is 0x27 */
453
454
455 /* 0x02 - BA in TDA9855 */
456 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
457 * in .5dB steps - 0 is 0x0E */
458
459
460 /* 0x03 - TR in TDA9855 */
461 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
462 * in 3dB steps - 0 is 0x7 */
463
464 /* Masks for bits in both chips' subaddresses */
465 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
466 /* Unique to TDA9855: */
467 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
468 * in 3dB steps - mute is 0x0 */
469
470 /* Unique to TDA9850: */
471 /* lower 4 bits control stereo noise threshold, over which stereo turns off
472 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
473
474
475 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
476 /* Unique to TDA9855: */
477 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
478 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
479 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
480 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
481 /* Bits 0 to 3 select various combinations
482 * of line in and line out, only the
483 * interesting ones are defined */
484 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
485 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
486
487 /* Unique to TDA9850: */
488 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
489 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
490
491
492 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
493 /* Common to TDA9855 and TDA9850: */
494 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
495 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
496 #define TDA985x_MONO 0 /* Forces Mono output */
497 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
498
499 /* Unique to TDA9855: */
500 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
501 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
502 #define TDA9855_LINEAR 0 /* Linear Stereo */
503 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
504 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
505 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
506 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
507
508 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
509 /* Common to both TDA9855 and TDA9850: */
510 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
511 * in .5dB steps - 0dB is 0x7 */
512
513 /* 0x08, 0x09 - A1 and A2 (read/write) */
514 /* Common to both TDA9855 and TDA9850: */
515 /* lower 5 bites are wideband and spectral expander alignment
516 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
517 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
518 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
519 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
520
521 /* 0x0a - A3 */
522 /* Common to both TDA9855 and TDA9850: */
523 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
524 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
525 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
526
527 static int tda9855_volume(int val) { return val/0x2e8+0x27; }
528 static int tda9855_bass(int val) { return val/0xccc+0x06; }
529 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
530
531 static int tda985x_getmode(struct CHIPSTATE *chip)
532 {
533 int mode;
534
535 mode = ((TDA985x_STP | TDA985x_SAPP) &
536 chip_read(chip)) >> 4;
537 /* Add mono mode regardless of SAP and stereo */
538 /* Allows forced mono */
539 return mode | V4L2_TUNER_MODE_MONO;
540 }
541
542 static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
543 {
544 int update = 1;
545 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
546
547 switch (mode) {
548 case V4L2_TUNER_MODE_MONO:
549 c6 |= TDA985x_MONO;
550 break;
551 case V4L2_TUNER_MODE_STEREO:
552 c6 |= TDA985x_STEREO;
553 break;
554 case V4L2_TUNER_MODE_LANG1:
555 c6 |= TDA985x_SAP;
556 break;
557 default:
558 update = 0;
559 }
560 if (update)
561 chip_write(chip,TDA985x_C6,c6);
562 }
563
564
565 /* ---------------------------------------------------------------------- */
566 /* audio chip descriptions - defines+functions for tda9873h */
567
568 /* Subaddresses for TDA9873H */
569
570 #define TDA9873_SW 0x00 /* Switching */
571 #define TDA9873_AD 0x01 /* Adjust */
572 #define TDA9873_PT 0x02 /* Port */
573
574 /* Subaddress 0x00: Switching Data
575 * B7..B0:
576 *
577 * B1, B0: Input source selection
578 * 0, 0 internal
579 * 1, 0 external stereo
580 * 0, 1 external mono
581 */
582 #define TDA9873_INP_MASK 3
583 #define TDA9873_INTERNAL 0
584 #define TDA9873_EXT_STEREO 2
585 #define TDA9873_EXT_MONO 1
586
587 /* B3, B2: output signal select
588 * B4 : transmission mode
589 * 0, 0, 1 Mono
590 * 1, 0, 0 Stereo
591 * 1, 1, 1 Stereo (reversed channel)
592 * 0, 0, 0 Dual AB
593 * 0, 0, 1 Dual AA
594 * 0, 1, 0 Dual BB
595 * 0, 1, 1 Dual BA
596 */
597
598 #define TDA9873_TR_MASK (7 << 2)
599 #define TDA9873_TR_MONO 4
600 #define TDA9873_TR_STEREO 1 << 4
601 #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
602 #define TDA9873_TR_DUALA 1 << 2
603 #define TDA9873_TR_DUALB 1 << 3
604
605 /* output level controls
606 * B5: output level switch (0 = reduced gain, 1 = normal gain)
607 * B6: mute (1 = muted)
608 * B7: auto-mute (1 = auto-mute enabled)
609 */
610
611 #define TDA9873_GAIN_NORMAL 1 << 5
612 #define TDA9873_MUTE 1 << 6
613 #define TDA9873_AUTOMUTE 1 << 7
614
615 /* Subaddress 0x01: Adjust/standard */
616
617 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
618 * Recommended value is +0 dB
619 */
620
621 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
622
623 /* Bits C6..C4 control FM stantard
624 * C6, C5, C4
625 * 0, 0, 0 B/G (PAL FM)
626 * 0, 0, 1 M
627 * 0, 1, 0 D/K(1)
628 * 0, 1, 1 D/K(2)
629 * 1, 0, 0 D/K(3)
630 * 1, 0, 1 I
631 */
632 #define TDA9873_BG 0
633 #define TDA9873_M 1
634 #define TDA9873_DK1 2
635 #define TDA9873_DK2 3
636 #define TDA9873_DK3 4
637 #define TDA9873_I 5
638
639 /* C7 controls identification response time (1=fast/0=normal)
640 */
641 #define TDA9873_IDR_NORM 0
642 #define TDA9873_IDR_FAST 1 << 7
643
644
645 /* Subaddress 0x02: Port data */
646
647 /* E1, E0 free programmable ports P1/P2
648 0, 0 both ports low
649 0, 1 P1 high
650 1, 0 P2 high
651 1, 1 both ports high
652 */
653
654 #define TDA9873_PORTS 3
655
656 /* E2: test port */
657 #define TDA9873_TST_PORT 1 << 2
658
659 /* E5..E3 control mono output channel (together with transmission mode bit B4)
660 *
661 * E5 E4 E3 B4 OUTM
662 * 0 0 0 0 mono
663 * 0 0 1 0 DUAL B
664 * 0 1 0 1 mono (from stereo decoder)
665 */
666 #define TDA9873_MOUT_MONO 0
667 #define TDA9873_MOUT_FMONO 0
668 #define TDA9873_MOUT_DUALA 0
669 #define TDA9873_MOUT_DUALB 1 << 3
670 #define TDA9873_MOUT_ST 1 << 4
671 #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
672 #define TDA9873_MOUT_EXTL 1 << 5
673 #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
674 #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
675 #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
676
677 /* Status bits: (chip read) */
678 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
679 #define TDA9873_STEREO 2 /* Stereo sound is identified */
680 #define TDA9873_DUAL 4 /* Dual sound is identified */
681
682 static int tda9873_getmode(struct CHIPSTATE *chip)
683 {
684 struct v4l2_subdev *sd = &chip->sd;
685 int val,mode;
686
687 val = chip_read(chip);
688 mode = V4L2_TUNER_MODE_MONO;
689 if (val & TDA9873_STEREO)
690 mode |= V4L2_TUNER_MODE_STEREO;
691 if (val & TDA9873_DUAL)
692 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
693 v4l2_dbg(1, debug, sd, "tda9873_getmode(): raw chip read: %d, return: %d\n",
694 val, mode);
695 return mode;
696 }
697
698 static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
699 {
700 struct v4l2_subdev *sd = &chip->sd;
701 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
702 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
703
704 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
705 v4l2_dbg(1, debug, sd, "tda9873_setmode(): external input\n");
706 return;
707 }
708
709 v4l2_dbg(1, debug, sd, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
710 v4l2_dbg(1, debug, sd, "tda9873_setmode(): sw_data = %d\n", sw_data);
711
712 switch (mode) {
713 case V4L2_TUNER_MODE_MONO:
714 sw_data |= TDA9873_TR_MONO;
715 break;
716 case V4L2_TUNER_MODE_STEREO:
717 sw_data |= TDA9873_TR_STEREO;
718 break;
719 case V4L2_TUNER_MODE_LANG1:
720 sw_data |= TDA9873_TR_DUALA;
721 break;
722 case V4L2_TUNER_MODE_LANG2:
723 sw_data |= TDA9873_TR_DUALB;
724 break;
725 default:
726 chip->mode = 0;
727 return;
728 }
729
730 chip_write(chip, TDA9873_SW, sw_data);
731 v4l2_dbg(1, debug, sd, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
732 mode, sw_data);
733 }
734
735 static int tda9873_checkit(struct CHIPSTATE *chip)
736 {
737 int rc;
738
739 if (-1 == (rc = chip_read2(chip,254)))
740 return 0;
741 return (rc & ~0x1f) == 0x80;
742 }
743
744
745 /* ---------------------------------------------------------------------- */
746 /* audio chip description - defines+functions for tda9874h and tda9874a */
747 /* Dariusz Kowalewski <darekk@automex.pl> */
748
749 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
750 #define TDA9874A_AGCGR 0x00 /* AGC gain */
751 #define TDA9874A_GCONR 0x01 /* general config */
752 #define TDA9874A_MSR 0x02 /* monitor select */
753 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
754 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
755 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
756 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
757 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
758 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
759 #define TDA9874A_DCR 0x09 /* demodulator config */
760 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
761 #define TDA9874A_FMMR 0x0b /* FM dematrix */
762 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
763 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
764 #define TDA9874A_NCONR 0x0e /* NICAM config */
765 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
766 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
767 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
768 #define TDA9874A_AMCONR 0x12 /* audio mute control */
769 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
770 #define TDA9874A_AOSR 0x14 /* analog output select */
771 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
772 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
773 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
774 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
775 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
776
777 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
778 #define TDA9874A_DSR 0x00 /* device status */
779 #define TDA9874A_NSR 0x01 /* NICAM status */
780 #define TDA9874A_NECR 0x02 /* NICAM error count */
781 #define TDA9874A_DR1 0x03 /* add. data LSB */
782 #define TDA9874A_DR2 0x04 /* add. data MSB */
783 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
784 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
785 #define TDA9874A_SIFLR 0x07 /* SIF level */
786 #define TDA9874A_TR2 252 /* test reg. 2 */
787 #define TDA9874A_TR1 253 /* test reg. 1 */
788 #define TDA9874A_DIC 254 /* device id. code */
789 #define TDA9874A_SIC 255 /* software id. code */
790
791
792 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
793 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
794 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
795 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
796 static int tda9874a_dic = -1; /* device id. code */
797
798 /* insmod options for tda9874a */
799 static unsigned int tda9874a_SIF = UNSET;
800 static unsigned int tda9874a_AMSEL = UNSET;
801 static unsigned int tda9874a_STD = UNSET;
802 module_param(tda9874a_SIF, int, 0444);
803 module_param(tda9874a_AMSEL, int, 0444);
804 module_param(tda9874a_STD, int, 0444);
805
806 /*
807 * initialization table for tda9874 decoder:
808 * - carrier 1 freq. registers (3 bytes)
809 * - carrier 2 freq. registers (3 bytes)
810 * - demudulator config register
811 * - FM de-emphasis register (slow identification mode)
812 * Note: frequency registers must be written in single i2c transfer.
813 */
814 static struct tda9874a_MODES {
815 char *name;
816 audiocmd cmd;
817 } tda9874a_modelist[9] = {
818 { "A2, B/G", /* default */
819 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
820 { "A2, M (Korea)",
821 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
822 { "A2, D/K (1)",
823 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
824 { "A2, D/K (2)",
825 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
826 { "A2, D/K (3)",
827 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
828 { "NICAM, I",
829 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
830 { "NICAM, B/G",
831 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
832 { "NICAM, D/K",
833 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
834 { "NICAM, L",
835 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
836 };
837
838 static int tda9874a_setup(struct CHIPSTATE *chip)
839 {
840 struct v4l2_subdev *sd = &chip->sd;
841
842 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
843 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
844 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
845 if(tda9874a_dic == 0x11) {
846 chip_write(chip, TDA9874A_FMMR, 0x80);
847 } else { /* dic == 0x07 */
848 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
849 chip_write(chip, TDA9874A_FMMR, 0x00);
850 }
851 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
852 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
853 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
854 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
855 /* Note: If signal quality is poor you may want to change NICAM */
856 /* error limit registers (NLELR and NUELR) to some greater values. */
857 /* Then the sound would remain stereo, but won't be so clear. */
858 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
859 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
860
861 if(tda9874a_dic == 0x11) {
862 chip_write(chip, TDA9874A_AMCONR, 0xf9);
863 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
864 chip_write(chip, TDA9874A_AOSR, 0x80);
865 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
866 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
867 } else { /* dic == 0x07 */
868 chip_write(chip, TDA9874A_AMCONR, 0xfb);
869 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
870 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
871 }
872 v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n",
873 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
874 return 1;
875 }
876
877 static int tda9874a_getmode(struct CHIPSTATE *chip)
878 {
879 struct v4l2_subdev *sd = &chip->sd;
880 int dsr,nsr,mode;
881 int necr; /* just for debugging */
882
883 mode = V4L2_TUNER_MODE_MONO;
884
885 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
886 return mode;
887 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
888 return mode;
889 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
890 return mode;
891
892 /* need to store dsr/nsr somewhere */
893 chip->shadow.bytes[MAXREGS-2] = dsr;
894 chip->shadow.bytes[MAXREGS-1] = nsr;
895
896 if(tda9874a_mode) {
897 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
898 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
899 * that sound has (temporarily) switched from NICAM to
900 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
901 * error count. So in fact there is no stereo in this case :-(
902 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
903 * external 4052 multiplexer in audio_hook().
904 */
905 if(nsr & 0x02) /* NSR.S/MB=1 */
906 mode |= V4L2_TUNER_MODE_STEREO;
907 if(nsr & 0x01) /* NSR.D/SB=1 */
908 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
909 } else {
910 if(dsr & 0x02) /* DSR.IDSTE=1 */
911 mode |= V4L2_TUNER_MODE_STEREO;
912 if(dsr & 0x04) /* DSR.IDDUA=1 */
913 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
914 }
915
916 v4l2_dbg(1, debug, sd, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
917 dsr, nsr, necr, mode);
918 return mode;
919 }
920
921 static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
922 {
923 struct v4l2_subdev *sd = &chip->sd;
924
925 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
926 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
927 if (tda9874a_mode) {
928 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
929 tda9874a_NCONR &= 0xfe; /* enable */
930 else
931 tda9874a_NCONR |= 0x01; /* disable */
932 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
933 }
934
935 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
936 * and has auto-select function for audio output (AOSR register).
937 * Old TDA9874H doesn't support these features.
938 * TDA9874A also has additional mono output pin (OUTM), which
939 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
940 */
941 if(tda9874a_dic == 0x11) {
942 int aosr = 0x80;
943 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
944
945 switch(mode) {
946 case V4L2_TUNER_MODE_MONO:
947 case V4L2_TUNER_MODE_STEREO:
948 break;
949 case V4L2_TUNER_MODE_LANG1:
950 aosr = 0x80; /* auto-select, dual A/A */
951 mdacosr = (tda9874a_mode) ? 0x82:0x80;
952 break;
953 case V4L2_TUNER_MODE_LANG2:
954 aosr = 0xa0; /* auto-select, dual B/B */
955 mdacosr = (tda9874a_mode) ? 0x83:0x81;
956 break;
957 default:
958 chip->mode = 0;
959 return;
960 }
961 chip_write(chip, TDA9874A_AOSR, aosr);
962 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
963
964 v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
965 mode, aosr, mdacosr);
966
967 } else { /* dic == 0x07 */
968 int fmmr,aosr;
969
970 switch(mode) {
971 case V4L2_TUNER_MODE_MONO:
972 fmmr = 0x00; /* mono */
973 aosr = 0x10; /* A/A */
974 break;
975 case V4L2_TUNER_MODE_STEREO:
976 if(tda9874a_mode) {
977 fmmr = 0x00;
978 aosr = 0x00; /* handled by NICAM auto-mute */
979 } else {
980 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
981 aosr = 0x00;
982 }
983 break;
984 case V4L2_TUNER_MODE_LANG1:
985 fmmr = 0x02; /* dual */
986 aosr = 0x10; /* dual A/A */
987 break;
988 case V4L2_TUNER_MODE_LANG2:
989 fmmr = 0x02; /* dual */
990 aosr = 0x20; /* dual B/B */
991 break;
992 default:
993 chip->mode = 0;
994 return;
995 }
996 chip_write(chip, TDA9874A_FMMR, fmmr);
997 chip_write(chip, TDA9874A_AOSR, aosr);
998
999 v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1000 mode, fmmr, aosr);
1001 }
1002 }
1003
1004 static int tda9874a_checkit(struct CHIPSTATE *chip)
1005 {
1006 struct v4l2_subdev *sd = &chip->sd;
1007 int dic,sic; /* device id. and software id. codes */
1008
1009 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
1010 return 0;
1011 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
1012 return 0;
1013
1014 v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1015
1016 if((dic == 0x11)||(dic == 0x07)) {
1017 v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h");
1018 tda9874a_dic = dic; /* remember device id. */
1019 return 1;
1020 }
1021 return 0; /* not found */
1022 }
1023
1024 static int tda9874a_initialize(struct CHIPSTATE *chip)
1025 {
1026 if (tda9874a_SIF > 2)
1027 tda9874a_SIF = 1;
1028 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1029 tda9874a_STD = 0;
1030 if(tda9874a_AMSEL > 1)
1031 tda9874a_AMSEL = 0;
1032
1033 if(tda9874a_SIF == 1)
1034 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
1035 else
1036 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
1037
1038 tda9874a_ESP = tda9874a_STD;
1039 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1040
1041 if(tda9874a_AMSEL == 0)
1042 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1043 else
1044 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1045
1046 tda9874a_setup(chip);
1047 return 0;
1048 }
1049
1050
1051 /* ---------------------------------------------------------------------- */
1052 /* audio chip descriptions - defines+functions for tea6420 */
1053
1054 #define TEA6300_VL 0x00 /* volume left */
1055 #define TEA6300_VR 0x01 /* volume right */
1056 #define TEA6300_BA 0x02 /* bass */
1057 #define TEA6300_TR 0x03 /* treble */
1058 #define TEA6300_FA 0x04 /* fader control */
1059 #define TEA6300_S 0x05 /* switch register */
1060 /* values for those registers: */
1061 #define TEA6300_S_SA 0x01 /* stereo A input */
1062 #define TEA6300_S_SB 0x02 /* stereo B */
1063 #define TEA6300_S_SC 0x04 /* stereo C */
1064 #define TEA6300_S_GMU 0x80 /* general mute */
1065
1066 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1067 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1068 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1069 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1070 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1071 #define TEA6320_BA 0x05 /* bass (0-4) */
1072 #define TEA6320_TR 0x06 /* treble (0-4) */
1073 #define TEA6320_S 0x07 /* switch register */
1074 /* values for those registers: */
1075 #define TEA6320_S_SA 0x07 /* stereo A input */
1076 #define TEA6320_S_SB 0x06 /* stereo B */
1077 #define TEA6320_S_SC 0x05 /* stereo C */
1078 #define TEA6320_S_SD 0x04 /* stereo D */
1079 #define TEA6320_S_GMU 0x80 /* general mute */
1080
1081 #define TEA6420_S_SA 0x00 /* stereo A input */
1082 #define TEA6420_S_SB 0x01 /* stereo B */
1083 #define TEA6420_S_SC 0x02 /* stereo C */
1084 #define TEA6420_S_SD 0x03 /* stereo D */
1085 #define TEA6420_S_SE 0x04 /* stereo E */
1086 #define TEA6420_S_GMU 0x05 /* general mute */
1087
1088 static int tea6300_shift10(int val) { return val >> 10; }
1089 static int tea6300_shift12(int val) { return val >> 12; }
1090
1091 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1092 /* 0x0c mirror those immediately higher) */
1093 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1094 static int tea6320_shift11(int val) { return val >> 11; }
1095 static int tea6320_initialize(struct CHIPSTATE * chip)
1096 {
1097 chip_write(chip, TEA6320_FFR, 0x3f);
1098 chip_write(chip, TEA6320_FFL, 0x3f);
1099 chip_write(chip, TEA6320_FRR, 0x3f);
1100 chip_write(chip, TEA6320_FRL, 0x3f);
1101
1102 return 0;
1103 }
1104
1105
1106 /* ---------------------------------------------------------------------- */
1107 /* audio chip descriptions - defines+functions for tda8425 */
1108
1109 #define TDA8425_VL 0x00 /* volume left */
1110 #define TDA8425_VR 0x01 /* volume right */
1111 #define TDA8425_BA 0x02 /* bass */
1112 #define TDA8425_TR 0x03 /* treble */
1113 #define TDA8425_S1 0x08 /* switch functions */
1114 /* values for those registers: */
1115 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1116 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1117 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1118 #define TDA8425_S1_MU 0x20 /* mute bit */
1119 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1120 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1121 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1122 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1123 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1124 #define TDA8425_S1_ML 0x06 /* language selector */
1125 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1126 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1127 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1128 #define TDA8425_S1_IS 0x01 /* channel selector */
1129
1130
1131 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1132 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1133
1134 static int tda8425_initialize(struct CHIPSTATE *chip)
1135 {
1136 struct CHIPDESC *desc = chip->desc;
1137 struct i2c_client *c = v4l2_get_subdevdata(&chip->sd);
1138 int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1139 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1140
1141 if (c->adapter->id == I2C_HW_B_RIVA)
1142 memcpy(desc->inputmap, inputmap, sizeof(inputmap));
1143 return 0;
1144 }
1145
1146 static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1147 {
1148 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1149
1150 if (mode & V4L2_TUNER_MODE_LANG1) {
1151 s1 |= TDA8425_S1_ML_SOUND_A;
1152 s1 |= TDA8425_S1_STEREO_PSEUDO;
1153
1154 } else if (mode & V4L2_TUNER_MODE_LANG2) {
1155 s1 |= TDA8425_S1_ML_SOUND_B;
1156 s1 |= TDA8425_S1_STEREO_PSEUDO;
1157
1158 } else {
1159 s1 |= TDA8425_S1_ML_STEREO;
1160
1161 if (mode & V4L2_TUNER_MODE_MONO)
1162 s1 |= TDA8425_S1_STEREO_MONO;
1163 if (mode & V4L2_TUNER_MODE_STEREO)
1164 s1 |= TDA8425_S1_STEREO_SPATIAL;
1165 }
1166 chip_write(chip,TDA8425_S1,s1);
1167 }
1168
1169
1170 /* ---------------------------------------------------------------------- */
1171 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1172
1173 /* the registers of 16C54, I2C sub address. */
1174 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1175 #define PIC16C54_REG_MISC 0x02
1176
1177 /* bit definition of the RESET register, I2C data. */
1178 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1179 /* code of remote controller */
1180 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1181 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1182 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1183 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1184 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1185 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1186 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1187
1188 /* ---------------------------------------------------------------------- */
1189 /* audio chip descriptions - defines+functions for TA8874Z */
1190
1191 /* write 1st byte */
1192 #define TA8874Z_LED_STE 0x80
1193 #define TA8874Z_LED_BIL 0x40
1194 #define TA8874Z_LED_EXT 0x20
1195 #define TA8874Z_MONO_SET 0x10
1196 #define TA8874Z_MUTE 0x08
1197 #define TA8874Z_F_MONO 0x04
1198 #define TA8874Z_MODE_SUB 0x02
1199 #define TA8874Z_MODE_MAIN 0x01
1200
1201 /* write 2nd byte */
1202 /*#define TA8874Z_TI 0x80 */ /* test mode */
1203 #define TA8874Z_SEPARATION 0x3f
1204 #define TA8874Z_SEPARATION_DEFAULT 0x10
1205
1206 /* read */
1207 #define TA8874Z_B1 0x80
1208 #define TA8874Z_B0 0x40
1209 #define TA8874Z_CHAG_FLAG 0x20
1210
1211 /*
1212 * B1 B0
1213 * mono L H
1214 * stereo L L
1215 * BIL H L
1216 */
1217 static int ta8874z_getmode(struct CHIPSTATE *chip)
1218 {
1219 int val, mode;
1220
1221 val = chip_read(chip);
1222 mode = V4L2_TUNER_MODE_MONO;
1223 if (val & TA8874Z_B1){
1224 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1225 }else if (!(val & TA8874Z_B0)){
1226 mode |= V4L2_TUNER_MODE_STEREO;
1227 }
1228 /* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1229 return mode;
1230 }
1231
1232 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1233 static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1234 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1235 static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1236
1237 static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1238 {
1239 struct v4l2_subdev *sd = &chip->sd;
1240 int update = 1;
1241 audiocmd *t = NULL;
1242
1243 v4l2_dbg(1, debug, sd, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1244
1245 switch(mode){
1246 case V4L2_TUNER_MODE_MONO:
1247 t = &ta8874z_mono;
1248 break;
1249 case V4L2_TUNER_MODE_STEREO:
1250 t = &ta8874z_stereo;
1251 break;
1252 case V4L2_TUNER_MODE_LANG1:
1253 t = &ta8874z_main;
1254 break;
1255 case V4L2_TUNER_MODE_LANG2:
1256 t = &ta8874z_sub;
1257 break;
1258 default:
1259 update = 0;
1260 }
1261
1262 if(update)
1263 chip_cmd(chip, "TA8874Z", t);
1264 }
1265
1266 static int ta8874z_checkit(struct CHIPSTATE *chip)
1267 {
1268 int rc;
1269 rc = chip_read(chip);
1270 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1271 }
1272
1273 /* ---------------------------------------------------------------------- */
1274 /* audio chip descriptions - struct CHIPDESC */
1275
1276 /* insmod options to enable/disable individual audio chips */
1277 static int tda8425 = 1;
1278 static int tda9840 = 1;
1279 static int tda9850 = 1;
1280 static int tda9855 = 1;
1281 static int tda9873 = 1;
1282 static int tda9874a = 1;
1283 static int tea6300; /* default 0 - address clash with msp34xx */
1284 static int tea6320; /* default 0 - address clash with msp34xx */
1285 static int tea6420 = 1;
1286 static int pic16c54 = 1;
1287 static int ta8874z; /* default 0 - address clash with tda9840 */
1288
1289 module_param(tda8425, int, 0444);
1290 module_param(tda9840, int, 0444);
1291 module_param(tda9850, int, 0444);
1292 module_param(tda9855, int, 0444);
1293 module_param(tda9873, int, 0444);
1294 module_param(tda9874a, int, 0444);
1295 module_param(tea6300, int, 0444);
1296 module_param(tea6320, int, 0444);
1297 module_param(tea6420, int, 0444);
1298 module_param(pic16c54, int, 0444);
1299 module_param(ta8874z, int, 0444);
1300
1301 static struct CHIPDESC chiplist[] = {
1302 {
1303 .name = "tda9840",
1304 .insmodopt = &tda9840,
1305 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1306 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1307 .registers = 5,
1308 .flags = CHIP_NEED_CHECKMODE,
1309
1310 /* callbacks */
1311 .checkit = tda9840_checkit,
1312 .getmode = tda9840_getmode,
1313 .setmode = tda9840_setmode,
1314
1315 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1316 /* ,TDA9840_SW, TDA9840_MONO */} }
1317 },
1318 {
1319 .name = "tda9873h",
1320 .insmodopt = &tda9873,
1321 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1322 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1323 .registers = 3,
1324 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1325
1326 /* callbacks */
1327 .checkit = tda9873_checkit,
1328 .getmode = tda9873_getmode,
1329 .setmode = tda9873_setmode,
1330
1331 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1332 .inputreg = TDA9873_SW,
1333 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1334 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1335 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1336
1337 },
1338 {
1339 .name = "tda9874h/a",
1340 .insmodopt = &tda9874a,
1341 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1342 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1343 .flags = CHIP_NEED_CHECKMODE,
1344
1345 /* callbacks */
1346 .initialize = tda9874a_initialize,
1347 .checkit = tda9874a_checkit,
1348 .getmode = tda9874a_getmode,
1349 .setmode = tda9874a_setmode,
1350 },
1351 {
1352 .name = "tda9850",
1353 .insmodopt = &tda9850,
1354 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1355 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1356 .registers = 11,
1357
1358 .getmode = tda985x_getmode,
1359 .setmode = tda985x_setmode,
1360
1361 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1362 },
1363 {
1364 .name = "tda9855",
1365 .insmodopt = &tda9855,
1366 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1367 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1368 .registers = 11,
1369 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1370
1371 .leftreg = TDA9855_VL,
1372 .rightreg = TDA9855_VR,
1373 .bassreg = TDA9855_BA,
1374 .treblereg = TDA9855_TR,
1375
1376 /* callbacks */
1377 .volfunc = tda9855_volume,
1378 .bassfunc = tda9855_bass,
1379 .treblefunc = tda9855_treble,
1380 .getmode = tda985x_getmode,
1381 .setmode = tda985x_setmode,
1382
1383 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1384 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1385 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1386 0x07, 0x10, 0x10, 0x03 }}
1387 },
1388 {
1389 .name = "tea6300",
1390 .insmodopt = &tea6300,
1391 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1392 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1393 .registers = 6,
1394 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1395
1396 .leftreg = TEA6300_VR,
1397 .rightreg = TEA6300_VL,
1398 .bassreg = TEA6300_BA,
1399 .treblereg = TEA6300_TR,
1400
1401 /* callbacks */
1402 .volfunc = tea6300_shift10,
1403 .bassfunc = tea6300_shift12,
1404 .treblefunc = tea6300_shift12,
1405
1406 .inputreg = TEA6300_S,
1407 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1408 .inputmute = TEA6300_S_GMU,
1409 },
1410 {
1411 .name = "tea6320",
1412 .insmodopt = &tea6320,
1413 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1414 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1415 .registers = 8,
1416 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1417
1418 .leftreg = TEA6320_V,
1419 .rightreg = TEA6320_V,
1420 .bassreg = TEA6320_BA,
1421 .treblereg = TEA6320_TR,
1422
1423 /* callbacks */
1424 .initialize = tea6320_initialize,
1425 .volfunc = tea6320_volume,
1426 .bassfunc = tea6320_shift11,
1427 .treblefunc = tea6320_shift11,
1428
1429 .inputreg = TEA6320_S,
1430 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1431 .inputmute = TEA6300_S_GMU,
1432 },
1433 {
1434 .name = "tea6420",
1435 .insmodopt = &tea6420,
1436 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1437 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1438 .registers = 1,
1439 .flags = CHIP_HAS_INPUTSEL,
1440
1441 .inputreg = -1,
1442 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1443 .inputmute = TEA6300_S_GMU,
1444 },
1445 {
1446 .name = "tda8425",
1447 .insmodopt = &tda8425,
1448 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1449 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1450 .registers = 9,
1451 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1452
1453 .leftreg = TDA8425_VL,
1454 .rightreg = TDA8425_VR,
1455 .bassreg = TDA8425_BA,
1456 .treblereg = TDA8425_TR,
1457
1458 /* callbacks */
1459 .initialize = tda8425_initialize,
1460 .volfunc = tda8425_shift10,
1461 .bassfunc = tda8425_shift12,
1462 .treblefunc = tda8425_shift12,
1463 .setmode = tda8425_setmode,
1464
1465 .inputreg = TDA8425_S1,
1466 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1467 .inputmute = TDA8425_S1_OFF,
1468
1469 },
1470 {
1471 .name = "pic16c54 (PV951)",
1472 .insmodopt = &pic16c54,
1473 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1474 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1475 .registers = 2,
1476 .flags = CHIP_HAS_INPUTSEL,
1477
1478 .inputreg = PIC16C54_REG_MISC,
1479 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1480 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1481 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1482 PIC16C54_MISC_SND_MUTE},
1483 .inputmute = PIC16C54_MISC_SND_MUTE,
1484 },
1485 {
1486 .name = "ta8874z",
1487 .checkit = ta8874z_checkit,
1488 .insmodopt = &ta8874z,
1489 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1490 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1491 .registers = 2,
1492 .flags = CHIP_NEED_CHECKMODE,
1493
1494 /* callbacks */
1495 .getmode = ta8874z_getmode,
1496 .setmode = ta8874z_setmode,
1497
1498 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1499 },
1500 { .name = NULL } /* EOF */
1501 };
1502
1503
1504 /* ---------------------------------------------------------------------- */
1505
1506 static int tvaudio_g_ctrl(struct v4l2_subdev *sd,
1507 struct v4l2_control *ctrl)
1508 {
1509 struct CHIPSTATE *chip = to_state(sd);
1510 struct CHIPDESC *desc = chip->desc;
1511
1512 switch (ctrl->id) {
1513 case V4L2_CID_AUDIO_MUTE:
1514 ctrl->value=chip->muted;
1515 return 0;
1516 case V4L2_CID_AUDIO_VOLUME:
1517 if (!(desc->flags & CHIP_HAS_VOLUME))
1518 break;
1519 ctrl->value = max(chip->left,chip->right);
1520 return 0;
1521 case V4L2_CID_AUDIO_BALANCE:
1522 {
1523 int volume;
1524 if (!(desc->flags & CHIP_HAS_VOLUME))
1525 break;
1526 volume = max(chip->left,chip->right);
1527 if (volume)
1528 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1529 else
1530 ctrl->value=32768;
1531 return 0;
1532 }
1533 case V4L2_CID_AUDIO_BASS:
1534 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1535 break;
1536 ctrl->value = chip->bass;
1537 return 0;
1538 case V4L2_CID_AUDIO_TREBLE:
1539 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1540 break;
1541 ctrl->value = chip->treble;
1542 return 0;
1543 }
1544 return -EINVAL;
1545 }
1546
1547 static int tvaudio_s_ctrl(struct v4l2_subdev *sd,
1548 struct v4l2_control *ctrl)
1549 {
1550 struct CHIPSTATE *chip = to_state(sd);
1551 struct CHIPDESC *desc = chip->desc;
1552
1553 switch (ctrl->id) {
1554 case V4L2_CID_AUDIO_MUTE:
1555 if (ctrl->value < 0 || ctrl->value >= 2)
1556 return -ERANGE;
1557 chip->muted = ctrl->value;
1558 if (chip->muted)
1559 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1560 else
1561 chip_write_masked(chip,desc->inputreg,
1562 desc->inputmap[chip->input],desc->inputmask);
1563 return 0;
1564 case V4L2_CID_AUDIO_VOLUME:
1565 {
1566 int volume,balance;
1567
1568 if (!(desc->flags & CHIP_HAS_VOLUME))
1569 break;
1570
1571 volume = max(chip->left,chip->right);
1572 if (volume)
1573 balance=(32768*min(chip->left,chip->right))/volume;
1574 else
1575 balance=32768;
1576
1577 volume=ctrl->value;
1578 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1579 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1580
1581 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1582 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1583
1584 return 0;
1585 }
1586 case V4L2_CID_AUDIO_BALANCE:
1587 {
1588 int volume, balance;
1589 if (!(desc->flags & CHIP_HAS_VOLUME))
1590 break;
1591
1592 volume = max(chip->left,chip->right);
1593 balance = ctrl->value;
1594
1595 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1596 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1597
1598 return 0;
1599 }
1600 case V4L2_CID_AUDIO_BASS:
1601 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1602 break;
1603 chip->bass = ctrl->value;
1604 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1605
1606 return 0;
1607 case V4L2_CID_AUDIO_TREBLE:
1608 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1609 break;
1610 chip->treble = ctrl->value;
1611 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1612
1613 return 0;
1614 }
1615 return -EINVAL;
1616 }
1617
1618
1619 /* ---------------------------------------------------------------------- */
1620 /* video4linux interface */
1621
1622 static int tvaudio_s_radio(struct v4l2_subdev *sd)
1623 {
1624 struct CHIPSTATE *chip = to_state(sd);
1625
1626 chip->radio = 1;
1627 chip->watch_stereo = 0;
1628 /* del_timer(&chip->wt); */
1629 return 0;
1630 }
1631
1632 static int tvaudio_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1633 {
1634 struct CHIPSTATE *chip = to_state(sd);
1635 struct CHIPDESC *desc = chip->desc;
1636
1637 switch (qc->id) {
1638 case V4L2_CID_AUDIO_MUTE:
1639 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
1640 case V4L2_CID_AUDIO_VOLUME:
1641 if (desc->flags & CHIP_HAS_VOLUME)
1642 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 58880);
1643 break;
1644 case V4L2_CID_AUDIO_BALANCE:
1645 if (desc->flags & CHIP_HAS_VOLUME)
1646 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1647 break;
1648 case V4L2_CID_AUDIO_BASS:
1649 case V4L2_CID_AUDIO_TREBLE:
1650 if (desc->flags & CHIP_HAS_BASSTREBLE)
1651 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1652 break;
1653 default:
1654 break;
1655 }
1656 return -EINVAL;
1657 }
1658
1659 static int tvaudio_s_routing(struct v4l2_subdev *sd, const struct v4l2_routing *rt)
1660 {
1661 struct CHIPSTATE *chip = to_state(sd);
1662 struct CHIPDESC *desc = chip->desc;
1663
1664 if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
1665 return -EINVAL;
1666 /* There are four inputs: tuner, radio, extern and intern. */
1667 chip->input = rt->input;
1668 if (chip->muted)
1669 return 0;
1670 chip_write_masked(chip, desc->inputreg,
1671 desc->inputmap[chip->input], desc->inputmask);
1672 return 0;
1673 }
1674
1675 static int tvaudio_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1676 {
1677 struct CHIPSTATE *chip = to_state(sd);
1678 struct CHIPDESC *desc = chip->desc;
1679 int mode = 0;
1680
1681 if (chip->radio)
1682 return 0;
1683 switch (vt->audmode) {
1684 case V4L2_TUNER_MODE_MONO:
1685 case V4L2_TUNER_MODE_STEREO:
1686 case V4L2_TUNER_MODE_LANG1:
1687 case V4L2_TUNER_MODE_LANG2:
1688 mode = vt->audmode;
1689 break;
1690 case V4L2_TUNER_MODE_LANG1_LANG2:
1691 mode = V4L2_TUNER_MODE_STEREO;
1692 break;
1693 default:
1694 return -EINVAL;
1695 }
1696 chip->audmode = vt->audmode;
1697
1698 if (desc->setmode && mode) {
1699 chip->watch_stereo = 0;
1700 /* del_timer(&chip->wt); */
1701 chip->mode = mode;
1702 desc->setmode(chip, mode);
1703 }
1704 return 0;
1705 }
1706
1707 static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1708 {
1709 struct CHIPSTATE *chip = to_state(sd);
1710 struct CHIPDESC *desc = chip->desc;
1711 int mode = V4L2_TUNER_MODE_MONO;
1712
1713 if (chip->radio)
1714 return 0;
1715 vt->audmode = chip->audmode;
1716 vt->rxsubchans = 0;
1717 vt->capability = V4L2_TUNER_CAP_STEREO |
1718 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1719
1720 if (desc->getmode)
1721 mode = desc->getmode(chip);
1722
1723 if (mode & V4L2_TUNER_MODE_MONO)
1724 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1725 if (mode & V4L2_TUNER_MODE_STEREO)
1726 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1727 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1728 When this module is converted fully to v4l2, then this
1729 should change for those chips that can detect SAP. */
1730 if (mode & V4L2_TUNER_MODE_LANG1)
1731 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1732 V4L2_TUNER_SUB_LANG2;
1733 return 0;
1734 }
1735
1736 static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1737 {
1738 struct CHIPSTATE *chip = to_state(sd);
1739
1740 chip->radio = 0;
1741 return 0;
1742 }
1743
1744 static int tvaudio_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1745 {
1746 struct CHIPSTATE *chip = to_state(sd);
1747 struct CHIPDESC *desc = chip->desc;
1748
1749 chip->mode = 0; /* automatic */
1750
1751 /* For chips that provide getmode and setmode, and doesn't
1752 automatically follows the stereo carrier, a kthread is
1753 created to set the audio standard. In this case, when then
1754 the video channel is changed, tvaudio starts on MONO mode.
1755 After waiting for 2 seconds, the kernel thread is called,
1756 to follow whatever audio standard is pointed by the
1757 audio carrier.
1758 */
1759 if (chip->thread) {
1760 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
1761 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1762 chip->prevmode = -1; /* reset previous mode */
1763 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1764 }
1765 return 0;
1766 }
1767
1768 static int tvaudio_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1769 {
1770 struct i2c_client *client = v4l2_get_subdevdata(sd);
1771
1772 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVAUDIO, 0);
1773 }
1774
1775 static int tvaudio_command(struct i2c_client *client, unsigned cmd, void *arg)
1776 {
1777 return v4l2_subdev_command(i2c_get_clientdata(client), cmd, arg);
1778 }
1779
1780 /* ----------------------------------------------------------------------- */
1781
1782 static const struct v4l2_subdev_core_ops tvaudio_core_ops = {
1783 .g_chip_ident = tvaudio_g_chip_ident,
1784 .queryctrl = tvaudio_queryctrl,
1785 .g_ctrl = tvaudio_g_ctrl,
1786 .s_ctrl = tvaudio_s_ctrl,
1787 };
1788
1789 static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = {
1790 .s_radio = tvaudio_s_radio,
1791 .s_frequency = tvaudio_s_frequency,
1792 .s_std = tvaudio_s_std,
1793 .s_tuner = tvaudio_s_tuner,
1794 .s_tuner = tvaudio_g_tuner,
1795 };
1796
1797 static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = {
1798 .s_routing = tvaudio_s_routing,
1799 };
1800
1801 static const struct v4l2_subdev_ops tvaudio_ops = {
1802 .core = &tvaudio_core_ops,
1803 .tuner = &tvaudio_tuner_ops,
1804 .audio = &tvaudio_audio_ops,
1805 };
1806
1807 /* ----------------------------------------------------------------------- */
1808
1809
1810 /* i2c registration */
1811
1812 static int tvaudio_probe(struct i2c_client *client, const struct i2c_device_id *id)
1813 {
1814 struct CHIPSTATE *chip;
1815 struct CHIPDESC *desc;
1816 struct v4l2_subdev *sd;
1817
1818 if (debug) {
1819 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1820 printk(KERN_INFO "tvaudio: known chips: ");
1821 for (desc = chiplist; desc->name != NULL; desc++)
1822 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1823 printk("\n");
1824 }
1825
1826 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1827 if (!chip)
1828 return -ENOMEM;
1829 sd = &chip->sd;
1830 v4l2_i2c_subdev_init(sd, client, &tvaudio_ops);
1831
1832 /* find description for the chip */
1833 v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1);
1834 for (desc = chiplist; desc->name != NULL; desc++) {
1835 if (0 == *(desc->insmodopt))
1836 continue;
1837 if (client->addr < desc->addr_lo ||
1838 client->addr > desc->addr_hi)
1839 continue;
1840 if (desc->checkit && !desc->checkit(chip))
1841 continue;
1842 break;
1843 }
1844 if (desc->name == NULL) {
1845 v4l2_dbg(1, debug, sd, "no matching chip description found\n");
1846 kfree(chip);
1847 return -EIO;
1848 }
1849 v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1850 if (desc->flags) {
1851 v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n",
1852 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1853 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1854 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1855 }
1856
1857 /* fill required data structures */
1858 if (!id)
1859 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1860 chip->desc = desc;
1861 chip->shadow.count = desc->registers+1;
1862 chip->prevmode = -1;
1863 chip->audmode = V4L2_TUNER_MODE_LANG1;
1864
1865 /* initialization */
1866 if (desc->initialize != NULL)
1867 desc->initialize(chip);
1868 else
1869 chip_cmd(chip, "init", &desc->init);
1870
1871 if (desc->flags & CHIP_HAS_VOLUME) {
1872 if (!desc->volfunc) {
1873 /* This shouldn't be happen. Warn user, but keep working
1874 without volume controls
1875 */
1876 v4l2_info(sd, "volume callback undefined!\n");
1877 desc->flags &= ~CHIP_HAS_VOLUME;
1878 } else {
1879 chip->left = desc->leftinit ? desc->leftinit : 65535;
1880 chip->right = desc->rightinit ? desc->rightinit : 65535;
1881 chip_write(chip, desc->leftreg,
1882 desc->volfunc(chip->left));
1883 chip_write(chip, desc->rightreg,
1884 desc->volfunc(chip->right));
1885 }
1886 }
1887 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1888 if (!desc->bassfunc || !desc->treblefunc) {
1889 /* This shouldn't be happen. Warn user, but keep working
1890 without bass/treble controls
1891 */
1892 v4l2_info(sd, "bass/treble callbacks undefined!\n");
1893 desc->flags &= ~CHIP_HAS_BASSTREBLE;
1894 } else {
1895 chip->treble = desc->trebleinit ?
1896 desc->trebleinit : 32768;
1897 chip->bass = desc->bassinit ?
1898 desc->bassinit : 32768;
1899 chip_write(chip, desc->bassreg,
1900 desc->bassfunc(chip->bass));
1901 chip_write(chip, desc->treblereg,
1902 desc->treblefunc(chip->treble));
1903 }
1904 }
1905
1906 chip->thread = NULL;
1907 if (desc->flags & CHIP_NEED_CHECKMODE) {
1908 if (!desc->getmode || !desc->setmode) {
1909 /* This shouldn't be happen. Warn user, but keep working
1910 without kthread
1911 */
1912 v4l2_info(sd, "set/get mode callbacks undefined!\n");
1913 return 0;
1914 }
1915 /* start async thread */
1916 init_timer(&chip->wt);
1917 chip->wt.function = chip_thread_wake;
1918 chip->wt.data = (unsigned long)chip;
1919 chip->thread = kthread_run(chip_thread, chip, client->name);
1920 if (IS_ERR(chip->thread)) {
1921 v4l2_warn(sd, "failed to create kthread\n");
1922 chip->thread = NULL;
1923 }
1924 }
1925 return 0;
1926 }
1927
1928 static int tvaudio_remove(struct i2c_client *client)
1929 {
1930 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1931 struct CHIPSTATE *chip = to_state(sd);
1932
1933 del_timer_sync(&chip->wt);
1934 if (chip->thread) {
1935 /* shutdown async thread */
1936 kthread_stop(chip->thread);
1937 chip->thread = NULL;
1938 }
1939
1940 v4l2_device_unregister_subdev(sd);
1941 kfree(chip);
1942 return 0;
1943 }
1944
1945 static int tvaudio_legacy_probe(struct i2c_adapter *adap)
1946 {
1947 /* don't attach on saa7146 based cards,
1948 because dedicated drivers are used */
1949 if ((adap->id == I2C_HW_SAA7146))
1950 return 0;
1951 if (adap->class & I2C_CLASS_TV_ANALOG)
1952 return 1;
1953 return 0;
1954 }
1955
1956 /* This driver supports many devices and the idea is to let the driver
1957 detect which device is present. So rather than listing all supported
1958 devices here, we pretend to support a single, fake device type. */
1959 static const struct i2c_device_id tvaudio_id[] = {
1960 { "tvaudio", 0 },
1961 { }
1962 };
1963 MODULE_DEVICE_TABLE(i2c, tvaudio_id);
1964
1965 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1966 .name = "tvaudio",
1967 .driverid = I2C_DRIVERID_TVAUDIO,
1968 .command = tvaudio_command,
1969 .probe = tvaudio_probe,
1970 .remove = tvaudio_remove,
1971 .legacy_probe = tvaudio_legacy_probe,
1972 .id_table = tvaudio_id,
1973 };
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