2 * linux/arch/x86-64/kernel/time.c
4 * "High Precision Event Timer" based timekeeping.
6 * Copyright (c) 1991,1992,1995 Linus Torvalds
7 * Copyright (c) 1994 Alan Modra
8 * Copyright (c) 1995 Markus Kuhn
9 * Copyright (c) 1996 Ingo Molnar
10 * Copyright (c) 1998 Andrea Arcangeli
11 * Copyright (c) 2002 Vojtech Pavlik
12 * Copyright (c) 2003 Andi Kleen
13 * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/interrupt.h>
19 #include <linux/init.h>
20 #include <linux/mc146818rtc.h>
21 #include <linux/time.h>
22 #include <linux/ioport.h>
23 #include <linux/module.h>
24 #include <linux/device.h>
25 #include <linux/sysdev.h>
26 #include <linux/bcd.h>
27 #include <linux/kallsyms.h>
28 #include <linux/acpi.h>
30 #include <acpi/achware.h> /* for PM timer frequency */
32 #include <asm/8253pit.h>
33 #include <asm/pgtable.h>
34 #include <asm/vsyscall.h>
35 #include <asm/timex.h>
36 #include <asm/proto.h>
38 #include <asm/sections.h>
39 #include <linux/cpufreq.h>
40 #include <linux/hpet.h>
41 #ifdef CONFIG_X86_LOCAL_APIC
45 #ifdef CONFIG_CPU_FREQ
46 static void cpufreq_delayed_get(void);
48 extern void i8254_timer_resume(void);
49 extern int using_apic_timer
;
51 static char *time_init_gtod(void);
53 DEFINE_SPINLOCK(rtc_lock
);
54 DEFINE_SPINLOCK(i8253_lock
);
56 int nohpet __initdata
= 0;
57 static int notsc __initdata
= 0;
59 #undef HPET_HACK_ENABLE_DANGEROUS
61 unsigned int cpu_khz
; /* TSC clocks / usec, not used here */
62 static unsigned long hpet_period
; /* fsecs / HPET clock */
63 unsigned long hpet_tick
; /* HPET clocks / interrupt */
64 int hpet_use_timer
; /* Use counter of hpet for time keeping, otherwise PIT */
65 unsigned long vxtime_hz
= PIT_TICK_RATE
;
66 int report_lost_ticks
; /* command line option */
67 unsigned long long monotonic_base
;
69 struct vxtime_data __vxtime __section_vxtime
; /* for vsyscalls */
71 volatile unsigned long __jiffies __section_jiffies
= INITIAL_JIFFIES
;
72 unsigned long __wall_jiffies __section_wall_jiffies
= INITIAL_JIFFIES
;
73 struct timespec __xtime __section_xtime
;
74 struct timezone __sys_tz __section_sys_tz
;
77 * do_gettimeoffset() returns microseconds since last timer interrupt was
78 * triggered by hardware. A memory read of HPET is slower than a register read
79 * of TSC, but much more reliable. It's also synchronized to the timer
80 * interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a
81 * timer interrupt has happened already, but vxtime.trigger wasn't updated yet.
82 * This is not a problem, because jiffies hasn't updated either. They are bound
83 * together by xtime_lock.
86 static inline unsigned int do_gettimeoffset_tsc(void)
90 t
= get_cycles_sync();
91 if (t
< vxtime
.last_tsc
)
92 t
= vxtime
.last_tsc
; /* hack */
93 x
= ((t
- vxtime
.last_tsc
) * vxtime
.tsc_quot
) >> 32;
97 static inline unsigned int do_gettimeoffset_hpet(void)
99 /* cap counter read to one tick to avoid inconsistencies */
100 unsigned long counter
= hpet_readl(HPET_COUNTER
) - vxtime
.last
;
101 return (min(counter
,hpet_tick
) * vxtime
.quot
) >> 32;
104 unsigned int (*do_gettimeoffset
)(void) = do_gettimeoffset_tsc
;
107 * This version of gettimeofday() has microsecond resolution and better than
108 * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
112 void do_gettimeofday(struct timeval
*tv
)
114 unsigned long seq
, t
;
115 unsigned int sec
, usec
;
118 seq
= read_seqbegin(&xtime_lock
);
121 usec
= xtime
.tv_nsec
/ 1000;
123 /* i386 does some correction here to keep the clock
124 monotonous even when ntpd is fixing drift.
125 But they didn't work for me, there is a non monotonic
126 clock anyways with ntp.
127 I dropped all corrections now until a real solution can
128 be found. Note when you fix it here you need to do the same
129 in arch/x86_64/kernel/vsyscall.c and export all needed
130 variables in vmlinux.lds. -AK */
132 t
= (jiffies
- wall_jiffies
) * (1000000L / HZ
) +
136 } while (read_seqretry(&xtime_lock
, seq
));
138 tv
->tv_sec
= sec
+ usec
/ 1000000;
139 tv
->tv_usec
= usec
% 1000000;
142 EXPORT_SYMBOL(do_gettimeofday
);
145 * settimeofday() first undoes the correction that gettimeofday would do
146 * on the time, and then saves it. This is ugly, but has been like this for
150 int do_settimeofday(struct timespec
*tv
)
152 time_t wtm_sec
, sec
= tv
->tv_sec
;
153 long wtm_nsec
, nsec
= tv
->tv_nsec
;
155 if ((unsigned long)tv
->tv_nsec
>= NSEC_PER_SEC
)
158 write_seqlock_irq(&xtime_lock
);
160 nsec
-= do_gettimeoffset() * 1000 +
161 (jiffies
- wall_jiffies
) * (NSEC_PER_SEC
/HZ
);
163 wtm_sec
= wall_to_monotonic
.tv_sec
+ (xtime
.tv_sec
- sec
);
164 wtm_nsec
= wall_to_monotonic
.tv_nsec
+ (xtime
.tv_nsec
- nsec
);
166 set_normalized_timespec(&xtime
, sec
, nsec
);
167 set_normalized_timespec(&wall_to_monotonic
, wtm_sec
, wtm_nsec
);
171 write_sequnlock_irq(&xtime_lock
);
176 EXPORT_SYMBOL(do_settimeofday
);
178 unsigned long profile_pc(struct pt_regs
*regs
)
180 unsigned long pc
= instruction_pointer(regs
);
182 /* Assume the lock function has either no stack frame or only a single
183 word. This checks if the address on the stack looks like a kernel
185 There is a small window for false hits, but in that case the tick
186 is just accounted to the spinlock function.
187 Better would be to write these functions in assembler again
188 and check exactly. */
189 if (in_lock_functions(pc
)) {
190 char *v
= *(char **)regs
->rsp
;
191 if ((v
>= _stext
&& v
<= _etext
) ||
192 (v
>= _sinittext
&& v
<= _einittext
) ||
193 (v
>= (char *)MODULES_VADDR
&& v
<= (char *)MODULES_END
))
194 return (unsigned long)v
;
195 return ((unsigned long *)regs
->rsp
)[1];
199 EXPORT_SYMBOL(profile_pc
);
202 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
203 * ms after the second nowtime has started, because when nowtime is written
204 * into the registers of the CMOS clock, it will jump to the next second
205 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
209 static void set_rtc_mmss(unsigned long nowtime
)
211 int real_seconds
, real_minutes
, cmos_minutes
;
212 unsigned char control
, freq_select
;
215 * IRQs are disabled when we're called from the timer interrupt,
216 * no need for spin_lock_irqsave()
219 spin_lock(&rtc_lock
);
222 * Tell the clock it's being set and stop it.
225 control
= CMOS_READ(RTC_CONTROL
);
226 CMOS_WRITE(control
| RTC_SET
, RTC_CONTROL
);
228 freq_select
= CMOS_READ(RTC_FREQ_SELECT
);
229 CMOS_WRITE(freq_select
| RTC_DIV_RESET2
, RTC_FREQ_SELECT
);
231 cmos_minutes
= CMOS_READ(RTC_MINUTES
);
232 BCD_TO_BIN(cmos_minutes
);
235 * since we're only adjusting minutes and seconds, don't interfere with hour
236 * overflow. This avoids messing with unknown time zones but requires your RTC
237 * not to be off by more than 15 minutes. Since we're calling it only when
238 * our clock is externally synchronized using NTP, this shouldn't be a problem.
241 real_seconds
= nowtime
% 60;
242 real_minutes
= nowtime
/ 60;
243 if (((abs(real_minutes
- cmos_minutes
) + 15) / 30) & 1)
244 real_minutes
+= 30; /* correct for half hour time zone */
248 /* AMD 8111 is a really bad time keeper and hits this regularly.
249 It probably was an attempt to avoid screwing up DST, but ignore
251 if (abs(real_minutes
- cmos_minutes
) >= 30) {
252 printk(KERN_WARNING
"time.c: can't update CMOS clock "
253 "from %d to %d\n", cmos_minutes
, real_minutes
);
258 BIN_TO_BCD(real_seconds
);
259 BIN_TO_BCD(real_minutes
);
260 CMOS_WRITE(real_seconds
, RTC_SECONDS
);
261 CMOS_WRITE(real_minutes
, RTC_MINUTES
);
265 * The following flags have to be released exactly in this order, otherwise the
266 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
267 * not reset the oscillator and will not update precisely 500 ms later. You
268 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
269 * believes data sheets anyway ... -- Markus Kuhn
272 CMOS_WRITE(control
, RTC_CONTROL
);
273 CMOS_WRITE(freq_select
, RTC_FREQ_SELECT
);
275 spin_unlock(&rtc_lock
);
279 /* monotonic_clock(): returns # of nanoseconds passed since time_init()
280 * Note: This function is required to return accurate
281 * time even in the absence of multiple timer ticks.
283 unsigned long long monotonic_clock(void)
286 u32 last_offset
, this_offset
, offset
;
287 unsigned long long base
;
289 if (vxtime
.mode
== VXTIME_HPET
) {
291 seq
= read_seqbegin(&xtime_lock
);
293 last_offset
= vxtime
.last
;
294 base
= monotonic_base
;
295 this_offset
= hpet_readl(HPET_COUNTER
);
296 } while (read_seqretry(&xtime_lock
, seq
));
297 offset
= (this_offset
- last_offset
);
298 offset
*= (NSEC_PER_SEC
/HZ
) / hpet_tick
;
301 seq
= read_seqbegin(&xtime_lock
);
303 last_offset
= vxtime
.last_tsc
;
304 base
= monotonic_base
;
305 } while (read_seqretry(&xtime_lock
, seq
));
306 this_offset
= get_cycles_sync();
307 offset
= (this_offset
- last_offset
)*1000 / cpu_khz
;
309 return base
+ offset
;
311 EXPORT_SYMBOL(monotonic_clock
);
313 static noinline
void handle_lost_ticks(int lost
, struct pt_regs
*regs
)
315 static long lost_count
;
317 if (report_lost_ticks
) {
318 printk(KERN_WARNING
"time.c: Lost %d timer tick(s)! ", lost
);
319 print_symbol("rip %s)\n", regs
->rip
);
322 if (lost_count
== 1000 && !warned
) {
323 printk(KERN_WARNING
"warning: many lost ticks.\n"
324 KERN_WARNING
"Your time source seems to be instable or "
325 "some driver is hogging interupts\n");
326 print_symbol("rip %s\n", regs
->rip
);
327 if (vxtime
.mode
== VXTIME_TSC
&& vxtime
.hpet_address
) {
328 printk(KERN_WARNING
"Falling back to HPET\n");
330 vxtime
.last
= hpet_readl(HPET_T0_CMP
) -
333 vxtime
.last
= hpet_readl(HPET_COUNTER
);
334 vxtime
.mode
= VXTIME_HPET
;
335 do_gettimeoffset
= do_gettimeoffset_hpet
;
337 /* else should fall back to PIT, but code missing. */
342 #ifdef CONFIG_CPU_FREQ
343 /* In some cases the CPU can change frequency without us noticing
344 Give cpufreq a change to catch up. */
345 if ((lost_count
+1) % 25 == 0)
346 cpufreq_delayed_get();
350 void main_timer_handler(struct pt_regs
*regs
)
352 static unsigned long rtc_update
= 0;
354 int delay
= 0, offset
= 0, lost
= 0;
357 * Here we are in the timer irq handler. We have irqs locally disabled (so we
358 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
359 * on the other CPU, so we need a lock. We also need to lock the vsyscall
360 * variables, because both do_timer() and us change them -arca+vojtech
363 write_seqlock(&xtime_lock
);
365 if (vxtime
.hpet_address
)
366 offset
= hpet_readl(HPET_COUNTER
);
368 if (hpet_use_timer
) {
369 /* if we're using the hpet timer functionality,
370 * we can more accurately know the counter value
371 * when the timer interrupt occured.
373 offset
= hpet_readl(HPET_T0_CMP
) - hpet_tick
;
374 delay
= hpet_readl(HPET_COUNTER
) - offset
;
375 } else if (!pmtmr_ioport
) {
376 spin_lock(&i8253_lock
);
379 delay
|= inb(0x40) << 8;
380 spin_unlock(&i8253_lock
);
381 delay
= LATCH
- 1 - delay
;
384 tsc
= get_cycles_sync();
386 if (vxtime
.mode
== VXTIME_HPET
) {
387 if (offset
- vxtime
.last
> hpet_tick
) {
388 lost
= (offset
- vxtime
.last
) / hpet_tick
- 1;
392 (offset
- vxtime
.last
)*(NSEC_PER_SEC
/HZ
) / hpet_tick
;
394 vxtime
.last
= offset
;
395 #ifdef CONFIG_X86_PM_TIMER
396 } else if (vxtime
.mode
== VXTIME_PMTMR
) {
397 lost
= pmtimer_mark_offset();
400 offset
= (((tsc
- vxtime
.last_tsc
) *
401 vxtime
.tsc_quot
) >> 32) - (USEC_PER_SEC
/ HZ
);
406 if (offset
> (USEC_PER_SEC
/ HZ
)) {
407 lost
= offset
/ (USEC_PER_SEC
/ HZ
);
408 offset
%= (USEC_PER_SEC
/ HZ
);
411 monotonic_base
+= (tsc
- vxtime
.last_tsc
)*1000000/cpu_khz
;
413 vxtime
.last_tsc
= tsc
- vxtime
.quot
* delay
/ vxtime
.tsc_quot
;
415 if ((((tsc
- vxtime
.last_tsc
) *
416 vxtime
.tsc_quot
) >> 32) < offset
)
417 vxtime
.last_tsc
= tsc
-
418 (((long) offset
<< 32) / vxtime
.tsc_quot
) - 1;
422 handle_lost_ticks(lost
, regs
);
427 * Do the timer stuff.
432 update_process_times(user_mode(regs
));
436 * In the SMP case we use the local APIC timer interrupt to do the profiling,
437 * except when we simulate SMP mode on a uniprocessor system, in that case we
438 * have to call the local interrupt handler.
441 #ifndef CONFIG_X86_LOCAL_APIC
442 profile_tick(CPU_PROFILING
, regs
);
444 if (!using_apic_timer
)
445 smp_local_timer_interrupt(regs
);
449 * If we have an externally synchronized Linux clock, then update CMOS clock
450 * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
451 * closest to exactly 500 ms before the next second. If the update fails, we
452 * don't care, as it'll be updated on the next turn, and the problem (time way
453 * off) isn't likely to go away much sooner anyway.
456 if (ntp_synced() && xtime
.tv_sec
> rtc_update
&&
457 abs(xtime
.tv_nsec
- 500000000) <= tick_nsec
/ 2) {
458 set_rtc_mmss(xtime
.tv_sec
);
459 rtc_update
= xtime
.tv_sec
+ 660;
462 write_sequnlock(&xtime_lock
);
465 static irqreturn_t
timer_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
467 if (apic_runs_main_timer
> 1)
469 main_timer_handler(regs
);
470 #ifdef CONFIG_X86_LOCAL_APIC
471 if (using_apic_timer
)
472 smp_send_timer_broadcast_ipi();
477 static unsigned int cyc2ns_scale __read_mostly
;
478 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
480 static inline void set_cyc2ns_scale(unsigned long cpu_khz
)
482 cyc2ns_scale
= (1000000 << CYC2NS_SCALE_FACTOR
)/cpu_khz
;
485 static inline unsigned long long cycles_2_ns(unsigned long long cyc
)
487 return (cyc
* cyc2ns_scale
) >> CYC2NS_SCALE_FACTOR
;
490 unsigned long long sched_clock(void)
495 /* Don't do a HPET read here. Using TSC always is much faster
496 and HPET may not be mapped yet when the scheduler first runs.
497 Disadvantage is a small drift between CPUs in some configurations,
498 but that should be tolerable. */
499 if (__vxtime
.mode
== VXTIME_HPET
)
500 return (hpet_readl(HPET_COUNTER
) * vxtime
.quot
) >> 32;
503 /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
504 which means it is not completely exact and may not be monotonous between
505 CPUs. But the errors should be too small to matter for scheduling
509 return cycles_2_ns(a
);
512 static unsigned long get_cmos_time(void)
514 unsigned int timeout
= 1000000, year
, mon
, day
, hour
, min
, sec
;
515 unsigned char uip
= 0, this = 0;
517 unsigned extyear
= 0;
520 * The Linux interpretation of the CMOS clock register contents: When the
521 * Update-In-Progress (UIP) flag goes from 1 to 0, the RTC registers show the
522 * second which has precisely just started. Waiting for this can take up to 1
523 * second, we timeout approximately after 2.4 seconds on a machine with
524 * standard 8.3 MHz ISA bus.
527 spin_lock_irqsave(&rtc_lock
, flags
);
529 while (timeout
&& (!uip
|| this)) {
531 this = CMOS_READ(RTC_FREQ_SELECT
) & RTC_UIP
;
536 * Here we are safe to assume the registers won't change for a whole
537 * second, so we just go ahead and read them.
539 sec
= CMOS_READ(RTC_SECONDS
);
540 min
= CMOS_READ(RTC_MINUTES
);
541 hour
= CMOS_READ(RTC_HOURS
);
542 day
= CMOS_READ(RTC_DAY_OF_MONTH
);
543 mon
= CMOS_READ(RTC_MONTH
);
544 year
= CMOS_READ(RTC_YEAR
);
547 if (acpi_fadt
.revision
>= FADT2_REVISION_ID
&& acpi_fadt
.century
)
548 extyear
= CMOS_READ(acpi_fadt
.century
);
551 spin_unlock_irqrestore(&rtc_lock
, flags
);
554 * We know that x86-64 always uses BCD format, no need to check the
568 printk(KERN_INFO
"Extended CMOS year: %d\n", extyear
);
571 * x86-64 systems only exists since 2002.
572 * This will work up to Dec 31, 2100
577 return mktime(year
, mon
, day
, hour
, min
, sec
);
580 #ifdef CONFIG_CPU_FREQ
582 /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
585 RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
586 not that important because current Opteron setups do not support
587 scaling on SMP anyroads.
589 Should fix up last_tsc too. Currently gettimeofday in the
590 first tick after the change will be slightly wrong. */
592 #include <linux/workqueue.h>
594 static unsigned int cpufreq_delayed_issched
= 0;
595 static unsigned int cpufreq_init
= 0;
596 static struct work_struct cpufreq_delayed_get_work
;
598 static void handle_cpufreq_delayed_get(void *v
)
601 for_each_online_cpu(cpu
) {
604 cpufreq_delayed_issched
= 0;
607 /* if we notice lost ticks, schedule a call to cpufreq_get() as it tries
608 * to verify the CPU frequency the timing core thinks the CPU is running
609 * at is still correct.
611 static void cpufreq_delayed_get(void)
614 if (cpufreq_init
&& !cpufreq_delayed_issched
) {
615 cpufreq_delayed_issched
= 1;
619 "Losing some ticks... checking if CPU frequency changed.\n");
621 schedule_work(&cpufreq_delayed_get_work
);
625 static unsigned int ref_freq
= 0;
626 static unsigned long loops_per_jiffy_ref
= 0;
628 static unsigned long cpu_khz_ref
= 0;
630 static int time_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
633 struct cpufreq_freqs
*freq
= data
;
634 unsigned long *lpj
, dummy
;
636 if (cpu_has(&cpu_data
[freq
->cpu
], X86_FEATURE_CONSTANT_TSC
))
640 if (!(freq
->flags
& CPUFREQ_CONST_LOOPS
))
642 lpj
= &cpu_data
[freq
->cpu
].loops_per_jiffy
;
644 lpj
= &boot_cpu_data
.loops_per_jiffy
;
648 ref_freq
= freq
->old
;
649 loops_per_jiffy_ref
= *lpj
;
650 cpu_khz_ref
= cpu_khz
;
652 if ((val
== CPUFREQ_PRECHANGE
&& freq
->old
< freq
->new) ||
653 (val
== CPUFREQ_POSTCHANGE
&& freq
->old
> freq
->new) ||
654 (val
== CPUFREQ_RESUMECHANGE
)) {
656 cpufreq_scale(loops_per_jiffy_ref
, ref_freq
, freq
->new);
658 cpu_khz
= cpufreq_scale(cpu_khz_ref
, ref_freq
, freq
->new);
659 if (!(freq
->flags
& CPUFREQ_CONST_LOOPS
))
660 vxtime
.tsc_quot
= (1000L << 32) / cpu_khz
;
663 set_cyc2ns_scale(cpu_khz_ref
);
668 static struct notifier_block time_cpufreq_notifier_block
= {
669 .notifier_call
= time_cpufreq_notifier
672 static int __init
cpufreq_tsc(void)
674 INIT_WORK(&cpufreq_delayed_get_work
, handle_cpufreq_delayed_get
, NULL
);
675 if (!cpufreq_register_notifier(&time_cpufreq_notifier_block
,
676 CPUFREQ_TRANSITION_NOTIFIER
))
681 core_initcall(cpufreq_tsc
);
686 * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
687 * it to the HPET timer of known frequency.
690 #define TICK_COUNT 100000000
692 static unsigned int __init
hpet_calibrate_tsc(void)
694 int tsc_start
, hpet_start
;
695 int tsc_now
, hpet_now
;
698 local_irq_save(flags
);
701 hpet_start
= hpet_readl(HPET_COUNTER
);
706 hpet_now
= hpet_readl(HPET_COUNTER
);
707 tsc_now
= get_cycles_sync();
708 local_irq_restore(flags
);
709 } while ((tsc_now
- tsc_start
) < TICK_COUNT
&&
710 (hpet_now
- hpet_start
) < TICK_COUNT
);
712 return (tsc_now
- tsc_start
) * 1000000000L
713 / ((hpet_now
- hpet_start
) * hpet_period
/ 1000);
718 * pit_calibrate_tsc() uses the speaker output (channel 2) of
719 * the PIT. This is better than using the timer interrupt output,
720 * because we can read the value of the speaker with just one inb(),
721 * where we need three i/o operations for the interrupt channel.
722 * We count how many ticks the TSC does in 50 ms.
725 static unsigned int __init
pit_calibrate_tsc(void)
727 unsigned long start
, end
;
730 spin_lock_irqsave(&i8253_lock
, flags
);
732 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
735 outb((PIT_TICK_RATE
/ (1000 / 50)) & 0xff, 0x42);
736 outb((PIT_TICK_RATE
/ (1000 / 50)) >> 8, 0x42);
737 start
= get_cycles_sync();
738 while ((inb(0x61) & 0x20) == 0);
739 end
= get_cycles_sync();
741 spin_unlock_irqrestore(&i8253_lock
, flags
);
743 return (end
- start
) / 50;
747 static __init
int late_hpet_init(void)
752 if (!vxtime
.hpet_address
)
755 memset(&hd
, 0, sizeof (hd
));
757 ntimer
= hpet_readl(HPET_ID
);
758 ntimer
= (ntimer
& HPET_ID_NUMBER
) >> HPET_ID_NUMBER_SHIFT
;
762 * Register with driver.
763 * Timer0 and Timer1 is used by platform.
765 hd
.hd_phys_address
= vxtime
.hpet_address
;
766 hd
.hd_address
= (void __iomem
*)fix_to_virt(FIX_HPET_BASE
);
767 hd
.hd_nirqs
= ntimer
;
768 hd
.hd_flags
= HPET_DATA_PLATFORM
;
769 hpet_reserve_timer(&hd
, 0);
770 #ifdef CONFIG_HPET_EMULATE_RTC
771 hpet_reserve_timer(&hd
, 1);
773 hd
.hd_irq
[0] = HPET_LEGACY_8254
;
774 hd
.hd_irq
[1] = HPET_LEGACY_RTC
;
777 struct hpet_timer
*timer
;
780 hpet
= (struct hpet
*) fix_to_virt(FIX_HPET_BASE
);
781 timer
= &hpet
->hpet_timers
[2];
782 for (i
= 2; i
< ntimer
; timer
++, i
++)
783 hd
.hd_irq
[i
] = (timer
->hpet_config
&
784 Tn_INT_ROUTE_CNF_MASK
) >>
785 Tn_INT_ROUTE_CNF_SHIFT
;
792 fs_initcall(late_hpet_init
);
795 static int hpet_timer_stop_set_go(unsigned long tick
)
800 * Stop the timers and reset the main counter.
803 cfg
= hpet_readl(HPET_CFG
);
804 cfg
&= ~(HPET_CFG_ENABLE
| HPET_CFG_LEGACY
);
805 hpet_writel(cfg
, HPET_CFG
);
806 hpet_writel(0, HPET_COUNTER
);
807 hpet_writel(0, HPET_COUNTER
+ 4);
810 * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
811 * and period also hpet_tick.
813 if (hpet_use_timer
) {
814 hpet_writel(HPET_TN_ENABLE
| HPET_TN_PERIODIC
| HPET_TN_SETVAL
|
815 HPET_TN_32BIT
, HPET_T0_CFG
);
816 hpet_writel(hpet_tick
, HPET_T0_CMP
);
817 hpet_writel(hpet_tick
, HPET_T0_CMP
); /* AK: why twice? */
818 cfg
|= HPET_CFG_LEGACY
;
824 cfg
|= HPET_CFG_ENABLE
;
825 hpet_writel(cfg
, HPET_CFG
);
830 static int hpet_init(void)
834 if (!vxtime
.hpet_address
)
836 set_fixmap_nocache(FIX_HPET_BASE
, vxtime
.hpet_address
);
837 __set_fixmap(VSYSCALL_HPET
, vxtime
.hpet_address
, PAGE_KERNEL_VSYSCALL_NOCACHE
);
840 * Read the period, compute tick and quotient.
843 id
= hpet_readl(HPET_ID
);
845 if (!(id
& HPET_ID_VENDOR
) || !(id
& HPET_ID_NUMBER
))
848 hpet_period
= hpet_readl(HPET_PERIOD
);
849 if (hpet_period
< 100000 || hpet_period
> 100000000)
852 hpet_tick
= (1000000000L * (USEC_PER_SEC
/ HZ
) + hpet_period
/ 2) /
855 hpet_use_timer
= (id
& HPET_ID_LEGSUP
);
857 return hpet_timer_stop_set_go(hpet_tick
);
860 static int hpet_reenable(void)
862 return hpet_timer_stop_set_go(hpet_tick
);
865 #define PIT_MODE 0x43
868 static void __init
__pit_init(int val
, u8 mode
)
872 spin_lock_irqsave(&i8253_lock
, flags
);
873 outb_p(mode
, PIT_MODE
);
874 outb_p(val
& 0xff, PIT_CH0
); /* LSB */
875 outb_p(val
>> 8, PIT_CH0
); /* MSB */
876 spin_unlock_irqrestore(&i8253_lock
, flags
);
879 void __init
pit_init(void)
881 __pit_init(LATCH
, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
884 void __init
pit_stop_interrupt(void)
886 __pit_init(0, 0x30); /* mode 0 */
889 void __init
stop_timer_interrupt(void)
892 if (vxtime
.hpet_address
) {
894 hpet_timer_stop_set_go(0);
897 pit_stop_interrupt();
899 printk(KERN_INFO
"timer: %s interrupt stopped.\n", name
);
902 int __init
time_setup(char *str
)
904 report_lost_ticks
= 1;
908 static struct irqaction irq0
= {
909 timer_interrupt
, SA_INTERRUPT
, CPU_MASK_NONE
, "timer", NULL
, NULL
912 void __init
time_init(void)
917 #ifdef HPET_HACK_ENABLE_DANGEROUS
918 if (!vxtime
.hpet_address
) {
919 printk(KERN_WARNING
"time.c: WARNING: Enabling HPET base "
921 outl(0x800038a0, 0xcf8);
922 outl(0xff000001, 0xcfc);
923 outl(0x800038a0, 0xcf8);
924 vxtime
.hpet_address
= inl(0xcfc) & 0xfffffffe;
925 printk(KERN_WARNING
"time.c: WARNING: Enabled HPET "
926 "at %#lx.\n", vxtime
.hpet_address
);
930 vxtime
.hpet_address
= 0;
932 xtime
.tv_sec
= get_cmos_time();
935 set_normalized_timespec(&wall_to_monotonic
,
936 -xtime
.tv_sec
, -xtime
.tv_nsec
);
939 vxtime_hz
= (1000000000000000L + hpet_period
/ 2) / hpet_period
;
941 vxtime
.hpet_address
= 0;
943 if (hpet_use_timer
) {
944 cpu_khz
= hpet_calibrate_tsc();
946 #ifdef CONFIG_X86_PM_TIMER
947 } else if (pmtmr_ioport
&& !vxtime
.hpet_address
) {
948 vxtime_hz
= PM_TIMER_FREQUENCY
;
951 cpu_khz
= pit_calibrate_tsc();
955 cpu_khz
= pit_calibrate_tsc();
959 vxtime
.mode
= VXTIME_TSC
;
960 gtod
= time_init_gtod();
962 printk(KERN_INFO
"time.c: Using %ld.%06ld MHz WALL %s GTOD %s timer.\n",
963 vxtime_hz
/ 1000000, vxtime_hz
% 1000000, timename
, gtod
);
964 printk(KERN_INFO
"time.c: Detected %d.%03d MHz processor.\n",
965 cpu_khz
/ 1000, cpu_khz
% 1000);
966 vxtime
.quot
= (1000000L << 32) / vxtime_hz
;
967 vxtime
.tsc_quot
= (1000L << 32) / cpu_khz
;
968 vxtime
.last_tsc
= get_cycles_sync();
971 set_cyc2ns_scale(cpu_khz
);
975 * Make an educated guess if the TSC is trustworthy and synchronized
978 __cpuinit
int unsynchronized_tsc(void)
981 if (oem_force_hpet_timer())
983 /* Intel systems are normally all synchronized. Exceptions
984 are handled in the OEM check above. */
985 if (boot_cpu_data
.x86_vendor
== X86_VENDOR_INTEL
)
988 /* Assume multi socket systems are not synchronized */
989 return num_present_cpus() > 1;
993 * Decide what mode gettimeofday should use.
995 __init
static char *time_init_gtod(void)
999 if (unsynchronized_tsc())
1001 if (vxtime
.hpet_address
&& notsc
) {
1002 timetype
= hpet_use_timer
? "HPET" : "PIT/HPET";
1004 vxtime
.last
= hpet_readl(HPET_T0_CMP
) - hpet_tick
;
1006 vxtime
.last
= hpet_readl(HPET_COUNTER
);
1007 vxtime
.mode
= VXTIME_HPET
;
1008 do_gettimeoffset
= do_gettimeoffset_hpet
;
1009 #ifdef CONFIG_X86_PM_TIMER
1010 /* Using PM for gettimeofday is quite slow, but we have no other
1011 choice because the TSC is too unreliable on some systems. */
1012 } else if (pmtmr_ioport
&& !vxtime
.hpet_address
&& notsc
) {
1014 do_gettimeoffset
= do_gettimeoffset_pm
;
1015 vxtime
.mode
= VXTIME_PMTMR
;
1016 sysctl_vsyscall
= 0;
1017 printk(KERN_INFO
"Disabling vsyscall due to use of PM timer\n");
1020 timetype
= hpet_use_timer
? "HPET/TSC" : "PIT/TSC";
1021 vxtime
.mode
= VXTIME_TSC
;
1026 __setup("report_lost_ticks", time_setup
);
1028 static long clock_cmos_diff
;
1029 static unsigned long sleep_start
;
1032 * sysfs support for the timer.
1035 static int timer_suspend(struct sys_device
*dev
, pm_message_t state
)
1038 * Estimate time zone so that set_time can update the clock
1040 long cmos_time
= get_cmos_time();
1042 clock_cmos_diff
= -cmos_time
;
1043 clock_cmos_diff
+= get_seconds();
1044 sleep_start
= cmos_time
;
1048 static int timer_resume(struct sys_device
*dev
)
1050 unsigned long flags
;
1052 unsigned long ctime
= get_cmos_time();
1053 unsigned long sleep_length
= (ctime
- sleep_start
) * HZ
;
1055 if (vxtime
.hpet_address
)
1058 i8254_timer_resume();
1060 sec
= ctime
+ clock_cmos_diff
;
1061 write_seqlock_irqsave(&xtime_lock
,flags
);
1064 if (vxtime
.mode
== VXTIME_HPET
) {
1066 vxtime
.last
= hpet_readl(HPET_T0_CMP
) - hpet_tick
;
1068 vxtime
.last
= hpet_readl(HPET_COUNTER
);
1069 #ifdef CONFIG_X86_PM_TIMER
1070 } else if (vxtime
.mode
== VXTIME_PMTMR
) {
1074 vxtime
.last_tsc
= get_cycles_sync();
1075 write_sequnlock_irqrestore(&xtime_lock
,flags
);
1076 jiffies
+= sleep_length
;
1077 wall_jiffies
+= sleep_length
;
1078 monotonic_base
+= sleep_length
* (NSEC_PER_SEC
/HZ
);
1079 touch_softlockup_watchdog();
1083 static struct sysdev_class timer_sysclass
= {
1084 .resume
= timer_resume
,
1085 .suspend
= timer_suspend
,
1086 set_kset_name("timer"),
1089 /* XXX this driverfs stuff should probably go elsewhere later -john */
1090 static struct sys_device device_timer
= {
1092 .cls
= &timer_sysclass
,
1095 static int time_init_device(void)
1097 int error
= sysdev_class_register(&timer_sysclass
);
1099 error
= sysdev_register(&device_timer
);
1103 device_initcall(time_init_device
);
1105 #ifdef CONFIG_HPET_EMULATE_RTC
1106 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
1107 * is enabled, we support RTC interrupt functionality in software.
1108 * RTC has 3 kinds of interrupts:
1109 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
1111 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
1112 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
1113 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
1114 * (1) and (2) above are implemented using polling at a frequency of
1115 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
1116 * overhead. (DEFAULT_RTC_INT_FREQ)
1117 * For (3), we use interrupts at 64Hz or user specified periodic
1118 * frequency, whichever is higher.
1120 #include <linux/rtc.h>
1122 #define DEFAULT_RTC_INT_FREQ 64
1123 #define RTC_NUM_INTS 1
1125 static unsigned long UIE_on
;
1126 static unsigned long prev_update_sec
;
1128 static unsigned long AIE_on
;
1129 static struct rtc_time alarm_time
;
1131 static unsigned long PIE_on
;
1132 static unsigned long PIE_freq
= DEFAULT_RTC_INT_FREQ
;
1133 static unsigned long PIE_count
;
1135 static unsigned long hpet_rtc_int_freq
; /* RTC interrupt frequency */
1136 static unsigned int hpet_t1_cmp
; /* cached comparator register */
1138 int is_hpet_enabled(void)
1140 return vxtime
.hpet_address
!= 0;
1144 * Timer 1 for RTC, we do not use periodic interrupt feature,
1145 * even if HPET supports periodic interrupts on Timer 1.
1146 * The reason being, to set up a periodic interrupt in HPET, we need to
1147 * stop the main counter. And if we do that everytime someone diables/enables
1148 * RTC, we will have adverse effect on main kernel timer running on Timer 0.
1149 * So, for the time being, simulate the periodic interrupt in software.
1151 * hpet_rtc_timer_init() is called for the first time and during subsequent
1152 * interuppts reinit happens through hpet_rtc_timer_reinit().
1154 int hpet_rtc_timer_init(void)
1156 unsigned int cfg
, cnt
;
1157 unsigned long flags
;
1159 if (!is_hpet_enabled())
1162 * Set the counter 1 and enable the interrupts.
1164 if (PIE_on
&& (PIE_freq
> DEFAULT_RTC_INT_FREQ
))
1165 hpet_rtc_int_freq
= PIE_freq
;
1167 hpet_rtc_int_freq
= DEFAULT_RTC_INT_FREQ
;
1169 local_irq_save(flags
);
1170 cnt
= hpet_readl(HPET_COUNTER
);
1171 cnt
+= ((hpet_tick
*HZ
)/hpet_rtc_int_freq
);
1172 hpet_writel(cnt
, HPET_T1_CMP
);
1174 local_irq_restore(flags
);
1176 cfg
= hpet_readl(HPET_T1_CFG
);
1177 cfg
&= ~HPET_TN_PERIODIC
;
1178 cfg
|= HPET_TN_ENABLE
| HPET_TN_32BIT
;
1179 hpet_writel(cfg
, HPET_T1_CFG
);
1184 static void hpet_rtc_timer_reinit(void)
1186 unsigned int cfg
, cnt
;
1188 if (unlikely(!(PIE_on
| AIE_on
| UIE_on
))) {
1189 cfg
= hpet_readl(HPET_T1_CFG
);
1190 cfg
&= ~HPET_TN_ENABLE
;
1191 hpet_writel(cfg
, HPET_T1_CFG
);
1195 if (PIE_on
&& (PIE_freq
> DEFAULT_RTC_INT_FREQ
))
1196 hpet_rtc_int_freq
= PIE_freq
;
1198 hpet_rtc_int_freq
= DEFAULT_RTC_INT_FREQ
;
1200 /* It is more accurate to use the comparator value than current count.*/
1202 cnt
+= hpet_tick
*HZ
/hpet_rtc_int_freq
;
1203 hpet_writel(cnt
, HPET_T1_CMP
);
1208 * The functions below are called from rtc driver.
1209 * Return 0 if HPET is not being used.
1210 * Otherwise do the necessary changes and return 1.
1212 int hpet_mask_rtc_irq_bit(unsigned long bit_mask
)
1214 if (!is_hpet_enabled())
1217 if (bit_mask
& RTC_UIE
)
1219 if (bit_mask
& RTC_PIE
)
1221 if (bit_mask
& RTC_AIE
)
1227 int hpet_set_rtc_irq_bit(unsigned long bit_mask
)
1229 int timer_init_reqd
= 0;
1231 if (!is_hpet_enabled())
1234 if (!(PIE_on
| AIE_on
| UIE_on
))
1235 timer_init_reqd
= 1;
1237 if (bit_mask
& RTC_UIE
) {
1240 if (bit_mask
& RTC_PIE
) {
1244 if (bit_mask
& RTC_AIE
) {
1248 if (timer_init_reqd
)
1249 hpet_rtc_timer_init();
1254 int hpet_set_alarm_time(unsigned char hrs
, unsigned char min
, unsigned char sec
)
1256 if (!is_hpet_enabled())
1259 alarm_time
.tm_hour
= hrs
;
1260 alarm_time
.tm_min
= min
;
1261 alarm_time
.tm_sec
= sec
;
1266 int hpet_set_periodic_freq(unsigned long freq
)
1268 if (!is_hpet_enabled())
1277 int hpet_rtc_dropped_irq(void)
1279 if (!is_hpet_enabled())
1285 irqreturn_t
hpet_rtc_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
1287 struct rtc_time curr_time
;
1288 unsigned long rtc_int_flag
= 0;
1289 int call_rtc_interrupt
= 0;
1291 hpet_rtc_timer_reinit();
1293 if (UIE_on
| AIE_on
) {
1294 rtc_get_rtc_time(&curr_time
);
1297 if (curr_time
.tm_sec
!= prev_update_sec
) {
1298 /* Set update int info, call real rtc int routine */
1299 call_rtc_interrupt
= 1;
1300 rtc_int_flag
= RTC_UF
;
1301 prev_update_sec
= curr_time
.tm_sec
;
1306 if (PIE_count
>= hpet_rtc_int_freq
/PIE_freq
) {
1307 /* Set periodic int info, call real rtc int routine */
1308 call_rtc_interrupt
= 1;
1309 rtc_int_flag
|= RTC_PF
;
1314 if ((curr_time
.tm_sec
== alarm_time
.tm_sec
) &&
1315 (curr_time
.tm_min
== alarm_time
.tm_min
) &&
1316 (curr_time
.tm_hour
== alarm_time
.tm_hour
)) {
1317 /* Set alarm int info, call real rtc int routine */
1318 call_rtc_interrupt
= 1;
1319 rtc_int_flag
|= RTC_AF
;
1322 if (call_rtc_interrupt
) {
1323 rtc_int_flag
|= (RTC_IRQF
| (RTC_NUM_INTS
<< 8));
1324 rtc_interrupt(rtc_int_flag
, dev_id
, regs
);
1330 static int __init
nohpet_setup(char *s
)
1336 __setup("nohpet", nohpet_setup
);
1338 int __init
notsc_setup(char *s
)
1344 __setup("notsc", notsc_setup
);