arch/x86/kernel/time_32.c

   1 /*
   2  *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
   3  *
   4  * This file contains the PC-specific time handling details:
   5  * reading the RTC at bootup, etc..
   6  * 1994-07-02    Alan Modra
   7  *      fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
   8  * 1995-03-26    Markus Kuhn
   9  *      fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
  10  *      precision CMOS clock update
  11  * 1996-05-03    Ingo Molnar
  12  *      fixed time warps in do_[slow|fast]_gettimeoffset()
  13  * 1997-09-10   Updated NTP code according to technical memorandum Jan '96
  14  *              "A Kernel Model for Precision Timekeeping" by Dave Mills
  15  * 1998-09-05    (Various)
  16  *      More robust do_fast_gettimeoffset() algorithm implemented
  17  *      (works with APM, Cyrix 6x86MX and Centaur C6),
  18  *      monotonic gettimeofday() with fast_get_timeoffset(),
  19  *      drift-proof precision TSC calibration on boot
  20  *      (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D.
  21  *      Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>;
  22  *      ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>).
  23  * 1998-12-16    Andrea Arcangeli
  24  *      Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy
  25  *      because was not accounting lost_ticks.
  26  * 1998-12-24 Copyright (C) 1998  Andrea Arcangeli
  27  *      Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
  28  *      serialize accesses to xtime/lost_ticks).
  29  */
  30
  31 #include <linux/init.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/time.h>
  34 #include <linux/mca.h>
  35
  36 #include <asm/setup.h>
  37 #include <asm/hpet.h>
  38 #include <asm/time.h>
  39 #include <asm/timer.h>
  40
  41 #include <asm/do_timer.h>
  42
  43 int timer_ack;
  44
  45 unsigned long profile_pc(struct pt_regs *regs)
  46 {
  47         unsigned long pc = instruction_pointer(regs);
  48
  49 #ifdef CONFIG_SMP
  50         if (!user_mode_vm(regs) && in_lock_functions(pc)) {
  51 #ifdef CONFIG_FRAME_POINTER
  52                 return *(unsigned long *)(regs->bp + sizeof(long));
  53 #else
  54                 unsigned long *sp = (unsigned long *)&regs->sp;
  55
  56                 /* Return address is either directly at stack pointer
  57                    or above a saved flags. Eflags has bits 22-31 zero,
  58                    kernel addresses don't. */
  59                 if (sp[0] >> 22)
  60                         return sp[0];
  61                 if (sp[1] >> 22)
  62                         return sp[1];
  63 #endif
  64         }
  65 #endif
  66         return pc;
  67 }
  68 EXPORT_SYMBOL(profile_pc);
  69
  70 /*
  71  * This is the same as the above, except we _also_ save the current
  72  * Time Stamp Counter value at the time of the timer interrupt, so that
  73  * we later on can estimate the time of day more exactly.
  74  */
  75 irqreturn_t timer_interrupt(int irq, void *dev_id)
  76 {
  77         /* Keep nmi watchdog up to date */
  78         inc_irq_stat(irq0_irqs);
  79
  80 #ifdef CONFIG_X86_IO_APIC
  81         if (timer_ack) {
  82                 /*
  83                  * Subtle, when I/O APICs are used we have to ack timer IRQ
  84                  * manually to deassert NMI lines for the watchdog if run
  85                  * on an 82489DX-based system.
  86                  */
  87                 spin_lock(&i8259A_lock);
  88                 outb(0x0c, PIC_MASTER_OCW3);
  89                 /* Ack the IRQ; AEOI will end it automatically. */
  90                 inb(PIC_MASTER_POLL);
  91                 spin_unlock(&i8259A_lock);
  92         }
  93 #endif
  94
  95         do_timer_interrupt_hook();
  96
  97 #ifdef CONFIG_MCA
  98         if (MCA_bus) {
  99                 /* The PS/2 uses level-triggered interrupts.  You can't
 100                 turn them off, nor would you want to (any attempt to
 101                 enable edge-triggered interrupts usually gets intercepted by a
 102                 special hardware circuit).  Hence we have to acknowledge
 103                 the timer interrupt.  Through some incredibly stupid
 104                 design idea, the reset for IRQ 0 is done by setting the
 105                 high bit of the PPI port B (0x61).  Note that some PS/2s,
 106                 notably the 55SX, work fine if this is removed.  */
 107
 108                 u8 irq_v = inb_p(0x61);         /* read the current state */
 109                 outb_p(irq_v | 0x80, 0x61);     /* reset the IRQ */
 110         }
 111 #endif
 112
 113         return IRQ_HANDLED;
 114 }
 115
 116 /* Duplicate of time_init() below, with hpet_enable part added */
 117 void __init hpet_time_init(void)
 118 {
 119         if (!hpet_enable())
 120                 setup_pit_timer();
 121         x86_quirk_time_init();
 122 }
 123
 124 /*
 125  * This is called directly from init code; we must delay timer setup in the
 126  * HPET case as we can't make the decision to turn on HPET this early in the
 127  * boot process.
 128  *
 129  * The chosen time_init function will usually be hpet_time_init, above, but
 130  * in the case of virtual hardware, an alternative function may be substituted.
 131  */
 132 void __init time_init(void)
 133 {
 134         x86_quirk_pre_time_init();
 135         tsc_init();
 136         late_time_init = choose_time_init();
 137 }