x86/amd-iommu: Workaround for erratum 63
[linux-2.6/verdex.git] / arch / x86 / kernel / init_task.c
blob270ff83efc11d8dc27089a3fec085fdec9074b5b
1 #include <linux/mm.h>
2 #include <linux/module.h>
3 #include <linux/sched.h>
4 #include <linux/init.h>
5 #include <linux/init_task.h>
6 #include <linux/fs.h>
7 #include <linux/mqueue.h>
9 #include <asm/uaccess.h>
10 #include <asm/pgtable.h>
11 #include <asm/desc.h>
13 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
14 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
17 * Initial thread structure.
19 * We need to make sure that this is THREAD_SIZE aligned due to the
20 * way process stacks are handled. This is done by having a special
21 * "init_task" linker map entry..
23 union thread_union init_thread_union
24 __attribute__((__section__(".data.init_task"))) =
25 { INIT_THREAD_INFO(init_task) };
28 * Initial task structure.
30 * All other task structs will be allocated on slabs in fork.c
32 struct task_struct init_task = INIT_TASK(init_task);
33 EXPORT_SYMBOL(init_task);
36 * per-CPU TSS segments. Threads are completely 'soft' on Linux,
37 * no more per-task TSS's. The TSS size is kept cacheline-aligned
38 * so they are allowed to end up in the .data.cacheline_aligned
39 * section. Since TSS's are completely CPU-local, we want them
40 * on exact cacheline boundaries, to eliminate cacheline ping-pong.
42 DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, init_tss) = INIT_TSS;