5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
9 * Additional technical information is available on
10 * http://www.linux-mtd.infradead.org/tech/nand.html
12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
13 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
16 * David Woodhouse for adding multichip support
18 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
22 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
28 * This program is free software; you can redistribute it and/or modify
29 * it under the terms of the GNU General Public License version 2 as
30 * published by the Free Software Foundation.
34 #include <linux/module.h>
35 #include <linux/delay.h>
36 #include <linux/errno.h>
37 #include <linux/err.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/types.h>
41 #include <linux/mtd/mtd.h>
42 #include <linux/mtd/nand.h>
43 #include <linux/mtd/nand_ecc.h>
44 #include <linux/mtd/compatmac.h>
45 #include <linux/interrupt.h>
46 #include <linux/bitops.h>
47 #include <linux/leds.h>
50 #ifdef CONFIG_MTD_PARTITIONS
51 #include <linux/mtd/partitions.h>
54 /* Define default oob placement schemes for large and small page devices */
55 static struct nand_ecclayout nand_oob_8
= {
65 static struct nand_ecclayout nand_oob_16
= {
67 .eccpos
= {0, 1, 2, 3, 6, 7},
73 static struct nand_ecclayout nand_oob_64
= {
76 40, 41, 42, 43, 44, 45, 46, 47,
77 48, 49, 50, 51, 52, 53, 54, 55,
78 56, 57, 58, 59, 60, 61, 62, 63},
84 static int nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
,
87 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
88 struct mtd_oob_ops
*ops
);
91 * For devices which display every fart in the system on a seperate LED. Is
92 * compiled away when LED support is disabled.
94 DEFINE_LED_TRIGGER(nand_led_trigger
);
97 * nand_release_device - [GENERIC] release chip
98 * @mtd: MTD device structure
100 * Deselect, release chip lock and wake up anyone waiting on the device
102 static void nand_release_device(struct mtd_info
*mtd
)
104 struct nand_chip
*chip
= mtd
->priv
;
106 /* De-select the NAND device */
107 chip
->select_chip(mtd
, -1);
109 /* Release the controller and the chip */
110 spin_lock(&chip
->controller
->lock
);
111 chip
->controller
->active
= NULL
;
112 chip
->state
= FL_READY
;
113 wake_up(&chip
->controller
->wq
);
114 spin_unlock(&chip
->controller
->lock
);
118 * nand_read_byte - [DEFAULT] read one byte from the chip
119 * @mtd: MTD device structure
121 * Default read function for 8bit buswith
123 static uint8_t nand_read_byte(struct mtd_info
*mtd
)
125 struct nand_chip
*chip
= mtd
->priv
;
126 return readb(chip
->IO_ADDR_R
);
130 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
131 * @mtd: MTD device structure
133 * Default read function for 16bit buswith with
134 * endianess conversion
136 static uint8_t nand_read_byte16(struct mtd_info
*mtd
)
138 struct nand_chip
*chip
= mtd
->priv
;
139 return (uint8_t) cpu_to_le16(readw(chip
->IO_ADDR_R
));
143 * nand_read_word - [DEFAULT] read one word from the chip
144 * @mtd: MTD device structure
146 * Default read function for 16bit buswith without
147 * endianess conversion
149 static u16
nand_read_word(struct mtd_info
*mtd
)
151 struct nand_chip
*chip
= mtd
->priv
;
152 return readw(chip
->IO_ADDR_R
);
156 * nand_select_chip - [DEFAULT] control CE line
157 * @mtd: MTD device structure
158 * @chipnr: chipnumber to select, -1 for deselect
160 * Default select function for 1 chip devices.
162 static void nand_select_chip(struct mtd_info
*mtd
, int chipnr
)
164 struct nand_chip
*chip
= mtd
->priv
;
168 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, 0 | NAND_CTRL_CHANGE
);
179 * nand_write_buf - [DEFAULT] write buffer to chip
180 * @mtd: MTD device structure
182 * @len: number of bytes to write
184 * Default write function for 8bit buswith
186 static void nand_write_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
189 struct nand_chip
*chip
= mtd
->priv
;
191 for (i
= 0; i
< len
; i
++)
192 writeb(buf
[i
], chip
->IO_ADDR_W
);
196 * nand_read_buf - [DEFAULT] read chip data into buffer
197 * @mtd: MTD device structure
198 * @buf: buffer to store date
199 * @len: number of bytes to read
201 * Default read function for 8bit buswith
203 static void nand_read_buf(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
206 struct nand_chip
*chip
= mtd
->priv
;
208 for (i
= 0; i
< len
; i
++)
209 buf
[i
] = readb(chip
->IO_ADDR_R
);
213 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
214 * @mtd: MTD device structure
215 * @buf: buffer containing the data to compare
216 * @len: number of bytes to compare
218 * Default verify function for 8bit buswith
220 static int nand_verify_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
223 struct nand_chip
*chip
= mtd
->priv
;
225 for (i
= 0; i
< len
; i
++)
226 if (buf
[i
] != readb(chip
->IO_ADDR_R
))
232 * nand_write_buf16 - [DEFAULT] write buffer to chip
233 * @mtd: MTD device structure
235 * @len: number of bytes to write
237 * Default write function for 16bit buswith
239 static void nand_write_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
242 struct nand_chip
*chip
= mtd
->priv
;
243 u16
*p
= (u16
*) buf
;
246 for (i
= 0; i
< len
; i
++)
247 writew(p
[i
], chip
->IO_ADDR_W
);
252 * nand_read_buf16 - [DEFAULT] read chip data into buffer
253 * @mtd: MTD device structure
254 * @buf: buffer to store date
255 * @len: number of bytes to read
257 * Default read function for 16bit buswith
259 static void nand_read_buf16(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
262 struct nand_chip
*chip
= mtd
->priv
;
263 u16
*p
= (u16
*) buf
;
266 for (i
= 0; i
< len
; i
++)
267 p
[i
] = readw(chip
->IO_ADDR_R
);
271 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
272 * @mtd: MTD device structure
273 * @buf: buffer containing the data to compare
274 * @len: number of bytes to compare
276 * Default verify function for 16bit buswith
278 static int nand_verify_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
281 struct nand_chip
*chip
= mtd
->priv
;
282 u16
*p
= (u16
*) buf
;
285 for (i
= 0; i
< len
; i
++)
286 if (p
[i
] != readw(chip
->IO_ADDR_R
))
293 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
294 * @mtd: MTD device structure
295 * @ofs: offset from device start
296 * @getchip: 0, if the chip is already selected
298 * Check, if the block is bad.
300 static int nand_block_bad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
)
302 int page
, chipnr
, res
= 0;
303 struct nand_chip
*chip
= mtd
->priv
;
307 page
= (int)(ofs
>> chip
->page_shift
);
308 chipnr
= (int)(ofs
>> chip
->chip_shift
);
310 nand_get_device(chip
, mtd
, FL_READING
);
312 /* Select the NAND device */
313 chip
->select_chip(mtd
, chipnr
);
317 if (chip
->options
& NAND_BUSWIDTH_16
) {
318 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
& 0xFE,
319 page
& chip
->pagemask
);
320 bad
= cpu_to_le16(chip
->read_word(mtd
));
321 if (chip
->badblockpos
& 0x1)
323 if ((bad
& 0xFF) != 0xff)
326 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
,
327 page
& chip
->pagemask
);
328 if (chip
->read_byte(mtd
) != 0xff)
333 nand_release_device(mtd
);
339 * nand_default_block_markbad - [DEFAULT] mark a block bad
340 * @mtd: MTD device structure
341 * @ofs: offset from device start
343 * This is the default implementation, which can be overridden by
344 * a hardware specific driver.
346 static int nand_default_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
348 struct nand_chip
*chip
= mtd
->priv
;
349 uint8_t buf
[2] = { 0, 0 };
352 /* Get block number */
353 block
= ((int)ofs
) >> chip
->bbt_erase_shift
;
355 chip
->bbt
[block
>> 2] |= 0x01 << ((block
& 0x03) << 1);
357 /* Do we have a flash based bad block table ? */
358 if (chip
->options
& NAND_USE_FLASH_BBT
)
359 ret
= nand_update_bbt(mtd
, ofs
);
361 /* We write two bytes, so we dont have to mess with 16 bit
366 chip
->ops
.datbuf
= NULL
;
367 chip
->ops
.oobbuf
= buf
;
368 chip
->ops
.ooboffs
= chip
->badblockpos
& ~0x01;
370 ret
= nand_do_write_oob(mtd
, ofs
, &chip
->ops
);
373 mtd
->ecc_stats
.badblocks
++;
378 * nand_check_wp - [GENERIC] check if the chip is write protected
379 * @mtd: MTD device structure
380 * Check, if the device is write protected
382 * The function expects, that the device is already selected
384 static int nand_check_wp(struct mtd_info
*mtd
)
386 struct nand_chip
*chip
= mtd
->priv
;
387 /* Check the WP bit */
388 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
389 return (chip
->read_byte(mtd
) & NAND_STATUS_WP
) ? 0 : 1;
393 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
394 * @mtd: MTD device structure
395 * @ofs: offset from device start
396 * @getchip: 0, if the chip is already selected
397 * @allowbbt: 1, if its allowed to access the bbt area
399 * Check, if the block is bad. Either by reading the bad block table or
400 * calling of the scan function.
402 static int nand_block_checkbad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
,
405 struct nand_chip
*chip
= mtd
->priv
;
408 return chip
->block_bad(mtd
, ofs
, getchip
);
410 /* Return info from the table */
411 return nand_isbad_bbt(mtd
, ofs
, allowbbt
);
415 * Wait for the ready pin, after a command
416 * The timeout is catched later.
418 void nand_wait_ready(struct mtd_info
*mtd
)
420 struct nand_chip
*chip
= mtd
->priv
;
421 unsigned long timeo
= jiffies
+ 2;
423 led_trigger_event(nand_led_trigger
, LED_FULL
);
424 /* wait until command is processed or timeout occures */
426 if (chip
->dev_ready(mtd
))
428 touch_softlockup_watchdog();
429 } while (time_before(jiffies
, timeo
));
430 led_trigger_event(nand_led_trigger
, LED_OFF
);
432 EXPORT_SYMBOL_GPL(nand_wait_ready
);
435 * nand_command - [DEFAULT] Send command to NAND device
436 * @mtd: MTD device structure
437 * @command: the command to be sent
438 * @column: the column address for this command, -1 if none
439 * @page_addr: the page address for this command, -1 if none
441 * Send command to NAND device. This function is used for small page
442 * devices (256/512 Bytes per page)
444 static void nand_command(struct mtd_info
*mtd
, unsigned int command
,
445 int column
, int page_addr
)
447 register struct nand_chip
*chip
= mtd
->priv
;
448 int ctrl
= NAND_CTRL_CLE
| NAND_CTRL_CHANGE
;
451 * Write out the command to the device.
453 if (command
== NAND_CMD_SEQIN
) {
456 if (column
>= mtd
->writesize
) {
458 column
-= mtd
->writesize
;
459 readcmd
= NAND_CMD_READOOB
;
460 } else if (column
< 256) {
461 /* First 256 bytes --> READ0 */
462 readcmd
= NAND_CMD_READ0
;
465 readcmd
= NAND_CMD_READ1
;
467 chip
->cmd_ctrl(mtd
, readcmd
, ctrl
);
468 ctrl
&= ~NAND_CTRL_CHANGE
;
470 chip
->cmd_ctrl(mtd
, command
, ctrl
);
473 * Address cycle, when necessary
475 ctrl
= NAND_CTRL_ALE
| NAND_CTRL_CHANGE
;
476 /* Serially input address */
478 /* Adjust columns for 16 bit buswidth */
479 if (chip
->options
& NAND_BUSWIDTH_16
)
481 chip
->cmd_ctrl(mtd
, column
, ctrl
);
482 ctrl
&= ~NAND_CTRL_CHANGE
;
484 if (page_addr
!= -1) {
485 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
486 ctrl
&= ~NAND_CTRL_CHANGE
;
487 chip
->cmd_ctrl(mtd
, page_addr
>> 8, ctrl
);
488 /* One more address cycle for devices > 32MiB */
489 if (chip
->chipsize
> (32 << 20))
490 chip
->cmd_ctrl(mtd
, page_addr
>> 16, ctrl
);
492 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
495 * program and erase have their own busy handlers
496 * status and sequential in needs no delay
500 case NAND_CMD_PAGEPROG
:
501 case NAND_CMD_ERASE1
:
502 case NAND_CMD_ERASE2
:
504 case NAND_CMD_STATUS
:
510 udelay(chip
->chip_delay
);
511 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
512 NAND_CTRL_CLE
| NAND_CTRL_CHANGE
);
514 NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
515 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
518 /* This applies to read commands */
521 * If we don't have access to the busy pin, we apply the given
524 if (!chip
->dev_ready
) {
525 udelay(chip
->chip_delay
);
529 /* Apply this short delay always to ensure that we do wait tWB in
530 * any case on any machine. */
533 nand_wait_ready(mtd
);
537 * nand_command_lp - [DEFAULT] Send command to NAND large page device
538 * @mtd: MTD device structure
539 * @command: the command to be sent
540 * @column: the column address for this command, -1 if none
541 * @page_addr: the page address for this command, -1 if none
543 * Send command to NAND device. This is the version for the new large page
544 * devices We dont have the separate regions as we have in the small page
545 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
547 static void nand_command_lp(struct mtd_info
*mtd
, unsigned int command
,
548 int column
, int page_addr
)
550 register struct nand_chip
*chip
= mtd
->priv
;
552 /* Emulate NAND_CMD_READOOB */
553 if (command
== NAND_CMD_READOOB
) {
554 column
+= mtd
->writesize
;
555 command
= NAND_CMD_READ0
;
558 /* Command latch cycle */
559 chip
->cmd_ctrl(mtd
, command
& 0xff,
560 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
562 if (column
!= -1 || page_addr
!= -1) {
563 int ctrl
= NAND_CTRL_CHANGE
| NAND_NCE
| NAND_ALE
;
565 /* Serially input address */
567 /* Adjust columns for 16 bit buswidth */
568 if (chip
->options
& NAND_BUSWIDTH_16
)
570 chip
->cmd_ctrl(mtd
, column
, ctrl
);
571 ctrl
&= ~NAND_CTRL_CHANGE
;
572 chip
->cmd_ctrl(mtd
, column
>> 8, ctrl
);
574 if (page_addr
!= -1) {
575 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
576 chip
->cmd_ctrl(mtd
, page_addr
>> 8,
577 NAND_NCE
| NAND_ALE
);
578 /* One more address cycle for devices > 128MiB */
579 if (chip
->chipsize
> (128 << 20))
580 chip
->cmd_ctrl(mtd
, page_addr
>> 16,
581 NAND_NCE
| NAND_ALE
);
584 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
587 * program and erase have their own busy handlers
588 * status, sequential in, and deplete1 need no delay
592 case NAND_CMD_CACHEDPROG
:
593 case NAND_CMD_PAGEPROG
:
594 case NAND_CMD_ERASE1
:
595 case NAND_CMD_ERASE2
:
598 case NAND_CMD_STATUS
:
599 case NAND_CMD_DEPLETE1
:
603 * read error status commands require only a short delay
605 case NAND_CMD_STATUS_ERROR
:
606 case NAND_CMD_STATUS_ERROR0
:
607 case NAND_CMD_STATUS_ERROR1
:
608 case NAND_CMD_STATUS_ERROR2
:
609 case NAND_CMD_STATUS_ERROR3
:
610 udelay(chip
->chip_delay
);
616 udelay(chip
->chip_delay
);
617 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
618 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
619 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
620 NAND_NCE
| NAND_CTRL_CHANGE
);
621 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
624 case NAND_CMD_RNDOUT
:
625 /* No ready / busy check necessary */
626 chip
->cmd_ctrl(mtd
, NAND_CMD_RNDOUTSTART
,
627 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
628 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
629 NAND_NCE
| NAND_CTRL_CHANGE
);
633 chip
->cmd_ctrl(mtd
, NAND_CMD_READSTART
,
634 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
635 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
636 NAND_NCE
| NAND_CTRL_CHANGE
);
638 /* This applies to read commands */
641 * If we don't have access to the busy pin, we apply the given
644 if (!chip
->dev_ready
) {
645 udelay(chip
->chip_delay
);
650 /* Apply this short delay always to ensure that we do wait tWB in
651 * any case on any machine. */
654 nand_wait_ready(mtd
);
658 * nand_get_device - [GENERIC] Get chip for selected access
659 * @chip: the nand chip descriptor
660 * @mtd: MTD device structure
661 * @new_state: the state which is requested
663 * Get the device and lock it for exclusive access
666 nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
, int new_state
)
668 spinlock_t
*lock
= &chip
->controller
->lock
;
669 wait_queue_head_t
*wq
= &chip
->controller
->wq
;
670 DECLARE_WAITQUEUE(wait
, current
);
674 /* Hardware controller shared among independend devices */
675 /* Hardware controller shared among independend devices */
676 if (!chip
->controller
->active
)
677 chip
->controller
->active
= chip
;
679 if (chip
->controller
->active
== chip
&& chip
->state
== FL_READY
) {
680 chip
->state
= new_state
;
684 if (new_state
== FL_PM_SUSPENDED
) {
686 return (chip
->state
== FL_PM_SUSPENDED
) ? 0 : -EAGAIN
;
688 set_current_state(TASK_UNINTERRUPTIBLE
);
689 add_wait_queue(wq
, &wait
);
692 remove_wait_queue(wq
, &wait
);
697 * nand_wait - [DEFAULT] wait until the command is done
698 * @mtd: MTD device structure
699 * @chip: NAND chip structure
701 * Wait for command done. This applies to erase and program only
702 * Erase can take up to 400ms and program up to 20ms according to
703 * general NAND and SmartMedia specs
705 static int nand_wait(struct mtd_info
*mtd
, struct nand_chip
*chip
)
708 unsigned long timeo
= jiffies
;
709 int status
, state
= chip
->state
;
711 if (state
== FL_ERASING
)
712 timeo
+= (HZ
* 400) / 1000;
714 timeo
+= (HZ
* 20) / 1000;
716 led_trigger_event(nand_led_trigger
, LED_FULL
);
718 /* Apply this short delay always to ensure that we do wait tWB in
719 * any case on any machine. */
722 if ((state
== FL_ERASING
) && (chip
->options
& NAND_IS_AND
))
723 chip
->cmdfunc(mtd
, NAND_CMD_STATUS_MULTI
, -1, -1);
725 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
727 while (time_before(jiffies
, timeo
)) {
728 if (chip
->dev_ready
) {
729 if (chip
->dev_ready(mtd
))
732 if (chip
->read_byte(mtd
) & NAND_STATUS_READY
)
737 led_trigger_event(nand_led_trigger
, LED_OFF
);
739 status
= (int)chip
->read_byte(mtd
);
744 * nand_read_page_raw - [Intern] read raw page data without ecc
745 * @mtd: mtd info structure
746 * @chip: nand chip info structure
747 * @buf: buffer to store read data
749 static int nand_read_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
752 chip
->read_buf(mtd
, buf
, mtd
->writesize
);
753 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
758 * nand_read_page_swecc - {REPLACABLE] software ecc based page read function
759 * @mtd: mtd info structure
760 * @chip: nand chip info structure
761 * @buf: buffer to store read data
763 static int nand_read_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
766 int i
, eccsize
= chip
->ecc
.size
;
767 int eccbytes
= chip
->ecc
.bytes
;
768 int eccsteps
= chip
->ecc
.steps
;
770 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
771 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
772 int *eccpos
= chip
->ecc
.layout
->eccpos
;
774 nand_read_page_raw(mtd
, chip
, buf
);
776 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
777 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
779 for (i
= 0; i
< chip
->ecc
.total
; i
++)
780 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
782 eccsteps
= chip
->ecc
.steps
;
785 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
788 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
790 mtd
->ecc_stats
.failed
++;
792 mtd
->ecc_stats
.corrected
+= stat
;
798 * nand_read_page_hwecc - {REPLACABLE] hardware ecc based page read function
799 * @mtd: mtd info structure
800 * @chip: nand chip info structure
801 * @buf: buffer to store read data
803 * Not for syndrome calculating ecc controllers which need a special oob layout
805 static int nand_read_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
808 int i
, eccsize
= chip
->ecc
.size
;
809 int eccbytes
= chip
->ecc
.bytes
;
810 int eccsteps
= chip
->ecc
.steps
;
812 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
813 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
814 int *eccpos
= chip
->ecc
.layout
->eccpos
;
816 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
817 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
818 chip
->read_buf(mtd
, p
, eccsize
);
819 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
821 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
823 for (i
= 0; i
< chip
->ecc
.total
; i
++)
824 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
826 eccsteps
= chip
->ecc
.steps
;
829 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
832 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
834 mtd
->ecc_stats
.failed
++;
836 mtd
->ecc_stats
.corrected
+= stat
;
842 * nand_read_page_syndrome - {REPLACABLE] hardware ecc syndrom based page read
843 * @mtd: mtd info structure
844 * @chip: nand chip info structure
845 * @buf: buffer to store read data
847 * The hw generator calculates the error syndrome automatically. Therefor
848 * we need a special oob layout and handling.
850 static int nand_read_page_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
853 int i
, eccsize
= chip
->ecc
.size
;
854 int eccbytes
= chip
->ecc
.bytes
;
855 int eccsteps
= chip
->ecc
.steps
;
857 uint8_t *oob
= chip
->oob_poi
;
859 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
862 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
863 chip
->read_buf(mtd
, p
, eccsize
);
865 if (chip
->ecc
.prepad
) {
866 chip
->read_buf(mtd
, oob
, chip
->ecc
.prepad
);
867 oob
+= chip
->ecc
.prepad
;
870 chip
->ecc
.hwctl(mtd
, NAND_ECC_READSYN
);
871 chip
->read_buf(mtd
, oob
, eccbytes
);
872 stat
= chip
->ecc
.correct(mtd
, p
, oob
, NULL
);
875 mtd
->ecc_stats
.failed
++;
877 mtd
->ecc_stats
.corrected
+= stat
;
881 if (chip
->ecc
.postpad
) {
882 chip
->read_buf(mtd
, oob
, chip
->ecc
.postpad
);
883 oob
+= chip
->ecc
.postpad
;
887 /* Calculate remaining oob bytes */
888 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
890 chip
->read_buf(mtd
, oob
, i
);
896 * nand_transfer_oob - [Internal] Transfer oob to client buffer
897 * @chip: nand chip structure
898 * @oob: oob destination address
899 * @ops: oob ops structure
901 static uint8_t *nand_transfer_oob(struct nand_chip
*chip
, uint8_t *oob
,
902 struct mtd_oob_ops
*ops
)
904 size_t len
= ops
->ooblen
;
910 memcpy(oob
, chip
->oob_poi
+ ops
->ooboffs
, len
);
914 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
915 uint32_t boffs
= 0, roffs
= ops
->ooboffs
;
918 for(; free
->length
&& len
; free
++, len
-= bytes
) {
919 /* Read request not from offset 0 ? */
920 if (unlikely(roffs
)) {
921 if (roffs
>= free
->length
) {
922 roffs
-= free
->length
;
925 boffs
= free
->offset
+ roffs
;
926 bytes
= min_t(size_t, len
,
927 (free
->length
- roffs
));
930 bytes
= min_t(size_t, len
, free
->length
);
931 boffs
= free
->offset
;
933 memcpy(oob
, chip
->oob_poi
+ boffs
, bytes
);
945 * nand_do_read_ops - [Internal] Read data with ECC
947 * @mtd: MTD device structure
948 * @from: offset to read from
949 * @ops: oob ops structure
951 * Internal function. Called with chip held.
953 static int nand_do_read_ops(struct mtd_info
*mtd
, loff_t from
,
954 struct mtd_oob_ops
*ops
)
956 int chipnr
, page
, realpage
, col
, bytes
, aligned
;
957 struct nand_chip
*chip
= mtd
->priv
;
958 struct mtd_ecc_stats stats
;
959 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
962 uint32_t readlen
= ops
->len
;
963 uint8_t *bufpoi
, *oob
, *buf
;
965 stats
= mtd
->ecc_stats
;
967 chipnr
= (int)(from
>> chip
->chip_shift
);
968 chip
->select_chip(mtd
, chipnr
);
970 realpage
= (int)(from
>> chip
->page_shift
);
971 page
= realpage
& chip
->pagemask
;
973 col
= (int)(from
& (mtd
->writesize
- 1));
974 chip
->oob_poi
= chip
->buffers
->oobrbuf
;
980 bytes
= min(mtd
->writesize
- col
, readlen
);
981 aligned
= (bytes
== mtd
->writesize
);
983 /* Is the current page in the buffer ? */
984 if (realpage
!= chip
->pagebuf
|| oob
) {
985 bufpoi
= aligned
? buf
: chip
->buffers
->databuf
;
987 if (likely(sndcmd
)) {
988 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0x00, page
);
992 /* Now read the page into the buffer */
993 if (unlikely(ops
->mode
== MTD_OOB_RAW
))
994 ret
= chip
->ecc
.read_page_raw(mtd
, chip
, bufpoi
);
996 ret
= chip
->ecc
.read_page(mtd
, chip
, bufpoi
);
1000 /* Transfer not aligned data */
1002 chip
->pagebuf
= realpage
;
1003 memcpy(buf
, chip
->buffers
->databuf
+ col
, bytes
);
1008 if (unlikely(oob
)) {
1009 /* Raw mode does data:oob:data:oob */
1010 if (ops
->mode
!= MTD_OOB_RAW
)
1011 oob
= nand_transfer_oob(chip
, oob
, ops
);
1013 buf
= nand_transfer_oob(chip
, buf
, ops
);
1016 if (!(chip
->options
& NAND_NO_READRDY
)) {
1018 * Apply delay or wait for ready/busy pin. Do
1019 * this before the AUTOINCR check, so no
1020 * problems arise if a chip which does auto
1021 * increment is marked as NOAUTOINCR by the
1024 if (!chip
->dev_ready
)
1025 udelay(chip
->chip_delay
);
1027 nand_wait_ready(mtd
);
1030 memcpy(buf
, chip
->buffers
->databuf
+ col
, bytes
);
1039 /* For subsequent reads align to page boundary. */
1041 /* Increment page address */
1044 page
= realpage
& chip
->pagemask
;
1045 /* Check, if we cross a chip boundary */
1048 chip
->select_chip(mtd
, -1);
1049 chip
->select_chip(mtd
, chipnr
);
1052 /* Check, if the chip supports auto page increment
1053 * or if we have hit a block boundary.
1055 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1059 ops
->retlen
= ops
->len
- (size_t) readlen
;
1064 if (mtd
->ecc_stats
.failed
- stats
.failed
)
1067 return mtd
->ecc_stats
.corrected
- stats
.corrected
? -EUCLEAN
: 0;
1071 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
1072 * @mtd: MTD device structure
1073 * @from: offset to read from
1074 * @len: number of bytes to read
1075 * @retlen: pointer to variable to store the number of read bytes
1076 * @buf: the databuffer to put data
1078 * Get hold of the chip and call nand_do_read
1080 static int nand_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
1081 size_t *retlen
, uint8_t *buf
)
1083 struct nand_chip
*chip
= mtd
->priv
;
1086 /* Do not allow reads past end of device */
1087 if ((from
+ len
) > mtd
->size
)
1092 nand_get_device(chip
, mtd
, FL_READING
);
1094 chip
->ops
.len
= len
;
1095 chip
->ops
.datbuf
= buf
;
1096 chip
->ops
.oobbuf
= NULL
;
1098 ret
= nand_do_read_ops(mtd
, from
, &chip
->ops
);
1100 *retlen
= chip
->ops
.retlen
;
1102 nand_release_device(mtd
);
1108 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
1109 * @mtd: mtd info structure
1110 * @chip: nand chip info structure
1111 * @page: page number to read
1112 * @sndcmd: flag whether to issue read command or not
1114 static int nand_read_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1115 int page
, int sndcmd
)
1118 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, 0, page
);
1121 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1126 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
1128 * @mtd: mtd info structure
1129 * @chip: nand chip info structure
1130 * @page: page number to read
1131 * @sndcmd: flag whether to issue read command or not
1133 static int nand_read_oob_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1134 int page
, int sndcmd
)
1136 uint8_t *buf
= chip
->oob_poi
;
1137 int length
= mtd
->oobsize
;
1138 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1139 int eccsize
= chip
->ecc
.size
;
1140 uint8_t *bufpoi
= buf
;
1141 int i
, toread
, sndrnd
= 0, pos
;
1143 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, chip
->ecc
.size
, page
);
1144 for (i
= 0; i
< chip
->ecc
.steps
; i
++) {
1146 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1147 if (mtd
->writesize
> 512)
1148 chip
->cmdfunc(mtd
, NAND_CMD_RNDOUT
, pos
, -1);
1150 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, pos
, page
);
1153 toread
= min_t(int, length
, chunk
);
1154 chip
->read_buf(mtd
, bufpoi
, toread
);
1159 chip
->read_buf(mtd
, bufpoi
, length
);
1165 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
1166 * @mtd: mtd info structure
1167 * @chip: nand chip info structure
1168 * @page: page number to write
1170 static int nand_write_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1174 const uint8_t *buf
= chip
->oob_poi
;
1175 int length
= mtd
->oobsize
;
1177 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, mtd
->writesize
, page
);
1178 chip
->write_buf(mtd
, buf
, length
);
1179 /* Send command to program the OOB data */
1180 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1182 status
= chip
->waitfunc(mtd
, chip
);
1184 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1188 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
1189 * with syndrome - only for large page flash !
1190 * @mtd: mtd info structure
1191 * @chip: nand chip info structure
1192 * @page: page number to write
1194 static int nand_write_oob_syndrome(struct mtd_info
*mtd
,
1195 struct nand_chip
*chip
, int page
)
1197 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1198 int eccsize
= chip
->ecc
.size
, length
= mtd
->oobsize
;
1199 int i
, len
, pos
, status
= 0, sndcmd
= 0, steps
= chip
->ecc
.steps
;
1200 const uint8_t *bufpoi
= chip
->oob_poi
;
1203 * data-ecc-data-ecc ... ecc-oob
1205 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1207 if (!chip
->ecc
.prepad
&& !chip
->ecc
.postpad
) {
1208 pos
= steps
* (eccsize
+ chunk
);
1213 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, pos
, page
);
1214 for (i
= 0; i
< steps
; i
++) {
1216 if (mtd
->writesize
<= 512) {
1217 uint32_t fill
= 0xFFFFFFFF;
1221 int num
= min_t(int, len
, 4);
1222 chip
->write_buf(mtd
, (uint8_t *)&fill
,
1227 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1228 chip
->cmdfunc(mtd
, NAND_CMD_RNDIN
, pos
, -1);
1232 len
= min_t(int, length
, chunk
);
1233 chip
->write_buf(mtd
, bufpoi
, len
);
1238 chip
->write_buf(mtd
, bufpoi
, length
);
1240 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1241 status
= chip
->waitfunc(mtd
, chip
);
1243 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1247 * nand_do_read_oob - [Intern] NAND read out-of-band
1248 * @mtd: MTD device structure
1249 * @from: offset to read from
1250 * @ops: oob operations description structure
1252 * NAND read out-of-band data from the spare area
1254 static int nand_do_read_oob(struct mtd_info
*mtd
, loff_t from
,
1255 struct mtd_oob_ops
*ops
)
1257 int page
, realpage
, chipnr
, sndcmd
= 1;
1258 struct nand_chip
*chip
= mtd
->priv
;
1259 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1260 int readlen
= ops
->len
;
1261 uint8_t *buf
= ops
->oobbuf
;
1263 DEBUG(MTD_DEBUG_LEVEL3
, "nand_read_oob: from = 0x%08Lx, len = %i\n",
1264 (unsigned long long)from
, readlen
);
1266 chipnr
= (int)(from
>> chip
->chip_shift
);
1267 chip
->select_chip(mtd
, chipnr
);
1269 /* Shift to get page */
1270 realpage
= (int)(from
>> chip
->page_shift
);
1271 page
= realpage
& chip
->pagemask
;
1273 chip
->oob_poi
= chip
->buffers
->oobrbuf
;
1276 sndcmd
= chip
->ecc
.read_oob(mtd
, chip
, page
, sndcmd
);
1277 buf
= nand_transfer_oob(chip
, buf
, ops
);
1279 if (!(chip
->options
& NAND_NO_READRDY
)) {
1281 * Apply delay or wait for ready/busy pin. Do this
1282 * before the AUTOINCR check, so no problems arise if a
1283 * chip which does auto increment is marked as
1284 * NOAUTOINCR by the board driver.
1286 if (!chip
->dev_ready
)
1287 udelay(chip
->chip_delay
);
1289 nand_wait_ready(mtd
);
1292 readlen
-= ops
->ooblen
;
1296 /* Increment page address */
1299 page
= realpage
& chip
->pagemask
;
1300 /* Check, if we cross a chip boundary */
1303 chip
->select_chip(mtd
, -1);
1304 chip
->select_chip(mtd
, chipnr
);
1307 /* Check, if the chip supports auto page increment
1308 * or if we have hit a block boundary.
1310 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1314 ops
->retlen
= ops
->len
;
1319 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1320 * @mtd: MTD device structure
1321 * @from: offset to read from
1322 * @ops: oob operation description structure
1324 * NAND read data and/or out-of-band data
1326 static int nand_read_oob(struct mtd_info
*mtd
, loff_t from
,
1327 struct mtd_oob_ops
*ops
)
1329 struct nand_chip
*chip
= mtd
->priv
;
1330 int ret
= -ENOTSUPP
;
1334 /* Do not allow reads past end of device */
1335 if ((from
+ ops
->len
) > mtd
->size
) {
1336 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1337 "Attempt read beyond end of device\n");
1341 nand_get_device(chip
, mtd
, FL_READING
);
1354 ret
= nand_do_read_oob(mtd
, from
, ops
);
1356 ret
= nand_do_read_ops(mtd
, from
, ops
);
1359 nand_release_device(mtd
);
1365 * nand_write_page_raw - [Intern] raw page write function
1366 * @mtd: mtd info structure
1367 * @chip: nand chip info structure
1370 static void nand_write_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1373 chip
->write_buf(mtd
, buf
, mtd
->writesize
);
1374 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1378 * nand_write_page_swecc - {REPLACABLE] software ecc based page write function
1379 * @mtd: mtd info structure
1380 * @chip: nand chip info structure
1383 static void nand_write_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1386 int i
, eccsize
= chip
->ecc
.size
;
1387 int eccbytes
= chip
->ecc
.bytes
;
1388 int eccsteps
= chip
->ecc
.steps
;
1389 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1390 const uint8_t *p
= buf
;
1391 int *eccpos
= chip
->ecc
.layout
->eccpos
;
1393 /* Software ecc calculation */
1394 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
1395 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1397 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1398 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1400 nand_write_page_raw(mtd
, chip
, buf
);
1404 * nand_write_page_hwecc - {REPLACABLE] hardware ecc based page write function
1405 * @mtd: mtd info structure
1406 * @chip: nand chip info structure
1409 static void nand_write_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1412 int i
, eccsize
= chip
->ecc
.size
;
1413 int eccbytes
= chip
->ecc
.bytes
;
1414 int eccsteps
= chip
->ecc
.steps
;
1415 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1416 const uint8_t *p
= buf
;
1417 int *eccpos
= chip
->ecc
.layout
->eccpos
;
1419 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1420 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1421 chip
->write_buf(mtd
, p
, eccsize
);
1422 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1425 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1426 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1428 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1432 * nand_write_page_syndrome - {REPLACABLE] hardware ecc syndrom based page write
1433 * @mtd: mtd info structure
1434 * @chip: nand chip info structure
1437 * The hw generator calculates the error syndrome automatically. Therefor
1438 * we need a special oob layout and handling.
1440 static void nand_write_page_syndrome(struct mtd_info
*mtd
,
1441 struct nand_chip
*chip
, const uint8_t *buf
)
1443 int i
, eccsize
= chip
->ecc
.size
;
1444 int eccbytes
= chip
->ecc
.bytes
;
1445 int eccsteps
= chip
->ecc
.steps
;
1446 const uint8_t *p
= buf
;
1447 uint8_t *oob
= chip
->oob_poi
;
1449 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1451 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1452 chip
->write_buf(mtd
, p
, eccsize
);
1454 if (chip
->ecc
.prepad
) {
1455 chip
->write_buf(mtd
, oob
, chip
->ecc
.prepad
);
1456 oob
+= chip
->ecc
.prepad
;
1459 chip
->ecc
.calculate(mtd
, p
, oob
);
1460 chip
->write_buf(mtd
, oob
, eccbytes
);
1463 if (chip
->ecc
.postpad
) {
1464 chip
->write_buf(mtd
, oob
, chip
->ecc
.postpad
);
1465 oob
+= chip
->ecc
.postpad
;
1469 /* Calculate remaining oob bytes */
1470 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
1472 chip
->write_buf(mtd
, oob
, i
);
1476 * nand_write_page - [REPLACEABLE] write one page
1477 * @mtd: MTD device structure
1478 * @chip: NAND chip descriptor
1479 * @buf: the data to write
1480 * @page: page number to write
1481 * @cached: cached programming
1483 static int nand_write_page(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1484 const uint8_t *buf
, int page
, int cached
, int raw
)
1488 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, 0x00, page
);
1491 chip
->ecc
.write_page_raw(mtd
, chip
, buf
);
1493 chip
->ecc
.write_page(mtd
, chip
, buf
);
1496 * Cached progamming disabled for now, Not sure if its worth the
1497 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
1501 if (!cached
|| !(chip
->options
& NAND_CACHEPRG
)) {
1503 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1504 status
= chip
->waitfunc(mtd
, chip
);
1506 * See if operation failed and additional status checks are
1509 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
1510 status
= chip
->errstat(mtd
, chip
, FL_WRITING
, status
,
1513 if (status
& NAND_STATUS_FAIL
)
1516 chip
->cmdfunc(mtd
, NAND_CMD_CACHEDPROG
, -1, -1);
1517 status
= chip
->waitfunc(mtd
, chip
);
1520 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1521 /* Send command to read back the data */
1522 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0, page
);
1524 if (chip
->verify_buf(mtd
, buf
, mtd
->writesize
))
1531 * nand_fill_oob - [Internal] Transfer client buffer to oob
1532 * @chip: nand chip structure
1533 * @oob: oob data buffer
1534 * @ops: oob ops structure
1536 static uint8_t *nand_fill_oob(struct nand_chip
*chip
, uint8_t *oob
,
1537 struct mtd_oob_ops
*ops
)
1539 size_t len
= ops
->ooblen
;
1545 memcpy(chip
->oob_poi
+ ops
->ooboffs
, oob
, len
);
1548 case MTD_OOB_AUTO
: {
1549 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
1550 uint32_t boffs
= 0, woffs
= ops
->ooboffs
;
1553 for(; free
->length
&& len
; free
++, len
-= bytes
) {
1554 /* Write request not from offset 0 ? */
1555 if (unlikely(woffs
)) {
1556 if (woffs
>= free
->length
) {
1557 woffs
-= free
->length
;
1560 boffs
= free
->offset
+ woffs
;
1561 bytes
= min_t(size_t, len
,
1562 (free
->length
- woffs
));
1565 bytes
= min_t(size_t, len
, free
->length
);
1566 boffs
= free
->offset
;
1568 memcpy(chip
->oob_poi
+ boffs
, oob
, bytes
);
1579 #define NOTALIGNED(x) (x & (mtd->writesize-1)) != 0
1582 * nand_do_write_ops - [Internal] NAND write with ECC
1583 * @mtd: MTD device structure
1584 * @to: offset to write to
1585 * @ops: oob operations description structure
1587 * NAND write with ECC
1589 static int nand_do_write_ops(struct mtd_info
*mtd
, loff_t to
,
1590 struct mtd_oob_ops
*ops
)
1592 int chipnr
, realpage
, page
, blockmask
;
1593 struct nand_chip
*chip
= mtd
->priv
;
1594 uint32_t writelen
= ops
->len
;
1595 uint8_t *oob
= ops
->oobbuf
;
1596 uint8_t *buf
= ops
->datbuf
;
1597 int bytes
= mtd
->writesize
;
1602 /* reject writes, which are not page aligned */
1603 if (NOTALIGNED(to
) || NOTALIGNED(ops
->len
)) {
1604 printk(KERN_NOTICE
"nand_write: "
1605 "Attempt to write not page aligned data\n");
1612 chipnr
= (int)(to
>> chip
->chip_shift
);
1613 chip
->select_chip(mtd
, chipnr
);
1615 /* Check, if it is write protected */
1616 if (nand_check_wp(mtd
))
1619 realpage
= (int)(to
>> chip
->page_shift
);
1620 page
= realpage
& chip
->pagemask
;
1621 blockmask
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1623 /* Invalidate the page cache, when we write to the cached page */
1624 if (to
<= (chip
->pagebuf
<< chip
->page_shift
) &&
1625 (chip
->pagebuf
<< chip
->page_shift
) < (to
+ ops
->len
))
1628 chip
->oob_poi
= chip
->buffers
->oobwbuf
;
1631 int cached
= writelen
> bytes
&& page
!= blockmask
;
1634 oob
= nand_fill_oob(chip
, oob
, ops
);
1636 ret
= chip
->write_page(mtd
, chip
, buf
, page
, cached
,
1637 (ops
->mode
== MTD_OOB_RAW
));
1648 page
= realpage
& chip
->pagemask
;
1649 /* Check, if we cross a chip boundary */
1652 chip
->select_chip(mtd
, -1);
1653 chip
->select_chip(mtd
, chipnr
);
1658 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1660 ops
->retlen
= ops
->len
- writelen
;
1665 * nand_write - [MTD Interface] NAND write with ECC
1666 * @mtd: MTD device structure
1667 * @to: offset to write to
1668 * @len: number of bytes to write
1669 * @retlen: pointer to variable to store the number of written bytes
1670 * @buf: the data to write
1672 * NAND write with ECC
1674 static int nand_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
1675 size_t *retlen
, const uint8_t *buf
)
1677 struct nand_chip
*chip
= mtd
->priv
;
1680 /* Do not allow reads past end of device */
1681 if ((to
+ len
) > mtd
->size
)
1686 nand_get_device(chip
, mtd
, FL_WRITING
);
1688 chip
->ops
.len
= len
;
1689 chip
->ops
.datbuf
= (uint8_t *)buf
;
1690 chip
->ops
.oobbuf
= NULL
;
1692 ret
= nand_do_write_ops(mtd
, to
, &chip
->ops
);
1694 *retlen
= chip
->ops
.retlen
;
1696 nand_release_device(mtd
);
1702 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
1703 * @mtd: MTD device structure
1704 * @to: offset to write to
1705 * @ops: oob operation description structure
1707 * NAND write out-of-band
1709 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
1710 struct mtd_oob_ops
*ops
)
1712 int chipnr
, page
, status
;
1713 struct nand_chip
*chip
= mtd
->priv
;
1715 DEBUG(MTD_DEBUG_LEVEL3
, "nand_write_oob: to = 0x%08x, len = %i\n",
1716 (unsigned int)to
, (int)ops
->len
);
1718 /* Do not allow write past end of page */
1719 if ((ops
->ooboffs
+ ops
->len
) > mtd
->oobsize
) {
1720 DEBUG(MTD_DEBUG_LEVEL0
, "nand_write_oob: "
1721 "Attempt to write past end of page\n");
1725 chipnr
= (int)(to
>> chip
->chip_shift
);
1726 chip
->select_chip(mtd
, chipnr
);
1728 /* Shift to get page */
1729 page
= (int)(to
>> chip
->page_shift
);
1732 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
1733 * of my DiskOnChip 2000 test units) will clear the whole data page too
1734 * if we don't do this. I have no clue why, but I seem to have 'fixed'
1735 * it in the doc2000 driver in August 1999. dwmw2.
1737 chip
->cmdfunc(mtd
, NAND_CMD_RESET
, -1, -1);
1739 /* Check, if it is write protected */
1740 if (nand_check_wp(mtd
))
1743 /* Invalidate the page cache, if we write to the cached page */
1744 if (page
== chip
->pagebuf
)
1747 chip
->oob_poi
= chip
->buffers
->oobwbuf
;
1748 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1749 nand_fill_oob(chip
, ops
->oobbuf
, ops
);
1750 status
= chip
->ecc
.write_oob(mtd
, chip
, page
& chip
->pagemask
);
1751 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1756 ops
->retlen
= ops
->len
;
1762 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1763 * @mtd: MTD device structure
1764 * @to: offset to write to
1765 * @ops: oob operation description structure
1767 static int nand_write_oob(struct mtd_info
*mtd
, loff_t to
,
1768 struct mtd_oob_ops
*ops
)
1770 struct nand_chip
*chip
= mtd
->priv
;
1771 int ret
= -ENOTSUPP
;
1775 /* Do not allow writes past end of device */
1776 if ((to
+ ops
->len
) > mtd
->size
) {
1777 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1778 "Attempt read beyond end of device\n");
1782 nand_get_device(chip
, mtd
, FL_WRITING
);
1795 ret
= nand_do_write_oob(mtd
, to
, ops
);
1797 ret
= nand_do_write_ops(mtd
, to
, ops
);
1800 nand_release_device(mtd
);
1805 * single_erease_cmd - [GENERIC] NAND standard block erase command function
1806 * @mtd: MTD device structure
1807 * @page: the page address of the block which will be erased
1809 * Standard erase command for NAND chips
1811 static void single_erase_cmd(struct mtd_info
*mtd
, int page
)
1813 struct nand_chip
*chip
= mtd
->priv
;
1814 /* Send commands to erase a block */
1815 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1816 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1820 * multi_erease_cmd - [GENERIC] AND specific block erase command function
1821 * @mtd: MTD device structure
1822 * @page: the page address of the block which will be erased
1824 * AND multi block erase command function
1825 * Erase 4 consecutive blocks
1827 static void multi_erase_cmd(struct mtd_info
*mtd
, int page
)
1829 struct nand_chip
*chip
= mtd
->priv
;
1830 /* Send commands to erase a block */
1831 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1832 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1833 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1834 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1835 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1839 * nand_erase - [MTD Interface] erase block(s)
1840 * @mtd: MTD device structure
1841 * @instr: erase instruction
1843 * Erase one ore more blocks
1845 static int nand_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
1847 return nand_erase_nand(mtd
, instr
, 0);
1850 #define BBT_PAGE_MASK 0xffffff3f
1852 * nand_erase_nand - [Internal] erase block(s)
1853 * @mtd: MTD device structure
1854 * @instr: erase instruction
1855 * @allowbbt: allow erasing the bbt area
1857 * Erase one ore more blocks
1859 int nand_erase_nand(struct mtd_info
*mtd
, struct erase_info
*instr
,
1862 int page
, len
, status
, pages_per_block
, ret
, chipnr
;
1863 struct nand_chip
*chip
= mtd
->priv
;
1864 int rewrite_bbt
[NAND_MAX_CHIPS
]={0};
1865 unsigned int bbt_masked_page
= 0xffffffff;
1867 DEBUG(MTD_DEBUG_LEVEL3
, "nand_erase: start = 0x%08x, len = %i\n",
1868 (unsigned int)instr
->addr
, (unsigned int)instr
->len
);
1870 /* Start address must align on block boundary */
1871 if (instr
->addr
& ((1 << chip
->phys_erase_shift
) - 1)) {
1872 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: Unaligned address\n");
1876 /* Length must align on block boundary */
1877 if (instr
->len
& ((1 << chip
->phys_erase_shift
) - 1)) {
1878 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1879 "Length not block aligned\n");
1883 /* Do not allow erase past end of device */
1884 if ((instr
->len
+ instr
->addr
) > mtd
->size
) {
1885 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1886 "Erase past end of device\n");
1890 instr
->fail_addr
= 0xffffffff;
1892 /* Grab the lock and see if the device is available */
1893 nand_get_device(chip
, mtd
, FL_ERASING
);
1895 /* Shift to get first page */
1896 page
= (int)(instr
->addr
>> chip
->page_shift
);
1897 chipnr
= (int)(instr
->addr
>> chip
->chip_shift
);
1899 /* Calculate pages in each block */
1900 pages_per_block
= 1 << (chip
->phys_erase_shift
- chip
->page_shift
);
1902 /* Select the NAND device */
1903 chip
->select_chip(mtd
, chipnr
);
1905 /* Check, if it is write protected */
1906 if (nand_check_wp(mtd
)) {
1907 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1908 "Device is write protected!!!\n");
1909 instr
->state
= MTD_ERASE_FAILED
;
1914 * If BBT requires refresh, set the BBT page mask to see if the BBT
1915 * should be rewritten. Otherwise the mask is set to 0xffffffff which
1916 * can not be matched. This is also done when the bbt is actually
1917 * erased to avoid recusrsive updates
1919 if (chip
->options
& BBT_AUTO_REFRESH
&& !allowbbt
)
1920 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] & BBT_PAGE_MASK
;
1922 /* Loop through the pages */
1925 instr
->state
= MTD_ERASING
;
1929 * heck if we have a bad block, we do not erase bad blocks !
1931 if (nand_block_checkbad(mtd
, ((loff_t
) page
) <<
1932 chip
->page_shift
, 0, allowbbt
)) {
1933 printk(KERN_WARNING
"nand_erase: attempt to erase a "
1934 "bad block at page 0x%08x\n", page
);
1935 instr
->state
= MTD_ERASE_FAILED
;
1940 * Invalidate the page cache, if we erase the block which
1941 * contains the current cached page
1943 if (page
<= chip
->pagebuf
&& chip
->pagebuf
<
1944 (page
+ pages_per_block
))
1947 chip
->erase_cmd(mtd
, page
& chip
->pagemask
);
1949 status
= chip
->waitfunc(mtd
, chip
);
1952 * See if operation failed and additional status checks are
1955 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
1956 status
= chip
->errstat(mtd
, chip
, FL_ERASING
,
1959 /* See if block erase succeeded */
1960 if (status
& NAND_STATUS_FAIL
) {
1961 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1962 "Failed erase, page 0x%08x\n", page
);
1963 instr
->state
= MTD_ERASE_FAILED
;
1964 instr
->fail_addr
= (page
<< chip
->page_shift
);
1969 * If BBT requires refresh, set the BBT rewrite flag to the
1972 if (bbt_masked_page
!= 0xffffffff &&
1973 (page
& BBT_PAGE_MASK
) == bbt_masked_page
)
1974 rewrite_bbt
[chipnr
] = (page
<< chip
->page_shift
);
1976 /* Increment page address and decrement length */
1977 len
-= (1 << chip
->phys_erase_shift
);
1978 page
+= pages_per_block
;
1980 /* Check, if we cross a chip boundary */
1981 if (len
&& !(page
& chip
->pagemask
)) {
1983 chip
->select_chip(mtd
, -1);
1984 chip
->select_chip(mtd
, chipnr
);
1987 * If BBT requires refresh and BBT-PERCHIP, set the BBT
1988 * page mask to see if this BBT should be rewritten
1990 if (bbt_masked_page
!= 0xffffffff &&
1991 (chip
->bbt_td
->options
& NAND_BBT_PERCHIP
))
1992 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] &
1996 instr
->state
= MTD_ERASE_DONE
;
2000 ret
= instr
->state
== MTD_ERASE_DONE
? 0 : -EIO
;
2001 /* Do call back function */
2003 mtd_erase_callback(instr
);
2005 /* Deselect and wake up anyone waiting on the device */
2006 nand_release_device(mtd
);
2009 * If BBT requires refresh and erase was successful, rewrite any
2010 * selected bad block tables
2012 if (bbt_masked_page
== 0xffffffff || ret
)
2015 for (chipnr
= 0; chipnr
< chip
->numchips
; chipnr
++) {
2016 if (!rewrite_bbt
[chipnr
])
2018 /* update the BBT for chip */
2019 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase_nand: nand_update_bbt "
2020 "(%d:0x%0x 0x%0x)\n", chipnr
, rewrite_bbt
[chipnr
],
2021 chip
->bbt_td
->pages
[chipnr
]);
2022 nand_update_bbt(mtd
, rewrite_bbt
[chipnr
]);
2025 /* Return more or less happy */
2030 * nand_sync - [MTD Interface] sync
2031 * @mtd: MTD device structure
2033 * Sync is actually a wait for chip ready function
2035 static void nand_sync(struct mtd_info
*mtd
)
2037 struct nand_chip
*chip
= mtd
->priv
;
2039 DEBUG(MTD_DEBUG_LEVEL3
, "nand_sync: called\n");
2041 /* Grab the lock and see if the device is available */
2042 nand_get_device(chip
, mtd
, FL_SYNCING
);
2043 /* Release it and go back */
2044 nand_release_device(mtd
);
2048 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2049 * @mtd: MTD device structure
2050 * @offs: offset relative to mtd start
2052 static int nand_block_isbad(struct mtd_info
*mtd
, loff_t offs
)
2054 /* Check for invalid offset */
2055 if (offs
> mtd
->size
)
2058 return nand_block_checkbad(mtd
, offs
, 1, 0);
2062 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2063 * @mtd: MTD device structure
2064 * @ofs: offset relative to mtd start
2066 static int nand_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
2068 struct nand_chip
*chip
= mtd
->priv
;
2071 if ((ret
= nand_block_isbad(mtd
, ofs
))) {
2072 /* If it was bad already, return success and do nothing. */
2078 return chip
->block_markbad(mtd
, ofs
);
2082 * nand_suspend - [MTD Interface] Suspend the NAND flash
2083 * @mtd: MTD device structure
2085 static int nand_suspend(struct mtd_info
*mtd
)
2087 struct nand_chip
*chip
= mtd
->priv
;
2089 return nand_get_device(chip
, mtd
, FL_PM_SUSPENDED
);
2093 * nand_resume - [MTD Interface] Resume the NAND flash
2094 * @mtd: MTD device structure
2096 static void nand_resume(struct mtd_info
*mtd
)
2098 struct nand_chip
*chip
= mtd
->priv
;
2100 if (chip
->state
== FL_PM_SUSPENDED
)
2101 nand_release_device(mtd
);
2103 printk(KERN_ERR
"nand_resume() called for a chip which is not "
2104 "in suspended state\n");
2108 * Set default functions
2110 static void nand_set_defaults(struct nand_chip
*chip
, int busw
)
2112 /* check for proper chip_delay setup, set 20us if not */
2113 if (!chip
->chip_delay
)
2114 chip
->chip_delay
= 20;
2116 /* check, if a user supplied command function given */
2117 if (chip
->cmdfunc
== NULL
)
2118 chip
->cmdfunc
= nand_command
;
2120 /* check, if a user supplied wait function given */
2121 if (chip
->waitfunc
== NULL
)
2122 chip
->waitfunc
= nand_wait
;
2124 if (!chip
->select_chip
)
2125 chip
->select_chip
= nand_select_chip
;
2126 if (!chip
->read_byte
)
2127 chip
->read_byte
= busw
? nand_read_byte16
: nand_read_byte
;
2128 if (!chip
->read_word
)
2129 chip
->read_word
= nand_read_word
;
2130 if (!chip
->block_bad
)
2131 chip
->block_bad
= nand_block_bad
;
2132 if (!chip
->block_markbad
)
2133 chip
->block_markbad
= nand_default_block_markbad
;
2134 if (!chip
->write_buf
)
2135 chip
->write_buf
= busw
? nand_write_buf16
: nand_write_buf
;
2136 if (!chip
->read_buf
)
2137 chip
->read_buf
= busw
? nand_read_buf16
: nand_read_buf
;
2138 if (!chip
->verify_buf
)
2139 chip
->verify_buf
= busw
? nand_verify_buf16
: nand_verify_buf
;
2140 if (!chip
->scan_bbt
)
2141 chip
->scan_bbt
= nand_default_bbt
;
2143 if (!chip
->controller
) {
2144 chip
->controller
= &chip
->hwcontrol
;
2145 spin_lock_init(&chip
->controller
->lock
);
2146 init_waitqueue_head(&chip
->controller
->wq
);
2152 * Get the flash and manufacturer id and lookup if the type is supported
2154 static struct nand_flash_dev
*nand_get_flash_type(struct mtd_info
*mtd
,
2155 struct nand_chip
*chip
,
2156 int busw
, int *maf_id
)
2158 struct nand_flash_dev
*type
= NULL
;
2159 int i
, dev_id
, maf_idx
;
2161 /* Select the device */
2162 chip
->select_chip(mtd
, 0);
2164 /* Send the command for reading device ID */
2165 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2167 /* Read manufacturer and device IDs */
2168 *maf_id
= chip
->read_byte(mtd
);
2169 dev_id
= chip
->read_byte(mtd
);
2171 /* Lookup the flash id */
2172 for (i
= 0; nand_flash_ids
[i
].name
!= NULL
; i
++) {
2173 if (dev_id
== nand_flash_ids
[i
].id
) {
2174 type
= &nand_flash_ids
[i
];
2180 return ERR_PTR(-ENODEV
);
2183 mtd
->name
= type
->name
;
2185 chip
->chipsize
= type
->chipsize
<< 20;
2187 /* Newer devices have all the information in additional id bytes */
2188 if (!type
->pagesize
) {
2190 /* The 3rd id byte contains non relevant data ATM */
2191 extid
= chip
->read_byte(mtd
);
2192 /* The 4th id byte is the important one */
2193 extid
= chip
->read_byte(mtd
);
2195 mtd
->writesize
= 1024 << (extid
& 0x3);
2198 mtd
->oobsize
= (8 << (extid
& 0x01)) * (mtd
->writesize
>> 9);
2200 /* Calc blocksize. Blocksize is multiples of 64KiB */
2201 mtd
->erasesize
= (64 * 1024) << (extid
& 0x03);
2203 /* Get buswidth information */
2204 busw
= (extid
& 0x01) ? NAND_BUSWIDTH_16
: 0;
2208 * Old devices have chip data hardcoded in the device id table
2210 mtd
->erasesize
= type
->erasesize
;
2211 mtd
->writesize
= type
->pagesize
;
2212 mtd
->oobsize
= mtd
->writesize
/ 32;
2213 busw
= type
->options
& NAND_BUSWIDTH_16
;
2216 /* Try to identify manufacturer */
2217 for (maf_idx
= 0; nand_manuf_ids
[maf_idx
].id
!= 0x0; maf_idx
++) {
2218 if (nand_manuf_ids
[maf_idx
].id
== *maf_id
)
2223 * Check, if buswidth is correct. Hardware drivers should set
2226 if (busw
!= (chip
->options
& NAND_BUSWIDTH_16
)) {
2227 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2228 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
,
2229 dev_id
, nand_manuf_ids
[maf_idx
].name
, mtd
->name
);
2230 printk(KERN_WARNING
"NAND bus width %d instead %d bit\n",
2231 (chip
->options
& NAND_BUSWIDTH_16
) ? 16 : 8,
2233 return ERR_PTR(-EINVAL
);
2236 /* Calculate the address shift from the page size */
2237 chip
->page_shift
= ffs(mtd
->writesize
) - 1;
2238 /* Convert chipsize to number of pages per chip -1. */
2239 chip
->pagemask
= (chip
->chipsize
>> chip
->page_shift
) - 1;
2241 chip
->bbt_erase_shift
= chip
->phys_erase_shift
=
2242 ffs(mtd
->erasesize
) - 1;
2243 chip
->chip_shift
= ffs(chip
->chipsize
) - 1;
2245 /* Set the bad block position */
2246 chip
->badblockpos
= mtd
->writesize
> 512 ?
2247 NAND_LARGE_BADBLOCK_POS
: NAND_SMALL_BADBLOCK_POS
;
2249 /* Get chip options, preserve non chip based options */
2250 chip
->options
&= ~NAND_CHIPOPTIONS_MSK
;
2251 chip
->options
|= type
->options
& NAND_CHIPOPTIONS_MSK
;
2254 * Set chip as a default. Board drivers can override it, if necessary
2256 chip
->options
|= NAND_NO_AUTOINCR
;
2258 /* Check if chip is a not a samsung device. Do not clear the
2259 * options for chips which are not having an extended id.
2261 if (*maf_id
!= NAND_MFR_SAMSUNG
&& !type
->pagesize
)
2262 chip
->options
&= ~NAND_SAMSUNG_LP_OPTIONS
;
2264 /* Check for AND chips with 4 page planes */
2265 if (chip
->options
& NAND_4PAGE_ARRAY
)
2266 chip
->erase_cmd
= multi_erase_cmd
;
2268 chip
->erase_cmd
= single_erase_cmd
;
2270 /* Do not replace user supplied command function ! */
2271 if (mtd
->writesize
> 512 && chip
->cmdfunc
== nand_command
)
2272 chip
->cmdfunc
= nand_command_lp
;
2274 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2275 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
, dev_id
,
2276 nand_manuf_ids
[maf_idx
].name
, type
->name
);
2282 * nand_scan_ident - [NAND Interface] Scan for the NAND device
2283 * @mtd: MTD device structure
2284 * @maxchips: Number of chips to scan for
2286 * This is the first phase of the normal nand_scan() function. It
2287 * reads the flash ID and sets up MTD fields accordingly.
2289 * The mtd->owner field must be set to the module of the caller.
2291 int nand_scan_ident(struct mtd_info
*mtd
, int maxchips
)
2293 int i
, busw
, nand_maf_id
;
2294 struct nand_chip
*chip
= mtd
->priv
;
2295 struct nand_flash_dev
*type
;
2297 /* Get buswidth to select the correct functions */
2298 busw
= chip
->options
& NAND_BUSWIDTH_16
;
2299 /* Set the default functions */
2300 nand_set_defaults(chip
, busw
);
2302 /* Read the flash type */
2303 type
= nand_get_flash_type(mtd
, chip
, busw
, &nand_maf_id
);
2306 printk(KERN_WARNING
"No NAND device found!!!\n");
2307 chip
->select_chip(mtd
, -1);
2308 return PTR_ERR(type
);
2311 /* Check for a chip array */
2312 for (i
= 1; i
< maxchips
; i
++) {
2313 chip
->select_chip(mtd
, i
);
2314 /* Send the command for reading device ID */
2315 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2316 /* Read manufacturer and device IDs */
2317 if (nand_maf_id
!= chip
->read_byte(mtd
) ||
2318 type
->id
!= chip
->read_byte(mtd
))
2322 printk(KERN_INFO
"%d NAND chips detected\n", i
);
2324 /* Store the number of chips and calc total size for mtd */
2326 mtd
->size
= i
* chip
->chipsize
;
2333 * nand_scan_tail - [NAND Interface] Scan for the NAND device
2334 * @mtd: MTD device structure
2335 * @maxchips: Number of chips to scan for
2337 * This is the second phase of the normal nand_scan() function. It
2338 * fills out all the uninitialized function pointers with the defaults
2339 * and scans for a bad block table if appropriate.
2341 int nand_scan_tail(struct mtd_info
*mtd
)
2344 struct nand_chip
*chip
= mtd
->priv
;
2346 if (!(chip
->options
& NAND_OWN_BUFFERS
))
2347 chip
->buffers
= kmalloc(sizeof(*chip
->buffers
), GFP_KERNEL
);
2351 /* Preset the internal oob write buffer */
2352 memset(chip
->buffers
->oobwbuf
, 0xff, mtd
->oobsize
);
2355 * If no default placement scheme is given, select an appropriate one
2357 if (!chip
->ecc
.layout
) {
2358 switch (mtd
->oobsize
) {
2360 chip
->ecc
.layout
= &nand_oob_8
;
2363 chip
->ecc
.layout
= &nand_oob_16
;
2366 chip
->ecc
.layout
= &nand_oob_64
;
2369 printk(KERN_WARNING
"No oob scheme defined for "
2370 "oobsize %d\n", mtd
->oobsize
);
2375 if (!chip
->write_page
)
2376 chip
->write_page
= nand_write_page
;
2379 * check ECC mode, default to software if 3byte/512byte hardware ECC is
2380 * selected and we have 256 byte pagesize fallback to software ECC
2382 if (!chip
->ecc
.read_page_raw
)
2383 chip
->ecc
.read_page_raw
= nand_read_page_raw
;
2384 if (!chip
->ecc
.write_page_raw
)
2385 chip
->ecc
.write_page_raw
= nand_write_page_raw
;
2387 switch (chip
->ecc
.mode
) {
2389 /* Use standard hwecc read page function ? */
2390 if (!chip
->ecc
.read_page
)
2391 chip
->ecc
.read_page
= nand_read_page_hwecc
;
2392 if (!chip
->ecc
.write_page
)
2393 chip
->ecc
.write_page
= nand_write_page_hwecc
;
2394 if (!chip
->ecc
.read_oob
)
2395 chip
->ecc
.read_oob
= nand_read_oob_std
;
2396 if (!chip
->ecc
.write_oob
)
2397 chip
->ecc
.write_oob
= nand_write_oob_std
;
2399 case NAND_ECC_HW_SYNDROME
:
2400 if (!chip
->ecc
.calculate
|| !chip
->ecc
.correct
||
2402 printk(KERN_WARNING
"No ECC functions supplied, "
2403 "Hardware ECC not possible\n");
2406 /* Use standard syndrome read/write page function ? */
2407 if (!chip
->ecc
.read_page
)
2408 chip
->ecc
.read_page
= nand_read_page_syndrome
;
2409 if (!chip
->ecc
.write_page
)
2410 chip
->ecc
.write_page
= nand_write_page_syndrome
;
2411 if (!chip
->ecc
.read_oob
)
2412 chip
->ecc
.read_oob
= nand_read_oob_syndrome
;
2413 if (!chip
->ecc
.write_oob
)
2414 chip
->ecc
.write_oob
= nand_write_oob_syndrome
;
2416 if (mtd
->writesize
>= chip
->ecc
.size
)
2418 printk(KERN_WARNING
"%d byte HW ECC not possible on "
2419 "%d byte page size, fallback to SW ECC\n",
2420 chip
->ecc
.size
, mtd
->writesize
);
2421 chip
->ecc
.mode
= NAND_ECC_SOFT
;
2424 chip
->ecc
.calculate
= nand_calculate_ecc
;
2425 chip
->ecc
.correct
= nand_correct_data
;
2426 chip
->ecc
.read_page
= nand_read_page_swecc
;
2427 chip
->ecc
.write_page
= nand_write_page_swecc
;
2428 chip
->ecc
.read_oob
= nand_read_oob_std
;
2429 chip
->ecc
.write_oob
= nand_write_oob_std
;
2430 chip
->ecc
.size
= 256;
2431 chip
->ecc
.bytes
= 3;
2435 printk(KERN_WARNING
"NAND_ECC_NONE selected by board driver. "
2436 "This is not recommended !!\n");
2437 chip
->ecc
.read_page
= nand_read_page_raw
;
2438 chip
->ecc
.write_page
= nand_write_page_raw
;
2439 chip
->ecc
.read_oob
= nand_read_oob_std
;
2440 chip
->ecc
.write_oob
= nand_write_oob_std
;
2441 chip
->ecc
.size
= mtd
->writesize
;
2442 chip
->ecc
.bytes
= 0;
2446 printk(KERN_WARNING
"Invalid NAND_ECC_MODE %d\n",
2452 * The number of bytes available for a client to place data into
2453 * the out of band area
2455 chip
->ecc
.layout
->oobavail
= 0;
2456 for (i
= 0; chip
->ecc
.layout
->oobfree
[i
].length
; i
++)
2457 chip
->ecc
.layout
->oobavail
+=
2458 chip
->ecc
.layout
->oobfree
[i
].length
;
2461 * Set the number of read / write steps for one page depending on ECC
2464 chip
->ecc
.steps
= mtd
->writesize
/ chip
->ecc
.size
;
2465 if(chip
->ecc
.steps
* chip
->ecc
.size
!= mtd
->writesize
) {
2466 printk(KERN_WARNING
"Invalid ecc parameters\n");
2469 chip
->ecc
.total
= chip
->ecc
.steps
* chip
->ecc
.bytes
;
2471 /* Initialize state */
2472 chip
->state
= FL_READY
;
2474 /* De-select the device */
2475 chip
->select_chip(mtd
, -1);
2477 /* Invalidate the pagebuffer reference */
2480 /* Fill in remaining MTD driver data */
2481 mtd
->type
= MTD_NANDFLASH
;
2482 mtd
->flags
= MTD_CAP_NANDFLASH
;
2483 mtd
->ecctype
= MTD_ECC_SW
;
2484 mtd
->erase
= nand_erase
;
2486 mtd
->unpoint
= NULL
;
2487 mtd
->read
= nand_read
;
2488 mtd
->write
= nand_write
;
2489 mtd
->read_oob
= nand_read_oob
;
2490 mtd
->write_oob
= nand_write_oob
;
2491 mtd
->sync
= nand_sync
;
2494 mtd
->suspend
= nand_suspend
;
2495 mtd
->resume
= nand_resume
;
2496 mtd
->block_isbad
= nand_block_isbad
;
2497 mtd
->block_markbad
= nand_block_markbad
;
2499 /* propagate ecc.layout to mtd_info */
2500 mtd
->ecclayout
= chip
->ecc
.layout
;
2502 /* Check, if we should skip the bad block table scan */
2503 if (chip
->options
& NAND_SKIP_BBTSCAN
)
2506 /* Build bad block table */
2507 return chip
->scan_bbt(mtd
);
2510 /* module_text_address() isn't exported, and it's mostly a pointless
2511 test if this is a module _anyway_ -- they'd have to try _really_ hard
2512 to call us from in-kernel code if the core NAND support is modular. */
2514 #define caller_is_module() (1)
2516 #define caller_is_module() \
2517 module_text_address((unsigned long)__builtin_return_address(0))
2521 * nand_scan - [NAND Interface] Scan for the NAND device
2522 * @mtd: MTD device structure
2523 * @maxchips: Number of chips to scan for
2525 * This fills out all the uninitialized function pointers
2526 * with the defaults.
2527 * The flash ID is read and the mtd/chip structures are
2528 * filled with the appropriate values.
2529 * The mtd->owner field must be set to the module of the caller
2532 int nand_scan(struct mtd_info
*mtd
, int maxchips
)
2536 /* Many callers got this wrong, so check for it for a while... */
2537 if (!mtd
->owner
&& caller_is_module()) {
2538 printk(KERN_CRIT
"nand_scan() called with NULL mtd->owner!\n");
2542 ret
= nand_scan_ident(mtd
, maxchips
);
2544 ret
= nand_scan_tail(mtd
);
2549 * nand_release - [NAND Interface] Free resources held by the NAND device
2550 * @mtd: MTD device structure
2552 void nand_release(struct mtd_info
*mtd
)
2554 struct nand_chip
*chip
= mtd
->priv
;
2556 #ifdef CONFIG_MTD_PARTITIONS
2557 /* Deregister partitions */
2558 del_mtd_partitions(mtd
);
2560 /* Deregister the device */
2561 del_mtd_device(mtd
);
2563 /* Free bad block table memory */
2565 if (!(chip
->options
& NAND_OWN_BUFFERS
))
2566 kfree(chip
->buffers
);
2569 EXPORT_SYMBOL_GPL(nand_scan
);
2570 EXPORT_SYMBOL_GPL(nand_scan_ident
);
2571 EXPORT_SYMBOL_GPL(nand_scan_tail
);
2572 EXPORT_SYMBOL_GPL(nand_release
);
2574 static int __init
nand_base_init(void)
2576 led_trigger_register_simple("nand-disk", &nand_led_trigger
);
2580 static void __exit
nand_base_exit(void)
2582 led_trigger_unregister_simple(nand_led_trigger
);
2585 module_init(nand_base_init
);
2586 module_exit(nand_base_exit
);
2588 MODULE_LICENSE("GPL");
2589 MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2590 MODULE_DESCRIPTION("Generic NAND flash driver code");