Misc au1200 updates.
[linux-2.6/verdex.git] / arch / mips / au1000 / pb1200 / board_setup.c
bloba45b17538ac988aecfb2f3e017520c6fa3718245
1 /*
3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1200/Db1200 board setup.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/config.h>
27 #include <linux/init.h>
28 #include <linux/sched.h>
29 #include <linux/ioport.h>
30 #include <linux/mm.h>
31 #include <linux/console.h>
32 #include <linux/mc146818rtc.h>
33 #include <linux/delay.h>
35 #if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
36 #include <linux/ide.h>
37 #endif
39 #include <asm/cpu.h>
40 #include <asm/bootinfo.h>
41 #include <asm/irq.h>
42 #include <asm/mipsregs.h>
43 #include <asm/reboot.h>
44 #include <asm/pgtable.h>
45 #include <asm/mach-au1x00/au1000.h>
46 #include <asm/mach-au1x00/au1xxx_dbdma.h>
48 #ifdef CONFIG_MIPS_PB1200
49 #include <asm/mach-pb1x00/pb1200.h>
50 #endif
52 #ifdef CONFIG_MIPS_DB1200
53 #include <asm/mach-db1x00/db1200.h>
54 #define PB1200_ETH_INT DB1200_ETH_INT
55 #define PB1200_IDE_INT DB1200_IDE_INT
56 #endif
58 extern void _board_init_irq(void);
59 extern void (*board_init_irq)(void);
61 void board_reset (void)
63 bcsr->resets = 0;
64 bcsr->system = 0;
67 void __init board_setup(void)
69 char *argptr = NULL;
70 u32 pin_func;
72 #if 0
73 /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
74 * but it is board specific code, so put it here.
76 pin_func = au_readl(SYS_PINFUNC);
77 au_sync();
78 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
79 au_writel(pin_func, SYS_PINFUNC);
81 au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
82 au_sync();
83 #endif
85 #if defined(CONFIG_I2C_AU1550)
87 u32 freq0, clksrc;
89 /* Select SMBUS in CPLD */
90 bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
92 pin_func = au_readl(SYS_PINFUNC);
93 au_sync();
94 pin_func &= ~(3<<17 | 1<<4);
95 /* Set GPIOs correctly */
96 pin_func |= 2<<17;
97 au_writel(pin_func, SYS_PINFUNC);
98 au_sync();
100 /* The i2c driver depends on 50Mhz clock */
101 freq0 = au_readl(SYS_FREQCTRL0);
102 au_sync();
103 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
104 freq0 |= (3<<SYS_FC_FRDIV1_BIT);
105 /* 396Mhz / (3+1)*2 == 49.5Mhz */
106 au_writel(freq0, SYS_FREQCTRL0);
107 au_sync();
108 freq0 |= SYS_FC_FE1;
109 au_writel(freq0, SYS_FREQCTRL0);
110 au_sync();
112 clksrc = au_readl(SYS_CLKSRC);
113 au_sync();
114 clksrc &= ~0x01f00000;
115 /* bit 22 is EXTCLK0 for PSC0 */
116 clksrc |= (0x3 << 22);
117 au_writel(clksrc, SYS_CLKSRC);
118 au_sync();
120 #endif
122 #ifdef CONFIG_FB_AU1200
123 argptr = prom_getcmdline();
124 #ifdef CONFIG_MIPS_PB1200
125 strcat(argptr, " video=au1200fb:panel:bs");
126 #endif
127 #ifdef CONFIG_MIPS_DB1200
128 strcat(argptr, " video=au1200fb:panel:bs");
129 #endif
130 #endif
132 /* The Pb1200 development board uses external MUX for PSC0 to
133 support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
135 #if defined(CONFIG_AU1XXX_PSC_SPI) && defined(CONFIG_I2C_AU1550)
136 #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
137 Refer to Pb1200/Db1200 documentation.
138 #elif defined( CONFIG_AU1XXX_PSC_SPI )
139 bcsr->resets |= BCSR_RESETS_PCS0MUX;
140 /*Hard Coding Value to enable Temp Sensors [bit 14] Value for SOC Au1200. Pls refer documentation*/
141 bcsr->resets =0x900f;
142 #elif defined( CONFIG_I2C_AU1550 )
143 bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
144 #endif
145 au_sync();
147 #ifdef CONFIG_MIPS_PB1200
148 printk("AMD Alchemy Pb1200 Board\n");
149 #endif
150 #ifdef CONFIG_MIPS_DB1200
151 printk("AMD Alchemy Db1200 Board\n");
152 #endif
154 /* Setup Pb1200 External Interrupt Controller */
156 extern void (*board_init_irq)(void);
157 extern void _board_init_irq(void);
158 board_init_irq = _board_init_irq;
163 board_au1200fb_panel (void)
165 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
166 int p;
168 p = bcsr->switches;
169 p >>= 8;
170 p &= 0x0F;
171 return p;
175 board_au1200fb_panel_init (void)
177 /* Apply power */
178 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
179 bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
180 /*printk("board_au1200fb_panel_init()\n"); */
181 return 0;
185 board_au1200fb_panel_shutdown (void)
187 /* Remove power */
188 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
189 bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
190 /*printk("board_au1200fb_panel_shutdown()\n"); */
191 return 0;