drivers/net/3c501.h

   1
   2 /*
   3  *      Index to functions.
   4  */
   5
   6 static int  el1_probe1(struct net_device *dev, int ioaddr);
   7 static int  el_open(struct net_device *dev);
   8 static void el_timeout(struct net_device *dev);
   9 static int  el_start_xmit(struct sk_buff *skb, struct net_device *dev);
  10 static irqreturn_t el_interrupt(int irq, void *dev_id);
  11 static void el_receive(struct net_device *dev);
  12 static void el_reset(struct net_device *dev);
  13 static int  el1_close(struct net_device *dev);
  14 static void set_multicast_list(struct net_device *dev);
  15 static const struct ethtool_ops netdev_ethtool_ops;
  16
  17 #define EL1_IO_EXTENT   16
  18
  19 #ifndef EL_DEBUG
  20 #define EL_DEBUG  0     /* use 0 for production, 1 for devel., >2 for debug */
  21 #endif                  /* Anything above 5 is wordy death! */
  22 #define debug el_debug
  23 static int el_debug = EL_DEBUG;
  24
  25 /*
  26  *      Board-specific info in netdev_priv(dev).
  27  */
  28
  29 struct net_local
  30 {
  31         int             tx_pkt_start;   /* The length of the current Tx packet. */
  32         int             collisions;     /* Tx collisions this packet */
  33         int             loading;        /* Spot buffer load collisions */
  34         int             txing;          /* True if card is in TX mode */
  35         spinlock_t      lock;           /* Serializing lock */
  36 };
  37
  38
  39 #define RX_STATUS (ioaddr + 0x06)
  40 #define RX_CMD    RX_STATUS
  41 #define TX_STATUS (ioaddr + 0x07)
  42 #define TX_CMD    TX_STATUS
  43 #define GP_LOW    (ioaddr + 0x08)
  44 #define GP_HIGH   (ioaddr + 0x09)
  45 #define RX_BUF_CLR (ioaddr + 0x0A)
  46 #define RX_LOW    (ioaddr + 0x0A)
  47 #define RX_HIGH   (ioaddr + 0x0B)
  48 #define SAPROM    (ioaddr + 0x0C)
  49 #define AX_STATUS (ioaddr + 0x0E)
  50 #define AX_CMD    AX_STATUS
  51 #define DATAPORT  (ioaddr + 0x0F)
  52 #define TX_RDY 0x08             /* In TX_STATUS */
  53
  54 #define EL1_DATAPTR     0x08
  55 #define EL1_RXPTR       0x0A
  56 #define EL1_SAPROM      0x0C
  57 #define EL1_DATAPORT    0x0f
  58
  59 /*
  60  *      Writes to the ax command register.
  61  */
  62
  63 #define AX_OFF  0x00                    /* Irq off, buffer access on */
  64 #define AX_SYS  0x40                    /* Load the buffer */
  65 #define AX_XMIT 0x44                    /* Transmit a packet */
  66 #define AX_RX   0x48                    /* Receive a packet */
  67 #define AX_LOOP 0x0C                    /* Loopback mode */
  68 #define AX_RESET 0x80
  69
  70 /*
  71  *      Normal receive mode written to RX_STATUS.  We must intr on short packets
  72  *      to avoid bogus rx lockups.
  73  */
  74
  75 #define RX_NORM 0xA8            /* 0x68 == all addrs, 0xA8 only to me. */
  76 #define RX_PROM 0x68            /* Senior Prom, uhmm promiscuous mode. */
  77 #define RX_MULT 0xE8            /* Accept multicast packets. */
  78 #define TX_NORM 0x0A            /* Interrupt on everything that might hang the chip */
  79
  80 /*
  81  *      TX_STATUS register.
  82  */
  83
  84 #define TX_COLLISION 0x02
  85 #define TX_16COLLISIONS 0x04
  86 #define TX_READY 0x08
  87
  88 #define RX_RUNT 0x08
  89 #define RX_MISSED 0x01          /* Missed a packet due to 3c501 braindamage. */
  90 #define RX_GOOD 0x30            /* Good packet 0x20, or simple overflow 0x10. */
  91