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x86: remove vestigial fix_ioremap prototypes
[linux-2.6/verdex.git] / drivers / net / wireless / atmel.c
blob4223672c4432a5784befad643e91b0f74e41cbb2
1 /*** -*- linux-c -*- **********************************************************
2
3 Driver for Atmel at76c502 at76c504 and at76c506 wireless cards.
4
5 Copyright 2000-2001 ATMEL Corporation.
6 Copyright 2003-2004 Simon Kelley.
7
8 This code was developed from version 2.1.1 of the Atmel drivers,
9 released by Atmel corp. under the GPL in December 2002. It also
10 includes code from the Linux aironet drivers (C) Benjamin Reed,
11 and the Linux PCMCIA package, (C) David Hinds and the Linux wireless
12 extensions, (C) Jean Tourrilhes.
13
14 The firmware module for reading the MAC address of the card comes from
15 net.russotto.AtmelMACFW, written by Matthew T. Russotto and copyright
16 by him. net.russotto.AtmelMACFW is used under the GPL license version 2.
17 This file contains the module in binary form and, under the terms
18 of the GPL, in source form. The source is located at the end of the file.
19
20 This program is free software; you can redistribute it and/or modify
21 it under the terms of the GNU General Public License as published by
22 the Free Software Foundation; either version 2 of the License, or
23 (at your option) any later version.
24
25 This software is distributed in the hope that it will be useful,
26 but WITHOUT ANY WARRANTY; without even the implied warranty of
27 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 GNU General Public License for more details.
29
30 You should have received a copy of the GNU General Public License
31 along with Atmel wireless lan drivers; if not, write to the Free Software
32 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
33
34 For all queries about this code, please contact the current author,
35 Simon Kelley <simon@thekelleys.org.uk> and not Atmel Corporation.
36
37 Credit is due to HP UK and Cambridge Online Systems Ltd for supplying
38 hardware used during development of this driver.
39
40 ******************************************************************************/
41
42 #include <linux/init.h>
43
44 #include <linux/kernel.h>
45 #include <linux/ptrace.h>
46 #include <linux/slab.h>
47 #include <linux/string.h>
48 #include <linux/ctype.h>
49 #include <linux/timer.h>
50 #include <asm/byteorder.h>
51 #include <asm/io.h>
52 #include <asm/system.h>
53 #include <asm/uaccess.h>
54 #include <linux/module.h>
55 #include <linux/netdevice.h>
56 #include <linux/etherdevice.h>
57 #include <linux/skbuff.h>
58 #include <linux/if_arp.h>
59 #include <linux/ioport.h>
60 #include <linux/fcntl.h>
61 #include <linux/delay.h>
62 #include <linux/wireless.h>
63 #include <net/iw_handler.h>
64 #include <linux/crc32.h>
65 #include <linux/proc_fs.h>
66 #include <linux/device.h>
67 #include <linux/moduleparam.h>
68 #include <linux/firmware.h>
69 #include <linux/jiffies.h>
70 #include <linux/ieee80211.h>
71 #include "atmel.h"
72
73 #define DRIVER_MAJOR 0
74 #define DRIVER_MINOR 98
75
76 MODULE_AUTHOR("Simon Kelley");
77 MODULE_DESCRIPTION("Support for Atmel at76c50x 802.11 wireless ethernet cards.");
78 MODULE_LICENSE("GPL");
79 MODULE_SUPPORTED_DEVICE("Atmel at76c50x wireless cards");
80
81 /* The name of the firmware file to be loaded
82 over-rides any automatic selection */
83 static char *firmware = NULL;
84 module_param(firmware, charp, 0);
85
86 /* table of firmware file names */
87 static struct {
88 AtmelFWType fw_type;
89 const char *fw_file;
90 const char *fw_file_ext;
91 } fw_table[] = {
92 { ATMEL_FW_TYPE_502, "atmel_at76c502", "bin" },
93 { ATMEL_FW_TYPE_502D, "atmel_at76c502d", "bin" },
94 { ATMEL_FW_TYPE_502E, "atmel_at76c502e", "bin" },
95 { ATMEL_FW_TYPE_502_3COM, "atmel_at76c502_3com", "bin" },
96 { ATMEL_FW_TYPE_504, "atmel_at76c504", "bin" },
97 { ATMEL_FW_TYPE_504_2958, "atmel_at76c504_2958", "bin" },
98 { ATMEL_FW_TYPE_504A_2958,"atmel_at76c504a_2958","bin" },
99 { ATMEL_FW_TYPE_506, "atmel_at76c506", "bin" },
100 { ATMEL_FW_TYPE_NONE, NULL, NULL }
101 };
102
103 #define MAX_SSID_LENGTH 32
104 #define MGMT_JIFFIES (256 * HZ / 100)
105
106 #define MAX_BSS_ENTRIES 64
107
108 /* registers */
109 #define GCR 0x00 // (SIR0) General Configuration Register
110 #define BSR 0x02 // (SIR1) Bank Switching Select Register
111 #define AR 0x04
112 #define DR 0x08
113 #define MR1 0x12 // Mirror Register 1
114 #define MR2 0x14 // Mirror Register 2
115 #define MR3 0x16 // Mirror Register 3
116 #define MR4 0x18 // Mirror Register 4
117
118 #define GPR1 0x0c
119 #define GPR2 0x0e
120 #define GPR3 0x10
121 //
122 // Constants for the GCR register.
123 //
124 #define GCR_REMAP 0x0400 // Remap internal SRAM to 0
125 #define GCR_SWRES 0x0080 // BIU reset (ARM and PAI are NOT reset)
126 #define GCR_CORES 0x0060 // Core Reset (ARM and PAI are reset)
127 #define GCR_ENINT 0x0002 // Enable Interrupts
128 #define GCR_ACKINT 0x0008 // Acknowledge Interrupts
129
130 #define BSS_SRAM 0x0200 // AMBA module selection --> SRAM
131 #define BSS_IRAM 0x0100 // AMBA module selection --> IRAM
132 //
133 // Constants for the MR registers.
134 //
135 #define MAC_INIT_COMPLETE 0x0001 // MAC init has been completed
136 #define MAC_BOOT_COMPLETE 0x0010 // MAC boot has been completed
137 #define MAC_INIT_OK 0x0002 // MAC boot has been completed
138
139 #define MIB_MAX_DATA_BYTES 212
140 #define MIB_HEADER_SIZE 4 /* first four fields */
141
142 struct get_set_mib {
143 u8 type;
144 u8 size;
145 u8 index;
146 u8 reserved;
147 u8 data[MIB_MAX_DATA_BYTES];
148 };
149
150 struct rx_desc {
151 u32 Next;
152 u16 MsduPos;
153 u16 MsduSize;
154
155 u8 State;
156 u8 Status;
157 u8 Rate;
158 u8 Rssi;
159 u8 LinkQuality;
160 u8 PreambleType;
161 u16 Duration;
162 u32 RxTime;
163 };
164
165 #define RX_DESC_FLAG_VALID 0x80
166 #define RX_DESC_FLAG_CONSUMED 0x40
167 #define RX_DESC_FLAG_IDLE 0x00
168
169 #define RX_STATUS_SUCCESS 0x00
170
171 #define RX_DESC_MSDU_POS_OFFSET 4
172 #define RX_DESC_MSDU_SIZE_OFFSET 6
173 #define RX_DESC_FLAGS_OFFSET 8
174 #define RX_DESC_STATUS_OFFSET 9
175 #define RX_DESC_RSSI_OFFSET 11
176 #define RX_DESC_LINK_QUALITY_OFFSET 12
177 #define RX_DESC_PREAMBLE_TYPE_OFFSET 13
178 #define RX_DESC_DURATION_OFFSET 14
179 #define RX_DESC_RX_TIME_OFFSET 16
180
181 struct tx_desc {
182 u32 NextDescriptor;
183 u16 TxStartOfFrame;
184 u16 TxLength;
185
186 u8 TxState;
187 u8 TxStatus;
188 u8 RetryCount;
189
190 u8 TxRate;
191
192 u8 KeyIndex;
193 u8 ChiperType;
194 u8 ChipreLength;
195 u8 Reserved1;
196
197 u8 Reserved;
198 u8 PacketType;
199 u16 HostTxLength;
200 };
201
202 #define TX_DESC_NEXT_OFFSET 0
203 #define TX_DESC_POS_OFFSET 4
204 #define TX_DESC_SIZE_OFFSET 6
205 #define TX_DESC_FLAGS_OFFSET 8
206 #define TX_DESC_STATUS_OFFSET 9
207 #define TX_DESC_RETRY_OFFSET 10
208 #define TX_DESC_RATE_OFFSET 11
209 #define TX_DESC_KEY_INDEX_OFFSET 12
210 #define TX_DESC_CIPHER_TYPE_OFFSET 13
211 #define TX_DESC_CIPHER_LENGTH_OFFSET 14
212 #define TX_DESC_PACKET_TYPE_OFFSET 17
213 #define TX_DESC_HOST_LENGTH_OFFSET 18
214
215 ///////////////////////////////////////////////////////
216 // Host-MAC interface
217 ///////////////////////////////////////////////////////
218
219 #define TX_STATUS_SUCCESS 0x00
220
221 #define TX_FIRM_OWN 0x80
222 #define TX_DONE 0x40
223
224 #define TX_ERROR 0x01
225
226 #define TX_PACKET_TYPE_DATA 0x01
227 #define TX_PACKET_TYPE_MGMT 0x02
228
229 #define ISR_EMPTY 0x00 // no bits set in ISR
230 #define ISR_TxCOMPLETE 0x01 // packet transmitted
231 #define ISR_RxCOMPLETE 0x02 // packet received
232 #define ISR_RxFRAMELOST 0x04 // Rx Frame lost
233 #define ISR_FATAL_ERROR 0x08 // Fatal error
234 #define ISR_COMMAND_COMPLETE 0x10 // command completed
235 #define ISR_OUT_OF_RANGE 0x20 // command completed
236 #define ISR_IBSS_MERGE 0x40 // (4.1.2.30): IBSS merge
237 #define ISR_GENERIC_IRQ 0x80
238
239 #define Local_Mib_Type 0x01
240 #define Mac_Address_Mib_Type 0x02
241 #define Mac_Mib_Type 0x03
242 #define Statistics_Mib_Type 0x04
243 #define Mac_Mgmt_Mib_Type 0x05
244 #define Mac_Wep_Mib_Type 0x06
245 #define Phy_Mib_Type 0x07
246 #define Multi_Domain_MIB 0x08
247
248 #define MAC_MGMT_MIB_CUR_BSSID_POS 14
249 #define MAC_MIB_FRAG_THRESHOLD_POS 8
250 #define MAC_MIB_RTS_THRESHOLD_POS 10
251 #define MAC_MIB_SHORT_RETRY_POS 16
252 #define MAC_MIB_LONG_RETRY_POS 17
253 #define MAC_MIB_SHORT_RETRY_LIMIT_POS 16
254 #define MAC_MGMT_MIB_BEACON_PER_POS 0
255 #define MAC_MGMT_MIB_STATION_ID_POS 6
256 #define MAC_MGMT_MIB_CUR_PRIVACY_POS 11
257 #define MAC_MGMT_MIB_CUR_BSSID_POS 14
258 #define MAC_MGMT_MIB_PS_MODE_POS 53
259 #define MAC_MGMT_MIB_LISTEN_INTERVAL_POS 54
260 #define MAC_MGMT_MIB_MULTI_DOMAIN_IMPLEMENTED 56
261 #define MAC_MGMT_MIB_MULTI_DOMAIN_ENABLED 57
262 #define PHY_MIB_CHANNEL_POS 14
263 #define PHY_MIB_RATE_SET_POS 20
264 #define PHY_MIB_REG_DOMAIN_POS 26
265 #define LOCAL_MIB_AUTO_TX_RATE_POS 3
266 #define LOCAL_MIB_SSID_SIZE 5
267 #define LOCAL_MIB_TX_PROMISCUOUS_POS 6
268 #define LOCAL_MIB_TX_MGMT_RATE_POS 7
269 #define LOCAL_MIB_TX_CONTROL_RATE_POS 8
270 #define LOCAL_MIB_PREAMBLE_TYPE 9
271 #define MAC_ADDR_MIB_MAC_ADDR_POS 0
272
273 #define CMD_Set_MIB_Vars 0x01
274 #define CMD_Get_MIB_Vars 0x02
275 #define CMD_Scan 0x03
276 #define CMD_Join 0x04
277 #define CMD_Start 0x05
278 #define CMD_EnableRadio 0x06
279 #define CMD_DisableRadio 0x07
280 #define CMD_SiteSurvey 0x0B
281
282 #define CMD_STATUS_IDLE 0x00
283 #define CMD_STATUS_COMPLETE 0x01
284 #define CMD_STATUS_UNKNOWN 0x02
285 #define CMD_STATUS_INVALID_PARAMETER 0x03
286 #define CMD_STATUS_FUNCTION_NOT_SUPPORTED 0x04
287 #define CMD_STATUS_TIME_OUT 0x07
288 #define CMD_STATUS_IN_PROGRESS 0x08
289 #define CMD_STATUS_REJECTED_RADIO_OFF 0x09
290 #define CMD_STATUS_HOST_ERROR 0xFF
291 #define CMD_STATUS_BUSY 0xFE
292
293 #define CMD_BLOCK_COMMAND_OFFSET 0
294 #define CMD_BLOCK_STATUS_OFFSET 1
295 #define CMD_BLOCK_PARAMETERS_OFFSET 4
296
297 #define SCAN_OPTIONS_SITE_SURVEY 0x80
298
299 #define MGMT_FRAME_BODY_OFFSET 24
300 #define MAX_AUTHENTICATION_RETRIES 3
301 #define MAX_ASSOCIATION_RETRIES 3
302
303 #define AUTHENTICATION_RESPONSE_TIME_OUT 1000
304
305 #define MAX_WIRELESS_BODY 2316 /* mtu is 2312, CRC is 4 */
306 #define LOOP_RETRY_LIMIT 500000
307
308 #define ACTIVE_MODE 1
309 #define PS_MODE 2
310
311 #define MAX_ENCRYPTION_KEYS 4
312 #define MAX_ENCRYPTION_KEY_SIZE 40
313
314 ///////////////////////////////////////////////////////////////////////////
315 // 802.11 related definitions
316 ///////////////////////////////////////////////////////////////////////////
317
318 //
319 // Regulatory Domains
320 //
321
322 #define REG_DOMAIN_FCC 0x10 //Channels 1-11 USA
323 #define REG_DOMAIN_DOC 0x20 //Channel 1-11 Canada
324 #define REG_DOMAIN_ETSI 0x30 //Channel 1-13 Europe (ex Spain/France)
325 #define REG_DOMAIN_SPAIN 0x31 //Channel 10-11 Spain
326 #define REG_DOMAIN_FRANCE 0x32 //Channel 10-13 France
327 #define REG_DOMAIN_MKK 0x40 //Channel 14 Japan
328 #define REG_DOMAIN_MKK1 0x41 //Channel 1-14 Japan(MKK1)
329 #define REG_DOMAIN_ISRAEL 0x50 //Channel 3-9 ISRAEL
330
331 #define BSS_TYPE_AD_HOC 1
332 #define BSS_TYPE_INFRASTRUCTURE 2
333
334 #define SCAN_TYPE_ACTIVE 0
335 #define SCAN_TYPE_PASSIVE 1
336
337 #define LONG_PREAMBLE 0
338 #define SHORT_PREAMBLE 1
339 #define AUTO_PREAMBLE 2
340
341 #define DATA_FRAME_WS_HEADER_SIZE 30
342
343 /* promiscuous mode control */
344 #define PROM_MODE_OFF 0x0
345 #define PROM_MODE_UNKNOWN 0x1
346 #define PROM_MODE_CRC_FAILED 0x2
347 #define PROM_MODE_DUPLICATED 0x4
348 #define PROM_MODE_MGMT 0x8
349 #define PROM_MODE_CTRL 0x10
350 #define PROM_MODE_BAD_PROTOCOL 0x20
351
352 #define IFACE_INT_STATUS_OFFSET 0
353 #define IFACE_INT_MASK_OFFSET 1
354 #define IFACE_LOCKOUT_HOST_OFFSET 2
355 #define IFACE_LOCKOUT_MAC_OFFSET 3
356 #define IFACE_FUNC_CTRL_OFFSET 28
357 #define IFACE_MAC_STAT_OFFSET 30
358 #define IFACE_GENERIC_INT_TYPE_OFFSET 32
359
360 #define CIPHER_SUITE_NONE 0
361 #define CIPHER_SUITE_WEP_64 1
362 #define CIPHER_SUITE_TKIP 2
363 #define CIPHER_SUITE_AES 3
364 #define CIPHER_SUITE_CCX 4
365 #define CIPHER_SUITE_WEP_128 5
366
367 //
368 // IFACE MACROS & definitions
369 //
370 //
371
372 // FuncCtrl field:
373 //
374 #define FUNC_CTRL_TxENABLE 0x10
375 #define FUNC_CTRL_RxENABLE 0x20
376 #define FUNC_CTRL_INIT_COMPLETE 0x01
377
378 /* A stub firmware image which reads the MAC address from NVRAM on the card.
379 For copyright information and source see the end of this file. */
380 static u8 mac_reader[] = {
381 0x06,0x00,0x00,0xea,0x04,0x00,0x00,0xea,0x03,0x00,0x00,0xea,0x02,0x00,0x00,0xea,
382 0x01,0x00,0x00,0xea,0x00,0x00,0x00,0xea,0xff,0xff,0xff,0xea,0xfe,0xff,0xff,0xea,
383 0xd3,0x00,0xa0,0xe3,0x00,0xf0,0x21,0xe1,0x0e,0x04,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
384 0x81,0x11,0xa0,0xe1,0x00,0x10,0x81,0xe3,0x00,0x10,0x80,0xe5,0x1c,0x10,0x90,0xe5,
385 0x10,0x10,0xc1,0xe3,0x1c,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,0x08,0x10,0x80,0xe5,
386 0x02,0x03,0xa0,0xe3,0x00,0x10,0xa0,0xe3,0xb0,0x10,0xc0,0xe1,0xb4,0x10,0xc0,0xe1,
387 0xb8,0x10,0xc0,0xe1,0xbc,0x10,0xc0,0xe1,0x56,0xdc,0xa0,0xe3,0x21,0x00,0x00,0xeb,
388 0x0a,0x00,0xa0,0xe3,0x1a,0x00,0x00,0xeb,0x10,0x00,0x00,0xeb,0x07,0x00,0x00,0xeb,
389 0x02,0x03,0xa0,0xe3,0x02,0x14,0xa0,0xe3,0xb4,0x10,0xc0,0xe1,0x4c,0x10,0x9f,0xe5,
390 0xbc,0x10,0xc0,0xe1,0x10,0x10,0xa0,0xe3,0xb8,0x10,0xc0,0xe1,0xfe,0xff,0xff,0xea,
391 0x00,0x40,0x2d,0xe9,0x00,0x20,0xa0,0xe3,0x02,0x3c,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
392 0x28,0x00,0x9f,0xe5,0x37,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
393 0x00,0x40,0x2d,0xe9,0x12,0x2e,0xa0,0xe3,0x06,0x30,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
394 0x02,0x04,0xa0,0xe3,0x2f,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
395 0x00,0x02,0x00,0x02,0x80,0x01,0x90,0xe0,0x01,0x00,0x00,0x0a,0x01,0x00,0x50,0xe2,
396 0xfc,0xff,0xff,0xea,0x1e,0xff,0x2f,0xe1,0x80,0x10,0xa0,0xe3,0xf3,0x06,0xa0,0xe3,
397 0x00,0x10,0x80,0xe5,0x00,0x10,0xa0,0xe3,0x00,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,
398 0x04,0x10,0x80,0xe5,0x00,0x10,0x80,0xe5,0x0e,0x34,0xa0,0xe3,0x1c,0x10,0x93,0xe5,
399 0x02,0x1a,0x81,0xe3,0x1c,0x10,0x83,0xe5,0x58,0x11,0x9f,0xe5,0x30,0x10,0x80,0xe5,
400 0x54,0x11,0x9f,0xe5,0x34,0x10,0x80,0xe5,0x38,0x10,0x80,0xe5,0x3c,0x10,0x80,0xe5,
401 0x10,0x10,0x90,0xe5,0x08,0x00,0x90,0xe5,0x1e,0xff,0x2f,0xe1,0xf3,0x16,0xa0,0xe3,
402 0x08,0x00,0x91,0xe5,0x05,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,0x10,0x00,0x91,0xe5,
403 0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0xff,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,
404 0x10,0x00,0x91,0xe5,0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
405 0x10,0x00,0x91,0xe5,0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
406 0xff,0x00,0x00,0xe2,0x1e,0xff,0x2f,0xe1,0x30,0x40,0x2d,0xe9,0x00,0x50,0xa0,0xe1,
407 0x03,0x40,0xa0,0xe1,0xa2,0x02,0xa0,0xe1,0x08,0x00,0x00,0xe2,0x03,0x00,0x80,0xe2,
408 0xd8,0x10,0x9f,0xe5,0x00,0x00,0xc1,0xe5,0x01,0x20,0xc1,0xe5,0xe2,0xff,0xff,0xeb,
409 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x1a,0x14,0x00,0xa0,0xe3,0xc4,0xff,0xff,0xeb,
410 0x04,0x20,0xa0,0xe1,0x05,0x10,0xa0,0xe1,0x02,0x00,0xa0,0xe3,0x01,0x00,0x00,0xeb,
411 0x30,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x70,0x40,0x2d,0xe9,0xf3,0x46,0xa0,0xe3,
412 0x00,0x30,0xa0,0xe3,0x00,0x00,0x50,0xe3,0x08,0x00,0x00,0x9a,0x8c,0x50,0x9f,0xe5,
413 0x03,0x60,0xd5,0xe7,0x0c,0x60,0x84,0xe5,0x10,0x60,0x94,0xe5,0x02,0x00,0x16,0xe3,
414 0xfc,0xff,0xff,0x0a,0x01,0x30,0x83,0xe2,0x00,0x00,0x53,0xe1,0xf7,0xff,0xff,0x3a,
415 0xff,0x30,0xa0,0xe3,0x0c,0x30,0x84,0xe5,0x08,0x00,0x94,0xe5,0x10,0x00,0x94,0xe5,
416 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x94,0xe5,0x00,0x00,0xa0,0xe3,
417 0x00,0x00,0x52,0xe3,0x0b,0x00,0x00,0x9a,0x10,0x50,0x94,0xe5,0x02,0x00,0x15,0xe3,
418 0xfc,0xff,0xff,0x0a,0x0c,0x30,0x84,0xe5,0x10,0x50,0x94,0xe5,0x01,0x00,0x15,0xe3,
419 0xfc,0xff,0xff,0x0a,0x08,0x50,0x94,0xe5,0x01,0x50,0xc1,0xe4,0x01,0x00,0x80,0xe2,
420 0x02,0x00,0x50,0xe1,0xf3,0xff,0xff,0x3a,0xc8,0x00,0xa0,0xe3,0x98,0xff,0xff,0xeb,
421 0x70,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x01,0x0c,0x00,0x02,0x01,0x02,0x00,0x02,
422 0x00,0x01,0x00,0x02
423 };
424
425 struct atmel_private {
426 void *card; /* Bus dependent stucture varies for PCcard */
427 int (*present_callback)(void *); /* And callback which uses it */
428 char firmware_id[32];
429 AtmelFWType firmware_type;
430 u8 *firmware;
431 int firmware_length;
432 struct timer_list management_timer;
433 struct net_device *dev;
434 struct device *sys_dev;
435 struct iw_statistics wstats;
436 spinlock_t irqlock, timerlock; // spinlocks
437 enum { BUS_TYPE_PCCARD, BUS_TYPE_PCI } bus_type;
438 enum {
439 CARD_TYPE_PARALLEL_FLASH,
440 CARD_TYPE_SPI_FLASH,
441 CARD_TYPE_EEPROM
442 } card_type;
443 int do_rx_crc; /* If we need to CRC incoming packets */
444 int probe_crc; /* set if we don't yet know */
445 int crc_ok_cnt, crc_ko_cnt; /* counters for probing */
446 u16 rx_desc_head;
447 u16 tx_desc_free, tx_desc_head, tx_desc_tail, tx_desc_previous;
448 u16 tx_free_mem, tx_buff_head, tx_buff_tail;
449
450 u16 frag_seq, frag_len, frag_no;
451 u8 frag_source[6];
452
453 u8 wep_is_on, default_key, exclude_unencrypted, encryption_level;
454 u8 group_cipher_suite, pairwise_cipher_suite;
455 u8 wep_keys[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
456 int wep_key_len[MAX_ENCRYPTION_KEYS];
457 int use_wpa, radio_on_broken; /* firmware dependent stuff. */
458
459 u16 host_info_base;
460 struct host_info_struct {
461 /* NB this is matched to the hardware, don't change. */
462 u8 volatile int_status;
463 u8 volatile int_mask;
464 u8 volatile lockout_host;
465 u8 volatile lockout_mac;
466
467 u16 tx_buff_pos;
468 u16 tx_buff_size;
469 u16 tx_desc_pos;
470 u16 tx_desc_count;
471
472 u16 rx_buff_pos;
473 u16 rx_buff_size;
474 u16 rx_desc_pos;
475 u16 rx_desc_count;
476
477 u16 build_version;
478 u16 command_pos;
479
480 u16 major_version;
481 u16 minor_version;
482
483 u16 func_ctrl;
484 u16 mac_status;
485 u16 generic_IRQ_type;
486 u8 reserved[2];
487 } host_info;
488
489 enum {
490 STATION_STATE_SCANNING,
491 STATION_STATE_JOINNING,
492 STATION_STATE_AUTHENTICATING,
493 STATION_STATE_ASSOCIATING,
494 STATION_STATE_READY,
495 STATION_STATE_REASSOCIATING,
496 STATION_STATE_DOWN,
497 STATION_STATE_MGMT_ERROR
498 } station_state;
499
500 int operating_mode, power_mode;
501 time_t last_qual;
502 int beacons_this_sec;
503 int channel;
504 int reg_domain, config_reg_domain;
505 int tx_rate;
506 int auto_tx_rate;
507 int rts_threshold;
508 int frag_threshold;
509 int long_retry, short_retry;
510 int preamble;
511 int default_beacon_period, beacon_period, listen_interval;
512 int CurrentAuthentTransactionSeqNum, ExpectedAuthentTransactionSeqNum;
513 int AuthenticationRequestRetryCnt, AssociationRequestRetryCnt, ReAssociationRequestRetryCnt;
514 enum {
515 SITE_SURVEY_IDLE,
516 SITE_SURVEY_IN_PROGRESS,
517 SITE_SURVEY_COMPLETED
518 } site_survey_state;
519 unsigned long last_survey;
520
521 int station_was_associated, station_is_associated;
522 int fast_scan;
523
524 struct bss_info {
525 int channel;
526 int SSIDsize;
527 int RSSI;
528 int UsingWEP;
529 int preamble;
530 int beacon_period;
531 int BSStype;
532 u8 BSSID[6];
533 u8 SSID[MAX_SSID_LENGTH];
534 } BSSinfo[MAX_BSS_ENTRIES];
535 int BSS_list_entries, current_BSS;
536 int connect_to_any_BSS;
537 int SSID_size, new_SSID_size;
538 u8 CurrentBSSID[6], BSSID[6];
539 u8 SSID[MAX_SSID_LENGTH], new_SSID[MAX_SSID_LENGTH];
540 u64 last_beacon_timestamp;
541 u8 rx_buf[MAX_WIRELESS_BODY];
542 };
543
544 static u8 atmel_basic_rates[4] = {0x82,0x84,0x0b,0x16};
545
546 static const struct {
547 int reg_domain;
548 int min, max;
549 char *name;
550 } channel_table[] = { { REG_DOMAIN_FCC, 1, 11, "USA" },
551 { REG_DOMAIN_DOC, 1, 11, "Canada" },
552 { REG_DOMAIN_ETSI, 1, 13, "Europe" },
553 { REG_DOMAIN_SPAIN, 10, 11, "Spain" },
554 { REG_DOMAIN_FRANCE, 10, 13, "France" },
555 { REG_DOMAIN_MKK, 14, 14, "MKK" },
556 { REG_DOMAIN_MKK1, 1, 14, "MKK1" },
557 { REG_DOMAIN_ISRAEL, 3, 9, "Israel"} };
558
559 static void build_wpa_mib(struct atmel_private *priv);
560 static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
561 static void atmel_copy_to_card(struct net_device *dev, u16 dest,
562 const unsigned char *src, u16 len);
563 static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
564 u16 src, u16 len);
565 static void atmel_set_gcr(struct net_device *dev, u16 mask);
566 static void atmel_clear_gcr(struct net_device *dev, u16 mask);
567 static int atmel_lock_mac(struct atmel_private *priv);
568 static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data);
569 static void atmel_command_irq(struct atmel_private *priv);
570 static int atmel_validate_channel(struct atmel_private *priv, int channel);
571 static void atmel_management_frame(struct atmel_private *priv,
572 struct ieee80211_hdr *header,
573 u16 frame_len, u8 rssi);
574 static void atmel_management_timer(u_long a);
575 static void atmel_send_command(struct atmel_private *priv, int command,
576 void *cmd, int cmd_size);
577 static int atmel_send_command_wait(struct atmel_private *priv, int command,
578 void *cmd, int cmd_size);
579 static void atmel_transmit_management_frame(struct atmel_private *priv,
580 struct ieee80211_hdr *header,
581 u8 *body, int body_len);
582
583 static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index);
584 static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index,
585 u8 data);
586 static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
587 u16 data);
588 static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
589 u8 *data, int data_len);
590 static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
591 u8 *data, int data_len);
592 static void atmel_scan(struct atmel_private *priv, int specific_ssid);
593 static void atmel_join_bss(struct atmel_private *priv, int bss_index);
594 static void atmel_smooth_qual(struct atmel_private *priv);
595 static void atmel_writeAR(struct net_device *dev, u16 data);
596 static int probe_atmel_card(struct net_device *dev);
597 static int reset_atmel_card(struct net_device *dev);
598 static void atmel_enter_state(struct atmel_private *priv, int new_state);
599 int atmel_open (struct net_device *dev);
600
601 static inline u16 atmel_hi(struct atmel_private *priv, u16 offset)
602 {
603 return priv->host_info_base + offset;
604 }
605
606 static inline u16 atmel_co(struct atmel_private *priv, u16 offset)
607 {
608 return priv->host_info.command_pos + offset;
609 }
610
611 static inline u16 atmel_rx(struct atmel_private *priv, u16 offset, u16 desc)
612 {
613 return priv->host_info.rx_desc_pos + (sizeof(struct rx_desc) * desc) + offset;
614 }
615
616 static inline u16 atmel_tx(struct atmel_private *priv, u16 offset, u16 desc)
617 {
618 return priv->host_info.tx_desc_pos + (sizeof(struct tx_desc) * desc) + offset;
619 }
620
621 static inline u8 atmel_read8(struct net_device *dev, u16 offset)
622 {
623 return inb(dev->base_addr + offset);
624 }
625
626 static inline void atmel_write8(struct net_device *dev, u16 offset, u8 data)
627 {
628 outb(data, dev->base_addr + offset);
629 }
630
631 static inline u16 atmel_read16(struct net_device *dev, u16 offset)
632 {
633 return inw(dev->base_addr + offset);
634 }
635
636 static inline void atmel_write16(struct net_device *dev, u16 offset, u16 data)
637 {
638 outw(data, dev->base_addr + offset);
639 }
640
641 static inline u8 atmel_rmem8(struct atmel_private *priv, u16 pos)
642 {
643 atmel_writeAR(priv->dev, pos);
644 return atmel_read8(priv->dev, DR);
645 }
646
647 static inline void atmel_wmem8(struct atmel_private *priv, u16 pos, u16 data)
648 {
649 atmel_writeAR(priv->dev, pos);
650 atmel_write8(priv->dev, DR, data);
651 }
652
653 static inline u16 atmel_rmem16(struct atmel_private *priv, u16 pos)
654 {
655 atmel_writeAR(priv->dev, pos);
656 return atmel_read16(priv->dev, DR);
657 }
658
659 static inline void atmel_wmem16(struct atmel_private *priv, u16 pos, u16 data)
660 {
661 atmel_writeAR(priv->dev, pos);
662 atmel_write16(priv->dev, DR, data);
663 }
664
665 static const struct iw_handler_def atmel_handler_def;
666
667 static void tx_done_irq(struct atmel_private *priv)
668 {
669 int i;
670
671 for (i = 0;
672 atmel_rmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head)) == TX_DONE &&
673 i < priv->host_info.tx_desc_count;
674 i++) {
675 u8 status = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_STATUS_OFFSET, priv->tx_desc_head));
676 u16 msdu_size = atmel_rmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_head));
677 u8 type = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_head));
678
679 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head), 0);
680
681 priv->tx_free_mem += msdu_size;
682 priv->tx_desc_free++;
683
684 if (priv->tx_buff_head + msdu_size > (priv->host_info.tx_buff_pos + priv->host_info.tx_buff_size))
685 priv->tx_buff_head = 0;
686 else
687 priv->tx_buff_head += msdu_size;
688
689 if (priv->tx_desc_head < (priv->host_info.tx_desc_count - 1))
690 priv->tx_desc_head++ ;
691 else
692 priv->tx_desc_head = 0;
693
694 if (type == TX_PACKET_TYPE_DATA) {
695 if (status == TX_STATUS_SUCCESS)
696 priv->dev->stats.tx_packets++;
697 else
698 priv->dev->stats.tx_errors++;
699 netif_wake_queue(priv->dev);
700 }
701 }
702 }
703
704 static u16 find_tx_buff(struct atmel_private *priv, u16 len)
705 {
706 u16 bottom_free = priv->host_info.tx_buff_size - priv->tx_buff_tail;
707
708 if (priv->tx_desc_free == 3 || priv->tx_free_mem < len)
709 return 0;
710
711 if (bottom_free >= len)
712 return priv->host_info.tx_buff_pos + priv->tx_buff_tail;
713
714 if (priv->tx_free_mem - bottom_free >= len) {
715 priv->tx_buff_tail = 0;
716 return priv->host_info.tx_buff_pos;
717 }
718
719 return 0;
720 }
721
722 static void tx_update_descriptor(struct atmel_private *priv, int is_bcast,
723 u16 len, u16 buff, u8 type)
724 {
725 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, priv->tx_desc_tail), buff);
726 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_tail), len);
727 if (!priv->use_wpa)
728 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_HOST_LENGTH_OFFSET, priv->tx_desc_tail), len);
729 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_tail), type);
730 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RATE_OFFSET, priv->tx_desc_tail), priv->tx_rate);
731 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RETRY_OFFSET, priv->tx_desc_tail), 0);
732 if (priv->use_wpa) {
733 int cipher_type, cipher_length;
734 if (is_bcast) {
735 cipher_type = priv->group_cipher_suite;
736 if (cipher_type == CIPHER_SUITE_WEP_64 ||
737 cipher_type == CIPHER_SUITE_WEP_128)
738 cipher_length = 8;
739 else if (cipher_type == CIPHER_SUITE_TKIP)
740 cipher_length = 12;
741 else if (priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_64 ||
742 priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_128) {
743 cipher_type = priv->pairwise_cipher_suite;
744 cipher_length = 8;
745 } else {
746 cipher_type = CIPHER_SUITE_NONE;
747 cipher_length = 0;
748 }
749 } else {
750 cipher_type = priv->pairwise_cipher_suite;
751 if (cipher_type == CIPHER_SUITE_WEP_64 ||
752 cipher_type == CIPHER_SUITE_WEP_128)
753 cipher_length = 8;
754 else if (cipher_type == CIPHER_SUITE_TKIP)
755 cipher_length = 12;
756 else if (priv->group_cipher_suite == CIPHER_SUITE_WEP_64 ||
757 priv->group_cipher_suite == CIPHER_SUITE_WEP_128) {
758 cipher_type = priv->group_cipher_suite;
759 cipher_length = 8;
760 } else {
761 cipher_type = CIPHER_SUITE_NONE;
762 cipher_length = 0;
763 }
764 }
765
766 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_TYPE_OFFSET, priv->tx_desc_tail),
767 cipher_type);
768 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_LENGTH_OFFSET, priv->tx_desc_tail),
769 cipher_length);
770 }
771 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_tail), 0x80000000L);
772 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_tail), TX_FIRM_OWN);
773 if (priv->tx_desc_previous != priv->tx_desc_tail)
774 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_previous), 0);
775 priv->tx_desc_previous = priv->tx_desc_tail;
776 if (priv->tx_desc_tail < (priv->host_info.tx_desc_count - 1))
777 priv->tx_desc_tail++;
778 else
779 priv->tx_desc_tail = 0;
780 priv->tx_desc_free--;
781 priv->tx_free_mem -= len;
782 }
783
784 static int start_tx(struct sk_buff *skb, struct net_device *dev)
785 {
786 static const u8 SNAP_RFC1024[6] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
787 struct atmel_private *priv = netdev_priv(dev);
788 struct ieee80211_hdr header;
789 unsigned long flags;
790 u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
791
792 if (priv->card && priv->present_callback &&
793 !(*priv->present_callback)(priv->card)) {
794 dev->stats.tx_errors++;
795 dev_kfree_skb(skb);
796 return 0;
797 }
798
799 if (priv->station_state != STATION_STATE_READY) {
800 dev->stats.tx_errors++;
801 dev_kfree_skb(skb);
802 return 0;
803 }
804
805 /* first ensure the timer func cannot run */
806 spin_lock_bh(&priv->timerlock);
807 /* then stop the hardware ISR */
808 spin_lock_irqsave(&priv->irqlock, flags);
809 /* nb doing the above in the opposite order will deadlock */
810
811 /* The Wireless Header is 30 bytes. In the Ethernet packet we "cut" the
812 12 first bytes (containing DA/SA) and put them in the appropriate
813 fields of the Wireless Header. Thus the packet length is then the
814 initial + 18 (+30-12) */
815
816 if (!(buff = find_tx_buff(priv, len + 18))) {
817 dev->stats.tx_dropped++;
818 spin_unlock_irqrestore(&priv->irqlock, flags);
819 spin_unlock_bh(&priv->timerlock);
820 netif_stop_queue(dev);
821 return 1;
822 }
823
824 frame_ctl = IEEE80211_FTYPE_DATA;
825 header.duration_id = 0;
826 header.seq_ctrl = 0;
827 if (priv->wep_is_on)
828 frame_ctl |= IEEE80211_FCTL_PROTECTED;
829 if (priv->operating_mode == IW_MODE_ADHOC) {
830 skb_copy_from_linear_data(skb, &header.addr1, 6);
831 memcpy(&header.addr2, dev->dev_addr, 6);
832 memcpy(&header.addr3, priv->BSSID, 6);
833 } else {
834 frame_ctl |= IEEE80211_FCTL_TODS;
835 memcpy(&header.addr1, priv->CurrentBSSID, 6);
836 memcpy(&header.addr2, dev->dev_addr, 6);
837 skb_copy_from_linear_data(skb, &header.addr3, 6);
838 }
839
840 if (priv->use_wpa)
841 memcpy(&header.addr4, SNAP_RFC1024, 6);
842
843 header.frame_control = cpu_to_le16(frame_ctl);
844 /* Copy the wireless header into the card */
845 atmel_copy_to_card(dev, buff, (unsigned char *)&header, DATA_FRAME_WS_HEADER_SIZE);
846 /* Copy the packet sans its 802.3 header addresses which have been replaced */
847 atmel_copy_to_card(dev, buff + DATA_FRAME_WS_HEADER_SIZE, skb->data + 12, len - 12);
848 priv->tx_buff_tail += len - 12 + DATA_FRAME_WS_HEADER_SIZE;
849
850 /* low bit of first byte of destination tells us if broadcast */
851 tx_update_descriptor(priv, *(skb->data) & 0x01, len + 18, buff, TX_PACKET_TYPE_DATA);
852 dev->trans_start = jiffies;
853 dev->stats.tx_bytes += len;
854
855 spin_unlock_irqrestore(&priv->irqlock, flags);
856 spin_unlock_bh(&priv->timerlock);
857 dev_kfree_skb(skb);
858
859 return 0;
860 }
861
862 static void atmel_transmit_management_frame(struct atmel_private *priv,
863 struct ieee80211_hdr *header,
864 u8 *body, int body_len)
865 {
866 u16 buff;
867 int len = MGMT_FRAME_BODY_OFFSET + body_len;
868
869 if (!(buff = find_tx_buff(priv, len)))
870 return;
871
872 atmel_copy_to_card(priv->dev, buff, (u8 *)header, MGMT_FRAME_BODY_OFFSET);
873 atmel_copy_to_card(priv->dev, buff + MGMT_FRAME_BODY_OFFSET, body, body_len);
874 priv->tx_buff_tail += len;
875 tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT);
876 }
877
878 static void fast_rx_path(struct atmel_private *priv,
879 struct ieee80211_hdr *header,
880 u16 msdu_size, u16 rx_packet_loc, u32 crc)
881 {
882 /* fast path: unfragmented packet copy directly into skbuf */
883 u8 mac4[6];
884 struct sk_buff *skb;
885 unsigned char *skbp;
886
887 /* get the final, mac 4 header field, this tells us encapsulation */
888 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc + 24, 6);
889 msdu_size -= 6;
890
891 if (priv->do_rx_crc) {
892 crc = crc32_le(crc, mac4, 6);
893 msdu_size -= 4;
894 }
895
896 if (!(skb = dev_alloc_skb(msdu_size + 14))) {
897 priv->dev->stats.rx_dropped++;
898 return;
899 }
900
901 skb_reserve(skb, 2);
902 skbp = skb_put(skb, msdu_size + 12);
903 atmel_copy_to_host(priv->dev, skbp + 12, rx_packet_loc + 30, msdu_size);
904
905 if (priv->do_rx_crc) {
906 u32 netcrc;
907 crc = crc32_le(crc, skbp + 12, msdu_size);
908 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + 30 + msdu_size, 4);
909 if ((crc ^ 0xffffffff) != netcrc) {
910 priv->dev->stats.rx_crc_errors++;
911 dev_kfree_skb(skb);
912 return;
913 }
914 }
915
916 memcpy(skbp, header->addr1, 6); /* destination address */
917 if (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FROMDS)
918 memcpy(&skbp[6], header->addr3, 6);
919 else
920 memcpy(&skbp[6], header->addr2, 6); /* source address */
921
922 skb->protocol = eth_type_trans(skb, priv->dev);
923 skb->ip_summed = CHECKSUM_NONE;
924 netif_rx(skb);
925 priv->dev->stats.rx_bytes += 12 + msdu_size;
926 priv->dev->stats.rx_packets++;
927 }
928
929 /* Test to see if the packet in card memory at packet_loc has a valid CRC
930 It doesn't matter that this is slow: it is only used to proble the first few
931 packets. */
932 static int probe_crc(struct atmel_private *priv, u16 packet_loc, u16 msdu_size)
933 {
934 int i = msdu_size - 4;
935 u32 netcrc, crc = 0xffffffff;
936
937 if (msdu_size < 4)
938 return 0;
939
940 atmel_copy_to_host(priv->dev, (void *)&netcrc, packet_loc + i, 4);
941
942 atmel_writeAR(priv->dev, packet_loc);
943 while (i--) {
944 u8 octet = atmel_read8(priv->dev, DR);
945 crc = crc32_le(crc, &octet, 1);
946 }
947
948 return (crc ^ 0xffffffff) == netcrc;
949 }
950
951 static void frag_rx_path(struct atmel_private *priv,
952 struct ieee80211_hdr *header,
953 u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no,
954 u8 frag_no, int more_frags)
955 {
956 u8 mac4[6];
957 u8 source[6];
958 struct sk_buff *skb;
959
960 if (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FROMDS)
961 memcpy(source, header->addr3, 6);
962 else
963 memcpy(source, header->addr2, 6);
964
965 rx_packet_loc += 24; /* skip header */
966
967 if (priv->do_rx_crc)
968 msdu_size -= 4;
969
970 if (frag_no == 0) { /* first fragment */
971 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc, 6);
972 msdu_size -= 6;
973 rx_packet_loc += 6;
974
975 if (priv->do_rx_crc)
976 crc = crc32_le(crc, mac4, 6);
977
978 priv->frag_seq = seq_no;
979 priv->frag_no = 1;
980 priv->frag_len = msdu_size;
981 memcpy(priv->frag_source, source, 6);
982 memcpy(&priv->rx_buf[6], source, 6);
983 memcpy(priv->rx_buf, header->addr1, 6);
984
985 atmel_copy_to_host(priv->dev, &priv->rx_buf[12], rx_packet_loc, msdu_size);
986
987 if (priv->do_rx_crc) {
988 u32 netcrc;
989 crc = crc32_le(crc, &priv->rx_buf[12], msdu_size);
990 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
991 if ((crc ^ 0xffffffff) != netcrc) {
992 priv->dev->stats.rx_crc_errors++;
993 memset(priv->frag_source, 0xff, 6);
994 }
995 }
996
997 } else if (priv->frag_no == frag_no &&
998 priv->frag_seq == seq_no &&
999 memcmp(priv->frag_source, source, 6) == 0) {
1000
1001 atmel_copy_to_host(priv->dev, &priv->rx_buf[12 + priv->frag_len],
1002 rx_packet_loc, msdu_size);
1003 if (priv->do_rx_crc) {
1004 u32 netcrc;
1005 crc = crc32_le(crc,
1006 &priv->rx_buf[12 + priv->frag_len],
1007 msdu_size);
1008 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
1009 if ((crc ^ 0xffffffff) != netcrc) {
1010 priv->dev->stats.rx_crc_errors++;
1011 memset(priv->frag_source, 0xff, 6);
1012 more_frags = 1; /* don't send broken assembly */
1013 }
1014 }
1015
1016 priv->frag_len += msdu_size;
1017 priv->frag_no++;
1018
1019 if (!more_frags) { /* last one */
1020 memset(priv->frag_source, 0xff, 6);
1021 if (!(skb = dev_alloc_skb(priv->frag_len + 14))) {
1022 priv->dev->stats.rx_dropped++;
1023 } else {
1024 skb_reserve(skb, 2);
1025 memcpy(skb_put(skb, priv->frag_len + 12),
1026 priv->rx_buf,
1027 priv->frag_len + 12);
1028 skb->protocol = eth_type_trans(skb, priv->dev);
1029 skb->ip_summed = CHECKSUM_NONE;
1030 netif_rx(skb);
1031 priv->dev->stats.rx_bytes += priv->frag_len + 12;
1032 priv->dev->stats.rx_packets++;
1033 }
1034 }
1035 } else
1036 priv->wstats.discard.fragment++;
1037 }
1038
1039 static void rx_done_irq(struct atmel_private *priv)
1040 {
1041 int i;
1042 struct ieee80211_hdr header;
1043
1044 for (i = 0;
1045 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID &&
1046 i < priv->host_info.rx_desc_count;
1047 i++) {
1048
1049 u16 msdu_size, rx_packet_loc, frame_ctl, seq_control;
1050 u8 status = atmel_rmem8(priv, atmel_rx(priv, RX_DESC_STATUS_OFFSET, priv->rx_desc_head));
1051 u32 crc = 0xffffffff;
1052
1053 if (status != RX_STATUS_SUCCESS) {
1054 if (status == 0xc1) /* determined by experiment */
1055 priv->wstats.discard.nwid++;
1056 else
1057 priv->dev->stats.rx_errors++;
1058 goto next;
1059 }
1060
1061 msdu_size = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_SIZE_OFFSET, priv->rx_desc_head));
1062 rx_packet_loc = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_POS_OFFSET, priv->rx_desc_head));
1063
1064 if (msdu_size < 30) {
1065 priv->dev->stats.rx_errors++;
1066 goto next;
1067 }
1068
1069 /* Get header as far as end of seq_ctrl */
1070 atmel_copy_to_host(priv->dev, (char *)&header, rx_packet_loc, 24);
1071 frame_ctl = le16_to_cpu(header.frame_control);
1072 seq_control = le16_to_cpu(header.seq_ctrl);
1073
1074 /* probe for CRC use here if needed once five packets have
1075 arrived with the same crc status, we assume we know what's
1076 happening and stop probing */
1077 if (priv->probe_crc) {
1078 if (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED)) {
1079 priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size);
1080 } else {
1081 priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24);
1082 }
1083 if (priv->do_rx_crc) {
1084 if (priv->crc_ok_cnt++ > 5)
1085 priv->probe_crc = 0;
1086 } else {
1087 if (priv->crc_ko_cnt++ > 5)
1088 priv->probe_crc = 0;
1089 }
1090 }
1091
1092 /* don't CRC header when WEP in use */
1093 if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED))) {
1094 crc = crc32_le(0xffffffff, (unsigned char *)&header, 24);
1095 }
1096 msdu_size -= 24; /* header */
1097
1098 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) {
1099 int more_fragments = frame_ctl & IEEE80211_FCTL_MOREFRAGS;
1100 u8 packet_fragment_no = seq_control & IEEE80211_SCTL_FRAG;
1101 u16 packet_sequence_no = (seq_control & IEEE80211_SCTL_SEQ) >> 4;
1102
1103 if (!more_fragments && packet_fragment_no == 0) {
1104 fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc);
1105 } else {
1106 frag_rx_path(priv, &header, msdu_size, rx_packet_loc, crc,
1107 packet_sequence_no, packet_fragment_no, more_fragments);
1108 }
1109 }
1110
1111 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1112 /* copy rest of packet into buffer */
1113 atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size);
1114
1115 /* we use the same buffer for frag reassembly and control packets */
1116 memset(priv->frag_source, 0xff, 6);
1117
1118 if (priv->do_rx_crc) {
1119 /* last 4 octets is crc */
1120 msdu_size -= 4;
1121 crc = crc32_le(crc, (unsigned char *)&priv->rx_buf, msdu_size);
1122 if ((crc ^ 0xffffffff) != (*((u32 *)&priv->rx_buf[msdu_size]))) {
1123 priv->dev->stats.rx_crc_errors++;
1124 goto next;
1125 }
1126 }
1127
1128 atmel_management_frame(priv, &header, msdu_size,
1129 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_RSSI_OFFSET, priv->rx_desc_head)));
1130 }
1131
1132 next:
1133 /* release descriptor */
1134 atmel_wmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head), RX_DESC_FLAG_CONSUMED);
1135
1136 if (priv->rx_desc_head < (priv->host_info.rx_desc_count - 1))
1137 priv->rx_desc_head++;
1138 else
1139 priv->rx_desc_head = 0;
1140 }
1141 }
1142
1143 static irqreturn_t service_interrupt(int irq, void *dev_id)
1144 {
1145 struct net_device *dev = (struct net_device *) dev_id;
1146 struct atmel_private *priv = netdev_priv(dev);
1147 u8 isr;
1148 int i = -1;
1149 static u8 irq_order[] = {
1150 ISR_OUT_OF_RANGE,
1151 ISR_RxCOMPLETE,
1152 ISR_TxCOMPLETE,
1153 ISR_RxFRAMELOST,
1154 ISR_FATAL_ERROR,
1155 ISR_COMMAND_COMPLETE,
1156 ISR_IBSS_MERGE,
1157 ISR_GENERIC_IRQ
1158 };
1159
1160 if (priv->card && priv->present_callback &&
1161 !(*priv->present_callback)(priv->card))
1162 return IRQ_HANDLED;
1163
1164 /* In this state upper-level code assumes it can mess with
1165 the card unhampered by interrupts which may change register state.
1166 Note that even though the card shouldn't generate interrupts
1167 the inturrupt line may be shared. This allows card setup
1168 to go on without disabling interrupts for a long time. */
1169 if (priv->station_state == STATION_STATE_DOWN)
1170 return IRQ_NONE;
1171
1172 atmel_clear_gcr(dev, GCR_ENINT); /* disable interrupts */
1173
1174 while (1) {
1175 if (!atmel_lock_mac(priv)) {
1176 /* failed to contact card */
1177 printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1178 return IRQ_HANDLED;
1179 }
1180
1181 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1182 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
1183
1184 if (!isr) {
1185 atmel_set_gcr(dev, GCR_ENINT); /* enable interrupts */
1186 return i == -1 ? IRQ_NONE : IRQ_HANDLED;
1187 }
1188
1189 atmel_set_gcr(dev, GCR_ACKINT); /* acknowledge interrupt */
1190
1191 for (i = 0; i < ARRAY_SIZE(irq_order); i++)
1192 if (isr & irq_order[i])
1193 break;
1194
1195 if (!atmel_lock_mac(priv)) {
1196 /* failed to contact card */
1197 printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1198 return IRQ_HANDLED;
1199 }
1200
1201 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1202 isr ^= irq_order[i];
1203 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET), isr);
1204 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
1205
1206 switch (irq_order[i]) {
1207
1208 case ISR_OUT_OF_RANGE:
1209 if (priv->operating_mode == IW_MODE_INFRA &&
1210 priv->station_state == STATION_STATE_READY) {
1211 priv->station_is_associated = 0;
1212 atmel_scan(priv, 1);
1213 }
1214 break;
1215
1216 case ISR_RxFRAMELOST:
1217 priv->wstats.discard.misc++;
1218 /* fall through */
1219 case ISR_RxCOMPLETE:
1220 rx_done_irq(priv);
1221 break;
1222
1223 case ISR_TxCOMPLETE:
1224 tx_done_irq(priv);
1225 break;
1226
1227 case ISR_FATAL_ERROR:
1228 printk(KERN_ALERT "%s: *** FATAL error interrupt ***\n", dev->name);
1229 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
1230 break;
1231
1232 case ISR_COMMAND_COMPLETE:
1233 atmel_command_irq(priv);
1234 break;
1235
1236 case ISR_IBSS_MERGE:
1237 atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
1238 priv->CurrentBSSID, 6);
1239 /* The WPA stuff cares about the current AP address */
1240 if (priv->use_wpa)
1241 build_wpa_mib(priv);
1242 break;
1243 case ISR_GENERIC_IRQ:
1244 printk(KERN_INFO "%s: Generic_irq received.\n", dev->name);
1245 break;
1246 }
1247 }
1248 }
1249
1250 static struct iw_statistics *atmel_get_wireless_stats(struct net_device *dev)
1251 {
1252 struct atmel_private *priv = netdev_priv(dev);
1253
1254 /* update the link quality here in case we are seeing no beacons
1255 at all to drive the process */
1256 atmel_smooth_qual(priv);
1257
1258 priv->wstats.status = priv->station_state;
1259
1260 if (priv->operating_mode == IW_MODE_INFRA) {
1261 if (priv->station_state != STATION_STATE_READY) {
1262 priv->wstats.qual.qual = 0;
1263 priv->wstats.qual.level = 0;
1264 priv->wstats.qual.updated = (IW_QUAL_QUAL_INVALID
1265 | IW_QUAL_LEVEL_INVALID);
1266 }
1267 priv->wstats.qual.noise = 0;
1268 priv->wstats.qual.updated |= IW_QUAL_NOISE_INVALID;
1269 } else {
1270 /* Quality levels cannot be determined in ad-hoc mode,
1271 because we can 'hear' more that one remote station. */
1272 priv->wstats.qual.qual = 0;
1273 priv->wstats.qual.level = 0;
1274 priv->wstats.qual.noise = 0;
1275 priv->wstats.qual.updated = IW_QUAL_QUAL_INVALID
1276 | IW_QUAL_LEVEL_INVALID
1277 | IW_QUAL_NOISE_INVALID;
1278 priv->wstats.miss.beacon = 0;
1279 }
1280
1281 return &priv->wstats;
1282 }
1283
1284 static int atmel_change_mtu(struct net_device *dev, int new_mtu)
1285 {
1286 if ((new_mtu < 68) || (new_mtu > 2312))
1287 return -EINVAL;
1288 dev->mtu = new_mtu;
1289 return 0;
1290 }
1291
1292 static int atmel_set_mac_address(struct net_device *dev, void *p)
1293 {
1294 struct sockaddr *addr = p;
1295
1296 memcpy (dev->dev_addr, addr->sa_data, dev->addr_len);
1297 return atmel_open(dev);
1298 }
1299
1300 EXPORT_SYMBOL(atmel_open);
1301
1302 int atmel_open(struct net_device *dev)
1303 {
1304 struct atmel_private *priv = netdev_priv(dev);
1305 int i, channel, err;
1306
1307 /* any scheduled timer is no longer needed and might screw things up.. */
1308 del_timer_sync(&priv->management_timer);
1309
1310 /* Interrupts will not touch the card once in this state... */
1311 priv->station_state = STATION_STATE_DOWN;
1312
1313 if (priv->new_SSID_size) {
1314 memcpy(priv->SSID, priv->new_SSID, priv->new_SSID_size);
1315 priv->SSID_size = priv->new_SSID_size;
1316 priv->new_SSID_size = 0;
1317 }
1318 priv->BSS_list_entries = 0;
1319
1320 priv->AuthenticationRequestRetryCnt = 0;
1321 priv->AssociationRequestRetryCnt = 0;
1322 priv->ReAssociationRequestRetryCnt = 0;
1323 priv->CurrentAuthentTransactionSeqNum = 0x0001;
1324 priv->ExpectedAuthentTransactionSeqNum = 0x0002;
1325
1326 priv->site_survey_state = SITE_SURVEY_IDLE;
1327 priv->station_is_associated = 0;
1328
1329 err = reset_atmel_card(dev);
1330 if (err)
1331 return err;
1332
1333 if (priv->config_reg_domain) {
1334 priv->reg_domain = priv->config_reg_domain;
1335 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS, priv->reg_domain);
1336 } else {
1337 priv->reg_domain = atmel_get_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS);
1338 for (i = 0; i < ARRAY_SIZE(channel_table); i++)
1339 if (priv->reg_domain == channel_table[i].reg_domain)
1340 break;
1341 if (i == ARRAY_SIZE(channel_table)) {
1342 priv->reg_domain = REG_DOMAIN_MKK1;
1343 printk(KERN_ALERT "%s: failed to get regulatory domain: assuming MKK1.\n", dev->name);
1344 }
1345 }
1346
1347 if ((channel = atmel_validate_channel(priv, priv->channel)))
1348 priv->channel = channel;
1349
1350 /* this moves station_state on.... */
1351 atmel_scan(priv, 1);
1352
1353 atmel_set_gcr(priv->dev, GCR_ENINT); /* enable interrupts */
1354 return 0;
1355 }
1356
1357 static int atmel_close(struct net_device *dev)
1358 {
1359 struct atmel_private *priv = netdev_priv(dev);
1360
1361 /* Send event to userspace that we are disassociating */
1362 if (priv->station_state == STATION_STATE_READY) {
1363 union iwreq_data wrqu;
1364
1365 wrqu.data.length = 0;
1366 wrqu.data.flags = 0;
1367 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
1368 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
1369 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
1370 }
1371
1372 atmel_enter_state(priv, STATION_STATE_DOWN);
1373
1374 if (priv->bus_type == BUS_TYPE_PCCARD)
1375 atmel_write16(dev, GCR, 0x0060);
1376 atmel_write16(dev, GCR, 0x0040);
1377 return 0;
1378 }
1379
1380 static int atmel_validate_channel(struct atmel_private *priv, int channel)
1381 {
1382 /* check that channel is OK, if so return zero,
1383 else return suitable default channel */
1384 int i;
1385
1386 for (i = 0; i < ARRAY_SIZE(channel_table); i++)
1387 if (priv->reg_domain == channel_table[i].reg_domain) {
1388 if (channel >= channel_table[i].min &&
1389 channel <= channel_table[i].max)
1390 return 0;
1391 else
1392 return channel_table[i].min;
1393 }
1394 return 0;
1395 }
1396
1397 static int atmel_proc_output (char *buf, struct atmel_private *priv)
1398 {
1399 int i;
1400 char *p = buf;
1401 char *s, *r, *c;
1402
1403 p += sprintf(p, "Driver version:\t\t%d.%d\n",
1404 DRIVER_MAJOR, DRIVER_MINOR);
1405
1406 if (priv->station_state != STATION_STATE_DOWN) {
1407 p += sprintf(p, "Firmware version:\t%d.%d build %d\n"
1408 "Firmware location:\t",
1409 priv->host_info.major_version,
1410 priv->host_info.minor_version,
1411 priv->host_info.build_version);
1412
1413 if (priv->card_type != CARD_TYPE_EEPROM)
1414 p += sprintf(p, "on card\n");
1415 else if (priv->firmware)
1416 p += sprintf(p, "%s loaded by host\n",
1417 priv->firmware_id);
1418 else
1419 p += sprintf(p, "%s loaded by hotplug\n",
1420 priv->firmware_id);
1421
1422 switch (priv->card_type) {
1423 case CARD_TYPE_PARALLEL_FLASH: c = "Parallel flash"; break;
1424 case CARD_TYPE_SPI_FLASH: c = "SPI flash\n"; break;
1425 case CARD_TYPE_EEPROM: c = "EEPROM"; break;
1426 default: c = "<unknown>";
1427 }
1428
1429 r = "<unknown>";
1430 for (i = 0; i < ARRAY_SIZE(channel_table); i++)
1431 if (priv->reg_domain == channel_table[i].reg_domain)
1432 r = channel_table[i].name;
1433
1434 p += sprintf(p, "MAC memory type:\t%s\n", c);
1435 p += sprintf(p, "Regulatory domain:\t%s\n", r);
1436 p += sprintf(p, "Host CRC checking:\t%s\n",
1437 priv->do_rx_crc ? "On" : "Off");
1438 p += sprintf(p, "WPA-capable firmware:\t%s\n",
1439 priv->use_wpa ? "Yes" : "No");
1440 }
1441
1442 switch(priv->station_state) {
1443 case STATION_STATE_SCANNING: s = "Scanning"; break;
1444 case STATION_STATE_JOINNING: s = "Joining"; break;
1445 case STATION_STATE_AUTHENTICATING: s = "Authenticating"; break;
1446 case STATION_STATE_ASSOCIATING: s = "Associating"; break;
1447 case STATION_STATE_READY: s = "Ready"; break;
1448 case STATION_STATE_REASSOCIATING: s = "Reassociating"; break;
1449 case STATION_STATE_MGMT_ERROR: s = "Management error"; break;
1450 case STATION_STATE_DOWN: s = "Down"; break;
1451 default: s = "<unknown>";
1452 }
1453
1454 p += sprintf(p, "Current state:\t\t%s\n", s);
1455 return p - buf;
1456 }
1457
1458 static int atmel_read_proc(char *page, char **start, off_t off,
1459 int count, int *eof, void *data)
1460 {
1461 struct atmel_private *priv = data;
1462 int len = atmel_proc_output (page, priv);
1463 if (len <= off+count) *eof = 1;
1464 *start = page + off;
1465 len -= off;
1466 if (len>count) len = count;
1467 if (len<0) len = 0;
1468 return len;
1469 }
1470
1471 struct net_device *init_atmel_card(unsigned short irq, unsigned long port,
1472 const AtmelFWType fw_type,
1473 struct device *sys_dev,
1474 int (*card_present)(void *), void *card)
1475 {
1476 struct proc_dir_entry *ent;
1477 struct net_device *dev;
1478 struct atmel_private *priv;
1479 int rc;
1480
1481 /* Create the network device object. */
1482 dev = alloc_etherdev(sizeof(*priv));
1483 if (!dev) {
1484 printk(KERN_ERR "atmel: Couldn't alloc_etherdev\n");
1485 return NULL;
1486 }
1487 if (dev_alloc_name(dev, dev->name) < 0) {
1488 printk(KERN_ERR "atmel: Couldn't get name!\n");
1489 goto err_out_free;
1490 }
1491
1492 priv = netdev_priv(dev);
1493 priv->dev = dev;
1494 priv->sys_dev = sys_dev;
1495 priv->present_callback = card_present;
1496 priv->card = card;
1497 priv->firmware = NULL;
1498 priv->firmware_id[0] = '\0';
1499 priv->firmware_type = fw_type;
1500 if (firmware) /* module parameter */
1501 strcpy(priv->firmware_id, firmware);
1502 priv->bus_type = card_present ? BUS_TYPE_PCCARD : BUS_TYPE_PCI;
1503 priv->station_state = STATION_STATE_DOWN;
1504 priv->do_rx_crc = 0;
1505 /* For PCMCIA cards, some chips need CRC, some don't
1506 so we have to probe. */
1507 if (priv->bus_type == BUS_TYPE_PCCARD) {
1508 priv->probe_crc = 1;
1509 priv->crc_ok_cnt = priv->crc_ko_cnt = 0;
1510 } else
1511 priv->probe_crc = 0;
1512 priv->last_qual = jiffies;
1513 priv->last_beacon_timestamp = 0;
1514 memset(priv->frag_source, 0xff, sizeof(priv->frag_source));
1515 memset(priv->BSSID, 0, 6);
1516 priv->CurrentBSSID[0] = 0xFF; /* Initialize to something invalid.... */
1517 priv->station_was_associated = 0;
1518
1519 priv->last_survey = jiffies;
1520 priv->preamble = LONG_PREAMBLE;
1521 priv->operating_mode = IW_MODE_INFRA;
1522 priv->connect_to_any_BSS = 0;
1523 priv->config_reg_domain = 0;
1524 priv->reg_domain = 0;
1525 priv->tx_rate = 3;
1526 priv->auto_tx_rate = 1;
1527 priv->channel = 4;
1528 priv->power_mode = 0;
1529 priv->SSID[0] = '\0';
1530 priv->SSID_size = 0;
1531 priv->new_SSID_size = 0;
1532 priv->frag_threshold = 2346;
1533 priv->rts_threshold = 2347;
1534 priv->short_retry = 7;
1535 priv->long_retry = 4;
1536
1537 priv->wep_is_on = 0;
1538 priv->default_key = 0;
1539 priv->encryption_level = 0;
1540 priv->exclude_unencrypted = 0;
1541 priv->group_cipher_suite = priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1542 priv->use_wpa = 0;
1543 memset(priv->wep_keys, 0, sizeof(priv->wep_keys));
1544 memset(priv->wep_key_len, 0, sizeof(priv->wep_key_len));
1545
1546 priv->default_beacon_period = priv->beacon_period = 100;
1547 priv->listen_interval = 1;
1548
1549 init_timer(&priv->management_timer);
1550 spin_lock_init(&priv->irqlock);
1551 spin_lock_init(&priv->timerlock);
1552 priv->management_timer.function = atmel_management_timer;
1553 priv->management_timer.data = (unsigned long) dev;
1554
1555 dev->open = atmel_open;
1556 dev->stop = atmel_close;
1557 dev->change_mtu = atmel_change_mtu;
1558 dev->set_mac_address = atmel_set_mac_address;
1559 dev->hard_start_xmit = start_tx;
1560 dev->wireless_handlers = (struct iw_handler_def *)&atmel_handler_def;
1561 dev->do_ioctl = atmel_ioctl;
1562 dev->irq = irq;
1563 dev->base_addr = port;
1564
1565 SET_NETDEV_DEV(dev, sys_dev);
1566
1567 if ((rc = request_irq(dev->irq, service_interrupt, IRQF_SHARED, dev->name, dev))) {
1568 printk(KERN_ERR "%s: register interrupt %d failed, rc %d\n", dev->name, irq, rc);
1569 goto err_out_free;
1570 }
1571
1572 if (!request_region(dev->base_addr, 32,
1573 priv->bus_type == BUS_TYPE_PCCARD ? "atmel_cs" : "atmel_pci")) {
1574 goto err_out_irq;
1575 }
1576
1577 if (register_netdev(dev))
1578 goto err_out_res;
1579
1580 if (!probe_atmel_card(dev)){
1581 unregister_netdev(dev);
1582 goto err_out_res;
1583 }
1584
1585 netif_carrier_off(dev);
1586
1587 ent = create_proc_read_entry ("driver/atmel", 0, NULL, atmel_read_proc, priv);
1588 if (!ent)
1589 printk(KERN_WARNING "atmel: unable to create /proc entry.\n");
1590
1591 printk(KERN_INFO "%s: Atmel at76c50x. Version %d.%d. MAC %pM\n",
1592 dev->name, DRIVER_MAJOR, DRIVER_MINOR, dev->dev_addr);
1593
1594 return dev;
1595
1596 err_out_res:
1597 release_region( dev->base_addr, 32);
1598 err_out_irq:
1599 free_irq(dev->irq, dev);
1600 err_out_free:
1601 free_netdev(dev);
1602 return NULL;
1603 }
1604
1605 EXPORT_SYMBOL(init_atmel_card);
1606
1607 void stop_atmel_card(struct net_device *dev)
1608 {
1609 struct atmel_private *priv = netdev_priv(dev);
1610
1611 /* put a brick on it... */
1612 if (priv->bus_type == BUS_TYPE_PCCARD)
1613 atmel_write16(dev, GCR, 0x0060);
1614 atmel_write16(dev, GCR, 0x0040);
1615
1616 del_timer_sync(&priv->management_timer);
1617 unregister_netdev(dev);
1618 remove_proc_entry("driver/atmel", NULL);
1619 free_irq(dev->irq, dev);
1620 kfree(priv->firmware);
1621 release_region(dev->base_addr, 32);
1622 free_netdev(dev);
1623 }
1624
1625 EXPORT_SYMBOL(stop_atmel_card);
1626
1627 static int atmel_set_essid(struct net_device *dev,
1628 struct iw_request_info *info,
1629 struct iw_point *dwrq,
1630 char *extra)
1631 {
1632 struct atmel_private *priv = netdev_priv(dev);
1633
1634 /* Check if we asked for `any' */
1635 if(dwrq->flags == 0) {
1636 priv->connect_to_any_BSS = 1;
1637 } else {
1638 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1639
1640 priv->connect_to_any_BSS = 0;
1641
1642 /* Check the size of the string */
1643 if (dwrq->length > MAX_SSID_LENGTH)
1644 return -E2BIG;
1645 if (index != 0)
1646 return -EINVAL;
1647
1648 memcpy(priv->new_SSID, extra, dwrq->length);
1649 priv->new_SSID_size = dwrq->length;
1650 }
1651
1652 return -EINPROGRESS;
1653 }
1654
1655 static int atmel_get_essid(struct net_device *dev,
1656 struct iw_request_info *info,
1657 struct iw_point *dwrq,
1658 char *extra)
1659 {
1660 struct atmel_private *priv = netdev_priv(dev);
1661
1662 /* Get the current SSID */
1663 if (priv->new_SSID_size != 0) {
1664 memcpy(extra, priv->new_SSID, priv->new_SSID_size);
1665 dwrq->length = priv->new_SSID_size;
1666 } else {
1667 memcpy(extra, priv->SSID, priv->SSID_size);
1668 dwrq->length = priv->SSID_size;
1669 }
1670
1671 dwrq->flags = !priv->connect_to_any_BSS; /* active */
1672
1673 return 0;
1674 }
1675
1676 static int atmel_get_wap(struct net_device *dev,
1677 struct iw_request_info *info,
1678 struct sockaddr *awrq,
1679 char *extra)
1680 {
1681 struct atmel_private *priv = netdev_priv(dev);
1682 memcpy(awrq->sa_data, priv->CurrentBSSID, 6);
1683 awrq->sa_family = ARPHRD_ETHER;
1684
1685 return 0;
1686 }
1687
1688 static int atmel_set_encode(struct net_device *dev,
1689 struct iw_request_info *info,
1690 struct iw_point *dwrq,
1691 char *extra)
1692 {
1693 struct atmel_private *priv = netdev_priv(dev);
1694
1695 /* Basic checking: do we have a key to set ?
1696 * Note : with the new API, it's impossible to get a NULL pointer.
1697 * Therefore, we need to check a key size == 0 instead.
1698 * New version of iwconfig properly set the IW_ENCODE_NOKEY flag
1699 * when no key is present (only change flags), but older versions
1700 * don't do it. - Jean II */
1701 if (dwrq->length > 0) {
1702 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1703 int current_index = priv->default_key;
1704 /* Check the size of the key */
1705 if (dwrq->length > 13) {
1706 return -EINVAL;
1707 }
1708 /* Check the index (none -> use current) */
1709 if (index < 0 || index >= 4)
1710 index = current_index;
1711 else
1712 priv->default_key = index;
1713 /* Set the length */
1714 if (dwrq->length > 5)
1715 priv->wep_key_len[index] = 13;
1716 else
1717 if (dwrq->length > 0)
1718 priv->wep_key_len[index] = 5;
1719 else
1720 /* Disable the key */
1721 priv->wep_key_len[index] = 0;
1722 /* Check if the key is not marked as invalid */
1723 if (!(dwrq->flags & IW_ENCODE_NOKEY)) {
1724 /* Cleanup */
1725 memset(priv->wep_keys[index], 0, 13);
1726 /* Copy the key in the driver */
1727 memcpy(priv->wep_keys[index], extra, dwrq->length);
1728 }
1729 /* WE specify that if a valid key is set, encryption
1730 * should be enabled (user may turn it off later)
1731 * This is also how "iwconfig ethX key on" works */
1732 if (index == current_index &&
1733 priv->wep_key_len[index] > 0) {
1734 priv->wep_is_on = 1;
1735 priv->exclude_unencrypted = 1;
1736 if (priv->wep_key_len[index] > 5) {
1737 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1738 priv->encryption_level = 2;
1739 } else {
1740 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1741 priv->encryption_level = 1;
1742 }
1743 }
1744 } else {
1745 /* Do we want to just set the transmit key index ? */
1746 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1747 if (index >= 0 && index < 4) {
1748 priv->default_key = index;
1749 } else
1750 /* Don't complain if only change the mode */
1751 if (!(dwrq->flags & IW_ENCODE_MODE))
1752 return -EINVAL;
1753 }
1754 /* Read the flags */
1755 if (dwrq->flags & IW_ENCODE_DISABLED) {
1756 priv->wep_is_on = 0;
1757 priv->encryption_level = 0;
1758 priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1759 } else {
1760 priv->wep_is_on = 1;
1761 if (priv->wep_key_len[priv->default_key] > 5) {
1762 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1763 priv->encryption_level = 2;
1764 } else {
1765 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1766 priv->encryption_level = 1;
1767 }
1768 }
1769 if (dwrq->flags & IW_ENCODE_RESTRICTED)
1770 priv->exclude_unencrypted = 1;
1771 if(dwrq->flags & IW_ENCODE_OPEN)
1772 priv->exclude_unencrypted = 0;
1773
1774 return -EINPROGRESS; /* Call commit handler */
1775 }
1776
1777 static int atmel_get_encode(struct net_device *dev,
1778 struct iw_request_info *info,
1779 struct iw_point *dwrq,
1780 char *extra)
1781 {
1782 struct atmel_private *priv = netdev_priv(dev);
1783 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1784
1785 if (!priv->wep_is_on)
1786 dwrq->flags = IW_ENCODE_DISABLED;
1787 else {
1788 if (priv->exclude_unencrypted)
1789 dwrq->flags = IW_ENCODE_RESTRICTED;
1790 else
1791 dwrq->flags = IW_ENCODE_OPEN;
1792 }
1793 /* Which key do we want ? -1 -> tx index */
1794 if (index < 0 || index >= 4)
1795 index = priv->default_key;
1796 dwrq->flags |= index + 1;
1797 /* Copy the key to the user buffer */
1798 dwrq->length = priv->wep_key_len[index];
1799 if (dwrq->length > 16) {
1800 dwrq->length=0;
1801 } else {
1802 memset(extra, 0, 16);
1803 memcpy(extra, priv->wep_keys[index], dwrq->length);
1804 }
1805
1806 return 0;
1807 }
1808
1809 static int atmel_set_encodeext(struct net_device *dev,
1810 struct iw_request_info *info,
1811 union iwreq_data *wrqu,
1812 char *extra)
1813 {
1814 struct atmel_private *priv = netdev_priv(dev);
1815 struct iw_point *encoding = &wrqu->encoding;
1816 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1817 int idx, key_len, alg = ext->alg, set_key = 1;
1818
1819 /* Determine and validate the key index */
1820 idx = encoding->flags & IW_ENCODE_INDEX;
1821 if (idx) {
1822 if (idx < 1 || idx > 4)
1823 return -EINVAL;
1824 idx--;
1825 } else
1826 idx = priv->default_key;
1827
1828 if (encoding->flags & IW_ENCODE_DISABLED)
1829 alg = IW_ENCODE_ALG_NONE;
1830
1831 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
1832 priv->default_key = idx;
1833 set_key = ext->key_len > 0 ? 1 : 0;
1834 }
1835
1836 if (set_key) {
1837 /* Set the requested key first */
1838 switch (alg) {
1839 case IW_ENCODE_ALG_NONE:
1840 priv->wep_is_on = 0;
1841 priv->encryption_level = 0;
1842 priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1843 break;
1844 case IW_ENCODE_ALG_WEP:
1845 if (ext->key_len > 5) {
1846 priv->wep_key_len[idx] = 13;
1847 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1848 priv->encryption_level = 2;
1849 } else if (ext->key_len > 0) {
1850 priv->wep_key_len[idx] = 5;
1851 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1852 priv->encryption_level = 1;
1853 } else {
1854 return -EINVAL;
1855 }
1856 priv->wep_is_on = 1;
1857 memset(priv->wep_keys[idx], 0, 13);
1858 key_len = min ((int)ext->key_len, priv->wep_key_len[idx]);
1859 memcpy(priv->wep_keys[idx], ext->key, key_len);
1860 break;
1861 default:
1862 return -EINVAL;
1863 }
1864 }
1865
1866 return -EINPROGRESS;
1867 }
1868
1869 static int atmel_get_encodeext(struct net_device *dev,
1870 struct iw_request_info *info,
1871 union iwreq_data *wrqu,
1872 char *extra)
1873 {
1874 struct atmel_private *priv = netdev_priv(dev);
1875 struct iw_point *encoding = &wrqu->encoding;
1876 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1877 int idx, max_key_len;
1878
1879 max_key_len = encoding->length - sizeof(*ext);
1880 if (max_key_len < 0)
1881 return -EINVAL;
1882
1883 idx = encoding->flags & IW_ENCODE_INDEX;
1884 if (idx) {
1885 if (idx < 1 || idx > 4)
1886 return -EINVAL;
1887 idx--;
1888 } else
1889 idx = priv->default_key;
1890
1891 encoding->flags = idx + 1;
1892 memset(ext, 0, sizeof(*ext));
1893
1894 if (!priv->wep_is_on) {
1895 ext->alg = IW_ENCODE_ALG_NONE;
1896 ext->key_len = 0;
1897 encoding->flags |= IW_ENCODE_DISABLED;
1898 } else {
1899 if (priv->encryption_level > 0)
1900 ext->alg = IW_ENCODE_ALG_WEP;
1901 else
1902 return -EINVAL;
1903
1904 ext->key_len = priv->wep_key_len[idx];
1905 memcpy(ext->key, priv->wep_keys[idx], ext->key_len);
1906 encoding->flags |= IW_ENCODE_ENABLED;
1907 }
1908
1909 return 0;
1910 }
1911
1912 static int atmel_set_auth(struct net_device *dev,
1913 struct iw_request_info *info,
1914 union iwreq_data *wrqu, char *extra)
1915 {
1916 struct atmel_private *priv = netdev_priv(dev);
1917 struct iw_param *param = &wrqu->param;
1918
1919 switch (param->flags & IW_AUTH_INDEX) {
1920 case IW_AUTH_WPA_VERSION:
1921 case IW_AUTH_CIPHER_PAIRWISE:
1922 case IW_AUTH_CIPHER_GROUP:
1923 case IW_AUTH_KEY_MGMT:
1924 case IW_AUTH_RX_UNENCRYPTED_EAPOL:
1925 case IW_AUTH_PRIVACY_INVOKED:
1926 /*
1927 * atmel does not use these parameters
1928 */
1929 break;
1930
1931 case IW_AUTH_DROP_UNENCRYPTED:
1932 priv->exclude_unencrypted = param->value ? 1 : 0;
1933 break;
1934
1935 case IW_AUTH_80211_AUTH_ALG: {
1936 if (param->value & IW_AUTH_ALG_SHARED_KEY) {
1937 priv->exclude_unencrypted = 1;
1938 } else if (param->value & IW_AUTH_ALG_OPEN_SYSTEM) {
1939 priv->exclude_unencrypted = 0;
1940 } else
1941 return -EINVAL;
1942 break;
1943 }
1944
1945 case IW_AUTH_WPA_ENABLED:
1946 /* Silently accept disable of WPA */
1947 if (param->value > 0)
1948 return -EOPNOTSUPP;
1949 break;
1950
1951 default:
1952 return -EOPNOTSUPP;
1953 }
1954 return -EINPROGRESS;
1955 }
1956
1957 static int atmel_get_auth(struct net_device *dev,
1958 struct iw_request_info *info,
1959 union iwreq_data *wrqu, char *extra)
1960 {
1961 struct atmel_private *priv = netdev_priv(dev);
1962 struct iw_param *param = &wrqu->param;
1963
1964 switch (param->flags & IW_AUTH_INDEX) {
1965 case IW_AUTH_DROP_UNENCRYPTED:
1966 param->value = priv->exclude_unencrypted;
1967 break;
1968
1969 case IW_AUTH_80211_AUTH_ALG:
1970 if (priv->exclude_unencrypted == 1)
1971 param->value = IW_AUTH_ALG_SHARED_KEY;
1972 else
1973 param->value = IW_AUTH_ALG_OPEN_SYSTEM;
1974 break;
1975
1976 case IW_AUTH_WPA_ENABLED:
1977 param->value = 0;
1978 break;
1979
1980 default:
1981 return -EOPNOTSUPP;
1982 }
1983 return 0;
1984 }
1985
1986
1987 static int atmel_get_name(struct net_device *dev,
1988 struct iw_request_info *info,
1989 char *cwrq,
1990 char *extra)
1991 {
1992 strcpy(cwrq, "IEEE 802.11-DS");
1993 return 0;
1994 }
1995
1996 static int atmel_set_rate(struct net_device *dev,
1997 struct iw_request_info *info,
1998 struct iw_param *vwrq,
1999 char *extra)
2000 {
2001 struct atmel_private *priv = netdev_priv(dev);
2002
2003 if (vwrq->fixed == 0) {
2004 priv->tx_rate = 3;
2005 priv->auto_tx_rate = 1;
2006 } else {
2007 priv->auto_tx_rate = 0;
2008
2009 /* Which type of value ? */
2010 if ((vwrq->value < 4) && (vwrq->value >= 0)) {
2011 /* Setting by rate index */
2012 priv->tx_rate = vwrq->value;
2013 } else {
2014 /* Setting by frequency value */
2015 switch (vwrq->value) {
2016 case 1000000: priv->tx_rate = 0; break;
2017 case 2000000: priv->tx_rate = 1; break;
2018 case 5500000: priv->tx_rate = 2; break;
2019 case 11000000: priv->tx_rate = 3; break;
2020 default: return -EINVAL;
2021 }
2022 }
2023 }
2024
2025 return -EINPROGRESS;
2026 }
2027
2028 static int atmel_set_mode(struct net_device *dev,
2029 struct iw_request_info *info,
2030 __u32 *uwrq,
2031 char *extra)
2032 {
2033 struct atmel_private *priv = netdev_priv(dev);
2034
2035 if (*uwrq != IW_MODE_ADHOC && *uwrq != IW_MODE_INFRA)
2036 return -EINVAL;
2037
2038 priv->operating_mode = *uwrq;
2039 return -EINPROGRESS;
2040 }
2041
2042 static int atmel_get_mode(struct net_device *dev,
2043 struct iw_request_info *info,
2044 __u32 *uwrq,
2045 char *extra)
2046 {
2047 struct atmel_private *priv = netdev_priv(dev);
2048
2049 *uwrq = priv->operating_mode;
2050 return 0;
2051 }
2052
2053 static int atmel_get_rate(struct net_device *dev,
2054 struct iw_request_info *info,
2055 struct iw_param *vwrq,
2056 char *extra)
2057 {
2058 struct atmel_private *priv = netdev_priv(dev);
2059
2060 if (priv->auto_tx_rate) {
2061 vwrq->fixed = 0;
2062 vwrq->value = 11000000;
2063 } else {
2064 vwrq->fixed = 1;
2065 switch(priv->tx_rate) {
2066 case 0: vwrq->value = 1000000; break;
2067 case 1: vwrq->value = 2000000; break;
2068 case 2: vwrq->value = 5500000; break;
2069 case 3: vwrq->value = 11000000; break;
2070 }
2071 }
2072 return 0;
2073 }
2074
2075 static int atmel_set_power(struct net_device *dev,
2076 struct iw_request_info *info,
2077 struct iw_param *vwrq,
2078 char *extra)
2079 {
2080 struct atmel_private *priv = netdev_priv(dev);
2081 priv->power_mode = vwrq->disabled ? 0 : 1;
2082 return -EINPROGRESS;
2083 }
2084
2085 static int atmel_get_power(struct net_device *dev,
2086 struct iw_request_info *info,
2087 struct iw_param *vwrq,
2088 char *extra)
2089 {
2090 struct atmel_private *priv = netdev_priv(dev);
2091 vwrq->disabled = priv->power_mode ? 0 : 1;
2092 vwrq->flags = IW_POWER_ON;
2093 return 0;
2094 }
2095
2096 static int atmel_set_retry(struct net_device *dev,
2097 struct iw_request_info *info,
2098 struct iw_param *vwrq,
2099 char *extra)
2100 {
2101 struct atmel_private *priv = netdev_priv(dev);
2102
2103 if (!vwrq->disabled && (vwrq->flags & IW_RETRY_LIMIT)) {
2104 if (vwrq->flags & IW_RETRY_LONG)
2105 priv->long_retry = vwrq->value;
2106 else if (vwrq->flags & IW_RETRY_SHORT)
2107 priv->short_retry = vwrq->value;
2108 else {
2109 /* No modifier : set both */
2110 priv->long_retry = vwrq->value;
2111 priv->short_retry = vwrq->value;
2112 }
2113 return -EINPROGRESS;
2114 }
2115
2116 return -EINVAL;
2117 }
2118
2119 static int atmel_get_retry(struct net_device *dev,
2120 struct iw_request_info *info,
2121 struct iw_param *vwrq,
2122 char *extra)
2123 {
2124 struct atmel_private *priv = netdev_priv(dev);
2125
2126 vwrq->disabled = 0; /* Can't be disabled */
2127
2128 /* Note : by default, display the short retry number */
2129 if (vwrq->flags & IW_RETRY_LONG) {
2130 vwrq->flags = IW_RETRY_LIMIT | IW_RETRY_LONG;
2131 vwrq->value = priv->long_retry;
2132 } else {
2133 vwrq->flags = IW_RETRY_LIMIT;
2134 vwrq->value = priv->short_retry;
2135 if (priv->long_retry != priv->short_retry)
2136 vwrq->flags |= IW_RETRY_SHORT;
2137 }
2138
2139 return 0;
2140 }
2141
2142 static int atmel_set_rts(struct net_device *dev,
2143 struct iw_request_info *info,
2144 struct iw_param *vwrq,
2145 char *extra)
2146 {
2147 struct atmel_private *priv = netdev_priv(dev);
2148 int rthr = vwrq->value;
2149
2150 if (vwrq->disabled)
2151 rthr = 2347;
2152 if ((rthr < 0) || (rthr > 2347)) {
2153 return -EINVAL;
2154 }
2155 priv->rts_threshold = rthr;
2156
2157 return -EINPROGRESS; /* Call commit handler */
2158 }
2159
2160 static int atmel_get_rts(struct net_device *dev,
2161 struct iw_request_info *info,
2162 struct iw_param *vwrq,
2163 char *extra)
2164 {
2165 struct atmel_private *priv = netdev_priv(dev);
2166
2167 vwrq->value = priv->rts_threshold;
2168 vwrq->disabled = (vwrq->value >= 2347);
2169 vwrq->fixed = 1;
2170
2171 return 0;
2172 }
2173
2174 static int atmel_set_frag(struct net_device *dev,
2175 struct iw_request_info *info,
2176 struct iw_param *vwrq,
2177 char *extra)
2178 {
2179 struct atmel_private *priv = netdev_priv(dev);
2180 int fthr = vwrq->value;
2181
2182 if (vwrq->disabled)
2183 fthr = 2346;
2184 if ((fthr < 256) || (fthr > 2346)) {
2185 return -EINVAL;
2186 }
2187 fthr &= ~0x1; /* Get an even value - is it really needed ??? */
2188 priv->frag_threshold = fthr;
2189
2190 return -EINPROGRESS; /* Call commit handler */
2191 }
2192
2193 static int atmel_get_frag(struct net_device *dev,
2194 struct iw_request_info *info,
2195 struct iw_param *vwrq,
2196 char *extra)
2197 {
2198 struct atmel_private *priv = netdev_priv(dev);
2199
2200 vwrq->value = priv->frag_threshold;
2201 vwrq->disabled = (vwrq->value >= 2346);
2202 vwrq->fixed = 1;
2203
2204 return 0;
2205 }
2206
2207 static const long frequency_list[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
2208 2447, 2452, 2457, 2462, 2467, 2472, 2484 };
2209
2210 static int atmel_set_freq(struct net_device *dev,
2211 struct iw_request_info *info,
2212 struct iw_freq *fwrq,
2213 char *extra)
2214 {
2215 struct atmel_private *priv = netdev_priv(dev);
2216 int rc = -EINPROGRESS; /* Call commit handler */
2217
2218 /* If setting by frequency, convert to a channel */
2219 if ((fwrq->e == 1) &&
2220 (fwrq->m >= (int) 241200000) &&
2221 (fwrq->m <= (int) 248700000)) {
2222 int f = fwrq->m / 100000;
2223 int c = 0;
2224 while ((c < 14) && (f != frequency_list[c]))
2225 c++;
2226 /* Hack to fall through... */
2227 fwrq->e = 0;
2228 fwrq->m = c + 1;
2229 }
2230 /* Setting by channel number */
2231 if ((fwrq->m > 1000) || (fwrq->e > 0))
2232 rc = -EOPNOTSUPP;
2233 else {
2234 int channel = fwrq->m;
2235 if (atmel_validate_channel(priv, channel) == 0) {
2236 priv->channel = channel;
2237 } else {
2238 rc = -EINVAL;
2239 }
2240 }
2241 return rc;
2242 }
2243
2244 static int atmel_get_freq(struct net_device *dev,
2245 struct iw_request_info *info,
2246 struct iw_freq *fwrq,
2247 char *extra)
2248 {
2249 struct atmel_private *priv = netdev_priv(dev);
2250
2251 fwrq->m = priv->channel;
2252 fwrq->e = 0;
2253 return 0;
2254 }
2255
2256 static int atmel_set_scan(struct net_device *dev,
2257 struct iw_request_info *info,
2258 struct iw_point *dwrq,
2259 char *extra)
2260 {
2261 struct atmel_private *priv = netdev_priv(dev);
2262 unsigned long flags;
2263
2264 /* Note : you may have realised that, as this is a SET operation,
2265 * this is privileged and therefore a normal user can't
2266 * perform scanning.
2267 * This is not an error, while the device perform scanning,
2268 * traffic doesn't flow, so it's a perfect DoS...
2269 * Jean II */
2270
2271 if (priv->station_state == STATION_STATE_DOWN)
2272 return -EAGAIN;
2273
2274 /* Timeout old surveys. */
2275 if (time_after(jiffies, priv->last_survey + 20 * HZ))
2276 priv->site_survey_state = SITE_SURVEY_IDLE;
2277 priv->last_survey = jiffies;
2278
2279 /* Initiate a scan command */
2280 if (priv->site_survey_state == SITE_SURVEY_IN_PROGRESS)
2281 return -EBUSY;
2282
2283 del_timer_sync(&priv->management_timer);
2284 spin_lock_irqsave(&priv->irqlock, flags);
2285
2286 priv->site_survey_state = SITE_SURVEY_IN_PROGRESS;
2287 priv->fast_scan = 0;
2288 atmel_scan(priv, 0);
2289 spin_unlock_irqrestore(&priv->irqlock, flags);
2290
2291 return 0;
2292 }
2293
2294 static int atmel_get_scan(struct net_device *dev,
2295 struct iw_request_info *info,
2296 struct iw_point *dwrq,
2297 char *extra)
2298 {
2299 struct atmel_private *priv = netdev_priv(dev);
2300 int i;
2301 char *current_ev = extra;
2302 struct iw_event iwe;
2303
2304 if (priv->site_survey_state != SITE_SURVEY_COMPLETED)
2305 return -EAGAIN;
2306
2307 for (i = 0; i < priv->BSS_list_entries; i++) {
2308 iwe.cmd = SIOCGIWAP;
2309 iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
2310 memcpy(iwe.u.ap_addr.sa_data, priv->BSSinfo[i].BSSID, 6);
2311 current_ev = iwe_stream_add_event(info, current_ev,
2312 extra + IW_SCAN_MAX_DATA,
2313 &iwe, IW_EV_ADDR_LEN);
2314
2315 iwe.u.data.length = priv->BSSinfo[i].SSIDsize;
2316 if (iwe.u.data.length > 32)
2317 iwe.u.data.length = 32;
2318 iwe.cmd = SIOCGIWESSID;
2319 iwe.u.data.flags = 1;
2320 current_ev = iwe_stream_add_point(info, current_ev,
2321 extra + IW_SCAN_MAX_DATA,
2322 &iwe, priv->BSSinfo[i].SSID);
2323
2324 iwe.cmd = SIOCGIWMODE;
2325 iwe.u.mode = priv->BSSinfo[i].BSStype;
2326 current_ev = iwe_stream_add_event(info, current_ev,
2327 extra + IW_SCAN_MAX_DATA,
2328 &iwe, IW_EV_UINT_LEN);
2329
2330 iwe.cmd = SIOCGIWFREQ;
2331 iwe.u.freq.m = priv->BSSinfo[i].channel;
2332 iwe.u.freq.e = 0;
2333 current_ev = iwe_stream_add_event(info, current_ev,
2334 extra + IW_SCAN_MAX_DATA,
2335 &iwe, IW_EV_FREQ_LEN);
2336
2337 /* Add quality statistics */
2338 iwe.cmd = IWEVQUAL;
2339 iwe.u.qual.level = priv->BSSinfo[i].RSSI;
2340 iwe.u.qual.qual = iwe.u.qual.level;
2341 /* iwe.u.qual.noise = SOMETHING */
2342 current_ev = iwe_stream_add_event(info, current_ev,
2343 extra + IW_SCAN_MAX_DATA,
2344 &iwe, IW_EV_QUAL_LEN);
2345
2346
2347 iwe.cmd = SIOCGIWENCODE;
2348 if (priv->BSSinfo[i].UsingWEP)
2349 iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
2350 else
2351 iwe.u.data.flags = IW_ENCODE_DISABLED;
2352 iwe.u.data.length = 0;
2353 current_ev = iwe_stream_add_point(info, current_ev,
2354 extra + IW_SCAN_MAX_DATA,
2355 &iwe, NULL);
2356 }
2357
2358 /* Length of data */
2359 dwrq->length = (current_ev - extra);
2360 dwrq->flags = 0;
2361
2362 return 0;
2363 }
2364
2365 static int atmel_get_range(struct net_device *dev,
2366 struct iw_request_info *info,
2367 struct iw_point *dwrq,
2368 char *extra)
2369 {
2370 struct atmel_private *priv = netdev_priv(dev);
2371 struct iw_range *range = (struct iw_range *) extra;
2372 int k, i, j;
2373
2374 dwrq->length = sizeof(struct iw_range);
2375 memset(range, 0, sizeof(struct iw_range));
2376 range->min_nwid = 0x0000;
2377 range->max_nwid = 0x0000;
2378 range->num_channels = 0;
2379 for (j = 0; j < ARRAY_SIZE(channel_table); j++)
2380 if (priv->reg_domain == channel_table[j].reg_domain) {
2381 range->num_channels = channel_table[j].max - channel_table[j].min + 1;
2382 break;
2383 }
2384 if (range->num_channels != 0) {
2385 for (k = 0, i = channel_table[j].min; i <= channel_table[j].max; i++) {
2386 range->freq[k].i = i; /* List index */
2387 range->freq[k].m = frequency_list[i - 1] * 100000;
2388 range->freq[k++].e = 1; /* Values in table in MHz -> * 10^5 * 10 */
2389 }
2390 range->num_frequency = k;
2391 }
2392
2393 range->max_qual.qual = 100;
2394 range->max_qual.level = 100;
2395 range->max_qual.noise = 0;
2396 range->max_qual.updated = IW_QUAL_NOISE_INVALID;
2397
2398 range->avg_qual.qual = 50;
2399 range->avg_qual.level = 50;
2400 range->avg_qual.noise = 0;
2401 range->avg_qual.updated = IW_QUAL_NOISE_INVALID;
2402
2403 range->sensitivity = 0;
2404
2405 range->bitrate[0] = 1000000;
2406 range->bitrate[1] = 2000000;
2407 range->bitrate[2] = 5500000;
2408 range->bitrate[3] = 11000000;
2409 range->num_bitrates = 4;
2410
2411 range->min_rts = 0;
2412 range->max_rts = 2347;
2413 range->min_frag = 256;
2414 range->max_frag = 2346;
2415
2416 range->encoding_size[0] = 5;
2417 range->encoding_size[1] = 13;
2418 range->num_encoding_sizes = 2;
2419 range->max_encoding_tokens = 4;
2420
2421 range->pmp_flags = IW_POWER_ON;
2422 range->pmt_flags = IW_POWER_ON;
2423 range->pm_capa = 0;
2424
2425 range->we_version_source = WIRELESS_EXT;
2426 range->we_version_compiled = WIRELESS_EXT;
2427 range->retry_capa = IW_RETRY_LIMIT ;
2428 range->retry_flags = IW_RETRY_LIMIT;
2429 range->r_time_flags = 0;
2430 range->min_retry = 1;
2431 range->max_retry = 65535;
2432
2433 return 0;
2434 }
2435
2436 static int atmel_set_wap(struct net_device *dev,
2437 struct iw_request_info *info,
2438 struct sockaddr *awrq,
2439 char *extra)
2440 {
2441 struct atmel_private *priv = netdev_priv(dev);
2442 int i;
2443 static const u8 any[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
2444 static const u8 off[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
2445 unsigned long flags;
2446
2447 if (awrq->sa_family != ARPHRD_ETHER)
2448 return -EINVAL;
2449
2450 if (!memcmp(any, awrq->sa_data, 6) ||
2451 !memcmp(off, awrq->sa_data, 6)) {
2452 del_timer_sync(&priv->management_timer);
2453 spin_lock_irqsave(&priv->irqlock, flags);
2454 atmel_scan(priv, 1);
2455 spin_unlock_irqrestore(&priv->irqlock, flags);
2456 return 0;
2457 }
2458
2459 for (i = 0; i < priv->BSS_list_entries; i++) {
2460 if (memcmp(priv->BSSinfo[i].BSSID, awrq->sa_data, 6) == 0) {
2461 if (!priv->wep_is_on && priv->BSSinfo[i].UsingWEP) {
2462 return -EINVAL;
2463 } else if (priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) {
2464 return -EINVAL;
2465 } else {
2466 del_timer_sync(&priv->management_timer);
2467 spin_lock_irqsave(&priv->irqlock, flags);
2468 atmel_join_bss(priv, i);
2469 spin_unlock_irqrestore(&priv->irqlock, flags);
2470 return 0;
2471 }
2472 }
2473 }
2474
2475 return -EINVAL;
2476 }
2477
2478 static int atmel_config_commit(struct net_device *dev,
2479 struct iw_request_info *info, /* NULL */
2480 void *zwrq, /* NULL */
2481 char *extra) /* NULL */
2482 {
2483 return atmel_open(dev);
2484 }
2485
2486 static const iw_handler atmel_handler[] =
2487 {
2488 (iw_handler) atmel_config_commit, /* SIOCSIWCOMMIT */
2489 (iw_handler) atmel_get_name, /* SIOCGIWNAME */
2490 (iw_handler) NULL, /* SIOCSIWNWID */
2491 (iw_handler) NULL, /* SIOCGIWNWID */
2492 (iw_handler) atmel_set_freq, /* SIOCSIWFREQ */
2493 (iw_handler) atmel_get_freq, /* SIOCGIWFREQ */
2494 (iw_handler) atmel_set_mode, /* SIOCSIWMODE */
2495 (iw_handler) atmel_get_mode, /* SIOCGIWMODE */
2496 (iw_handler) NULL, /* SIOCSIWSENS */
2497 (iw_handler) NULL, /* SIOCGIWSENS */
2498 (iw_handler) NULL, /* SIOCSIWRANGE */
2499 (iw_handler) atmel_get_range, /* SIOCGIWRANGE */
2500 (iw_handler) NULL, /* SIOCSIWPRIV */
2501 (iw_handler) NULL, /* SIOCGIWPRIV */
2502 (iw_handler) NULL, /* SIOCSIWSTATS */
2503 (iw_handler) NULL, /* SIOCGIWSTATS */
2504 (iw_handler) NULL, /* SIOCSIWSPY */
2505 (iw_handler) NULL, /* SIOCGIWSPY */
2506 (iw_handler) NULL, /* -- hole -- */
2507 (iw_handler) NULL, /* -- hole -- */
2508 (iw_handler) atmel_set_wap, /* SIOCSIWAP */
2509 (iw_handler) atmel_get_wap, /* SIOCGIWAP */
2510 (iw_handler) NULL, /* -- hole -- */
2511 (iw_handler) NULL, /* SIOCGIWAPLIST */
2512 (iw_handler) atmel_set_scan, /* SIOCSIWSCAN */
2513 (iw_handler) atmel_get_scan, /* SIOCGIWSCAN */
2514 (iw_handler) atmel_set_essid, /* SIOCSIWESSID */
2515 (iw_handler) atmel_get_essid, /* SIOCGIWESSID */
2516 (iw_handler) NULL, /* SIOCSIWNICKN */
2517 (iw_handler) NULL, /* SIOCGIWNICKN */
2518 (iw_handler) NULL, /* -- hole -- */
2519 (iw_handler) NULL, /* -- hole -- */
2520 (iw_handler) atmel_set_rate, /* SIOCSIWRATE */
2521 (iw_handler) atmel_get_rate, /* SIOCGIWRATE */
2522 (iw_handler) atmel_set_rts, /* SIOCSIWRTS */
2523 (iw_handler) atmel_get_rts, /* SIOCGIWRTS */
2524 (iw_handler) atmel_set_frag, /* SIOCSIWFRAG */
2525 (iw_handler) atmel_get_frag, /* SIOCGIWFRAG */
2526 (iw_handler) NULL, /* SIOCSIWTXPOW */
2527 (iw_handler) NULL, /* SIOCGIWTXPOW */
2528 (iw_handler) atmel_set_retry, /* SIOCSIWRETRY */
2529 (iw_handler) atmel_get_retry, /* SIOCGIWRETRY */
2530 (iw_handler) atmel_set_encode, /* SIOCSIWENCODE */
2531 (iw_handler) atmel_get_encode, /* SIOCGIWENCODE */
2532 (iw_handler) atmel_set_power, /* SIOCSIWPOWER */
2533 (iw_handler) atmel_get_power, /* SIOCGIWPOWER */
2534 (iw_handler) NULL, /* -- hole -- */
2535 (iw_handler) NULL, /* -- hole -- */
2536 (iw_handler) NULL, /* SIOCSIWGENIE */
2537 (iw_handler) NULL, /* SIOCGIWGENIE */
2538 (iw_handler) atmel_set_auth, /* SIOCSIWAUTH */
2539 (iw_handler) atmel_get_auth, /* SIOCGIWAUTH */
2540 (iw_handler) atmel_set_encodeext, /* SIOCSIWENCODEEXT */
2541 (iw_handler) atmel_get_encodeext, /* SIOCGIWENCODEEXT */
2542 (iw_handler) NULL, /* SIOCSIWPMKSA */
2543 };
2544
2545 static const iw_handler atmel_private_handler[] =
2546 {
2547 NULL, /* SIOCIWFIRSTPRIV */
2548 };
2549
2550 typedef struct atmel_priv_ioctl {
2551 char id[32];
2552 unsigned char __user *data;
2553 unsigned short len;
2554 } atmel_priv_ioctl;
2555
2556 #define ATMELFWL SIOCIWFIRSTPRIV
2557 #define ATMELIDIFC ATMELFWL + 1
2558 #define ATMELRD ATMELFWL + 2
2559 #define ATMELMAGIC 0x51807
2560 #define REGDOMAINSZ 20
2561
2562 static const struct iw_priv_args atmel_private_args[] = {
2563 {
2564 .cmd = ATMELFWL,
2565 .set_args = IW_PRIV_TYPE_BYTE
2566 | IW_PRIV_SIZE_FIXED
2567 | sizeof (atmel_priv_ioctl),
2568 .get_args = IW_PRIV_TYPE_NONE,
2569 .name = "atmelfwl"
2570 }, {
2571 .cmd = ATMELIDIFC,
2572 .set_args = IW_PRIV_TYPE_NONE,
2573 .get_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
2574 .name = "atmelidifc"
2575 }, {
2576 .cmd = ATMELRD,
2577 .set_args = IW_PRIV_TYPE_CHAR | REGDOMAINSZ,
2578 .get_args = IW_PRIV_TYPE_NONE,
2579 .name = "regdomain"
2580 },
2581 };
2582
2583 static const struct iw_handler_def atmel_handler_def =
2584 {
2585 .num_standard = ARRAY_SIZE(atmel_handler),
2586 .num_private = ARRAY_SIZE(atmel_private_handler),
2587 .num_private_args = ARRAY_SIZE(atmel_private_args),
2588 .standard = (iw_handler *) atmel_handler,
2589 .private = (iw_handler *) atmel_private_handler,
2590 .private_args = (struct iw_priv_args *) atmel_private_args,
2591 .get_wireless_stats = atmel_get_wireless_stats
2592 };
2593
2594 static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2595 {
2596 int i, rc = 0;
2597 struct atmel_private *priv = netdev_priv(dev);
2598 atmel_priv_ioctl com;
2599 struct iwreq *wrq = (struct iwreq *) rq;
2600 unsigned char *new_firmware;
2601 char domain[REGDOMAINSZ + 1];
2602
2603 switch (cmd) {
2604 case ATMELIDIFC:
2605 wrq->u.param.value = ATMELMAGIC;
2606 break;
2607
2608 case ATMELFWL:
2609 if (copy_from_user(&com, rq->ifr_data, sizeof(com))) {
2610 rc = -EFAULT;
2611 break;
2612 }
2613
2614 if (!capable(CAP_NET_ADMIN)) {
2615 rc = -EPERM;
2616 break;
2617 }
2618
2619 if (!(new_firmware = kmalloc(com.len, GFP_KERNEL))) {
2620 rc = -ENOMEM;
2621 break;
2622 }
2623
2624 if (copy_from_user(new_firmware, com.data, com.len)) {
2625 kfree(new_firmware);
2626 rc = -EFAULT;
2627 break;
2628 }
2629
2630 kfree(priv->firmware);
2631
2632 priv->firmware = new_firmware;
2633 priv->firmware_length = com.len;
2634 strncpy(priv->firmware_id, com.id, 31);
2635 priv->firmware_id[31] = '\0';
2636 break;
2637
2638 case ATMELRD:
2639 if (copy_from_user(domain, rq->ifr_data, REGDOMAINSZ)) {
2640 rc = -EFAULT;
2641 break;
2642 }
2643
2644 if (!capable(CAP_NET_ADMIN)) {
2645 rc = -EPERM;
2646 break;
2647 }
2648
2649 domain[REGDOMAINSZ] = 0;
2650 rc = -EINVAL;
2651 for (i = 0; i < ARRAY_SIZE(channel_table); i++) {
2652 /* strcasecmp doesn't exist in the library */
2653 char *a = channel_table[i].name;
2654 char *b = domain;
2655 while (*a) {
2656 char c1 = *a++;
2657 char c2 = *b++;
2658 if (tolower(c1) != tolower(c2))
2659 break;
2660 }
2661 if (!*a && !*b) {
2662 priv->config_reg_domain = channel_table[i].reg_domain;
2663 rc = 0;
2664 }
2665 }
2666
2667 if (rc == 0 && priv->station_state != STATION_STATE_DOWN)
2668 rc = atmel_open(dev);
2669 break;
2670
2671 default:
2672 rc = -EOPNOTSUPP;
2673 }
2674
2675 return rc;
2676 }
2677
2678 struct auth_body {
2679 __le16 alg;
2680 __le16 trans_seq;
2681 __le16 status;
2682 u8 el_id;
2683 u8 chall_text_len;
2684 u8 chall_text[253];
2685 };
2686
2687 static void atmel_enter_state(struct atmel_private *priv, int new_state)
2688 {
2689 int old_state = priv->station_state;
2690
2691 if (new_state == old_state)
2692 return;
2693
2694 priv->station_state = new_state;
2695
2696 if (new_state == STATION_STATE_READY) {
2697 netif_start_queue(priv->dev);
2698 netif_carrier_on(priv->dev);
2699 }
2700
2701 if (old_state == STATION_STATE_READY) {
2702 netif_carrier_off(priv->dev);
2703 if (netif_running(priv->dev))
2704 netif_stop_queue(priv->dev);
2705 priv->last_beacon_timestamp = 0;
2706 }
2707 }
2708
2709 static void atmel_scan(struct atmel_private *priv, int specific_ssid)
2710 {
2711 struct {
2712 u8 BSSID[6];
2713 u8 SSID[MAX_SSID_LENGTH];
2714 u8 scan_type;
2715 u8 channel;
2716 __le16 BSS_type;
2717 __le16 min_channel_time;
2718 __le16 max_channel_time;
2719 u8 options;
2720 u8 SSID_size;
2721 } cmd;
2722
2723 memset(cmd.BSSID, 0xff, 6);
2724
2725 if (priv->fast_scan) {
2726 cmd.SSID_size = priv->SSID_size;
2727 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2728 cmd.min_channel_time = cpu_to_le16(10);
2729 cmd.max_channel_time = cpu_to_le16(50);
2730 } else {
2731 priv->BSS_list_entries = 0;
2732 cmd.SSID_size = 0;
2733 cmd.min_channel_time = cpu_to_le16(10);
2734 cmd.max_channel_time = cpu_to_le16(120);
2735 }
2736
2737 cmd.options = 0;
2738
2739 if (!specific_ssid)
2740 cmd.options |= SCAN_OPTIONS_SITE_SURVEY;
2741
2742 cmd.channel = (priv->channel & 0x7f);
2743 cmd.scan_type = SCAN_TYPE_ACTIVE;
2744 cmd.BSS_type = cpu_to_le16(priv->operating_mode == IW_MODE_ADHOC ?
2745 BSS_TYPE_AD_HOC : BSS_TYPE_INFRASTRUCTURE);
2746
2747 atmel_send_command(priv, CMD_Scan, &cmd, sizeof(cmd));
2748
2749 /* This must come after all hardware access to avoid being messed up
2750 by stuff happening in interrupt context after we leave STATE_DOWN */
2751 atmel_enter_state(priv, STATION_STATE_SCANNING);
2752 }
2753
2754 static void join(struct atmel_private *priv, int type)
2755 {
2756 struct {
2757 u8 BSSID[6];
2758 u8 SSID[MAX_SSID_LENGTH];
2759 u8 BSS_type; /* this is a short in a scan command - weird */
2760 u8 channel;
2761 __le16 timeout;
2762 u8 SSID_size;
2763 u8 reserved;
2764 } cmd;
2765
2766 cmd.SSID_size = priv->SSID_size;
2767 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2768 memcpy(cmd.BSSID, priv->CurrentBSSID, 6);
2769 cmd.channel = (priv->channel & 0x7f);
2770 cmd.BSS_type = type;
2771 cmd.timeout = cpu_to_le16(2000);
2772
2773 atmel_send_command(priv, CMD_Join, &cmd, sizeof(cmd));
2774 }
2775
2776 static void start(struct atmel_private *priv, int type)
2777 {
2778 struct {
2779 u8 BSSID[6];
2780 u8 SSID[MAX_SSID_LENGTH];
2781 u8 BSS_type;
2782 u8 channel;
2783 u8 SSID_size;
2784 u8 reserved[3];
2785 } cmd;
2786
2787 cmd.SSID_size = priv->SSID_size;
2788 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2789 memcpy(cmd.BSSID, priv->BSSID, 6);
2790 cmd.BSS_type = type;
2791 cmd.channel = (priv->channel & 0x7f);
2792
2793 atmel_send_command(priv, CMD_Start, &cmd, sizeof(cmd));
2794 }
2795
2796 static void handle_beacon_probe(struct atmel_private *priv, u16 capability,
2797 u8 channel)
2798 {
2799 int rejoin = 0;
2800 int new = capability & WLAN_CAPABILITY_SHORT_PREAMBLE ?
2801 SHORT_PREAMBLE : LONG_PREAMBLE;
2802
2803 if (priv->preamble != new) {
2804 priv->preamble = new;
2805 rejoin = 1;
2806 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, new);
2807 }
2808
2809 if (priv->channel != channel) {
2810 priv->channel = channel;
2811 rejoin = 1;
2812 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_CHANNEL_POS, channel);
2813 }
2814
2815 if (rejoin) {
2816 priv->station_is_associated = 0;
2817 atmel_enter_state(priv, STATION_STATE_JOINNING);
2818
2819 if (priv->operating_mode == IW_MODE_INFRA)
2820 join(priv, BSS_TYPE_INFRASTRUCTURE);
2821 else
2822 join(priv, BSS_TYPE_AD_HOC);
2823 }
2824 }
2825
2826 static void send_authentication_request(struct atmel_private *priv, u16 system,
2827 u8 *challenge, int challenge_len)
2828 {
2829 struct ieee80211_hdr header;
2830 struct auth_body auth;
2831
2832 header.frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH);
2833 header.duration_id = cpu_to_le16(0x8000);
2834 header.seq_ctrl = 0;
2835 memcpy(header.addr1, priv->CurrentBSSID, 6);
2836 memcpy(header.addr2, priv->dev->dev_addr, 6);
2837 memcpy(header.addr3, priv->CurrentBSSID, 6);
2838
2839 if (priv->wep_is_on && priv->CurrentAuthentTransactionSeqNum != 1)
2840 /* no WEP for authentication frames with TrSeqNo 1 */
2841 header.frame_control |= cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2842
2843 auth.alg = cpu_to_le16(system);
2844
2845 auth.status = 0;
2846 auth.trans_seq = cpu_to_le16(priv->CurrentAuthentTransactionSeqNum);
2847 priv->ExpectedAuthentTransactionSeqNum = priv->CurrentAuthentTransactionSeqNum+1;
2848 priv->CurrentAuthentTransactionSeqNum += 2;
2849
2850 if (challenge_len != 0) {
2851 auth.el_id = 16; /* challenge_text */
2852 auth.chall_text_len = challenge_len;
2853 memcpy(auth.chall_text, challenge, challenge_len);
2854 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 8 + challenge_len);
2855 } else {
2856 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 6);
2857 }
2858 }
2859
2860 static void send_association_request(struct atmel_private *priv, int is_reassoc)
2861 {
2862 u8 *ssid_el_p;
2863 int bodysize;
2864 struct ieee80211_hdr header;
2865 struct ass_req_format {
2866 __le16 capability;
2867 __le16 listen_interval;
2868 u8 ap[6]; /* nothing after here directly accessible */
2869 u8 ssid_el_id;
2870 u8 ssid_len;
2871 u8 ssid[MAX_SSID_LENGTH];
2872 u8 sup_rates_el_id;
2873 u8 sup_rates_len;
2874 u8 rates[4];
2875 } body;
2876
2877 header.frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
2878 (is_reassoc ? IEEE80211_STYPE_REASSOC_REQ : IEEE80211_STYPE_ASSOC_REQ));
2879 header.duration_id = cpu_to_le16(0x8000);
2880 header.seq_ctrl = 0;
2881
2882 memcpy(header.addr1, priv->CurrentBSSID, 6);
2883 memcpy(header.addr2, priv->dev->dev_addr, 6);
2884 memcpy(header.addr3, priv->CurrentBSSID, 6);
2885
2886 body.capability = cpu_to_le16(WLAN_CAPABILITY_ESS);
2887 if (priv->wep_is_on)
2888 body.capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
2889 if (priv->preamble == SHORT_PREAMBLE)
2890 body.capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_PREAMBLE);
2891
2892 body.listen_interval = cpu_to_le16(priv->listen_interval * priv->beacon_period);
2893
2894 /* current AP address - only in reassoc frame */
2895 if (is_reassoc) {
2896 memcpy(body.ap, priv->CurrentBSSID, 6);
2897 ssid_el_p = (u8 *)&body.ssid_el_id;
2898 bodysize = 18 + priv->SSID_size;
2899 } else {
2900 ssid_el_p = (u8 *)&body.ap[0];
2901 bodysize = 12 + priv->SSID_size;
2902 }
2903
2904 ssid_el_p[0] = WLAN_EID_SSID;
2905 ssid_el_p[1] = priv->SSID_size;
2906 memcpy(ssid_el_p + 2, priv->SSID, priv->SSID_size);
2907 ssid_el_p[2 + priv->SSID_size] = WLAN_EID_SUPP_RATES;
2908 ssid_el_p[3 + priv->SSID_size] = 4; /* len of suported rates */
2909 memcpy(ssid_el_p + 4 + priv->SSID_size, atmel_basic_rates, 4);
2910
2911 atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize);
2912 }
2913
2914 static int is_frame_from_current_bss(struct atmel_private *priv,
2915 struct ieee80211_hdr *header)
2916 {
2917 if (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FROMDS)
2918 return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0;
2919 else
2920 return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0;
2921 }
2922
2923 static int retrieve_bss(struct atmel_private *priv)
2924 {
2925 int i;
2926 int max_rssi = -128;
2927 int max_index = -1;
2928
2929 if (priv->BSS_list_entries == 0)
2930 return -1;
2931
2932 if (priv->connect_to_any_BSS) {
2933 /* Select a BSS with the max-RSSI but of the same type and of
2934 the same WEP mode and that it is not marked as 'bad' (i.e.
2935 we had previously failed to connect to this BSS with the
2936 settings that we currently use) */
2937 priv->current_BSS = 0;
2938 for (i = 0; i < priv->BSS_list_entries; i++) {
2939 if (priv->operating_mode == priv->BSSinfo[i].BSStype &&
2940 ((!priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) ||
2941 (priv->wep_is_on && priv->BSSinfo[i].UsingWEP)) &&
2942 !(priv->BSSinfo[i].channel & 0x80)) {
2943 max_rssi = priv->BSSinfo[i].RSSI;
2944 priv->current_BSS = max_index = i;
2945 }
2946 }
2947 return max_index;
2948 }
2949
2950 for (i = 0; i < priv->BSS_list_entries; i++) {
2951 if (priv->SSID_size == priv->BSSinfo[i].SSIDsize &&
2952 memcmp(priv->SSID, priv->BSSinfo[i].SSID, priv->SSID_size) == 0 &&
2953 priv->operating_mode == priv->BSSinfo[i].BSStype &&
2954 atmel_validate_channel(priv, priv->BSSinfo[i].channel) == 0) {
2955 if (priv->BSSinfo[i].RSSI >= max_rssi) {
2956 max_rssi = priv->BSSinfo[i].RSSI;
2957 max_index = i;
2958 }
2959 }
2960 }
2961 return max_index;
2962 }
2963
2964 static void store_bss_info(struct atmel_private *priv,
2965 struct ieee80211_hdr *header, u16 capability,
2966 u16 beacon_period, u8 channel, u8 rssi, u8 ssid_len,
2967 u8 *ssid, int is_beacon)
2968 {
2969 u8 *bss = capability & WLAN_CAPABILITY_ESS ? header->addr2 : header->addr3;
2970 int i, index;
2971
2972 for (index = -1, i = 0; i < priv->BSS_list_entries; i++)
2973 if (memcmp(bss, priv->BSSinfo[i].BSSID, 6) == 0)
2974 index = i;
2975
2976 /* If we process a probe and an entry from this BSS exists
2977 we will update the BSS entry with the info from this BSS.
2978 If we process a beacon we will only update RSSI */
2979
2980 if (index == -1) {
2981 if (priv->BSS_list_entries == MAX_BSS_ENTRIES)
2982 return;
2983 index = priv->BSS_list_entries++;
2984 memcpy(priv->BSSinfo[index].BSSID, bss, 6);
2985 priv->BSSinfo[index].RSSI = rssi;
2986 } else {
2987 if (rssi > priv->BSSinfo[index].RSSI)
2988 priv->BSSinfo[index].RSSI = rssi;
2989 if (is_beacon)
2990 return;
2991 }
2992
2993 priv->BSSinfo[index].channel = channel;
2994 priv->BSSinfo[index].beacon_period = beacon_period;
2995 priv->BSSinfo[index].UsingWEP = capability & WLAN_CAPABILITY_PRIVACY;
2996 memcpy(priv->BSSinfo[index].SSID, ssid, ssid_len);
2997 priv->BSSinfo[index].SSIDsize = ssid_len;
2998
2999 if (capability & WLAN_CAPABILITY_IBSS)
3000 priv->BSSinfo[index].BSStype = IW_MODE_ADHOC;
3001 else if (capability & WLAN_CAPABILITY_ESS)
3002 priv->BSSinfo[index].BSStype =IW_MODE_INFRA;
3003
3004 priv->BSSinfo[index].preamble = capability & WLAN_CAPABILITY_SHORT_PREAMBLE ?
3005 SHORT_PREAMBLE : LONG_PREAMBLE;
3006 }
3007
3008 static void authenticate(struct atmel_private *priv, u16 frame_len)
3009 {
3010 struct auth_body *auth = (struct auth_body *)priv->rx_buf;
3011 u16 status = le16_to_cpu(auth->status);
3012 u16 trans_seq_no = le16_to_cpu(auth->trans_seq);
3013 u16 system = le16_to_cpu(auth->alg);
3014
3015 if (status == WLAN_STATUS_SUCCESS && !priv->wep_is_on) {
3016 /* no WEP */
3017 if (priv->station_was_associated) {
3018 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
3019 send_association_request(priv, 1);
3020 return;
3021 } else {
3022 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
3023 send_association_request(priv, 0);
3024 return;
3025 }
3026 }
3027
3028 if (status == WLAN_STATUS_SUCCESS && priv->wep_is_on) {
3029 int should_associate = 0;
3030 /* WEP */
3031 if (trans_seq_no != priv->ExpectedAuthentTransactionSeqNum)
3032 return;
3033
3034 if (system == WLAN_AUTH_OPEN) {
3035 if (trans_seq_no == 0x0002) {
3036 should_associate = 1;
3037 }
3038 } else if (system == WLAN_AUTH_SHARED_KEY) {
3039 if (trans_seq_no == 0x0002 &&
3040 auth->el_id == WLAN_EID_CHALLENGE) {
3041 send_authentication_request(priv, system, auth->chall_text, auth->chall_text_len);
3042 return;
3043 } else if (trans_seq_no == 0x0004) {
3044 should_associate = 1;
3045 }
3046 }
3047
3048 if (should_associate) {
3049 if(priv->station_was_associated) {
3050 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
3051 send_association_request(priv, 1);
3052 return;
3053 } else {
3054 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
3055 send_association_request(priv, 0);
3056 return;
3057 }
3058 }
3059 }
3060
3061 if (status == WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG) {
3062 /* Flip back and forth between WEP auth modes until the max
3063 * authentication tries has been exceeded.
3064 */
3065 if (system == WLAN_AUTH_OPEN) {
3066 priv->CurrentAuthentTransactionSeqNum = 0x001;
3067 priv->exclude_unencrypted = 1;
3068 send_authentication_request(priv, WLAN_AUTH_SHARED_KEY, NULL, 0);
3069 return;
3070 } else if ( system == WLAN_AUTH_SHARED_KEY
3071 && priv->wep_is_on) {
3072 priv->CurrentAuthentTransactionSeqNum = 0x001;
3073 priv->exclude_unencrypted = 0;
3074 send_authentication_request(priv, WLAN_AUTH_OPEN, NULL, 0);
3075 return;
3076 } else if (priv->connect_to_any_BSS) {
3077 int bss_index;
3078
3079 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3080
3081 if ((bss_index = retrieve_bss(priv)) != -1) {
3082 atmel_join_bss(priv, bss_index);
3083 return;
3084 }
3085 }
3086 }
3087
3088 priv->AuthenticationRequestRetryCnt = 0;
3089 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3090 priv->station_is_associated = 0;
3091 }
3092
3093 static void associate(struct atmel_private *priv, u16 frame_len, u16 subtype)
3094 {
3095 struct ass_resp_format {
3096 __le16 capability;
3097 __le16 status;
3098 __le16 ass_id;
3099 u8 el_id;
3100 u8 length;
3101 u8 rates[4];
3102 } *ass_resp = (struct ass_resp_format *)priv->rx_buf;
3103
3104 u16 status = le16_to_cpu(ass_resp->status);
3105 u16 ass_id = le16_to_cpu(ass_resp->ass_id);
3106 u16 rates_len = ass_resp->length > 4 ? 4 : ass_resp->length;
3107
3108 union iwreq_data wrqu;
3109
3110 if (frame_len < 8 + rates_len)
3111 return;
3112
3113 if (status == WLAN_STATUS_SUCCESS) {
3114 if (subtype == IEEE80211_STYPE_ASSOC_RESP)
3115 priv->AssociationRequestRetryCnt = 0;
3116 else
3117 priv->ReAssociationRequestRetryCnt = 0;
3118
3119 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3120 MAC_MGMT_MIB_STATION_ID_POS, ass_id & 0x3fff);
3121 atmel_set_mib(priv, Phy_Mib_Type,
3122 PHY_MIB_RATE_SET_POS, ass_resp->rates, rates_len);
3123 if (priv->power_mode == 0) {
3124 priv->listen_interval = 1;
3125 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3126 MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3127 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3128 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3129 } else {
3130 priv->listen_interval = 2;
3131 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3132 MAC_MGMT_MIB_PS_MODE_POS, PS_MODE);
3133 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3134 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 2);
3135 }
3136
3137 priv->station_is_associated = 1;
3138 priv->station_was_associated = 1;
3139 atmel_enter_state(priv, STATION_STATE_READY);
3140
3141 /* Send association event to userspace */
3142 wrqu.data.length = 0;
3143 wrqu.data.flags = 0;
3144 memcpy(wrqu.ap_addr.sa_data, priv->CurrentBSSID, ETH_ALEN);
3145 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
3146 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
3147
3148 return;
3149 }
3150
3151 if (subtype == IEEE80211_STYPE_ASSOC_RESP &&
3152 status != WLAN_STATUS_ASSOC_DENIED_RATES &&
3153 status != WLAN_STATUS_CAPS_UNSUPPORTED &&
3154 priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
3155 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3156 priv->AssociationRequestRetryCnt++;
3157 send_association_request(priv, 0);
3158 return;
3159 }
3160
3161 if (subtype == IEEE80211_STYPE_REASSOC_RESP &&
3162 status != WLAN_STATUS_ASSOC_DENIED_RATES &&
3163 status != WLAN_STATUS_CAPS_UNSUPPORTED &&
3164 priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
3165 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3166 priv->ReAssociationRequestRetryCnt++;
3167 send_association_request(priv, 1);
3168 return;
3169 }
3170
3171 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3172 priv->station_is_associated = 0;
3173
3174 if (priv->connect_to_any_BSS) {
3175 int bss_index;
3176 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3177
3178 if ((bss_index = retrieve_bss(priv)) != -1)
3179 atmel_join_bss(priv, bss_index);
3180 }
3181 }
3182
3183 static void atmel_join_bss(struct atmel_private *priv, int bss_index)
3184 {
3185 struct bss_info *bss = &priv->BSSinfo[bss_index];
3186
3187 memcpy(priv->CurrentBSSID, bss->BSSID, 6);
3188 memcpy(priv->SSID, bss->SSID, priv->SSID_size = bss->SSIDsize);
3189
3190 /* The WPA stuff cares about the current AP address */
3191 if (priv->use_wpa)
3192 build_wpa_mib(priv);
3193
3194 /* When switching to AdHoc turn OFF Power Save if needed */
3195
3196 if (bss->BSStype == IW_MODE_ADHOC &&
3197 priv->operating_mode != IW_MODE_ADHOC &&
3198 priv->power_mode) {
3199 priv->power_mode = 0;
3200 priv->listen_interval = 1;
3201 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3202 MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3203 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3204 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3205 }
3206
3207 priv->operating_mode = bss->BSStype;
3208 priv->channel = bss->channel & 0x7f;
3209 priv->beacon_period = bss->beacon_period;
3210
3211 if (priv->preamble != bss->preamble) {
3212 priv->preamble = bss->preamble;
3213 atmel_set_mib8(priv, Local_Mib_Type,
3214 LOCAL_MIB_PREAMBLE_TYPE, bss->preamble);
3215 }
3216
3217 if (!priv->wep_is_on && bss->UsingWEP) {
3218 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3219 priv->station_is_associated = 0;
3220 return;
3221 }
3222
3223 if (priv->wep_is_on && !bss->UsingWEP) {
3224 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3225 priv->station_is_associated = 0;
3226 return;
3227 }
3228
3229 atmel_enter_state(priv, STATION_STATE_JOINNING);
3230
3231 if (priv->operating_mode == IW_MODE_INFRA)
3232 join(priv, BSS_TYPE_INFRASTRUCTURE);
3233 else
3234 join(priv, BSS_TYPE_AD_HOC);
3235 }
3236
3237 static void restart_search(struct atmel_private *priv)
3238 {
3239 int bss_index;
3240
3241 if (!priv->connect_to_any_BSS) {
3242 atmel_scan(priv, 1);
3243 } else {
3244 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3245
3246 if ((bss_index = retrieve_bss(priv)) != -1)
3247 atmel_join_bss(priv, bss_index);
3248 else
3249 atmel_scan(priv, 0);
3250 }
3251 }
3252
3253 static void smooth_rssi(struct atmel_private *priv, u8 rssi)
3254 {
3255 u8 old = priv->wstats.qual.level;
3256 u8 max_rssi = 42; /* 502-rmfd-revd max by experiment, default for now */
3257
3258 switch (priv->firmware_type) {
3259 case ATMEL_FW_TYPE_502E:
3260 max_rssi = 63; /* 502-rmfd-reve max by experiment */
3261 break;
3262 default:
3263 break;
3264 }
3265
3266 rssi = rssi * 100 / max_rssi;
3267 if ((rssi + old) % 2)
3268 priv->wstats.qual.level = (rssi + old) / 2 + 1;
3269 else
3270 priv->wstats.qual.level = (rssi + old) / 2;
3271 priv->wstats.qual.updated |= IW_QUAL_LEVEL_UPDATED;
3272 priv->wstats.qual.updated &= ~IW_QUAL_LEVEL_INVALID;
3273 }
3274
3275 static void atmel_smooth_qual(struct atmel_private *priv)
3276 {
3277 unsigned long time_diff = (jiffies - priv->last_qual) / HZ;
3278 while (time_diff--) {
3279 priv->last_qual += HZ;
3280 priv->wstats.qual.qual = priv->wstats.qual.qual / 2;
3281 priv->wstats.qual.qual +=
3282 priv->beacons_this_sec * priv->beacon_period * (priv->wstats.qual.level + 100) / 4000;
3283 priv->beacons_this_sec = 0;
3284 }
3285 priv->wstats.qual.updated |= IW_QUAL_QUAL_UPDATED;
3286 priv->wstats.qual.updated &= ~IW_QUAL_QUAL_INVALID;
3287 }
3288
3289 /* deals with incoming managment frames. */
3290 static void atmel_management_frame(struct atmel_private *priv,
3291 struct ieee80211_hdr *header,
3292 u16 frame_len, u8 rssi)
3293 {
3294 u16 subtype;
3295
3296 subtype = le16_to_cpu(header->frame_control) & IEEE80211_FCTL_STYPE;
3297 switch (subtype) {
3298 case IEEE80211_STYPE_BEACON:
3299 case IEEE80211_STYPE_PROBE_RESP:
3300
3301 /* beacon frame has multiple variable-length fields -
3302 never let an engineer loose with a data structure design. */
3303 {
3304 struct beacon_format {
3305 __le64 timestamp;
3306 __le16 interval;
3307 __le16 capability;
3308 u8 ssid_el_id;
3309 u8 ssid_length;
3310 /* ssid here */
3311 u8 rates_el_id;
3312 u8 rates_length;
3313 /* rates here */
3314 u8 ds_el_id;
3315 u8 ds_length;
3316 /* ds here */
3317 } *beacon = (struct beacon_format *)priv->rx_buf;
3318
3319 u8 channel, rates_length, ssid_length;
3320 u64 timestamp = le64_to_cpu(beacon->timestamp);
3321 u16 beacon_interval = le16_to_cpu(beacon->interval);
3322 u16 capability = le16_to_cpu(beacon->capability);
3323 u8 *beaconp = priv->rx_buf;
3324 ssid_length = beacon->ssid_length;
3325 /* this blows chunks. */
3326 if (frame_len < 14 || frame_len < ssid_length + 15)
3327 return;
3328 rates_length = beaconp[beacon->ssid_length + 15];
3329 if (frame_len < ssid_length + rates_length + 18)
3330 return;
3331 if (ssid_length > MAX_SSID_LENGTH)
3332 return;
3333 channel = beaconp[ssid_length + rates_length + 18];
3334
3335 if (priv->station_state == STATION_STATE_READY) {
3336 smooth_rssi(priv, rssi);
3337 if (is_frame_from_current_bss(priv, header)) {
3338 priv->beacons_this_sec++;
3339 atmel_smooth_qual(priv);
3340 if (priv->last_beacon_timestamp) {
3341 /* Note truncate this to 32 bits - kernel can't divide a long long */
3342 u32 beacon_delay = timestamp - priv->last_beacon_timestamp;
3343 int beacons = beacon_delay / (beacon_interval * 1000);
3344 if (beacons > 1)
3345 priv->wstats.miss.beacon += beacons - 1;
3346 }
3347 priv->last_beacon_timestamp = timestamp;
3348 handle_beacon_probe(priv, capability, channel);
3349 }
3350 }
3351
3352 if (priv->station_state == STATION_STATE_SCANNING)
3353 store_bss_info(priv, header, capability,
3354 beacon_interval, channel, rssi,
3355 ssid_length,
3356 &beacon->rates_el_id,
3357 subtype == IEEE80211_STYPE_BEACON);
3358 }
3359 break;
3360
3361 case IEEE80211_STYPE_AUTH:
3362
3363 if (priv->station_state == STATION_STATE_AUTHENTICATING)
3364 authenticate(priv, frame_len);
3365
3366 break;
3367
3368 case IEEE80211_STYPE_ASSOC_RESP:
3369 case IEEE80211_STYPE_REASSOC_RESP:
3370
3371 if (priv->station_state == STATION_STATE_ASSOCIATING ||
3372 priv->station_state == STATION_STATE_REASSOCIATING)
3373 associate(priv, frame_len, subtype);
3374
3375 break;
3376
3377 case IEEE80211_STYPE_DISASSOC:
3378 if (priv->station_is_associated &&
3379 priv->operating_mode == IW_MODE_INFRA &&
3380 is_frame_from_current_bss(priv, header)) {
3381 priv->station_was_associated = 0;
3382 priv->station_is_associated = 0;
3383
3384 atmel_enter_state(priv, STATION_STATE_JOINNING);
3385 join(priv, BSS_TYPE_INFRASTRUCTURE);
3386 }
3387
3388 break;
3389
3390 case IEEE80211_STYPE_DEAUTH:
3391 if (priv->operating_mode == IW_MODE_INFRA &&
3392 is_frame_from_current_bss(priv, header)) {
3393 priv->station_was_associated = 0;
3394
3395 atmel_enter_state(priv, STATION_STATE_JOINNING);
3396 join(priv, BSS_TYPE_INFRASTRUCTURE);
3397 }
3398
3399 break;
3400 }
3401 }
3402
3403 /* run when timer expires */
3404 static void atmel_management_timer(u_long a)
3405 {
3406 struct net_device *dev = (struct net_device *) a;
3407 struct atmel_private *priv = netdev_priv(dev);
3408 unsigned long flags;
3409
3410 /* Check if the card has been yanked. */
3411 if (priv->card && priv->present_callback &&
3412 !(*priv->present_callback)(priv->card))
3413 return;
3414
3415 spin_lock_irqsave(&priv->irqlock, flags);
3416
3417 switch (priv->station_state) {
3418
3419 case STATION_STATE_AUTHENTICATING:
3420 if (priv->AuthenticationRequestRetryCnt >= MAX_AUTHENTICATION_RETRIES) {
3421 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3422 priv->station_is_associated = 0;
3423 priv->AuthenticationRequestRetryCnt = 0;
3424 restart_search(priv);
3425 } else {
3426 int auth = WLAN_AUTH_OPEN;
3427 priv->AuthenticationRequestRetryCnt++;
3428 priv->CurrentAuthentTransactionSeqNum = 0x0001;
3429 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3430 if (priv->wep_is_on && priv->exclude_unencrypted)
3431 auth = WLAN_AUTH_SHARED_KEY;
3432 send_authentication_request(priv, auth, NULL, 0);
3433 }
3434 break;
3435
3436 case STATION_STATE_ASSOCIATING:
3437 if (priv->AssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3438 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3439 priv->station_is_associated = 0;
3440 priv->AssociationRequestRetryCnt = 0;
3441 restart_search(priv);
3442 } else {
3443 priv->AssociationRequestRetryCnt++;
3444 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3445 send_association_request(priv, 0);
3446 }
3447 break;
3448
3449 case STATION_STATE_REASSOCIATING:
3450 if (priv->ReAssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3451 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3452 priv->station_is_associated = 0;
3453 priv->ReAssociationRequestRetryCnt = 0;
3454 restart_search(priv);
3455 } else {
3456 priv->ReAssociationRequestRetryCnt++;
3457 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3458 send_association_request(priv, 1);
3459 }
3460 break;
3461
3462 default:
3463 break;
3464 }
3465
3466 spin_unlock_irqrestore(&priv->irqlock, flags);
3467 }
3468
3469 static void atmel_command_irq(struct atmel_private *priv)
3470 {
3471 u8 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
3472 u8 command = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET));
3473 int fast_scan;
3474 union iwreq_data wrqu;
3475
3476 if (status == CMD_STATUS_IDLE ||
3477 status == CMD_STATUS_IN_PROGRESS)
3478 return;
3479
3480 switch (command){
3481
3482 case CMD_Start:
3483 if (status == CMD_STATUS_COMPLETE) {
3484 priv->station_was_associated = priv->station_is_associated;
3485 atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
3486 (u8 *)priv->CurrentBSSID, 6);
3487 atmel_enter_state(priv, STATION_STATE_READY);
3488 }
3489 break;
3490
3491 case CMD_Scan:
3492 fast_scan = priv->fast_scan;
3493 priv->fast_scan = 0;
3494
3495 if (status != CMD_STATUS_COMPLETE) {
3496 atmel_scan(priv, 1);
3497 } else {
3498 int bss_index = retrieve_bss(priv);
3499 int notify_scan_complete = 1;
3500 if (bss_index != -1) {
3501 atmel_join_bss(priv, bss_index);
3502 } else if (priv->operating_mode == IW_MODE_ADHOC &&
3503 priv->SSID_size != 0) {
3504 start(priv, BSS_TYPE_AD_HOC);
3505 } else {
3506 priv->fast_scan = !fast_scan;
3507 atmel_scan(priv, 1);
3508 notify_scan_complete = 0;
3509 }
3510 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3511 if (notify_scan_complete) {
3512 wrqu.data.length = 0;
3513 wrqu.data.flags = 0;
3514 wireless_send_event(priv->dev, SIOCGIWSCAN, &wrqu, NULL);
3515 }
3516 }
3517 break;
3518
3519 case CMD_SiteSurvey:
3520 priv->fast_scan = 0;
3521
3522 if (status != CMD_STATUS_COMPLETE)
3523 return;
3524
3525 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3526 if (priv->station_is_associated) {
3527 atmel_enter_state(priv, STATION_STATE_READY);
3528 wrqu.data.length = 0;
3529 wrqu.data.flags = 0;
3530 wireless_send_event(priv->dev, SIOCGIWSCAN, &wrqu, NULL);
3531 } else {
3532 atmel_scan(priv, 1);
3533 }
3534 break;
3535
3536 case CMD_Join:
3537 if (status == CMD_STATUS_COMPLETE) {
3538 if (priv->operating_mode == IW_MODE_ADHOC) {
3539 priv->station_was_associated = priv->station_is_associated;
3540 atmel_enter_state(priv, STATION_STATE_READY);
3541 } else {
3542 int auth = WLAN_AUTH_OPEN;
3543 priv->AuthenticationRequestRetryCnt = 0;
3544 atmel_enter_state(priv, STATION_STATE_AUTHENTICATING);
3545
3546 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3547 priv->CurrentAuthentTransactionSeqNum = 0x0001;
3548 if (priv->wep_is_on && priv->exclude_unencrypted)
3549 auth = WLAN_AUTH_SHARED_KEY;
3550 send_authentication_request(priv, auth, NULL, 0);
3551 }
3552 return;
3553 }
3554
3555 atmel_scan(priv, 1);
3556 }
3557 }
3558
3559 static int atmel_wakeup_firmware(struct atmel_private *priv)
3560 {
3561 struct host_info_struct *iface = &priv->host_info;
3562 u16 mr1, mr3;
3563 int i;
3564
3565 if (priv->card_type == CARD_TYPE_SPI_FLASH)
3566 atmel_set_gcr(priv->dev, GCR_REMAP);
3567
3568 /* wake up on-board processor */
3569 atmel_clear_gcr(priv->dev, 0x0040);
3570 atmel_write16(priv->dev, BSR, BSS_SRAM);
3571
3572 if (priv->card_type == CARD_TYPE_SPI_FLASH)
3573 mdelay(100);
3574
3575 /* and wait for it */
3576 for (i = LOOP_RETRY_LIMIT; i; i--) {
3577 mr1 = atmel_read16(priv->dev, MR1);
3578 mr3 = atmel_read16(priv->dev, MR3);
3579
3580 if (mr3 & MAC_BOOT_COMPLETE)
3581 break;
3582 if (mr1 & MAC_BOOT_COMPLETE &&
3583 priv->bus_type == BUS_TYPE_PCCARD)
3584 break;
3585 }
3586
3587 if (i == 0) {
3588 printk(KERN_ALERT "%s: MAC failed to boot.\n", priv->dev->name);
3589 return -EIO;
3590 }
3591
3592 if ((priv->host_info_base = atmel_read16(priv->dev, MR2)) == 0xffff) {
3593 printk(KERN_ALERT "%s: card missing.\n", priv->dev->name);
3594 return -ENODEV;
3595 }
3596
3597 /* now check for completion of MAC initialization through
3598 the FunCtrl field of the IFACE, poll MR1 to detect completion of
3599 MAC initialization, check completion status, set interrupt mask,
3600 enables interrupts and calls Tx and Rx initialization functions */
3601
3602 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET), FUNC_CTRL_INIT_COMPLETE);
3603
3604 for (i = LOOP_RETRY_LIMIT; i; i--) {
3605 mr1 = atmel_read16(priv->dev, MR1);
3606 mr3 = atmel_read16(priv->dev, MR3);
3607
3608 if (mr3 & MAC_INIT_COMPLETE)
3609 break;
3610 if (mr1 & MAC_INIT_COMPLETE &&
3611 priv->bus_type == BUS_TYPE_PCCARD)
3612 break;
3613 }
3614
3615 if (i == 0) {
3616 printk(KERN_ALERT "%s: MAC failed to initialise.\n",
3617 priv->dev->name);
3618 return -EIO;
3619 }
3620
3621 /* Check for MAC_INIT_OK only on the register that the MAC_INIT_OK was set */
3622 if ((mr3 & MAC_INIT_COMPLETE) &&
3623 !(atmel_read16(priv->dev, MR3) & MAC_INIT_OK)) {
3624 printk(KERN_ALERT "%s: MAC failed MR3 self-test.\n", priv->dev->name);
3625 return -EIO;
3626 }
3627 if ((mr1 & MAC_INIT_COMPLETE) &&
3628 !(atmel_read16(priv->dev, MR1) & MAC_INIT_OK)) {
3629 printk(KERN_ALERT "%s: MAC failed MR1 self-test.\n", priv->dev->name);
3630 return -EIO;
3631 }
3632
3633 atmel_copy_to_host(priv->dev, (unsigned char *)iface,
3634 priv->host_info_base, sizeof(*iface));
3635
3636 iface->tx_buff_pos = le16_to_cpu(iface->tx_buff_pos);
3637 iface->tx_buff_size = le16_to_cpu(iface->tx_buff_size);
3638 iface->tx_desc_pos = le16_to_cpu(iface->tx_desc_pos);
3639 iface->tx_desc_count = le16_to_cpu(iface->tx_desc_count);
3640 iface->rx_buff_pos = le16_to_cpu(iface->rx_buff_pos);
3641 iface->rx_buff_size = le16_to_cpu(iface->rx_buff_size);
3642 iface->rx_desc_pos = le16_to_cpu(iface->rx_desc_pos);
3643 iface->rx_desc_count = le16_to_cpu(iface->rx_desc_count);
3644 iface->build_version = le16_to_cpu(iface->build_version);
3645 iface->command_pos = le16_to_cpu(iface->command_pos);
3646 iface->major_version = le16_to_cpu(iface->major_version);
3647 iface->minor_version = le16_to_cpu(iface->minor_version);
3648 iface->func_ctrl = le16_to_cpu(iface->func_ctrl);
3649 iface->mac_status = le16_to_cpu(iface->mac_status);
3650
3651 return 0;
3652 }
3653
3654 /* determine type of memory and MAC address */
3655 static int probe_atmel_card(struct net_device *dev)
3656 {
3657 int rc = 0;
3658 struct atmel_private *priv = netdev_priv(dev);
3659
3660 /* reset pccard */
3661 if (priv->bus_type == BUS_TYPE_PCCARD)
3662 atmel_write16(dev, GCR, 0x0060);
3663
3664 atmel_write16(dev, GCR, 0x0040);
3665 mdelay(500);
3666
3667 if (atmel_read16(dev, MR2) == 0) {
3668 /* No stored firmware so load a small stub which just
3669 tells us the MAC address */
3670 int i;
3671 priv->card_type = CARD_TYPE_EEPROM;
3672 atmel_write16(dev, BSR, BSS_IRAM);
3673 atmel_copy_to_card(dev, 0, mac_reader, sizeof(mac_reader));
3674 atmel_set_gcr(dev, GCR_REMAP);
3675 atmel_clear_gcr(priv->dev, 0x0040);
3676 atmel_write16(dev, BSR, BSS_SRAM);
3677 for (i = LOOP_RETRY_LIMIT; i; i--)
3678 if (atmel_read16(dev, MR3) & MAC_BOOT_COMPLETE)
3679 break;
3680 if (i == 0) {
3681 printk(KERN_ALERT "%s: MAC failed to boot MAC address reader.\n", dev->name);
3682 } else {
3683 atmel_copy_to_host(dev, dev->dev_addr, atmel_read16(dev, MR2), 6);
3684 /* got address, now squash it again until the network
3685 interface is opened */
3686 if (priv->bus_type == BUS_TYPE_PCCARD)
3687 atmel_write16(dev, GCR, 0x0060);
3688 atmel_write16(dev, GCR, 0x0040);
3689 rc = 1;
3690 }
3691 } else if (atmel_read16(dev, MR4) == 0) {
3692 /* Mac address easy in this case. */
3693 priv->card_type = CARD_TYPE_PARALLEL_FLASH;
3694 atmel_write16(dev, BSR, 1);
3695 atmel_copy_to_host(dev, dev->dev_addr, 0xc000, 6);
3696 atmel_write16(dev, BSR, 0x200);
3697 rc = 1;
3698 } else {
3699 /* Standard firmware in flash, boot it up and ask
3700 for the Mac Address */
3701 priv->card_type = CARD_TYPE_SPI_FLASH;
3702 if (atmel_wakeup_firmware(priv) == 0) {
3703 atmel_get_mib(priv, Mac_Address_Mib_Type, 0, dev->dev_addr, 6);
3704
3705 /* got address, now squash it again until the network
3706 interface is opened */
3707 if (priv->bus_type == BUS_TYPE_PCCARD)
3708 atmel_write16(dev, GCR, 0x0060);
3709 atmel_write16(dev, GCR, 0x0040);
3710 rc = 1;
3711 }
3712 }
3713
3714 if (rc) {
3715 if (dev->dev_addr[0] == 0xFF) {
3716 u8 default_mac[] = {0x00,0x04, 0x25, 0x00, 0x00, 0x00};
3717 printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name);
3718 memcpy(dev->dev_addr, default_mac, 6);
3719 }
3720 }
3721
3722 return rc;
3723 }
3724
3725 /* Move the encyption information on the MIB structure.
3726 This routine is for the pre-WPA firmware: later firmware has
3727 a different format MIB and a different routine. */
3728 static void build_wep_mib(struct atmel_private *priv)
3729 {
3730 struct { /* NB this is matched to the hardware, don't change. */
3731 u8 wep_is_on;
3732 u8 default_key; /* 0..3 */
3733 u8 reserved;
3734 u8 exclude_unencrypted;
3735
3736 u32 WEPICV_error_count;
3737 u32 WEP_excluded_count;
3738
3739 u8 wep_keys[MAX_ENCRYPTION_KEYS][13];
3740 u8 encryption_level; /* 0, 1, 2 */
3741 u8 reserved2[3];
3742 } mib;
3743 int i;
3744
3745 mib.wep_is_on = priv->wep_is_on;
3746 if (priv->wep_is_on) {
3747 if (priv->wep_key_len[priv->default_key] > 5)
3748 mib.encryption_level = 2;
3749 else
3750 mib.encryption_level = 1;
3751 } else {
3752 mib.encryption_level = 0;
3753 }
3754
3755 mib.default_key = priv->default_key;
3756 mib.exclude_unencrypted = priv->exclude_unencrypted;
3757
3758 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++)
3759 memcpy(mib.wep_keys[i], priv->wep_keys[i], 13);
3760
3761 atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3762 }
3763
3764 static void build_wpa_mib(struct atmel_private *priv)
3765 {
3766 /* This is for the later (WPA enabled) firmware. */
3767
3768 struct { /* NB this is matched to the hardware, don't change. */
3769 u8 cipher_default_key_value[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
3770 u8 receiver_address[6];
3771 u8 wep_is_on;
3772 u8 default_key; /* 0..3 */
3773 u8 group_key;
3774 u8 exclude_unencrypted;
3775 u8 encryption_type;
3776 u8 reserved;
3777
3778 u32 WEPICV_error_count;
3779 u32 WEP_excluded_count;
3780
3781 u8 key_RSC[4][8];
3782 } mib;
3783
3784 int i;
3785
3786 mib.wep_is_on = priv->wep_is_on;
3787 mib.exclude_unencrypted = priv->exclude_unencrypted;
3788 memcpy(mib.receiver_address, priv->CurrentBSSID, 6);
3789
3790 /* zero all the keys before adding in valid ones. */
3791 memset(mib.cipher_default_key_value, 0, sizeof(mib.cipher_default_key_value));
3792
3793 if (priv->wep_is_on) {
3794 /* There's a comment in the Atmel code to the effect that this
3795 is only valid when still using WEP, it may need to be set to
3796 something to use WPA */
3797 memset(mib.key_RSC, 0, sizeof(mib.key_RSC));
3798
3799 mib.default_key = mib.group_key = 255;
3800 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++) {
3801 if (priv->wep_key_len[i] > 0) {
3802 memcpy(mib.cipher_default_key_value[i], priv->wep_keys[i], MAX_ENCRYPTION_KEY_SIZE);
3803 if (i == priv->default_key) {
3804 mib.default_key = i;
3805 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 7;
3806 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->pairwise_cipher_suite;
3807 } else {
3808 mib.group_key = i;
3809 priv->group_cipher_suite = priv->pairwise_cipher_suite;
3810 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 1;
3811 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->group_cipher_suite;
3812 }
3813 }
3814 }
3815 if (mib.default_key == 255)
3816 mib.default_key = mib.group_key != 255 ? mib.group_key : 0;
3817 if (mib.group_key == 255)
3818 mib.group_key = mib.default_key;
3819
3820 }
3821
3822 atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3823 }
3824
3825 static int reset_atmel_card(struct net_device *dev)
3826 {
3827 /* do everything necessary to wake up the hardware, including
3828 waiting for the lightning strike and throwing the knife switch....
3829
3830 set all the Mib values which matter in the card to match
3831 their settings in the atmel_private structure. Some of these
3832 can be altered on the fly, but many (WEP, infrastucture or ad-hoc)
3833 can only be changed by tearing down the world and coming back through
3834 here.
3835
3836 This routine is also responsible for initialising some
3837 hardware-specific fields in the atmel_private structure,
3838 including a copy of the firmware's hostinfo stucture
3839 which is the route into the rest of the firmware datastructures. */
3840
3841 struct atmel_private *priv = netdev_priv(dev);
3842 u8 configuration;
3843 int old_state = priv->station_state;
3844 int err = 0;
3845
3846 /* data to add to the firmware names, in priority order
3847 this implemenents firmware versioning */
3848
3849 static char *firmware_modifier[] = {
3850 "-wpa",
3851 "",
3852 NULL
3853 };
3854
3855 /* reset pccard */
3856 if (priv->bus_type == BUS_TYPE_PCCARD)
3857 atmel_write16(priv->dev, GCR, 0x0060);
3858
3859 /* stop card , disable interrupts */
3860 atmel_write16(priv->dev, GCR, 0x0040);
3861
3862 if (priv->card_type == CARD_TYPE_EEPROM) {
3863 /* copy in firmware if needed */
3864 const struct firmware *fw_entry = NULL;
3865 const unsigned char *fw;
3866 int len = priv->firmware_length;
3867 if (!(fw = priv->firmware)) {
3868 if (priv->firmware_type == ATMEL_FW_TYPE_NONE) {
3869 if (strlen(priv->firmware_id) == 0) {
3870 printk(KERN_INFO
3871 "%s: card type is unknown: assuming at76c502 firmware is OK.\n",
3872 dev->name);
3873 printk(KERN_INFO
3874 "%s: if not, use the firmware= module parameter.\n",
3875 dev->name);
3876 strcpy(priv->firmware_id, "atmel_at76c502.bin");
3877 }
3878 err = request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev);
3879 if (err != 0) {
3880 printk(KERN_ALERT
3881 "%s: firmware %s is missing, cannot continue.\n",
3882 dev->name, priv->firmware_id);
3883 return err;
3884 }
3885 } else {
3886 int fw_index = 0;
3887 int success = 0;
3888
3889 /* get firmware filename entry based on firmware type ID */
3890 while (fw_table[fw_index].fw_type != priv->firmware_type
3891 && fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE)
3892 fw_index++;
3893
3894 /* construct the actual firmware file name */
3895 if (fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE) {
3896 int i;
3897 for (i = 0; firmware_modifier[i]; i++) {
3898 snprintf(priv->firmware_id, 32, "%s%s.%s", fw_table[fw_index].fw_file,
3899 firmware_modifier[i], fw_table[fw_index].fw_file_ext);
3900 priv->firmware_id[31] = '\0';
3901 if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) == 0) {
3902 success = 1;
3903 break;
3904 }
3905 }
3906 }
3907 if (!success) {
3908 printk(KERN_ALERT
3909 "%s: firmware %s is missing, cannot start.\n",
3910 dev->name, priv->firmware_id);
3911 priv->firmware_id[0] = '\0';
3912 return -ENOENT;
3913 }
3914 }
3915
3916 fw = fw_entry->data;
3917 len = fw_entry->size;
3918 }
3919
3920 if (len <= 0x6000) {
3921 atmel_write16(priv->dev, BSR, BSS_IRAM);
3922 atmel_copy_to_card(priv->dev, 0, fw, len);
3923 atmel_set_gcr(priv->dev, GCR_REMAP);
3924 } else {
3925 /* Remap */
3926 atmel_set_gcr(priv->dev, GCR_REMAP);
3927 atmel_write16(priv->dev, BSR, BSS_IRAM);
3928 atmel_copy_to_card(priv->dev, 0, fw, 0x6000);
3929 atmel_write16(priv->dev, BSR, 0x2ff);
3930 atmel_copy_to_card(priv->dev, 0x8000, &fw[0x6000], len - 0x6000);
3931 }
3932
3933 if (fw_entry)
3934 release_firmware(fw_entry);
3935 }
3936
3937 err = atmel_wakeup_firmware(priv);
3938 if (err != 0)
3939 return err;
3940
3941 /* Check the version and set the correct flag for wpa stuff,
3942 old and new firmware is incompatible.
3943 The pre-wpa 3com firmware reports major version 5,
3944 the wpa 3com firmware is major version 4 and doesn't need
3945 the 3com broken-ness filter. */
3946 priv->use_wpa = (priv->host_info.major_version == 4);
3947 priv->radio_on_broken = (priv->host_info.major_version == 5);
3948
3949 /* unmask all irq sources */
3950 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_MASK_OFFSET), 0xff);
3951
3952 /* int Tx system and enable Tx */
3953 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, 0), 0);
3954 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, 0), 0x80000000L);
3955 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, 0), 0);
3956 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, 0), 0);
3957
3958 priv->tx_desc_free = priv->host_info.tx_desc_count;
3959 priv->tx_desc_head = 0;
3960 priv->tx_desc_tail = 0;
3961 priv->tx_desc_previous = 0;
3962 priv->tx_free_mem = priv->host_info.tx_buff_size;
3963 priv->tx_buff_head = 0;
3964 priv->tx_buff_tail = 0;
3965
3966 configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3967 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
3968 configuration | FUNC_CTRL_TxENABLE);
3969
3970 /* init Rx system and enable */
3971 priv->rx_desc_head = 0;
3972
3973 configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3974 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
3975 configuration | FUNC_CTRL_RxENABLE);
3976
3977 if (!priv->radio_on_broken) {
3978 if (atmel_send_command_wait(priv, CMD_EnableRadio, NULL, 0) ==
3979 CMD_STATUS_REJECTED_RADIO_OFF) {
3980 printk(KERN_INFO "%s: cannot turn the radio on.\n",
3981 dev->name);
3982 return -EIO;
3983 }
3984 }
3985
3986 /* set up enough MIB values to run. */
3987 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_AUTO_TX_RATE_POS, priv->auto_tx_rate);
3988 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_TX_PROMISCUOUS_POS, PROM_MODE_OFF);
3989 atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_RTS_THRESHOLD_POS, priv->rts_threshold);
3990 atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_FRAG_THRESHOLD_POS, priv->frag_threshold);
3991 atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_SHORT_RETRY_POS, priv->short_retry);
3992 atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_LONG_RETRY_POS, priv->long_retry);
3993 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, priv->preamble);
3994 atmel_set_mib(priv, Mac_Address_Mib_Type, MAC_ADDR_MIB_MAC_ADDR_POS,
3995 priv->dev->dev_addr, 6);
3996 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3997 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3998 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_BEACON_PER_POS, priv->default_beacon_period);
3999 atmel_set_mib(priv, Phy_Mib_Type, PHY_MIB_RATE_SET_POS, atmel_basic_rates, 4);
4000 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_PRIVACY_POS, priv->wep_is_on);
4001 if (priv->use_wpa)
4002 build_wpa_mib(priv);
4003 else
4004 build_wep_mib(priv);
4005
4006 if (old_state == STATION_STATE_READY)
4007 {
4008 union iwreq_data wrqu;
4009
4010 wrqu.data.length = 0;
4011 wrqu.data.flags = 0;
4012 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
4013 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
4014 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
4015 }
4016
4017 return 0;
4018 }
4019
4020 static void atmel_send_command(struct atmel_private *priv, int command,
4021 void *cmd, int cmd_size)
4022 {
4023 if (cmd)
4024 atmel_copy_to_card(priv->dev, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET),
4025 cmd, cmd_size);
4026
4027 atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET), command);
4028 atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET), 0);
4029 }
4030
4031 static int atmel_send_command_wait(struct atmel_private *priv, int command,
4032 void *cmd, int cmd_size)
4033 {
4034 int i, status;
4035
4036 atmel_send_command(priv, command, cmd, cmd_size);
4037
4038 for (i = 5000; i; i--) {
4039 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
4040 if (status != CMD_STATUS_IDLE &&
4041 status != CMD_STATUS_IN_PROGRESS)
4042 break;
4043 udelay(20);
4044 }
4045
4046 if (i == 0) {
4047 printk(KERN_ALERT "%s: failed to contact MAC.\n", priv->dev->name);
4048 status = CMD_STATUS_HOST_ERROR;
4049 } else {
4050 if (command != CMD_EnableRadio)
4051 status = CMD_STATUS_COMPLETE;
4052 }
4053
4054 return status;
4055 }
4056
4057 static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index)
4058 {
4059 struct get_set_mib m;
4060 m.type = type;
4061 m.size = 1;
4062 m.index = index;
4063
4064 atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
4065 return atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE));
4066 }
4067
4068 static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index, u8 data)
4069 {
4070 struct get_set_mib m;
4071 m.type = type;
4072 m.size = 1;
4073 m.index = index;
4074 m.data[0] = data;
4075
4076 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
4077 }
4078
4079 static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
4080 u16 data)
4081 {
4082 struct get_set_mib m;
4083 m.type = type;
4084 m.size = 2;
4085 m.index = index;
4086 m.data[0] = data;
4087 m.data[1] = data >> 8;
4088
4089 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 2);
4090 }
4091
4092 static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
4093 u8 *data, int data_len)
4094 {
4095 struct get_set_mib m;
4096 m.type = type;
4097 m.size = data_len;
4098 m.index = index;
4099
4100 if (data_len > MIB_MAX_DATA_BYTES)
4101 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4102
4103 memcpy(m.data, data, data_len);
4104 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4105 }
4106
4107 static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
4108 u8 *data, int data_len)
4109 {
4110 struct get_set_mib m;
4111 m.type = type;
4112 m.size = data_len;
4113 m.index = index;
4114
4115 if (data_len > MIB_MAX_DATA_BYTES)
4116 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4117
4118 atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4119 atmel_copy_to_host(priv->dev, data,
4120 atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE), data_len);
4121 }
4122
4123 static void atmel_writeAR(struct net_device *dev, u16 data)
4124 {
4125 int i;
4126 outw(data, dev->base_addr + AR);
4127 /* Address register appears to need some convincing..... */
4128 for (i = 0; data != inw(dev->base_addr + AR) && i < 10; i++)
4129 outw(data, dev->base_addr + AR);
4130 }
4131
4132 static void atmel_copy_to_card(struct net_device *dev, u16 dest,
4133 const unsigned char *src, u16 len)
4134 {
4135 int i;
4136 atmel_writeAR(dev, dest);
4137 if (dest % 2) {
4138 atmel_write8(dev, DR, *src);
4139 src++; len--;
4140 }
4141 for (i = len; i > 1 ; i -= 2) {
4142 u8 lb = *src++;
4143 u8 hb = *src++;
4144 atmel_write16(dev, DR, lb | (hb << 8));
4145 }
4146 if (i)
4147 atmel_write8(dev, DR, *src);
4148 }
4149
4150 static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
4151 u16 src, u16 len)
4152 {
4153 int i;
4154 atmel_writeAR(dev, src);
4155 if (src % 2) {
4156 *dest = atmel_read8(dev, DR);
4157 dest++; len--;
4158 }
4159 for (i = len; i > 1 ; i -= 2) {
4160 u16 hw = atmel_read16(dev, DR);
4161 *dest++ = hw;
4162 *dest++ = hw >> 8;
4163 }
4164 if (i)
4165 *dest = atmel_read8(dev, DR);
4166 }
4167
4168 static void atmel_set_gcr(struct net_device *dev, u16 mask)
4169 {
4170 outw(inw(dev->base_addr + GCR) | mask, dev->base_addr + GCR);
4171 }
4172
4173 static void atmel_clear_gcr(struct net_device *dev, u16 mask)
4174 {
4175 outw(inw(dev->base_addr + GCR) & ~mask, dev->base_addr + GCR);
4176 }
4177
4178 static int atmel_lock_mac(struct atmel_private *priv)
4179 {
4180 int i, j = 20;
4181 retry:
4182 for (i = 5000; i; i--) {
4183 if (!atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET)))
4184 break;
4185 udelay(20);
4186 }
4187
4188 if (!i)
4189 return 0; /* timed out */
4190
4191 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 1);
4192 if (atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET))) {
4193 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
4194 if (!j--)
4195 return 0; /* timed out */
4196 goto retry;
4197 }
4198
4199 return 1;
4200 }
4201
4202 static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data)
4203 {
4204 atmel_writeAR(priv->dev, pos);
4205 atmel_write16(priv->dev, DR, data); /* card is little-endian */
4206 atmel_write16(priv->dev, DR, data >> 16);
4207 }
4208
4209 /***************************************************************************/
4210 /* There follows the source form of the MAC address reading firmware */
4211 /***************************************************************************/
4212 #if 0
4213
4214 /* Copyright 2003 Matthew T. Russotto */
4215 /* But derived from the Atmel 76C502 firmware written by Atmel and */
4216 /* included in "atmel wireless lan drivers" package */
4217 /**
4218 This file is part of net.russotto.AtmelMACFW, hereto referred to
4219 as AtmelMACFW
4220
4221 AtmelMACFW is free software; you can redistribute it and/or modify
4222 it under the terms of the GNU General Public License version 2
4223 as published by the Free Software Foundation.
4224
4225 AtmelMACFW is distributed in the hope that it will be useful,
4226 but WITHOUT ANY WARRANTY; without even the implied warranty of
4227 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4228 GNU General Public License for more details.
4229
4230 You should have received a copy of the GNU General Public License
4231 along with AtmelMACFW; if not, write to the Free Software
4232 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
4233
4234 ****************************************************************************/
4235 /* This firmware should work on the 76C502 RFMD, RFMD_D, and RFMD_E */
4236 /* It will probably work on the 76C504 and 76C502 RFMD_3COM */
4237 /* It only works on SPI EEPROM versions of the card. */
4238
4239 /* This firmware initializes the SPI controller and clock, reads the MAC */
4240 /* address from the EEPROM into SRAM, and puts the SRAM offset of the MAC */
4241 /* address in MR2, and sets MR3 to 0x10 to indicate it is done */
4242 /* It also puts a complete copy of the EEPROM in SRAM with the offset in */
4243 /* MR4, for investigational purposes (maybe we can determine chip type */
4244 /* from that?) */
4245
4246 .org 0
4247 .set MRBASE, 0x8000000
4248 .set CPSR_INITIAL, 0xD3 /* IRQ/FIQ disabled, ARM mode, Supervisor state */
4249 .set CPSR_USER, 0xD1 /* IRQ/FIQ disabled, ARM mode, USER state */
4250 .set SRAM_BASE, 0x02000000
4251 .set SP_BASE, 0x0F300000
4252 .set UNK_BASE, 0x0F000000 /* Some internal device, but which one? */
4253 .set SPI_CGEN_BASE, 0x0E000000 /* Some internal device, but which one? */
4254 .set UNK3_BASE, 0x02014000 /* Some internal device, but which one? */
4255 .set STACK_BASE, 0x5600
4256 .set SP_SR, 0x10
4257 .set SP_TDRE, 2 /* status register bit -- TDR empty */
4258 .set SP_RDRF, 1 /* status register bit -- RDR full */
4259 .set SP_SWRST, 0x80
4260 .set SP_SPIEN, 0x1
4261 .set SP_CR, 0 /* control register */
4262 .set SP_MR, 4 /* mode register */
4263 .set SP_RDR, 0x08 /* Read Data Register */
4264 .set SP_TDR, 0x0C /* Transmit Data Register */
4265 .set SP_CSR0, 0x30 /* chip select registers */
4266 .set SP_CSR1, 0x34
4267 .set SP_CSR2, 0x38
4268 .set SP_CSR3, 0x3C
4269 .set NVRAM_CMD_RDSR, 5 /* read status register */
4270 .set NVRAM_CMD_READ, 3 /* read data */
4271 .set NVRAM_SR_RDY, 1 /* RDY bit. This bit is inverted */
4272 .set SPI_8CLOCKS, 0xFF /* Writing this to the TDR doesn't do anything to the
4273 serial output, since SO is normally high. But it
4274 does cause 8 clock cycles and thus 8 bits to be
4275 clocked in to the chip. See Atmel's SPI
4276 controller (e.g. AT91M55800) timing and 4K
4277 SPI EEPROM manuals */
4278
4279 .set NVRAM_SCRATCH, 0x02000100 /* arbitrary area for scratchpad memory */
4280 .set NVRAM_IMAGE, 0x02000200
4281 .set NVRAM_LENGTH, 0x0200
4282 .set MAC_ADDRESS_MIB, SRAM_BASE
4283 .set MAC_ADDRESS_LENGTH, 6
4284 .set MAC_BOOT_FLAG, 0x10
4285 .set MR1, 0
4286 .set MR2, 4
4287 .set MR3, 8
4288 .set MR4, 0xC
4289 RESET_VECTOR:
4290 b RESET_HANDLER
4291 UNDEF_VECTOR:
4292 b HALT1
4293 SWI_VECTOR:
4294 b HALT1
4295 IABORT_VECTOR:
4296 b HALT1
4297 DABORT_VECTOR:
4298 RESERVED_VECTOR:
4299 b HALT1
4300 IRQ_VECTOR:
4301 b HALT1
4302 FIQ_VECTOR:
4303 b HALT1
4304 HALT1: b HALT1
4305 RESET_HANDLER:
4306 mov r0, #CPSR_INITIAL
4307 msr CPSR_c, r0 /* This is probably unnecessary */
4308
4309 /* I'm guessing this is initializing clock generator electronics for SPI */
4310 ldr r0, =SPI_CGEN_BASE
4311 mov r1, #0
4312 mov r1, r1, lsl #3
4313 orr r1,r1, #0
4314 str r1, [r0]
4315 ldr r1, [r0, #28]
4316 bic r1, r1, #16
4317 str r1, [r0, #28]
4318 mov r1, #1
4319 str r1, [r0, #8]
4320
4321 ldr r0, =MRBASE
4322 mov r1, #0
4323 strh r1, [r0, #MR1]
4324 strh r1, [r0, #MR2]
4325 strh r1, [r0, #MR3]
4326 strh r1, [r0, #MR4]
4327
4328 mov sp, #STACK_BASE
4329 bl SP_INIT
4330 mov r0, #10
4331 bl DELAY9
4332 bl GET_MAC_ADDR
4333 bl GET_WHOLE_NVRAM
4334 ldr r0, =MRBASE
4335 ldr r1, =MAC_ADDRESS_MIB
4336 strh r1, [r0, #MR2]
4337 ldr r1, =NVRAM_IMAGE
4338 strh r1, [r0, #MR4]
4339 mov r1, #MAC_BOOT_FLAG
4340 strh r1, [r0, #MR3]
4341 HALT2: b HALT2
4342 .func Get_Whole_NVRAM, GET_WHOLE_NVRAM
4343 GET_WHOLE_NVRAM:
4344 stmdb sp!, {lr}
4345 mov r2, #0 /* 0th bytes of NVRAM */
4346 mov r3, #NVRAM_LENGTH
4347 mov r1, #0 /* not used in routine */
4348 ldr r0, =NVRAM_IMAGE
4349 bl NVRAM_XFER
4350 ldmia sp!, {lr}
4351 bx lr
4352 .endfunc
4353
4354 .func Get_MAC_Addr, GET_MAC_ADDR
4355 GET_MAC_ADDR:
4356 stmdb sp!, {lr}
4357 mov r2, #0x120 /* address of MAC Address within NVRAM */
4358 mov r3, #MAC_ADDRESS_LENGTH
4359 mov r1, #0 /* not used in routine */
4360 ldr r0, =MAC_ADDRESS_MIB
4361 bl NVRAM_XFER
4362 ldmia sp!, {lr}
4363 bx lr
4364 .endfunc
4365 .ltorg
4366 .func Delay9, DELAY9
4367 DELAY9:
4368 adds r0, r0, r0, LSL #3 /* r0 = r0 * 9 */
4369 DELAYLOOP:
4370 beq DELAY9_done
4371 subs r0, r0, #1
4372 b DELAYLOOP
4373 DELAY9_done:
4374 bx lr
4375 .endfunc
4376
4377 .func SP_Init, SP_INIT
4378 SP_INIT:
4379 mov r1, #SP_SWRST
4380 ldr r0, =SP_BASE
4381 str r1, [r0, #SP_CR] /* reset the SPI */
4382 mov r1, #0
4383 str r1, [r0, #SP_CR] /* release SPI from reset state */
4384 mov r1, #SP_SPIEN
4385 str r1, [r0, #SP_MR] /* set the SPI to MASTER mode*/
4386 str r1, [r0, #SP_CR] /* enable the SPI */
4387
4388 /* My guess would be this turns on the SPI clock */
4389 ldr r3, =SPI_CGEN_BASE
4390 ldr r1, [r3, #28]
4391 orr r1, r1, #0x2000
4392 str r1, [r3, #28]
4393
4394 ldr r1, =0x2000c01
4395 str r1, [r0, #SP_CSR0]
4396 ldr r1, =0x2000201
4397 str r1, [r0, #SP_CSR1]
4398 str r1, [r0, #SP_CSR2]
4399 str r1, [r0, #SP_CSR3]
4400 ldr r1, [r0, #SP_SR]
4401 ldr r0, [r0, #SP_RDR]
4402 bx lr
4403 .endfunc
4404 .func NVRAM_Init, NVRAM_INIT
4405 NVRAM_INIT:
4406 ldr r1, =SP_BASE
4407 ldr r0, [r1, #SP_RDR]
4408 mov r0, #NVRAM_CMD_RDSR
4409 str r0, [r1, #SP_TDR]
4410 SP_loop1:
4411 ldr r0, [r1, #SP_SR]
4412 tst r0, #SP_TDRE
4413 beq SP_loop1
4414
4415 mov r0, #SPI_8CLOCKS
4416 str r0, [r1, #SP_TDR]
4417 SP_loop2:
4418 ldr r0, [r1, #SP_SR]
4419 tst r0, #SP_TDRE
4420 beq SP_loop2
4421
4422 ldr r0, [r1, #SP_RDR]
4423 SP_loop3:
4424 ldr r0, [r1, #SP_SR]
4425 tst r0, #SP_RDRF
4426 beq SP_loop3
4427
4428 ldr r0, [r1, #SP_RDR]
4429 and r0, r0, #255
4430 bx lr
4431 .endfunc
4432
4433 .func NVRAM_Xfer, NVRAM_XFER
4434 /* r0 = dest address */
4435 /* r1 = not used */
4436 /* r2 = src address within NVRAM */
4437 /* r3 = length */
4438 NVRAM_XFER:
4439 stmdb sp!, {r4, r5, lr}
4440 mov r5, r0 /* save r0 (dest address) */
4441 mov r4, r3 /* save r3 (length) */
4442 mov r0, r2, LSR #5 /* SPI memories put A8 in the command field */
4443 and r0, r0, #8
4444 add r0, r0, #NVRAM_CMD_READ
4445 ldr r1, =NVRAM_SCRATCH
4446 strb r0, [r1, #0] /* save command in NVRAM_SCRATCH[0] */
4447 strb r2, [r1, #1] /* save low byte of source address in NVRAM_SCRATCH[1] */
4448 _local1:
4449 bl NVRAM_INIT
4450 tst r0, #NVRAM_SR_RDY
4451 bne _local1
4452 mov r0, #20
4453 bl DELAY9
4454 mov r2, r4 /* length */
4455 mov r1, r5 /* dest address */
4456 mov r0, #2 /* bytes to transfer in command */
4457 bl NVRAM_XFER2
4458 ldmia sp!, {r4, r5, lr}
4459 bx lr
4460 .endfunc
4461
4462 .func NVRAM_Xfer2, NVRAM_XFER2
4463 NVRAM_XFER2:
4464 stmdb sp!, {r4, r5, r6, lr}
4465 ldr r4, =SP_BASE
4466 mov r3, #0
4467 cmp r0, #0
4468 bls _local2
4469 ldr r5, =NVRAM_SCRATCH
4470 _local4:
4471 ldrb r6, [r5, r3]
4472 str r6, [r4, #SP_TDR]
4473 _local3:
4474 ldr r6, [r4, #SP_SR]
4475 tst r6, #SP_TDRE
4476 beq _local3
4477 add r3, r3, #1
4478 cmp r3, r0 /* r0 is # of bytes to send out (command+addr) */
4479 blo _local4
4480 _local2:
4481 mov r3, #SPI_8CLOCKS
4482 str r3, [r4, #SP_TDR]
4483 ldr r0, [r4, #SP_RDR]
4484 _local5:
4485 ldr r0, [r4, #SP_SR]
4486 tst r0, #SP_RDRF
4487 beq _local5
4488 ldr r0, [r4, #SP_RDR] /* what's this byte? It's the byte read while writing the TDR -- nonsense, because the NVRAM doesn't read and write at the same time */
4489 mov r0, #0
4490 cmp r2, #0 /* r2 is # of bytes to copy in */
4491 bls _local6
4492 _local7:
4493 ldr r5, [r4, #SP_SR]
4494 tst r5, #SP_TDRE
4495 beq _local7
4496 str r3, [r4, #SP_TDR] /* r3 has SPI_8CLOCKS */
4497 _local8:
4498 ldr r5, [r4, #SP_SR]
4499 tst r5, #SP_RDRF
4500 beq _local8
4501 ldr r5, [r4, #SP_RDR] /* but didn't we read this byte above? */
4502 strb r5, [r1], #1 /* postindexed */
4503 add r0, r0, #1
4504 cmp r0, r2
4505 blo _local7 /* since we don't send another address, the NVRAM must be capable of sequential reads */
4506 _local6:
4507 mov r0, #200
4508 bl DELAY9
4509 ldmia sp!, {r4, r5, r6, lr}
4510 bx lr
4511 #endif
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