arch/mips/mips-boards/malta/malta_smtc.c

   1 /*
   2  * Malta Platform-specific hooks for SMP operation
   3  */
   4 #include <linux/init.h>
   5
   6 #include <asm/mipsregs.h>
   7 #include <asm/mipsmtregs.h>
   8 #include <asm/smtc.h>
   9 #include <asm/smtc_ipi.h>
  10
  11 /* VPE/SMP Prototype implements platform interfaces directly */
  12
  13 /*
  14  * Cause the specified action to be performed on a targeted "CPU"
  15  */
  16
  17 void core_send_ipi(int cpu, unsigned int action)
  18 {
  19         /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
  20         smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
  21 }
  22
  23 /*
  24  * Platform "CPU" startup hook
  25  */
  26
  27 void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle)
  28 {
  29         smtc_boot_secondary(cpu, idle);
  30 }
  31
  32 /*
  33  * Post-config but pre-boot cleanup entry point
  34  */
  35
  36 void __cpuinit prom_init_secondary(void)
  37 {
  38         void smtc_init_secondary(void);
  39         int myvpe;
  40
  41         /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */
  42         myvpe = read_c0_tcbind() & TCBIND_CURVPE;
  43         if (myvpe != 0) {
  44                 /* Ideally, this should be done only once per VPE, but... */
  45                 clear_c0_status(ST0_IM);
  46                 set_c0_status((0x100 << cp0_compare_irq)
  47                                 | (0x100 << MIPS_CPU_IPI_IRQ));
  48                 if (cp0_perfcount_irq >= 0)
  49                         set_c0_status(0x100 << cp0_perfcount_irq);
  50         }
  51
  52         smtc_init_secondary();
  53 }
  54
  55 /*
  56  * Platform SMP pre-initialization
  57  *
  58  * As noted above, we can assume a single CPU for now
  59  * but it may be multithreaded.
  60  */
  61
  62 void __cpuinit plat_smp_setup(void)
  63 {
  64         if (read_c0_config3() & (1<<2))
  65                 mipsmt_build_cpu_map(0);
  66 }
  67
  68 void __init plat_prepare_cpus(unsigned int max_cpus)
  69 {
  70         if (read_c0_config3() & (1<<2))
  71                 mipsmt_prepare_cpus();
  72 }
  73
  74 /*
  75  * SMP initialization finalization entry point
  76  */
  77
  78 void __cpuinit prom_smp_finish(void)
  79 {
  80         smtc_smp_finish();
  81 }
  82
  83 /*
  84  * Hook for after all CPUs are online
  85  */
  86
  87 void prom_cpus_done(void)
  88 {
  89 }