2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
14 * This file is licenced under the GPL.
18 #error "This file is PCI bus glue. CONFIG_PCI must be defined."
21 /*-------------------------------------------------------------------------*/
24 ohci_pci_reset (struct usb_hcd
*hcd
)
26 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
29 return ohci_init (ohci
);
33 ohci_pci_start (struct usb_hcd
*hcd
)
35 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
38 if(hcd
->self
.controller
&& hcd
->self
.controller
->bus
== &pci_bus_type
) {
39 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
41 /* AMD 756, for most chips (early revs), corrupts register
42 * values on read ... so enable the vendor workaround.
44 if (pdev
->vendor
== PCI_VENDOR_ID_AMD
45 && pdev
->device
== 0x740c) {
46 ohci
->flags
= OHCI_QUIRK_AMD756
;
47 ohci_dbg (ohci
, "AMD756 erratum 4 workaround\n");
48 // also somewhat erratum 10 (suspend/resume issues)
51 /* FIXME for some of the early AMD 760 southbridges, OHCI
52 * won't work at all. blacklist them.
55 /* Apple's OHCI driver has a lot of bizarre workarounds
56 * for this chip. Evidently control and bulk lists
57 * can get confused. (B&W G3 models, and ...)
59 else if (pdev
->vendor
== PCI_VENDOR_ID_OPTI
60 && pdev
->device
== 0xc861) {
62 "WARNING: OPTi workarounds unavailable\n");
65 /* Check for NSC87560. We have to look at the bridge (fn1) to
66 * identify the USB (fn2). This quirk might apply to more or
69 else if (pdev
->vendor
== PCI_VENDOR_ID_NS
) {
72 b
= pci_find_slot (pdev
->bus
->number
,
73 PCI_DEVFN (PCI_SLOT (pdev
->devfn
), 1));
74 if (b
&& b
->device
== PCI_DEVICE_ID_NS_87560_LIO
75 && b
->vendor
== PCI_VENDOR_ID_NS
) {
76 ohci
->flags
|= OHCI_QUIRK_SUPERIO
;
77 ohci_dbg (ohci
, "Using NSC SuperIO setup\n");
81 /* Check for Compaq's ZFMicro chipset, which needs short
82 * delays before control or bulk queues get re-activated
85 else if (pdev
->vendor
== PCI_VENDOR_ID_COMPAQ
86 && pdev
->device
== 0xa0f8) {
87 ohci
->flags
|= OHCI_QUIRK_ZFMICRO
;
89 "enabled Compaq ZFMicro chipset quirk\n");
93 /* NOTE: there may have already been a first reset, to
94 * keep bios/smm irqs from making trouble
96 if ((ret
= ohci_run (ohci
)) < 0) {
97 ohci_err (ohci
, "can't start\n");
106 static int ohci_pci_suspend (struct usb_hcd
*hcd
, pm_message_t message
)
108 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
112 /* Root hub was already suspended. Disable irq emission and
113 * mark HW unaccessible, bail out if RH has been resumed. Use
114 * the spinlock to properly synchronize with possible pending
115 * RH suspend or resume activity.
117 * This is still racy as hcd->state is manipulated outside of
118 * any locks =P But that will be a different fix.
120 spin_lock_irqsave (&ohci
->lock
, flags
);
121 if (hcd
->state
!= HC_STATE_SUSPENDED
) {
125 ohci_writel(ohci
, OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
126 (void)ohci_readl(ohci
, &ohci
->regs
->intrdisable
);
127 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
129 spin_unlock_irqrestore (&ohci
->lock
, flags
);
135 static int ohci_pci_resume (struct usb_hcd
*hcd
)
137 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
138 usb_hcd_resume_root_hub(hcd
);
142 #endif /* CONFIG_PM */
145 /*-------------------------------------------------------------------------*/
147 static const struct hc_driver ohci_pci_hc_driver
= {
148 .description
= hcd_name
,
149 .product_desc
= "OHCI Host Controller",
150 .hcd_priv_size
= sizeof(struct ohci_hcd
),
153 * generic hardware linkage
156 .flags
= HCD_MEMORY
| HCD_USB11
,
159 * basic lifecycle operations
161 .reset
= ohci_pci_reset
,
162 .start
= ohci_pci_start
,
164 .suspend
= ohci_pci_suspend
,
165 .resume
= ohci_pci_resume
,
170 * managing i/o requests and associated device resources
172 .urb_enqueue
= ohci_urb_enqueue
,
173 .urb_dequeue
= ohci_urb_dequeue
,
174 .endpoint_disable
= ohci_endpoint_disable
,
179 .get_frame_number
= ohci_get_frame
,
184 .hub_status_data
= ohci_hub_status_data
,
185 .hub_control
= ohci_hub_control
,
187 .bus_suspend
= ohci_bus_suspend
,
188 .bus_resume
= ohci_bus_resume
,
190 .start_port_reset
= ohci_start_port_reset
,
193 /*-------------------------------------------------------------------------*/
196 static const struct pci_device_id pci_ids
[] = { {
197 /* handle any USB OHCI controller */
198 PCI_DEVICE_CLASS((PCI_CLASS_SERIAL_USB
<< 8) | 0x10, ~0),
199 .driver_data
= (unsigned long) &ohci_pci_hc_driver
,
200 }, { /* end: all zeroes */ }
202 MODULE_DEVICE_TABLE (pci
, pci_ids
);
204 /* pci driver glue; this is a "new style" PCI driver module */
205 static struct pci_driver ohci_pci_driver
= {
206 .name
= (char *) hcd_name
,
209 .probe
= usb_hcd_pci_probe
,
210 .remove
= usb_hcd_pci_remove
,
213 .suspend
= usb_hcd_pci_suspend
,
214 .resume
= usb_hcd_pci_resume
,
219 static int __init
ohci_hcd_pci_init (void)
221 printk (KERN_DEBUG
"%s: " DRIVER_INFO
" (PCI)\n", hcd_name
);
225 pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name
,
226 sizeof (struct ed
), sizeof (struct td
));
227 return pci_register_driver (&ohci_pci_driver
);
229 module_init (ohci_hcd_pci_init
);
231 /*-------------------------------------------------------------------------*/
233 static void __exit
ohci_hcd_pci_cleanup (void)
235 pci_unregister_driver (&ohci_pci_driver
);
237 module_exit (ohci_hcd_pci_cleanup
);