1 #include <linux/clocksource.h>
2 #include <linux/clockchips.h>
3 #include <linux/delay.h>
4 #include <linux/errno.h>
5 #include <linux/hpet.h>
6 #include <linux/init.h>
7 #include <linux/sysdev.h>
9 #include <linux/delay.h>
11 #include <asm/fixmap.h>
13 #include <asm/i8253.h>
16 #define HPET_MASK CLOCKSOURCE_MASK(32)
19 /* FSEC = 10^-15 NSEC = 10^-9 */
20 #define FSEC_PER_NSEC 1000000
23 * HPET address is set in acpi/boot.c, when an ACPI entry exists
25 unsigned long hpet_address
;
26 static void __iomem
*hpet_virt_address
;
28 unsigned long hpet_readl(unsigned long a
)
30 return readl(hpet_virt_address
+ a
);
33 static inline void hpet_writel(unsigned long d
, unsigned long a
)
35 writel(d
, hpet_virt_address
+ a
);
40 #include <asm/pgtable.h>
42 static inline void hpet_set_mapping(void)
44 set_fixmap_nocache(FIX_HPET_BASE
, hpet_address
);
45 __set_fixmap(VSYSCALL_HPET
, hpet_address
, PAGE_KERNEL_VSYSCALL_NOCACHE
);
46 hpet_virt_address
= (void __iomem
*)fix_to_virt(FIX_HPET_BASE
);
49 static inline void hpet_clear_mapping(void)
51 hpet_virt_address
= NULL
;
56 static inline void hpet_set_mapping(void)
58 hpet_virt_address
= ioremap_nocache(hpet_address
, HPET_MMAP_SIZE
);
61 static inline void hpet_clear_mapping(void)
63 iounmap(hpet_virt_address
);
64 hpet_virt_address
= NULL
;
69 * HPET command line enable / disable
71 static int boot_hpet_disable
;
73 static int __init
hpet_setup(char* str
)
76 if (!strncmp("disable", str
, 7))
77 boot_hpet_disable
= 1;
81 __setup("hpet=", hpet_setup
);
83 static int __init
disable_hpet(char *str
)
85 boot_hpet_disable
= 1;
88 __setup("nohpet", disable_hpet
);
90 static inline int is_hpet_capable(void)
92 return (!boot_hpet_disable
&& hpet_address
);
96 * HPET timer interrupt enable / disable
98 static int hpet_legacy_int_enabled
;
101 * is_hpet_enabled - check whether the hpet timer interrupt is enabled
103 int is_hpet_enabled(void)
105 return is_hpet_capable() && hpet_legacy_int_enabled
;
109 * When the hpet driver (/dev/hpet) is enabled, we need to reserve
110 * timer 0 and timer 1 in case of RTC emulation.
113 static void hpet_reserve_platform_timers(unsigned long id
)
115 struct hpet __iomem
*hpet
= hpet_virt_address
;
116 struct hpet_timer __iomem
*timer
= &hpet
->hpet_timers
[2];
117 unsigned int nrtimers
, i
;
120 nrtimers
= ((id
& HPET_ID_NUMBER
) >> HPET_ID_NUMBER_SHIFT
) + 1;
122 memset(&hd
, 0, sizeof (hd
));
123 hd
.hd_phys_address
= hpet_address
;
124 hd
.hd_address
= hpet
;
125 hd
.hd_nirqs
= nrtimers
;
126 hd
.hd_flags
= HPET_DATA_PLATFORM
;
127 hpet_reserve_timer(&hd
, 0);
129 #ifdef CONFIG_HPET_EMULATE_RTC
130 hpet_reserve_timer(&hd
, 1);
133 hd
.hd_irq
[0] = HPET_LEGACY_8254
;
134 hd
.hd_irq
[1] = HPET_LEGACY_RTC
;
136 for (i
= 2; i
< nrtimers
; timer
++, i
++)
137 hd
.hd_irq
[i
] = (timer
->hpet_config
& Tn_INT_ROUTE_CNF_MASK
) >>
138 Tn_INT_ROUTE_CNF_SHIFT
;
144 static void hpet_reserve_platform_timers(unsigned long id
) { }
150 static unsigned long hpet_period
;
152 static void hpet_set_mode(enum clock_event_mode mode
,
153 struct clock_event_device
*evt
);
154 static int hpet_next_event(unsigned long delta
,
155 struct clock_event_device
*evt
);
158 * The hpet clock event device
160 static struct clock_event_device hpet_clockevent
= {
162 .features
= CLOCK_EVT_FEAT_PERIODIC
| CLOCK_EVT_FEAT_ONESHOT
,
163 .set_mode
= hpet_set_mode
,
164 .set_next_event
= hpet_next_event
,
169 static void hpet_start_counter(void)
171 unsigned long cfg
= hpet_readl(HPET_CFG
);
173 cfg
&= ~HPET_CFG_ENABLE
;
174 hpet_writel(cfg
, HPET_CFG
);
175 hpet_writel(0, HPET_COUNTER
);
176 hpet_writel(0, HPET_COUNTER
+ 4);
177 cfg
|= HPET_CFG_ENABLE
;
178 hpet_writel(cfg
, HPET_CFG
);
181 static void hpet_enable_int(void)
183 unsigned long cfg
= hpet_readl(HPET_CFG
);
185 cfg
|= HPET_CFG_LEGACY
;
186 hpet_writel(cfg
, HPET_CFG
);
187 hpet_legacy_int_enabled
= 1;
190 static void hpet_set_mode(enum clock_event_mode mode
,
191 struct clock_event_device
*evt
)
193 unsigned long cfg
, cmp
, now
;
197 case CLOCK_EVT_MODE_PERIODIC
:
198 delta
= ((uint64_t)(NSEC_PER_SEC
/HZ
)) * hpet_clockevent
.mult
;
199 delta
>>= hpet_clockevent
.shift
;
200 now
= hpet_readl(HPET_COUNTER
);
201 cmp
= now
+ (unsigned long) delta
;
202 cfg
= hpet_readl(HPET_T0_CFG
);
203 cfg
|= HPET_TN_ENABLE
| HPET_TN_PERIODIC
|
204 HPET_TN_SETVAL
| HPET_TN_32BIT
;
205 hpet_writel(cfg
, HPET_T0_CFG
);
207 * The first write after writing TN_SETVAL to the
208 * config register sets the counter value, the second
209 * write sets the period.
211 hpet_writel(cmp
, HPET_T0_CMP
);
213 hpet_writel((unsigned long) delta
, HPET_T0_CMP
);
216 case CLOCK_EVT_MODE_ONESHOT
:
217 cfg
= hpet_readl(HPET_T0_CFG
);
218 cfg
&= ~HPET_TN_PERIODIC
;
219 cfg
|= HPET_TN_ENABLE
| HPET_TN_32BIT
;
220 hpet_writel(cfg
, HPET_T0_CFG
);
223 case CLOCK_EVT_MODE_UNUSED
:
224 case CLOCK_EVT_MODE_SHUTDOWN
:
225 cfg
= hpet_readl(HPET_T0_CFG
);
226 cfg
&= ~HPET_TN_ENABLE
;
227 hpet_writel(cfg
, HPET_T0_CFG
);
230 case CLOCK_EVT_MODE_RESUME
:
236 static int hpet_next_event(unsigned long delta
,
237 struct clock_event_device
*evt
)
241 cnt
= hpet_readl(HPET_COUNTER
);
243 hpet_writel(cnt
, HPET_T0_CMP
);
245 return ((long)(hpet_readl(HPET_COUNTER
) - cnt
) > 0) ? -ETIME
: 0;
249 * Clock source related code
251 static cycle_t
read_hpet(void)
253 return (cycle_t
)hpet_readl(HPET_COUNTER
);
257 static cycle_t __vsyscall_fn
vread_hpet(void)
259 return readl((const void __iomem
*)fix_to_virt(VSYSCALL_HPET
) + 0xf0);
263 static struct clocksource clocksource_hpet
= {
269 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
270 .resume
= hpet_start_counter
,
277 * Try to setup the HPET timer
279 int __init
hpet_enable(void)
286 if (!is_hpet_capable())
292 * Read the period and check for a sane value:
294 hpet_period
= hpet_readl(HPET_PERIOD
);
295 if (hpet_period
< HPET_MIN_PERIOD
|| hpet_period
> HPET_MAX_PERIOD
)
299 * The period is a femto seconds value. We need to calculate the
300 * scaled math multiplication factor for nanosecond to hpet tick
303 hpet_freq
= 1000000000000000ULL;
304 do_div(hpet_freq
, hpet_period
);
305 hpet_clockevent
.mult
= div_sc((unsigned long) hpet_freq
,
307 /* Calculate the min / max delta */
308 hpet_clockevent
.max_delta_ns
= clockevent_delta2ns(0x7FFFFFFF,
310 hpet_clockevent
.min_delta_ns
= clockevent_delta2ns(0x30,
314 * Read the HPET ID register to retrieve the IRQ routing
315 * information and the number of channels
317 id
= hpet_readl(HPET_ID
);
319 #ifdef CONFIG_HPET_EMULATE_RTC
321 * The legacy routing mode needs at least two channels, tick timer
322 * and the rtc emulation channel.
324 if (!(id
& HPET_ID_NUMBER
))
328 /* Start the counter */
329 hpet_start_counter();
331 /* Verify whether hpet counter works */
336 * We don't know the TSC frequency yet, but waiting for
337 * 200000 TSC cycles is safe:
344 } while ((now
- start
) < 200000UL);
346 if (t1
== read_hpet()) {
348 "HPET counter not counting. HPET disabled\n");
352 /* Initialize and register HPET clocksource
354 * hpet period is in femto seconds per cycle
355 * so we need to convert this to ns/cyc units
356 * aproximated by mult/2^shift
358 * fsec/cyc * 1nsec/1000000fsec = nsec/cyc = mult/2^shift
359 * fsec/cyc * 1ns/1000000fsec * 2^shift = mult
360 * fsec/cyc * 2^shift * 1nsec/1000000fsec = mult
361 * (fsec/cyc << shift)/1000000 = mult
362 * (hpet_period << shift)/FSEC_PER_NSEC = mult
364 tmp
= (u64
)hpet_period
<< HPET_SHIFT
;
365 do_div(tmp
, FSEC_PER_NSEC
);
366 clocksource_hpet
.mult
= (u32
)tmp
;
368 clocksource_register(&clocksource_hpet
);
370 if (id
& HPET_ID_LEGSUP
) {
373 * Start hpet with the boot cpu mask and make it
374 * global after the IO_APIC has been initialized.
376 hpet_clockevent
.cpumask
= cpumask_of_cpu(smp_processor_id());
377 clockevents_register_device(&hpet_clockevent
);
378 global_clock_event
= &hpet_clockevent
;
384 hpet_clear_mapping();
385 boot_hpet_disable
= 1;
390 * Needs to be late, as the reserve_timer code calls kalloc !
392 * Not a problem on i386 as hpet_enable is called from late_time_init,
393 * but on x86_64 it is necessary !
395 static __init
int hpet_late_init(void)
397 if (!is_hpet_capable())
400 hpet_reserve_platform_timers(hpet_readl(HPET_ID
));
403 fs_initcall(hpet_late_init
);
405 #ifdef CONFIG_HPET_EMULATE_RTC
407 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
408 * is enabled, we support RTC interrupt functionality in software.
409 * RTC has 3 kinds of interrupts:
410 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
412 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
413 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
414 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
415 * (1) and (2) above are implemented using polling at a frequency of
416 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
417 * overhead. (DEFAULT_RTC_INT_FREQ)
418 * For (3), we use interrupts at 64Hz or user specified periodic
419 * frequency, whichever is higher.
421 #include <linux/mc146818rtc.h>
422 #include <linux/rtc.h>
424 #define DEFAULT_RTC_INT_FREQ 64
425 #define DEFAULT_RTC_SHIFT 6
426 #define RTC_NUM_INTS 1
428 static unsigned long hpet_rtc_flags
;
429 static unsigned long hpet_prev_update_sec
;
430 static struct rtc_time hpet_alarm_time
;
431 static unsigned long hpet_pie_count
;
432 static unsigned long hpet_t1_cmp
;
433 static unsigned long hpet_default_delta
;
434 static unsigned long hpet_pie_delta
;
435 static unsigned long hpet_pie_limit
;
438 * Timer 1 for RTC emulation. We use one shot mode, as periodic mode
439 * is not supported by all HPET implementations for timer 1.
441 * hpet_rtc_timer_init() is called when the rtc is initialized.
443 int hpet_rtc_timer_init(void)
445 unsigned long cfg
, cnt
, delta
, flags
;
447 if (!is_hpet_enabled())
450 if (!hpet_default_delta
) {
453 clc
= (uint64_t) hpet_clockevent
.mult
* NSEC_PER_SEC
;
454 clc
>>= hpet_clockevent
.shift
+ DEFAULT_RTC_SHIFT
;
455 hpet_default_delta
= (unsigned long) clc
;
458 if (!(hpet_rtc_flags
& RTC_PIE
) || hpet_pie_limit
)
459 delta
= hpet_default_delta
;
461 delta
= hpet_pie_delta
;
463 local_irq_save(flags
);
465 cnt
= delta
+ hpet_readl(HPET_COUNTER
);
466 hpet_writel(cnt
, HPET_T1_CMP
);
469 cfg
= hpet_readl(HPET_T1_CFG
);
470 cfg
&= ~HPET_TN_PERIODIC
;
471 cfg
|= HPET_TN_ENABLE
| HPET_TN_32BIT
;
472 hpet_writel(cfg
, HPET_T1_CFG
);
474 local_irq_restore(flags
);
480 * The functions below are called from rtc driver.
481 * Return 0 if HPET is not being used.
482 * Otherwise do the necessary changes and return 1.
484 int hpet_mask_rtc_irq_bit(unsigned long bit_mask
)
486 if (!is_hpet_enabled())
489 hpet_rtc_flags
&= ~bit_mask
;
493 int hpet_set_rtc_irq_bit(unsigned long bit_mask
)
495 unsigned long oldbits
= hpet_rtc_flags
;
497 if (!is_hpet_enabled())
500 hpet_rtc_flags
|= bit_mask
;
503 hpet_rtc_timer_init();
508 int hpet_set_alarm_time(unsigned char hrs
, unsigned char min
,
511 if (!is_hpet_enabled())
514 hpet_alarm_time
.tm_hour
= hrs
;
515 hpet_alarm_time
.tm_min
= min
;
516 hpet_alarm_time
.tm_sec
= sec
;
521 int hpet_set_periodic_freq(unsigned long freq
)
525 if (!is_hpet_enabled())
528 if (freq
<= DEFAULT_RTC_INT_FREQ
)
529 hpet_pie_limit
= DEFAULT_RTC_INT_FREQ
/ freq
;
531 clc
= (uint64_t) hpet_clockevent
.mult
* NSEC_PER_SEC
;
533 clc
>>= hpet_clockevent
.shift
;
534 hpet_pie_delta
= (unsigned long) clc
;
539 int hpet_rtc_dropped_irq(void)
541 return is_hpet_enabled();
544 static void hpet_rtc_timer_reinit(void)
546 unsigned long cfg
, delta
;
549 if (unlikely(!hpet_rtc_flags
)) {
550 cfg
= hpet_readl(HPET_T1_CFG
);
551 cfg
&= ~HPET_TN_ENABLE
;
552 hpet_writel(cfg
, HPET_T1_CFG
);
556 if (!(hpet_rtc_flags
& RTC_PIE
) || hpet_pie_limit
)
557 delta
= hpet_default_delta
;
559 delta
= hpet_pie_delta
;
562 * Increment the comparator value until we are ahead of the
566 hpet_t1_cmp
+= delta
;
567 hpet_writel(hpet_t1_cmp
, HPET_T1_CMP
);
569 } while ((long)(hpet_readl(HPET_COUNTER
) - hpet_t1_cmp
) > 0);
572 if (hpet_rtc_flags
& RTC_PIE
)
573 hpet_pie_count
+= lost_ints
;
574 if (printk_ratelimit())
575 printk(KERN_WARNING
"rtc: lost %d interrupts\n",
580 irqreturn_t
hpet_rtc_interrupt(int irq
, void *dev_id
)
582 struct rtc_time curr_time
;
583 unsigned long rtc_int_flag
= 0;
585 hpet_rtc_timer_reinit();
587 if (hpet_rtc_flags
& (RTC_UIE
| RTC_AIE
))
588 rtc_get_rtc_time(&curr_time
);
590 if (hpet_rtc_flags
& RTC_UIE
&&
591 curr_time
.tm_sec
!= hpet_prev_update_sec
) {
592 rtc_int_flag
= RTC_UF
;
593 hpet_prev_update_sec
= curr_time
.tm_sec
;
596 if (hpet_rtc_flags
& RTC_PIE
&&
597 ++hpet_pie_count
>= hpet_pie_limit
) {
598 rtc_int_flag
|= RTC_PF
;
602 if (hpet_rtc_flags
& RTC_PIE
&&
603 (curr_time
.tm_sec
== hpet_alarm_time
.tm_sec
) &&
604 (curr_time
.tm_min
== hpet_alarm_time
.tm_min
) &&
605 (curr_time
.tm_hour
== hpet_alarm_time
.tm_hour
))
606 rtc_int_flag
|= RTC_AF
;
609 rtc_int_flag
|= (RTC_IRQF
| (RTC_NUM_INTS
<< 8));
610 rtc_interrupt(rtc_int_flag
, dev_id
);