2 Common Flash Interface probe code.
3 (C) 2000 Red Hat. GPL'd.
4 $Id: jedec_probe.c,v 1.66 2005/11/07 11:14:23 gleixner Exp $
5 See JEDEC (http://www.jedec.org/) standard JESD21C (section 3.5)
6 for the standard this probe goes back to.
8 Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/types.h>
14 #include <linux/kernel.h>
16 #include <asm/byteorder.h>
17 #include <linux/errno.h>
18 #include <linux/slab.h>
19 #include <linux/interrupt.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/map.h>
23 #include <linux/mtd/cfi.h>
24 #include <linux/mtd/gen_probe.h>
27 #define MANUFACTURER_AMD 0x0001
28 #define MANUFACTURER_ATMEL 0x001f
29 #define MANUFACTURER_FUJITSU 0x0004
30 #define MANUFACTURER_HYUNDAI 0x00AD
31 #define MANUFACTURER_INTEL 0x0089
32 #define MANUFACTURER_MACRONIX 0x00C2
33 #define MANUFACTURER_NEC 0x0010
34 #define MANUFACTURER_PMC 0x009D
35 #define MANUFACTURER_SHARP 0x00b0
36 #define MANUFACTURER_SST 0x00BF
37 #define MANUFACTURER_ST 0x0020
38 #define MANUFACTURER_TOSHIBA 0x0098
39 #define MANUFACTURER_WINBOND 0x00da
43 #define AM29DL800BB 0x22C8
44 #define AM29DL800BT 0x224A
46 #define AM29F800BB 0x2258
47 #define AM29F800BT 0x22D6
48 #define AM29LV400BB 0x22BA
49 #define AM29LV400BT 0x22B9
50 #define AM29LV800BB 0x225B
51 #define AM29LV800BT 0x22DA
52 #define AM29LV160DT 0x22C4
53 #define AM29LV160DB 0x2249
54 #define AM29F017D 0x003D
55 #define AM29F016D 0x00AD
56 #define AM29F080 0x00D5
57 #define AM29F040 0x00A4
58 #define AM29LV040B 0x004F
59 #define AM29F032B 0x0041
60 #define AM29F002T 0x00B0
63 #define AT49BV512 0x0003
64 #define AT29LV512 0x003d
65 #define AT49BV16X 0x00C0
66 #define AT49BV16XT 0x00C2
67 #define AT49BV32X 0x00C8
68 #define AT49BV32XT 0x00C9
71 #define MBM29F040C 0x00A4
72 #define MBM29F800BA 0x2258
73 #define MBM29LV650UE 0x22D7
74 #define MBM29LV320TE 0x22F6
75 #define MBM29LV320BE 0x22F9
76 #define MBM29LV160TE 0x22C4
77 #define MBM29LV160BE 0x2249
78 #define MBM29LV800BA 0x225B
79 #define MBM29LV800TA 0x22DA
80 #define MBM29LV400TC 0x22B9
81 #define MBM29LV400BC 0x22BA
84 #define HY29F002T 0x00B0
87 #define I28F004B3T 0x00d4
88 #define I28F004B3B 0x00d5
89 #define I28F400B3T 0x8894
90 #define I28F400B3B 0x8895
91 #define I28F008S5 0x00a6
92 #define I28F016S5 0x00a0
93 #define I28F008SA 0x00a2
94 #define I28F008B3T 0x00d2
95 #define I28F008B3B 0x00d3
96 #define I28F800B3T 0x8892
97 #define I28F800B3B 0x8893
98 #define I28F016S3 0x00aa
99 #define I28F016B3T 0x00d0
100 #define I28F016B3B 0x00d1
101 #define I28F160B3T 0x8890
102 #define I28F160B3B 0x8891
103 #define I28F320B3T 0x8896
104 #define I28F320B3B 0x8897
105 #define I28F640B3T 0x8898
106 #define I28F640B3B 0x8899
107 #define I82802AB 0x00ad
108 #define I82802AC 0x00ac
111 #define MX29LV040C 0x004F
112 #define MX29LV160T 0x22C4
113 #define MX29LV160B 0x2249
114 #define MX29F040 0x00A4
115 #define MX29F016 0x00AD
116 #define MX29F002T 0x00B0
117 #define MX29F004T 0x0045
118 #define MX29F004B 0x0046
121 #define UPD29F064115 0x221C
124 #define PM49FL002 0x006D
125 #define PM49FL004 0x006E
126 #define PM49FL008 0x006A
129 #define LH28F640BF 0x00b0
131 /* ST - www.st.com */
132 #define M29F800AB 0x0058
133 #define M29W800DT 0x00D7
134 #define M29W800DB 0x005B
135 #define M29W400DT 0x00EE
136 #define M29W400DB 0x00EF
137 #define M29W160DT 0x22C4
138 #define M29W160DB 0x2249
139 #define M29W040B 0x00E3
140 #define M50FW040 0x002C
141 #define M50FW080 0x002D
142 #define M50FW016 0x002E
143 #define M50LPW080 0x002F
146 #define SST29EE020 0x0010
147 #define SST29LE020 0x0012
148 #define SST29EE512 0x005d
149 #define SST29LE512 0x003d
150 #define SST39LF800 0x2781
151 #define SST39LF160 0x2782
152 #define SST39VF1601 0x234b
153 #define SST39LF512 0x00D4
154 #define SST39LF010 0x00D5
155 #define SST39LF020 0x00D6
156 #define SST39LF040 0x00D7
157 #define SST39SF010A 0x00B5
158 #define SST39SF020A 0x00B6
159 #define SST49LF004B 0x0060
160 #define SST49LF040B 0x0050
161 #define SST49LF008A 0x005a
162 #define SST49LF030A 0x001C
163 #define SST49LF040A 0x0051
164 #define SST49LF080A 0x005B
167 #define TC58FVT160 0x00C2
168 #define TC58FVB160 0x0043
169 #define TC58FVT321 0x009A
170 #define TC58FVB321 0x009C
171 #define TC58FVT641 0x0093
172 #define TC58FVB641 0x0095
175 #define W49V002A 0x00b0
179 * Unlock address sets for AMD command sets.
180 * Intel command sets use the MTD_UADDR_UNNECESSARY.
181 * Each identifier, except MTD_UADDR_UNNECESSARY, and
182 * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[].
183 * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure
184 * initialization need not require initializing all of the
185 * unlock addresses for all bit widths.
188 MTD_UADDR_NOT_SUPPORTED
= 0, /* data width not supported */
189 MTD_UADDR_0x0555_0x02AA
,
190 MTD_UADDR_0x0555_0x0AAA
,
191 MTD_UADDR_0x5555_0x2AAA
,
192 MTD_UADDR_0x0AAA_0x0555
,
193 MTD_UADDR_DONT_CARE
, /* Requires an arbitrary address */
194 MTD_UADDR_UNNECESSARY
, /* Does not require any address */
205 * I don't like the fact that the first entry in unlock_addrs[]
206 * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
207 * should not be used. The problem is that structures with
208 * initializers have extra fields initialized to 0. It is _very_
209 * desireable to have the unlock address entries for unsupported
210 * data widths automatically initialized - that means that
211 * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
214 static const struct unlock_addr unlock_addrs
[] = {
215 [MTD_UADDR_NOT_SUPPORTED
] = {
220 [MTD_UADDR_0x0555_0x02AA
] = {
225 [MTD_UADDR_0x0555_0x0AAA
] = {
230 [MTD_UADDR_0x5555_0x2AAA
] = {
235 [MTD_UADDR_0x0AAA_0x0555
] = {
240 [MTD_UADDR_DONT_CARE
] = {
241 .addr1
= 0x0000, /* Doesn't matter which address */
242 .addr2
= 0x0000 /* is used - must be last entry */
245 [MTD_UADDR_UNNECESSARY
] = {
251 struct amd_flash_info
{
253 const uint16_t mfr_id
;
254 const uint16_t dev_id
;
255 const uint8_t dev_size
;
256 const uint8_t nr_regions
;
257 const uint16_t cmd_set
;
258 const uint32_t regions
[6];
259 const uint8_t devtypes
; /* Bitmask for x8, x16 etc. */
260 const uint8_t uaddr
; /* unlock addrs for 8, 16, 32, 64 */
263 #define ERASEINFO(size,blocks) (size<<8)|(blocks-1)
265 #define SIZE_64KiB 16
266 #define SIZE_128KiB 17
267 #define SIZE_256KiB 18
268 #define SIZE_512KiB 19
276 * Please keep this list ordered by manufacturer!
277 * Fortunately, the list isn't searched often and so a
278 * slow, linear search isn't so bad.
280 static const struct amd_flash_info jedec_table
[] = {
282 .mfr_id
= MANUFACTURER_AMD
,
284 .name
= "AMD AM29F032B",
285 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
286 .devtypes
= CFI_DEVICETYPE_X8
,
287 .dev_size
= SIZE_4MiB
,
288 .cmd_set
= P_ID_AMD_STD
,
291 ERASEINFO(0x10000,64)
294 .mfr_id
= MANUFACTURER_AMD
,
295 .dev_id
= AM29LV160DT
,
296 .name
= "AMD AM29LV160DT",
297 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
298 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
299 .dev_size
= SIZE_2MiB
,
300 .cmd_set
= P_ID_AMD_STD
,
303 ERASEINFO(0x10000,31),
304 ERASEINFO(0x08000,1),
305 ERASEINFO(0x02000,2),
309 .mfr_id
= MANUFACTURER_AMD
,
310 .dev_id
= AM29LV160DB
,
311 .name
= "AMD AM29LV160DB",
312 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
313 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
314 .dev_size
= SIZE_2MiB
,
315 .cmd_set
= P_ID_AMD_STD
,
318 ERASEINFO(0x04000,1),
319 ERASEINFO(0x02000,2),
320 ERASEINFO(0x08000,1),
321 ERASEINFO(0x10000,31)
324 .mfr_id
= MANUFACTURER_AMD
,
325 .dev_id
= AM29LV400BB
,
326 .name
= "AMD AM29LV400BB",
327 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
328 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
329 .dev_size
= SIZE_512KiB
,
330 .cmd_set
= P_ID_AMD_STD
,
333 ERASEINFO(0x04000,1),
334 ERASEINFO(0x02000,2),
335 ERASEINFO(0x08000,1),
339 .mfr_id
= MANUFACTURER_AMD
,
340 .dev_id
= AM29LV400BT
,
341 .name
= "AMD AM29LV400BT",
342 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
343 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
344 .dev_size
= SIZE_512KiB
,
345 .cmd_set
= P_ID_AMD_STD
,
348 ERASEINFO(0x10000,7),
349 ERASEINFO(0x08000,1),
350 ERASEINFO(0x02000,2),
354 .mfr_id
= MANUFACTURER_AMD
,
355 .dev_id
= AM29LV800BB
,
356 .name
= "AMD AM29LV800BB",
357 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
358 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
359 .dev_size
= SIZE_1MiB
,
360 .cmd_set
= P_ID_AMD_STD
,
363 ERASEINFO(0x04000,1),
364 ERASEINFO(0x02000,2),
365 ERASEINFO(0x08000,1),
366 ERASEINFO(0x10000,15),
370 .mfr_id
= MANUFACTURER_AMD
,
371 .dev_id
= AM29DL800BB
,
372 .name
= "AMD AM29DL800BB",
373 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
374 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
375 .dev_size
= SIZE_1MiB
,
376 .cmd_set
= P_ID_AMD_STD
,
379 ERASEINFO(0x04000,1),
380 ERASEINFO(0x08000,1),
381 ERASEINFO(0x02000,4),
382 ERASEINFO(0x08000,1),
383 ERASEINFO(0x04000,1),
384 ERASEINFO(0x10000,14)
387 .mfr_id
= MANUFACTURER_AMD
,
388 .dev_id
= AM29DL800BT
,
389 .name
= "AMD AM29DL800BT",
390 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
391 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
392 .dev_size
= SIZE_1MiB
,
393 .cmd_set
= P_ID_AMD_STD
,
396 ERASEINFO(0x10000,14),
397 ERASEINFO(0x04000,1),
398 ERASEINFO(0x08000,1),
399 ERASEINFO(0x02000,4),
400 ERASEINFO(0x08000,1),
404 .mfr_id
= MANUFACTURER_AMD
,
405 .dev_id
= AM29F800BB
,
406 .name
= "AMD AM29F800BB",
407 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
408 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
409 .dev_size
= SIZE_1MiB
,
410 .cmd_set
= P_ID_AMD_STD
,
413 ERASEINFO(0x04000,1),
414 ERASEINFO(0x02000,2),
415 ERASEINFO(0x08000,1),
416 ERASEINFO(0x10000,15),
419 .mfr_id
= MANUFACTURER_AMD
,
420 .dev_id
= AM29LV800BT
,
421 .name
= "AMD AM29LV800BT",
422 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
423 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
424 .dev_size
= SIZE_1MiB
,
425 .cmd_set
= P_ID_AMD_STD
,
428 ERASEINFO(0x10000,15),
429 ERASEINFO(0x08000,1),
430 ERASEINFO(0x02000,2),
434 .mfr_id
= MANUFACTURER_AMD
,
435 .dev_id
= AM29F800BT
,
436 .name
= "AMD AM29F800BT",
437 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
438 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
439 .dev_size
= SIZE_1MiB
,
440 .cmd_set
= P_ID_AMD_STD
,
443 ERASEINFO(0x10000,15),
444 ERASEINFO(0x08000,1),
445 ERASEINFO(0x02000,2),
449 .mfr_id
= MANUFACTURER_AMD
,
451 .name
= "AMD AM29F017D",
452 .devtypes
= CFI_DEVICETYPE_X8
,
453 .uaddr
= MTD_UADDR_DONT_CARE
,
454 .dev_size
= SIZE_2MiB
,
455 .cmd_set
= P_ID_AMD_STD
,
458 ERASEINFO(0x10000,32),
461 .mfr_id
= MANUFACTURER_AMD
,
463 .name
= "AMD AM29F016D",
464 .devtypes
= CFI_DEVICETYPE_X8
,
465 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
466 .dev_size
= SIZE_2MiB
,
467 .cmd_set
= P_ID_AMD_STD
,
470 ERASEINFO(0x10000,32),
473 .mfr_id
= MANUFACTURER_AMD
,
475 .name
= "AMD AM29F080",
476 .devtypes
= CFI_DEVICETYPE_X8
,
477 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
478 .dev_size
= SIZE_1MiB
,
479 .cmd_set
= P_ID_AMD_STD
,
482 ERASEINFO(0x10000,16),
485 .mfr_id
= MANUFACTURER_AMD
,
487 .name
= "AMD AM29F040",
488 .devtypes
= CFI_DEVICETYPE_X8
,
489 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
490 .dev_size
= SIZE_512KiB
,
491 .cmd_set
= P_ID_AMD_STD
,
494 ERASEINFO(0x10000,8),
497 .mfr_id
= MANUFACTURER_AMD
,
498 .dev_id
= AM29LV040B
,
499 .name
= "AMD AM29LV040B",
500 .devtypes
= CFI_DEVICETYPE_X8
,
501 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
502 .dev_size
= SIZE_512KiB
,
503 .cmd_set
= P_ID_AMD_STD
,
506 ERASEINFO(0x10000,8),
509 .mfr_id
= MANUFACTURER_AMD
,
511 .name
= "AMD AM29F002T",
512 .devtypes
= CFI_DEVICETYPE_X8
,
513 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
514 .dev_size
= SIZE_256KiB
,
515 .cmd_set
= P_ID_AMD_STD
,
518 ERASEINFO(0x10000,3),
519 ERASEINFO(0x08000,1),
520 ERASEINFO(0x02000,2),
521 ERASEINFO(0x04000,1),
524 .mfr_id
= MANUFACTURER_ATMEL
,
526 .name
= "Atmel AT49BV512",
527 .devtypes
= CFI_DEVICETYPE_X8
,
528 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
529 .dev_size
= SIZE_64KiB
,
530 .cmd_set
= P_ID_AMD_STD
,
536 .mfr_id
= MANUFACTURER_ATMEL
,
538 .name
= "Atmel AT29LV512",
539 .devtypes
= CFI_DEVICETYPE_X8
,
540 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
541 .dev_size
= SIZE_64KiB
,
542 .cmd_set
= P_ID_AMD_STD
,
549 .mfr_id
= MANUFACTURER_ATMEL
,
551 .name
= "Atmel AT49BV16X",
552 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
553 .uaddr
= MTD_UADDR_0x0555_0x0AAA
, /* ???? */
554 .dev_size
= SIZE_2MiB
,
555 .cmd_set
= P_ID_AMD_STD
,
558 ERASEINFO(0x02000,8),
559 ERASEINFO(0x10000,31)
562 .mfr_id
= MANUFACTURER_ATMEL
,
563 .dev_id
= AT49BV16XT
,
564 .name
= "Atmel AT49BV16XT",
565 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
566 .uaddr
= MTD_UADDR_0x0555_0x0AAA
, /* ???? */
567 .dev_size
= SIZE_2MiB
,
568 .cmd_set
= P_ID_AMD_STD
,
571 ERASEINFO(0x10000,31),
575 .mfr_id
= MANUFACTURER_ATMEL
,
577 .name
= "Atmel AT49BV32X",
578 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
579 .uaddr
= MTD_UADDR_0x0555_0x0AAA
, /* ???? */
580 .dev_size
= SIZE_4MiB
,
581 .cmd_set
= P_ID_AMD_STD
,
584 ERASEINFO(0x02000,8),
585 ERASEINFO(0x10000,63)
588 .mfr_id
= MANUFACTURER_ATMEL
,
589 .dev_id
= AT49BV32XT
,
590 .name
= "Atmel AT49BV32XT",
591 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
592 .uaddr
= MTD_UADDR_0x0555_0x0AAA
, /* ???? */
593 .dev_size
= SIZE_4MiB
,
594 .cmd_set
= P_ID_AMD_STD
,
597 ERASEINFO(0x10000,63),
601 .mfr_id
= MANUFACTURER_FUJITSU
,
602 .dev_id
= MBM29F040C
,
603 .name
= "Fujitsu MBM29F040C",
604 .devtypes
= CFI_DEVICETYPE_X8
,
605 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
606 .dev_size
= SIZE_512KiB
,
607 .cmd_set
= P_ID_AMD_STD
,
613 .mfr_id
= MANUFACTURER_FUJITSU
,
614 .dev_id
= MBM29F800BA
,
615 .name
= "Fujitsu MBM29F800BA",
616 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
617 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
618 .dev_size
= SIZE_1MiB
,
619 .cmd_set
= P_ID_AMD_STD
,
622 ERASEINFO(0x04000,1),
623 ERASEINFO(0x02000,2),
624 ERASEINFO(0x08000,1),
625 ERASEINFO(0x10000,15),
628 .mfr_id
= MANUFACTURER_FUJITSU
,
629 .dev_id
= MBM29LV650UE
,
630 .name
= "Fujitsu MBM29LV650UE",
631 .devtypes
= CFI_DEVICETYPE_X8
,
632 .uaddr
= MTD_UADDR_DONT_CARE
,
633 .dev_size
= SIZE_8MiB
,
634 .cmd_set
= P_ID_AMD_STD
,
637 ERASEINFO(0x10000,128)
640 .mfr_id
= MANUFACTURER_FUJITSU
,
641 .dev_id
= MBM29LV320TE
,
642 .name
= "Fujitsu MBM29LV320TE",
643 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
644 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
645 .dev_size
= SIZE_4MiB
,
646 .cmd_set
= P_ID_AMD_STD
,
649 ERASEINFO(0x10000,63),
653 .mfr_id
= MANUFACTURER_FUJITSU
,
654 .dev_id
= MBM29LV320BE
,
655 .name
= "Fujitsu MBM29LV320BE",
656 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
657 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
658 .dev_size
= SIZE_4MiB
,
659 .cmd_set
= P_ID_AMD_STD
,
662 ERASEINFO(0x02000,8),
663 ERASEINFO(0x10000,63)
666 .mfr_id
= MANUFACTURER_FUJITSU
,
667 .dev_id
= MBM29LV160TE
,
668 .name
= "Fujitsu MBM29LV160TE",
669 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
670 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
671 .dev_size
= SIZE_2MiB
,
672 .cmd_set
= P_ID_AMD_STD
,
675 ERASEINFO(0x10000,31),
676 ERASEINFO(0x08000,1),
677 ERASEINFO(0x02000,2),
681 .mfr_id
= MANUFACTURER_FUJITSU
,
682 .dev_id
= MBM29LV160BE
,
683 .name
= "Fujitsu MBM29LV160BE",
684 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
685 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
686 .dev_size
= SIZE_2MiB
,
687 .cmd_set
= P_ID_AMD_STD
,
690 ERASEINFO(0x04000,1),
691 ERASEINFO(0x02000,2),
692 ERASEINFO(0x08000,1),
693 ERASEINFO(0x10000,31)
696 .mfr_id
= MANUFACTURER_FUJITSU
,
697 .dev_id
= MBM29LV800BA
,
698 .name
= "Fujitsu MBM29LV800BA",
699 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
700 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
701 .dev_size
= SIZE_1MiB
,
702 .cmd_set
= P_ID_AMD_STD
,
705 ERASEINFO(0x04000,1),
706 ERASEINFO(0x02000,2),
707 ERASEINFO(0x08000,1),
708 ERASEINFO(0x10000,15)
711 .mfr_id
= MANUFACTURER_FUJITSU
,
712 .dev_id
= MBM29LV800TA
,
713 .name
= "Fujitsu MBM29LV800TA",
714 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
715 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
716 .dev_size
= SIZE_1MiB
,
717 .cmd_set
= P_ID_AMD_STD
,
720 ERASEINFO(0x10000,15),
721 ERASEINFO(0x08000,1),
722 ERASEINFO(0x02000,2),
726 .mfr_id
= MANUFACTURER_FUJITSU
,
727 .dev_id
= MBM29LV400BC
,
728 .name
= "Fujitsu MBM29LV400BC",
729 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
730 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
731 .dev_size
= SIZE_512KiB
,
732 .cmd_set
= P_ID_AMD_STD
,
735 ERASEINFO(0x04000,1),
736 ERASEINFO(0x02000,2),
737 ERASEINFO(0x08000,1),
741 .mfr_id
= MANUFACTURER_FUJITSU
,
742 .dev_id
= MBM29LV400TC
,
743 .name
= "Fujitsu MBM29LV400TC",
744 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
745 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
746 .dev_size
= SIZE_512KiB
,
747 .cmd_set
= P_ID_AMD_STD
,
750 ERASEINFO(0x10000,7),
751 ERASEINFO(0x08000,1),
752 ERASEINFO(0x02000,2),
756 .mfr_id
= MANUFACTURER_HYUNDAI
,
758 .name
= "Hyundai HY29F002T",
759 .devtypes
= CFI_DEVICETYPE_X8
,
760 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
761 .dev_size
= SIZE_256KiB
,
762 .cmd_set
= P_ID_AMD_STD
,
765 ERASEINFO(0x10000,3),
766 ERASEINFO(0x08000,1),
767 ERASEINFO(0x02000,2),
768 ERASEINFO(0x04000,1),
771 .mfr_id
= MANUFACTURER_INTEL
,
772 .dev_id
= I28F004B3B
,
773 .name
= "Intel 28F004B3B",
774 .devtypes
= CFI_DEVICETYPE_X8
,
775 .uaddr
= MTD_UADDR_UNNECESSARY
,
776 .dev_size
= SIZE_512KiB
,
777 .cmd_set
= P_ID_INTEL_STD
,
780 ERASEINFO(0x02000, 8),
781 ERASEINFO(0x10000, 7),
784 .mfr_id
= MANUFACTURER_INTEL
,
785 .dev_id
= I28F004B3T
,
786 .name
= "Intel 28F004B3T",
787 .devtypes
= CFI_DEVICETYPE_X8
,
788 .uaddr
= MTD_UADDR_UNNECESSARY
,
789 .dev_size
= SIZE_512KiB
,
790 .cmd_set
= P_ID_INTEL_STD
,
793 ERASEINFO(0x10000, 7),
794 ERASEINFO(0x02000, 8),
797 .mfr_id
= MANUFACTURER_INTEL
,
798 .dev_id
= I28F400B3B
,
799 .name
= "Intel 28F400B3B",
800 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
801 .uaddr
= MTD_UADDR_UNNECESSARY
,
802 .dev_size
= SIZE_512KiB
,
803 .cmd_set
= P_ID_INTEL_STD
,
806 ERASEINFO(0x02000, 8),
807 ERASEINFO(0x10000, 7),
810 .mfr_id
= MANUFACTURER_INTEL
,
811 .dev_id
= I28F400B3T
,
812 .name
= "Intel 28F400B3T",
813 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
814 .uaddr
= MTD_UADDR_UNNECESSARY
,
815 .dev_size
= SIZE_512KiB
,
816 .cmd_set
= P_ID_INTEL_STD
,
819 ERASEINFO(0x10000, 7),
820 ERASEINFO(0x02000, 8),
823 .mfr_id
= MANUFACTURER_INTEL
,
824 .dev_id
= I28F008B3B
,
825 .name
= "Intel 28F008B3B",
826 .devtypes
= CFI_DEVICETYPE_X8
,
827 .uaddr
= MTD_UADDR_UNNECESSARY
,
828 .dev_size
= SIZE_1MiB
,
829 .cmd_set
= P_ID_INTEL_STD
,
832 ERASEINFO(0x02000, 8),
833 ERASEINFO(0x10000, 15),
836 .mfr_id
= MANUFACTURER_INTEL
,
837 .dev_id
= I28F008B3T
,
838 .name
= "Intel 28F008B3T",
839 .devtypes
= CFI_DEVICETYPE_X8
,
840 .uaddr
= MTD_UADDR_UNNECESSARY
,
841 .dev_size
= SIZE_1MiB
,
842 .cmd_set
= P_ID_INTEL_STD
,
845 ERASEINFO(0x10000, 15),
846 ERASEINFO(0x02000, 8),
849 .mfr_id
= MANUFACTURER_INTEL
,
851 .name
= "Intel 28F008S5",
852 .devtypes
= CFI_DEVICETYPE_X8
,
853 .uaddr
= MTD_UADDR_UNNECESSARY
,
854 .dev_size
= SIZE_1MiB
,
855 .cmd_set
= P_ID_INTEL_EXT
,
858 ERASEINFO(0x10000,16),
861 .mfr_id
= MANUFACTURER_INTEL
,
863 .name
= "Intel 28F016S5",
864 .devtypes
= CFI_DEVICETYPE_X8
,
865 .uaddr
= MTD_UADDR_UNNECESSARY
,
866 .dev_size
= SIZE_2MiB
,
867 .cmd_set
= P_ID_INTEL_EXT
,
870 ERASEINFO(0x10000,32),
873 .mfr_id
= MANUFACTURER_INTEL
,
875 .name
= "Intel 28F008SA",
876 .devtypes
= CFI_DEVICETYPE_X8
,
877 .uaddr
= MTD_UADDR_UNNECESSARY
,
878 .dev_size
= SIZE_1MiB
,
879 .cmd_set
= P_ID_INTEL_STD
,
882 ERASEINFO(0x10000, 16),
885 .mfr_id
= MANUFACTURER_INTEL
,
886 .dev_id
= I28F800B3B
,
887 .name
= "Intel 28F800B3B",
888 .devtypes
= CFI_DEVICETYPE_X16
,
889 .uaddr
= MTD_UADDR_UNNECESSARY
,
890 .dev_size
= SIZE_1MiB
,
891 .cmd_set
= P_ID_INTEL_STD
,
894 ERASEINFO(0x02000, 8),
895 ERASEINFO(0x10000, 15),
898 .mfr_id
= MANUFACTURER_INTEL
,
899 .dev_id
= I28F800B3T
,
900 .name
= "Intel 28F800B3T",
901 .devtypes
= CFI_DEVICETYPE_X16
,
902 .uaddr
= MTD_UADDR_UNNECESSARY
,
903 .dev_size
= SIZE_1MiB
,
904 .cmd_set
= P_ID_INTEL_STD
,
907 ERASEINFO(0x10000, 15),
908 ERASEINFO(0x02000, 8),
911 .mfr_id
= MANUFACTURER_INTEL
,
912 .dev_id
= I28F016B3B
,
913 .name
= "Intel 28F016B3B",
914 .devtypes
= CFI_DEVICETYPE_X8
,
915 .uaddr
= MTD_UADDR_UNNECESSARY
,
916 .dev_size
= SIZE_2MiB
,
917 .cmd_set
= P_ID_INTEL_STD
,
920 ERASEINFO(0x02000, 8),
921 ERASEINFO(0x10000, 31),
924 .mfr_id
= MANUFACTURER_INTEL
,
926 .name
= "Intel I28F016S3",
927 .devtypes
= CFI_DEVICETYPE_X8
,
928 .uaddr
= MTD_UADDR_UNNECESSARY
,
929 .dev_size
= SIZE_2MiB
,
930 .cmd_set
= P_ID_INTEL_STD
,
933 ERASEINFO(0x10000, 32),
936 .mfr_id
= MANUFACTURER_INTEL
,
937 .dev_id
= I28F016B3T
,
938 .name
= "Intel 28F016B3T",
939 .devtypes
= CFI_DEVICETYPE_X8
,
940 .uaddr
= MTD_UADDR_UNNECESSARY
,
941 .dev_size
= SIZE_2MiB
,
942 .cmd_set
= P_ID_INTEL_STD
,
945 ERASEINFO(0x10000, 31),
946 ERASEINFO(0x02000, 8),
949 .mfr_id
= MANUFACTURER_INTEL
,
950 .dev_id
= I28F160B3B
,
951 .name
= "Intel 28F160B3B",
952 .devtypes
= CFI_DEVICETYPE_X16
,
953 .uaddr
= MTD_UADDR_UNNECESSARY
,
954 .dev_size
= SIZE_2MiB
,
955 .cmd_set
= P_ID_INTEL_STD
,
958 ERASEINFO(0x02000, 8),
959 ERASEINFO(0x10000, 31),
962 .mfr_id
= MANUFACTURER_INTEL
,
963 .dev_id
= I28F160B3T
,
964 .name
= "Intel 28F160B3T",
965 .devtypes
= CFI_DEVICETYPE_X16
,
966 .uaddr
= MTD_UADDR_UNNECESSARY
,
967 .dev_size
= SIZE_2MiB
,
968 .cmd_set
= P_ID_INTEL_STD
,
971 ERASEINFO(0x10000, 31),
972 ERASEINFO(0x02000, 8),
975 .mfr_id
= MANUFACTURER_INTEL
,
976 .dev_id
= I28F320B3B
,
977 .name
= "Intel 28F320B3B",
978 .devtypes
= CFI_DEVICETYPE_X16
,
979 .uaddr
= MTD_UADDR_UNNECESSARY
,
980 .dev_size
= SIZE_4MiB
,
981 .cmd_set
= P_ID_INTEL_STD
,
984 ERASEINFO(0x02000, 8),
985 ERASEINFO(0x10000, 63),
988 .mfr_id
= MANUFACTURER_INTEL
,
989 .dev_id
= I28F320B3T
,
990 .name
= "Intel 28F320B3T",
991 .devtypes
= CFI_DEVICETYPE_X16
,
992 .uaddr
= MTD_UADDR_UNNECESSARY
,
993 .dev_size
= SIZE_4MiB
,
994 .cmd_set
= P_ID_INTEL_STD
,
997 ERASEINFO(0x10000, 63),
998 ERASEINFO(0x02000, 8),
1001 .mfr_id
= MANUFACTURER_INTEL
,
1002 .dev_id
= I28F640B3B
,
1003 .name
= "Intel 28F640B3B",
1004 .devtypes
= CFI_DEVICETYPE_X16
,
1005 .uaddr
= MTD_UADDR_UNNECESSARY
,
1006 .dev_size
= SIZE_8MiB
,
1007 .cmd_set
= P_ID_INTEL_STD
,
1010 ERASEINFO(0x02000, 8),
1011 ERASEINFO(0x10000, 127),
1014 .mfr_id
= MANUFACTURER_INTEL
,
1015 .dev_id
= I28F640B3T
,
1016 .name
= "Intel 28F640B3T",
1017 .devtypes
= CFI_DEVICETYPE_X16
,
1018 .uaddr
= MTD_UADDR_UNNECESSARY
,
1019 .dev_size
= SIZE_8MiB
,
1020 .cmd_set
= P_ID_INTEL_STD
,
1023 ERASEINFO(0x10000, 127),
1024 ERASEINFO(0x02000, 8),
1027 .mfr_id
= MANUFACTURER_INTEL
,
1029 .name
= "Intel 82802AB",
1030 .devtypes
= CFI_DEVICETYPE_X8
,
1031 .uaddr
= MTD_UADDR_UNNECESSARY
,
1032 .dev_size
= SIZE_512KiB
,
1033 .cmd_set
= P_ID_INTEL_EXT
,
1036 ERASEINFO(0x10000,8),
1039 .mfr_id
= MANUFACTURER_INTEL
,
1041 .name
= "Intel 82802AC",
1042 .devtypes
= CFI_DEVICETYPE_X8
,
1043 .uaddr
= MTD_UADDR_UNNECESSARY
,
1044 .dev_size
= SIZE_1MiB
,
1045 .cmd_set
= P_ID_INTEL_EXT
,
1048 ERASEINFO(0x10000,16),
1051 .mfr_id
= MANUFACTURER_MACRONIX
,
1052 .dev_id
= MX29LV040C
,
1053 .name
= "Macronix MX29LV040C",
1054 .devtypes
= CFI_DEVICETYPE_X8
,
1055 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
1056 .dev_size
= SIZE_512KiB
,
1057 .cmd_set
= P_ID_AMD_STD
,
1060 ERASEINFO(0x10000,8),
1063 .mfr_id
= MANUFACTURER_MACRONIX
,
1064 .dev_id
= MX29LV160T
,
1065 .name
= "MXIC MX29LV160T",
1066 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1067 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
1068 .dev_size
= SIZE_2MiB
,
1069 .cmd_set
= P_ID_AMD_STD
,
1072 ERASEINFO(0x10000,31),
1073 ERASEINFO(0x08000,1),
1074 ERASEINFO(0x02000,2),
1075 ERASEINFO(0x04000,1)
1078 .mfr_id
= MANUFACTURER_NEC
,
1079 .dev_id
= UPD29F064115
,
1080 .name
= "NEC uPD29F064115",
1081 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1082 .uaddr
= MTD_UADDR_0x0555_0x02AA
, /* ???? */
1083 .dev_size
= SIZE_8MiB
,
1084 .cmd_set
= P_ID_AMD_STD
,
1087 ERASEINFO(0x2000,8),
1088 ERASEINFO(0x10000,126),
1089 ERASEINFO(0x2000,8),
1092 .mfr_id
= MANUFACTURER_MACRONIX
,
1093 .dev_id
= MX29LV160B
,
1094 .name
= "MXIC MX29LV160B",
1095 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1096 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
1097 .dev_size
= SIZE_2MiB
,
1098 .cmd_set
= P_ID_AMD_STD
,
1101 ERASEINFO(0x04000,1),
1102 ERASEINFO(0x02000,2),
1103 ERASEINFO(0x08000,1),
1104 ERASEINFO(0x10000,31)
1107 .mfr_id
= MANUFACTURER_MACRONIX
,
1109 .name
= "Macronix MX29F040",
1110 .devtypes
= CFI_DEVICETYPE_X8
,
1111 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
1112 .dev_size
= SIZE_512KiB
,
1113 .cmd_set
= P_ID_AMD_STD
,
1116 ERASEINFO(0x10000,8),
1119 .mfr_id
= MANUFACTURER_MACRONIX
,
1121 .name
= "Macronix MX29F016",
1122 .devtypes
= CFI_DEVICETYPE_X8
,
1123 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
1124 .dev_size
= SIZE_2MiB
,
1125 .cmd_set
= P_ID_AMD_STD
,
1128 ERASEINFO(0x10000,32),
1131 .mfr_id
= MANUFACTURER_MACRONIX
,
1132 .dev_id
= MX29F004T
,
1133 .name
= "Macronix MX29F004T",
1134 .devtypes
= CFI_DEVICETYPE_X8
,
1135 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
1136 .dev_size
= SIZE_512KiB
,
1137 .cmd_set
= P_ID_AMD_STD
,
1140 ERASEINFO(0x10000,7),
1141 ERASEINFO(0x08000,1),
1142 ERASEINFO(0x02000,2),
1143 ERASEINFO(0x04000,1),
1146 .mfr_id
= MANUFACTURER_MACRONIX
,
1147 .dev_id
= MX29F004B
,
1148 .name
= "Macronix MX29F004B",
1149 .devtypes
= CFI_DEVICETYPE_X8
,
1150 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
1151 .dev_size
= SIZE_512KiB
,
1152 .cmd_set
= P_ID_AMD_STD
,
1155 ERASEINFO(0x04000,1),
1156 ERASEINFO(0x02000,2),
1157 ERASEINFO(0x08000,1),
1158 ERASEINFO(0x10000,7),
1161 .mfr_id
= MANUFACTURER_MACRONIX
,
1162 .dev_id
= MX29F002T
,
1163 .name
= "Macronix MX29F002T",
1164 .devtypes
= CFI_DEVICETYPE_X8
,
1165 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
1166 .dev_size
= SIZE_256KiB
,
1167 .cmd_set
= P_ID_AMD_STD
,
1170 ERASEINFO(0x10000,3),
1171 ERASEINFO(0x08000,1),
1172 ERASEINFO(0x02000,2),
1173 ERASEINFO(0x04000,1),
1176 .mfr_id
= MANUFACTURER_PMC
,
1177 .dev_id
= PM49FL002
,
1178 .name
= "PMC Pm49FL002",
1179 .devtypes
= CFI_DEVICETYPE_X8
,
1180 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1181 .dev_size
= SIZE_256KiB
,
1182 .cmd_set
= P_ID_AMD_STD
,
1185 ERASEINFO( 0x01000, 64 )
1188 .mfr_id
= MANUFACTURER_PMC
,
1189 .dev_id
= PM49FL004
,
1190 .name
= "PMC Pm49FL004",
1191 .devtypes
= CFI_DEVICETYPE_X8
,
1192 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1193 .dev_size
= SIZE_512KiB
,
1194 .cmd_set
= P_ID_AMD_STD
,
1197 ERASEINFO( 0x01000, 128 )
1200 .mfr_id
= MANUFACTURER_PMC
,
1201 .dev_id
= PM49FL008
,
1202 .name
= "PMC Pm49FL008",
1203 .devtypes
= CFI_DEVICETYPE_X8
,
1204 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1205 .dev_size
= SIZE_1MiB
,
1206 .cmd_set
= P_ID_AMD_STD
,
1209 ERASEINFO( 0x01000, 256 )
1212 .mfr_id
= MANUFACTURER_SHARP
,
1213 .dev_id
= LH28F640BF
,
1214 .name
= "LH28F640BF",
1215 .devtypes
= CFI_DEVICETYPE_X8
,
1216 .uaddr
= MTD_UADDR_UNNECESSARY
,
1217 .dev_size
= SIZE_4MiB
,
1218 .cmd_set
= P_ID_INTEL_STD
,
1221 ERASEINFO(0x40000,16),
1224 .mfr_id
= MANUFACTURER_SST
,
1225 .dev_id
= SST39LF512
,
1226 .name
= "SST 39LF512",
1227 .devtypes
= CFI_DEVICETYPE_X8
,
1228 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1229 .dev_size
= SIZE_64KiB
,
1230 .cmd_set
= P_ID_AMD_STD
,
1233 ERASEINFO(0x01000,16),
1236 .mfr_id
= MANUFACTURER_SST
,
1237 .dev_id
= SST39LF010
,
1238 .name
= "SST 39LF010",
1239 .devtypes
= CFI_DEVICETYPE_X8
,
1240 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1241 .dev_size
= SIZE_128KiB
,
1242 .cmd_set
= P_ID_AMD_STD
,
1245 ERASEINFO(0x01000,32),
1248 .mfr_id
= MANUFACTURER_SST
,
1249 .dev_id
= SST29EE020
,
1250 .name
= "SST 29EE020",
1251 .devtypes
= CFI_DEVICETYPE_X8
,
1252 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1253 .dev_size
= SIZE_256KiB
,
1254 .cmd_set
= P_ID_SST_PAGE
,
1256 .regions
= {ERASEINFO(0x01000,64),
1259 .mfr_id
= MANUFACTURER_SST
,
1260 .dev_id
= SST29LE020
,
1261 .name
= "SST 29LE020",
1262 .devtypes
= CFI_DEVICETYPE_X8
,
1263 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1264 .dev_size
= SIZE_256KiB
,
1265 .cmd_set
= P_ID_SST_PAGE
,
1267 .regions
= {ERASEINFO(0x01000,64),
1270 .mfr_id
= MANUFACTURER_SST
,
1271 .dev_id
= SST39LF020
,
1272 .name
= "SST 39LF020",
1273 .devtypes
= CFI_DEVICETYPE_X8
,
1274 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1275 .dev_size
= SIZE_256KiB
,
1276 .cmd_set
= P_ID_AMD_STD
,
1279 ERASEINFO(0x01000,64),
1282 .mfr_id
= MANUFACTURER_SST
,
1283 .dev_id
= SST39LF040
,
1284 .name
= "SST 39LF040",
1285 .devtypes
= CFI_DEVICETYPE_X8
,
1286 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1287 .dev_size
= SIZE_512KiB
,
1288 .cmd_set
= P_ID_AMD_STD
,
1291 ERASEINFO(0x01000,128),
1294 .mfr_id
= MANUFACTURER_SST
,
1295 .dev_id
= SST39SF010A
,
1296 .name
= "SST 39SF010A",
1297 .devtypes
= CFI_DEVICETYPE_X8
,
1298 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1299 .dev_size
= SIZE_128KiB
,
1300 .cmd_set
= P_ID_AMD_STD
,
1303 ERASEINFO(0x01000,32),
1306 .mfr_id
= MANUFACTURER_SST
,
1307 .dev_id
= SST39SF020A
,
1308 .name
= "SST 39SF020A",
1309 .devtypes
= CFI_DEVICETYPE_X8
,
1310 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1311 .dev_size
= SIZE_256KiB
,
1312 .cmd_set
= P_ID_AMD_STD
,
1315 ERASEINFO(0x01000,64),
1318 .mfr_id
= MANUFACTURER_SST
,
1319 .dev_id
= SST49LF040B
,
1320 .name
= "SST 49LF040B",
1321 .devtypes
= CFI_DEVICETYPE_X8
,
1322 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1323 .dev_size
= SIZE_512KiB
,
1324 .cmd_set
= P_ID_AMD_STD
,
1327 ERASEINFO(0x01000,128),
1331 .mfr_id
= MANUFACTURER_SST
,
1332 .dev_id
= SST49LF004B
,
1333 .name
= "SST 49LF004B",
1334 .devtypes
= CFI_DEVICETYPE_X8
,
1335 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1336 .dev_size
= SIZE_512KiB
,
1337 .cmd_set
= P_ID_AMD_STD
,
1340 ERASEINFO(0x01000,128),
1343 .mfr_id
= MANUFACTURER_SST
,
1344 .dev_id
= SST49LF008A
,
1345 .name
= "SST 49LF008A",
1346 .devtypes
= CFI_DEVICETYPE_X8
,
1347 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1348 .dev_size
= SIZE_1MiB
,
1349 .cmd_set
= P_ID_AMD_STD
,
1352 ERASEINFO(0x01000,256),
1355 .mfr_id
= MANUFACTURER_SST
,
1356 .dev_id
= SST49LF030A
,
1357 .name
= "SST 49LF030A",
1358 .devtypes
= CFI_DEVICETYPE_X8
,
1359 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1360 .dev_size
= SIZE_512KiB
,
1361 .cmd_set
= P_ID_AMD_STD
,
1364 ERASEINFO(0x01000,96),
1367 .mfr_id
= MANUFACTURER_SST
,
1368 .dev_id
= SST49LF040A
,
1369 .name
= "SST 49LF040A",
1370 .devtypes
= CFI_DEVICETYPE_X8
,
1371 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1372 .dev_size
= SIZE_512KiB
,
1373 .cmd_set
= P_ID_AMD_STD
,
1376 ERASEINFO(0x01000,128),
1379 .mfr_id
= MANUFACTURER_SST
,
1380 .dev_id
= SST49LF080A
,
1381 .name
= "SST 49LF080A",
1382 .devtypes
= CFI_DEVICETYPE_X8
,
1383 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1384 .dev_size
= SIZE_1MiB
,
1385 .cmd_set
= P_ID_AMD_STD
,
1388 ERASEINFO(0x01000,256),
1391 .mfr_id
= MANUFACTURER_SST
, /* should be CFI */
1392 .dev_id
= SST39LF160
,
1393 .name
= "SST 39LF160",
1394 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1395 .uaddr
= MTD_UADDR_0x5555_0x2AAA
, /* ???? */
1396 .dev_size
= SIZE_2MiB
,
1397 .cmd_set
= P_ID_AMD_STD
,
1400 ERASEINFO(0x1000,256),
1401 ERASEINFO(0x1000,256)
1404 .mfr_id
= MANUFACTURER_SST
, /* should be CFI */
1405 .dev_id
= SST39VF1601
,
1406 .name
= "SST 39VF1601",
1407 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1408 .uaddr
= MTD_UADDR_0x5555_0x2AAA
, /* ???? */
1409 .dev_size
= SIZE_2MiB
,
1410 .cmd_set
= P_ID_AMD_STD
,
1413 ERASEINFO(0x1000,256),
1414 ERASEINFO(0x1000,256)
1417 .mfr_id
= MANUFACTURER_ST
,
1418 .dev_id
= M29F800AB
,
1419 .name
= "ST M29F800AB",
1420 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1421 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
1422 .dev_size
= SIZE_1MiB
,
1423 .cmd_set
= P_ID_AMD_STD
,
1426 ERASEINFO(0x04000,1),
1427 ERASEINFO(0x02000,2),
1428 ERASEINFO(0x08000,1),
1429 ERASEINFO(0x10000,15),
1432 .mfr_id
= MANUFACTURER_ST
, /* FIXME - CFI device? */
1433 .dev_id
= M29W800DT
,
1434 .name
= "ST M29W800DT",
1435 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1436 .uaddr
= MTD_UADDR_0x5555_0x2AAA
, /* ???? */
1437 .dev_size
= SIZE_1MiB
,
1438 .cmd_set
= P_ID_AMD_STD
,
1441 ERASEINFO(0x10000,15),
1442 ERASEINFO(0x08000,1),
1443 ERASEINFO(0x02000,2),
1444 ERASEINFO(0x04000,1)
1447 .mfr_id
= MANUFACTURER_ST
, /* FIXME - CFI device? */
1448 .dev_id
= M29W800DB
,
1449 .name
= "ST M29W800DB",
1450 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1451 .uaddr
= MTD_UADDR_0x5555_0x2AAA
, /* ???? */
1452 .dev_size
= SIZE_1MiB
,
1453 .cmd_set
= P_ID_AMD_STD
,
1456 ERASEINFO(0x04000,1),
1457 ERASEINFO(0x02000,2),
1458 ERASEINFO(0x08000,1),
1459 ERASEINFO(0x10000,15)
1462 .mfr_id
= MANUFACTURER_ST
,
1463 .dev_id
= M29W400DT
,
1464 .name
= "ST M29W400DT",
1465 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1466 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
1467 .dev_size
= SIZE_512KiB
,
1468 .cmd_set
= P_ID_AMD_STD
,
1471 ERASEINFO(0x04000,7),
1472 ERASEINFO(0x02000,1),
1473 ERASEINFO(0x08000,2),
1474 ERASEINFO(0x10000,1)
1477 .mfr_id
= MANUFACTURER_ST
,
1478 .dev_id
= M29W400DB
,
1479 .name
= "ST M29W400DB",
1480 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1481 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
1482 .dev_size
= SIZE_512KiB
,
1483 .cmd_set
= P_ID_AMD_STD
,
1486 ERASEINFO(0x04000,1),
1487 ERASEINFO(0x02000,2),
1488 ERASEINFO(0x08000,1),
1489 ERASEINFO(0x10000,7)
1492 .mfr_id
= MANUFACTURER_ST
, /* FIXME - CFI device? */
1493 .dev_id
= M29W160DT
,
1494 .name
= "ST M29W160DT",
1495 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1496 .uaddr
= MTD_UADDR_0x0555_0x02AA
, /* ???? */
1497 .dev_size
= SIZE_2MiB
,
1498 .cmd_set
= P_ID_AMD_STD
,
1501 ERASEINFO(0x10000,31),
1502 ERASEINFO(0x08000,1),
1503 ERASEINFO(0x02000,2),
1504 ERASEINFO(0x04000,1)
1507 .mfr_id
= MANUFACTURER_ST
, /* FIXME - CFI device? */
1508 .dev_id
= M29W160DB
,
1509 .name
= "ST M29W160DB",
1510 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1511 .uaddr
= MTD_UADDR_0x0555_0x02AA
, /* ???? */
1512 .dev_size
= SIZE_2MiB
,
1513 .cmd_set
= P_ID_AMD_STD
,
1516 ERASEINFO(0x04000,1),
1517 ERASEINFO(0x02000,2),
1518 ERASEINFO(0x08000,1),
1519 ERASEINFO(0x10000,31)
1522 .mfr_id
= MANUFACTURER_ST
,
1524 .name
= "ST M29W040B",
1525 .devtypes
= CFI_DEVICETYPE_X8
,
1526 .uaddr
= MTD_UADDR_0x0555_0x02AA
,
1527 .dev_size
= SIZE_512KiB
,
1528 .cmd_set
= P_ID_AMD_STD
,
1531 ERASEINFO(0x10000,8),
1534 .mfr_id
= MANUFACTURER_ST
,
1536 .name
= "ST M50FW040",
1537 .devtypes
= CFI_DEVICETYPE_X8
,
1538 .uaddr
= MTD_UADDR_UNNECESSARY
,
1539 .dev_size
= SIZE_512KiB
,
1540 .cmd_set
= P_ID_INTEL_EXT
,
1543 ERASEINFO(0x10000,8),
1546 .mfr_id
= MANUFACTURER_ST
,
1548 .name
= "ST M50FW080",
1549 .devtypes
= CFI_DEVICETYPE_X8
,
1550 .uaddr
= MTD_UADDR_UNNECESSARY
,
1551 .dev_size
= SIZE_1MiB
,
1552 .cmd_set
= P_ID_INTEL_EXT
,
1555 ERASEINFO(0x10000,16),
1558 .mfr_id
= MANUFACTURER_ST
,
1560 .name
= "ST M50FW016",
1561 .devtypes
= CFI_DEVICETYPE_X8
,
1562 .uaddr
= MTD_UADDR_UNNECESSARY
,
1563 .dev_size
= SIZE_2MiB
,
1564 .cmd_set
= P_ID_INTEL_EXT
,
1567 ERASEINFO(0x10000,32),
1570 .mfr_id
= MANUFACTURER_ST
,
1571 .dev_id
= M50LPW080
,
1572 .name
= "ST M50LPW080",
1573 .devtypes
= CFI_DEVICETYPE_X8
,
1574 .uaddr
= MTD_UADDR_UNNECESSARY
,
1575 .dev_size
= SIZE_1MiB
,
1576 .cmd_set
= P_ID_INTEL_EXT
,
1579 ERASEINFO(0x10000,16),
1582 .mfr_id
= MANUFACTURER_TOSHIBA
,
1583 .dev_id
= TC58FVT160
,
1584 .name
= "Toshiba TC58FVT160",
1585 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1586 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
1587 .dev_size
= SIZE_2MiB
,
1588 .cmd_set
= P_ID_AMD_STD
,
1591 ERASEINFO(0x10000,31),
1592 ERASEINFO(0x08000,1),
1593 ERASEINFO(0x02000,2),
1594 ERASEINFO(0x04000,1)
1597 .mfr_id
= MANUFACTURER_TOSHIBA
,
1598 .dev_id
= TC58FVB160
,
1599 .name
= "Toshiba TC58FVB160",
1600 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1601 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
1602 .dev_size
= SIZE_2MiB
,
1603 .cmd_set
= P_ID_AMD_STD
,
1606 ERASEINFO(0x04000,1),
1607 ERASEINFO(0x02000,2),
1608 ERASEINFO(0x08000,1),
1609 ERASEINFO(0x10000,31)
1612 .mfr_id
= MANUFACTURER_TOSHIBA
,
1613 .dev_id
= TC58FVB321
,
1614 .name
= "Toshiba TC58FVB321",
1615 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1616 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
1617 .dev_size
= SIZE_4MiB
,
1618 .cmd_set
= P_ID_AMD_STD
,
1621 ERASEINFO(0x02000,8),
1622 ERASEINFO(0x10000,63)
1625 .mfr_id
= MANUFACTURER_TOSHIBA
,
1626 .dev_id
= TC58FVT321
,
1627 .name
= "Toshiba TC58FVT321",
1628 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1629 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
1630 .dev_size
= SIZE_4MiB
,
1631 .cmd_set
= P_ID_AMD_STD
,
1634 ERASEINFO(0x10000,63),
1635 ERASEINFO(0x02000,8)
1638 .mfr_id
= MANUFACTURER_TOSHIBA
,
1639 .dev_id
= TC58FVB641
,
1640 .name
= "Toshiba TC58FVB641",
1641 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1642 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
1643 .dev_size
= SIZE_8MiB
,
1644 .cmd_set
= P_ID_AMD_STD
,
1647 ERASEINFO(0x02000,8),
1648 ERASEINFO(0x10000,127)
1651 .mfr_id
= MANUFACTURER_TOSHIBA
,
1652 .dev_id
= TC58FVT641
,
1653 .name
= "Toshiba TC58FVT641",
1654 .devtypes
= CFI_DEVICETYPE_X16
|CFI_DEVICETYPE_X8
,
1655 .uaddr
= MTD_UADDR_0x0AAA_0x0555
,
1656 .dev_size
= SIZE_8MiB
,
1657 .cmd_set
= P_ID_AMD_STD
,
1660 ERASEINFO(0x10000,127),
1661 ERASEINFO(0x02000,8)
1664 .mfr_id
= MANUFACTURER_WINBOND
,
1666 .name
= "Winbond W49V002A",
1667 .devtypes
= CFI_DEVICETYPE_X8
,
1668 .uaddr
= MTD_UADDR_0x5555_0x2AAA
,
1669 .dev_size
= SIZE_256KiB
,
1670 .cmd_set
= P_ID_AMD_STD
,
1673 ERASEINFO(0x10000, 3),
1674 ERASEINFO(0x08000, 1),
1675 ERASEINFO(0x02000, 2),
1676 ERASEINFO(0x04000, 1),
1681 static inline u32
jedec_read_mfr(struct map_info
*map
, uint32_t base
,
1682 struct cfi_private
*cfi
)
1686 u32 ofs
= cfi_build_cmd_addr(0, cfi_interleave(cfi
), cfi
->device_type
);
1687 mask
= (1 << (cfi
->device_type
* 8)) -1;
1688 result
= map_read(map
, base
+ ofs
);
1689 return result
.x
[0] & mask
;
1692 static inline u32
jedec_read_id(struct map_info
*map
, uint32_t base
,
1693 struct cfi_private
*cfi
)
1697 u32 ofs
= cfi_build_cmd_addr(1, cfi_interleave(cfi
), cfi
->device_type
);
1698 mask
= (1 << (cfi
->device_type
* 8)) -1;
1699 result
= map_read(map
, base
+ ofs
);
1700 return result
.x
[0] & mask
;
1703 static void jedec_reset(u32 base
, struct map_info
*map
, struct cfi_private
*cfi
)
1707 /* after checking the datasheets for SST, MACRONIX and ATMEL
1708 * (oh and incidentaly the jedec spec - 3.5.3.3) the reset
1709 * sequence is *supposed* to be 0xaa at 0x5555, 0x55 at
1710 * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips
1711 * as they will ignore the writes and dont care what address
1712 * the F0 is written to */
1713 if (cfi
->addr_unlock1
) {
1714 DEBUG( MTD_DEBUG_LEVEL3
,
1715 "reset unlock called %x %x \n",
1716 cfi
->addr_unlock1
,cfi
->addr_unlock2
);
1717 cfi_send_gen_cmd(0xaa, cfi
->addr_unlock1
, base
, map
, cfi
, cfi
->device_type
, NULL
);
1718 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, base
, map
, cfi
, cfi
->device_type
, NULL
);
1721 cfi_send_gen_cmd(0xF0, cfi
->addr_unlock1
, base
, map
, cfi
, cfi
->device_type
, NULL
);
1722 /* Some misdesigned Intel chips do not respond for 0xF0 for a reset,
1723 * so ensure we're in read mode. Send both the Intel and the AMD command
1724 * for this. Intel uses 0xff for this, AMD uses 0xff for NOP, so
1725 * this should be safe.
1727 cfi_send_gen_cmd(0xFF, 0, base
, map
, cfi
, cfi
->device_type
, NULL
);
1728 /* FIXME - should have reset delay before continuing */
1732 static int cfi_jedec_setup(struct cfi_private
*p_cfi
, int index
)
1734 int i
,num_erase_regions
;
1737 if (! (jedec_table
[index
].devtypes
& p_cfi
->device_type
)) {
1738 DEBUG(MTD_DEBUG_LEVEL1
, "Rejecting potential %s with incompatible %d-bit device type\n",
1739 jedec_table
[index
].name
, 4 * (1<<p_cfi
->device_type
));
1743 printk(KERN_INFO
"Found: %s\n",jedec_table
[index
].name
);
1745 num_erase_regions
= jedec_table
[index
].nr_regions
;
1747 p_cfi
->cfiq
= kmalloc(sizeof(struct cfi_ident
) + num_erase_regions
* 4, GFP_KERNEL
);
1749 //xx printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name);
1753 memset(p_cfi
->cfiq
,0,sizeof(struct cfi_ident
));
1755 p_cfi
->cfiq
->P_ID
= jedec_table
[index
].cmd_set
;
1756 p_cfi
->cfiq
->NumEraseRegions
= jedec_table
[index
].nr_regions
;
1757 p_cfi
->cfiq
->DevSize
= jedec_table
[index
].dev_size
;
1758 p_cfi
->cfi_mode
= CFI_MODE_JEDEC
;
1760 for (i
=0; i
<num_erase_regions
; i
++){
1761 p_cfi
->cfiq
->EraseRegionInfo
[i
] = jedec_table
[index
].regions
[i
];
1763 p_cfi
->cmdset_priv
= NULL
;
1765 /* This may be redundant for some cases, but it doesn't hurt */
1766 p_cfi
->mfr
= jedec_table
[index
].mfr_id
;
1767 p_cfi
->id
= jedec_table
[index
].dev_id
;
1769 uaddr
= jedec_table
[index
].uaddr
;
1771 /* The table has unlock addresses in _bytes_, and we try not to let
1772 our brains explode when we see the datasheets talking about address
1773 lines numbered from A-1 to A18. The CFI table has unlock addresses
1774 in device-words according to the mode the device is connected in */
1775 p_cfi
->addr_unlock1
= unlock_addrs
[uaddr
].addr1
/ p_cfi
->device_type
;
1776 p_cfi
->addr_unlock2
= unlock_addrs
[uaddr
].addr2
/ p_cfi
->device_type
;
1783 * There is a BIG problem properly ID'ing the JEDEC device and guaranteeing
1784 * the mapped address, unlock addresses, and proper chip ID. This function
1785 * attempts to minimize errors. It is doubtfull that this probe will ever
1786 * be perfect - consequently there should be some module parameters that
1787 * could be manually specified to force the chip info.
1789 static inline int jedec_match( uint32_t base
,
1790 struct map_info
*map
,
1791 struct cfi_private
*cfi
,
1792 const struct amd_flash_info
*finfo
)
1794 int rc
= 0; /* failure until all tests pass */
1799 * The IDs must match. For X16 and X32 devices operating in
1800 * a lower width ( X8 or X16 ), the device ID's are usually just
1801 * the lower byte(s) of the larger device ID for wider mode. If
1802 * a part is found that doesn't fit this assumption (device id for
1803 * smaller width mode is completely unrealated to full-width mode)
1804 * then the jedec_table[] will have to be augmented with the IDs
1805 * for different widths.
1807 switch (cfi
->device_type
) {
1808 case CFI_DEVICETYPE_X8
:
1809 mfr
= (uint8_t)finfo
->mfr_id
;
1810 id
= (uint8_t)finfo
->dev_id
;
1812 /* bjd: it seems that if we do this, we can end up
1813 * detecting 16bit flashes as an 8bit device, even though
1816 if (finfo
->dev_id
> 0xff) {
1817 DEBUG( MTD_DEBUG_LEVEL3
, "%s(): ID is not 8bit\n",
1822 case CFI_DEVICETYPE_X16
:
1823 mfr
= (uint16_t)finfo
->mfr_id
;
1824 id
= (uint16_t)finfo
->dev_id
;
1826 case CFI_DEVICETYPE_X32
:
1827 mfr
= (uint16_t)finfo
->mfr_id
;
1828 id
= (uint32_t)finfo
->dev_id
;
1832 "MTD %s(): Unsupported device type %d\n",
1833 __func__
, cfi
->device_type
);
1836 if ( cfi
->mfr
!= mfr
|| cfi
->id
!= id
) {
1840 /* the part size must fit in the memory window */
1841 DEBUG( MTD_DEBUG_LEVEL3
,
1842 "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n",
1843 __func__
, base
, 1 << finfo
->dev_size
, base
+ (1 << finfo
->dev_size
) );
1844 if ( base
+ cfi_interleave(cfi
) * ( 1 << finfo
->dev_size
) > map
->size
) {
1845 DEBUG( MTD_DEBUG_LEVEL3
,
1846 "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n",
1847 __func__
, finfo
->mfr_id
, finfo
->dev_id
,
1848 1 << finfo
->dev_size
);
1852 if (! (finfo
->devtypes
& cfi
->device_type
))
1855 uaddr
= finfo
->uaddr
;
1857 DEBUG( MTD_DEBUG_LEVEL3
, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n",
1858 __func__
, cfi
->addr_unlock1
, cfi
->addr_unlock2
);
1859 if ( MTD_UADDR_UNNECESSARY
!= uaddr
&& MTD_UADDR_DONT_CARE
!= uaddr
1860 && ( unlock_addrs
[uaddr
].addr1
/ cfi
->device_type
!= cfi
->addr_unlock1
||
1861 unlock_addrs
[uaddr
].addr2
/ cfi
->device_type
!= cfi
->addr_unlock2
) ) {
1862 DEBUG( MTD_DEBUG_LEVEL3
,
1863 "MTD %s(): 0x%.4x 0x%.4x did not match\n",
1865 unlock_addrs
[uaddr
].addr1
,
1866 unlock_addrs
[uaddr
].addr2
);
1871 * Make sure the ID's dissappear when the device is taken out of
1872 * ID mode. The only time this should fail when it should succeed
1873 * is when the ID's are written as data to the same
1874 * addresses. For this rare and unfortunate case the chip
1875 * cannot be probed correctly.
1876 * FIXME - write a driver that takes all of the chip info as
1877 * module parameters, doesn't probe but forces a load.
1879 DEBUG( MTD_DEBUG_LEVEL3
,
1880 "MTD %s(): check ID's disappear when not in ID mode\n",
1882 jedec_reset( base
, map
, cfi
);
1883 mfr
= jedec_read_mfr( map
, base
, cfi
);
1884 id
= jedec_read_id( map
, base
, cfi
);
1885 if ( mfr
== cfi
->mfr
&& id
== cfi
->id
) {
1886 DEBUG( MTD_DEBUG_LEVEL3
,
1887 "MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n"
1888 "You might need to manually specify JEDEC parameters.\n",
1889 __func__
, cfi
->mfr
, cfi
->id
);
1893 /* all tests passed - mark as success */
1897 * Put the device back in ID mode - only need to do this if we
1898 * were truly frobbing a real device.
1900 DEBUG( MTD_DEBUG_LEVEL3
, "MTD %s(): return to ID mode\n", __func__
);
1901 if (cfi
->addr_unlock1
) {
1902 cfi_send_gen_cmd(0xaa, cfi
->addr_unlock1
, base
, map
, cfi
, cfi
->device_type
, NULL
);
1903 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, base
, map
, cfi
, cfi
->device_type
, NULL
);
1905 cfi_send_gen_cmd(0x90, cfi
->addr_unlock1
, base
, map
, cfi
, cfi
->device_type
, NULL
);
1906 /* FIXME - should have a delay before continuing */
1913 static int jedec_probe_chip(struct map_info
*map
, __u32 base
,
1914 unsigned long *chip_map
, struct cfi_private
*cfi
)
1917 enum uaddr uaddr_idx
= MTD_UADDR_NOT_SUPPORTED
;
1918 u32 probe_offset1
, probe_offset2
;
1921 if (!cfi
->numchips
) {
1924 if (MTD_UADDR_UNNECESSARY
== uaddr_idx
)
1927 cfi
->addr_unlock1
= unlock_addrs
[uaddr_idx
].addr1
/ cfi
->device_type
;
1928 cfi
->addr_unlock2
= unlock_addrs
[uaddr_idx
].addr2
/ cfi
->device_type
;
1931 /* Make certain we aren't probing past the end of map */
1932 if (base
>= map
->size
) {
1934 "Probe at base(0x%08x) past the end of the map(0x%08lx)\n",
1935 base
, map
->size
-1);
1939 /* Ensure the unlock addresses we try stay inside the map */
1940 probe_offset1
= cfi_build_cmd_addr(cfi
->addr_unlock1
, cfi_interleave(cfi
), cfi
->device_type
);
1941 probe_offset2
= cfi_build_cmd_addr(cfi
->addr_unlock2
, cfi_interleave(cfi
), cfi
->device_type
);
1942 if ( ((base
+ probe_offset1
+ map_bankwidth(map
)) >= map
->size
) ||
1943 ((base
+ probe_offset2
+ map_bankwidth(map
)) >= map
->size
))
1947 jedec_reset(base
, map
, cfi
);
1949 /* Autoselect Mode */
1950 if(cfi
->addr_unlock1
) {
1951 cfi_send_gen_cmd(0xaa, cfi
->addr_unlock1
, base
, map
, cfi
, cfi
->device_type
, NULL
);
1952 cfi_send_gen_cmd(0x55, cfi
->addr_unlock2
, base
, map
, cfi
, cfi
->device_type
, NULL
);
1954 cfi_send_gen_cmd(0x90, cfi
->addr_unlock1
, base
, map
, cfi
, cfi
->device_type
, NULL
);
1955 /* FIXME - should have a delay before continuing */
1957 if (!cfi
->numchips
) {
1958 /* This is the first time we're called. Set up the CFI
1959 stuff accordingly and return */
1961 cfi
->mfr
= jedec_read_mfr(map
, base
, cfi
);
1962 cfi
->id
= jedec_read_id(map
, base
, cfi
);
1963 DEBUG(MTD_DEBUG_LEVEL3
,
1964 "Search for id:(%02x %02x) interleave(%d) type(%d)\n",
1965 cfi
->mfr
, cfi
->id
, cfi_interleave(cfi
), cfi
->device_type
);
1966 for (i
= 0; i
< ARRAY_SIZE(jedec_table
); i
++) {
1967 if ( jedec_match( base
, map
, cfi
, &jedec_table
[i
] ) ) {
1968 DEBUG( MTD_DEBUG_LEVEL3
,
1969 "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n",
1970 __func__
, cfi
->mfr
, cfi
->id
,
1971 cfi
->addr_unlock1
, cfi
->addr_unlock2
);
1972 if (!cfi_jedec_setup(cfi
, i
))
1982 /* Make sure it is a chip of the same manufacturer and id */
1983 mfr
= jedec_read_mfr(map
, base
, cfi
);
1984 id
= jedec_read_id(map
, base
, cfi
);
1986 if ((mfr
!= cfi
->mfr
) || (id
!= cfi
->id
)) {
1987 printk(KERN_DEBUG
"%s: Found different chip or no chip at all (mfr 0x%x, id 0x%x) at 0x%x\n",
1988 map
->name
, mfr
, id
, base
);
1989 jedec_reset(base
, map
, cfi
);
1994 /* Check each previous chip locations to see if it's an alias */
1995 for (i
=0; i
< (base
>> cfi
->chipshift
); i
++) {
1996 unsigned long start
;
1997 if(!test_bit(i
, chip_map
)) {
1998 continue; /* Skip location; no valid chip at this address */
2000 start
= i
<< cfi
->chipshift
;
2001 if (jedec_read_mfr(map
, start
, cfi
) == cfi
->mfr
&&
2002 jedec_read_id(map
, start
, cfi
) == cfi
->id
) {
2003 /* Eep. This chip also looks like it's in autoselect mode.
2004 Is it an alias for the new one? */
2005 jedec_reset(start
, map
, cfi
);
2007 /* If the device IDs go away, it's an alias */
2008 if (jedec_read_mfr(map
, base
, cfi
) != cfi
->mfr
||
2009 jedec_read_id(map
, base
, cfi
) != cfi
->id
) {
2010 printk(KERN_DEBUG
"%s: Found an alias at 0x%x for the chip at 0x%lx\n",
2011 map
->name
, base
, start
);
2015 /* Yes, it's actually got the device IDs as data. Most
2016 * unfortunate. Stick the new chip in read mode
2017 * too and if it's the same, assume it's an alias. */
2018 /* FIXME: Use other modes to do a proper check */
2019 jedec_reset(base
, map
, cfi
);
2020 if (jedec_read_mfr(map
, base
, cfi
) == cfi
->mfr
&&
2021 jedec_read_id(map
, base
, cfi
) == cfi
->id
) {
2022 printk(KERN_DEBUG
"%s: Found an alias at 0x%x for the chip at 0x%lx\n",
2023 map
->name
, base
, start
);
2029 /* OK, if we got to here, then none of the previous chips appear to
2030 be aliases for the current one. */
2031 set_bit((base
>> cfi
->chipshift
), chip_map
); /* Update chip map */
2035 /* Put it back into Read Mode */
2036 jedec_reset(base
, map
, cfi
);
2038 printk(KERN_INFO
"%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
2039 map
->name
, cfi_interleave(cfi
), cfi
->device_type
*8, base
,
2045 static struct chip_probe jedec_chip_probe
= {
2047 .probe_chip
= jedec_probe_chip
2050 static struct mtd_info
*jedec_probe(struct map_info
*map
)
2053 * Just use the generic probe stuff to call our CFI-specific
2054 * chip_probe routine in all the possible permutations, etc.
2056 return mtd_do_chip_probe(map
, &jedec_chip_probe
);
2059 static struct mtd_chip_driver jedec_chipdrv
= {
2060 .probe
= jedec_probe
,
2061 .name
= "jedec_probe",
2062 .module
= THIS_MODULE
2065 static int __init
jedec_probe_init(void)
2067 register_mtd_chip_driver(&jedec_chipdrv
);
2071 static void __exit
jedec_probe_exit(void)
2073 unregister_mtd_chip_driver(&jedec_chipdrv
);
2076 module_init(jedec_probe_init
);
2077 module_exit(jedec_probe_exit
);
2079 MODULE_LICENSE("GPL");
2080 MODULE_AUTHOR("Erwin Authried <eauth@softsys.co.at> et al.");
2081 MODULE_DESCRIPTION("Probe code for JEDEC-compliant flash chips");