2 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
3 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
4 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
6 * Derived from Intel e1000 driver
7 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option)
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc., 59
21 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 * The full GNU General Public License is included in this distribution in the
24 * file called COPYING.
26 * Contact Information:
27 * Xiong Huang <xiong_huang@attansic.com>
28 * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
29 * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
31 * Chris Snook <csnook@redhat.com>
32 * Jay Cliburn <jcliburn@gmail.com>
34 * This version is adapted from the Attansic reference driver for
35 * inclusion in the Linux kernel. It is currently under heavy development.
36 * A very incomplete list of things that need to be dealt with:
39 * Add more ethtool functions.
40 * Fix abstruse irq enable/disable condition described here:
41 * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
47 * interrupt coalescing
51 #include <asm/atomic.h>
52 #include <asm/byteorder.h>
54 #include <linux/compiler.h>
55 #include <linux/crc32.h>
56 #include <linux/delay.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/etherdevice.h>
59 #include <linux/hardirq.h>
60 #include <linux/if_ether.h>
61 #include <linux/if_vlan.h>
63 #include <linux/interrupt.h>
65 #include <linux/irqflags.h>
66 #include <linux/irqreturn.h>
67 #include <linux/jiffies.h>
68 #include <linux/mii.h>
69 #include <linux/module.h>
70 #include <linux/moduleparam.h>
71 #include <linux/net.h>
72 #include <linux/netdevice.h>
73 #include <linux/pci.h>
74 #include <linux/pci_ids.h>
76 #include <linux/skbuff.h>
77 #include <linux/slab.h>
78 #include <linux/spinlock.h>
79 #include <linux/string.h>
80 #include <linux/tcp.h>
81 #include <linux/timer.h>
82 #include <linux/types.h>
83 #include <linux/workqueue.h>
85 #include <net/checksum.h>
89 /* Temporary hack for merging atl1 and atl2 */
93 * This is the only thing that needs to be changed to adjust the
94 * maximum number of ports that the driver can manage.
96 #define ATL1_MAX_NIC 4
98 #define OPTION_UNSET -1
99 #define OPTION_DISABLED 0
100 #define OPTION_ENABLED 1
102 #define ATL1_PARAM_INIT { [0 ... ATL1_MAX_NIC] = OPTION_UNSET }
105 * Interrupt Moderate Timer in units of 2 us
107 * Valid Range: 10-65535
109 * Default Value: 100 (200us)
111 static int __devinitdata int_mod_timer
[ATL1_MAX_NIC
+1] = ATL1_PARAM_INIT
;
112 static int num_int_mod_timer
;
113 module_param_array_named(int_mod_timer
, int_mod_timer
, int,
114 &num_int_mod_timer
, 0);
115 MODULE_PARM_DESC(int_mod_timer
, "Interrupt moderator timer");
117 #define DEFAULT_INT_MOD_CNT 100 /* 200us */
118 #define MAX_INT_MOD_CNT 65000
119 #define MIN_INT_MOD_CNT 50
122 enum { enable_option
, range_option
, list_option
} type
;
127 struct { /* range_option info */
131 struct { /* list_option info */
133 struct atl1_opt_list
{
141 static int __devinit
atl1_validate_option(int *value
, struct atl1_option
*opt
,
142 struct pci_dev
*pdev
)
144 if (*value
== OPTION_UNSET
) {
153 dev_info(&pdev
->dev
, "%s enabled\n", opt
->name
);
155 case OPTION_DISABLED
:
156 dev_info(&pdev
->dev
, "%s disabled\n", opt
->name
);
161 if (*value
>= opt
->arg
.r
.min
&& *value
<= opt
->arg
.r
.max
) {
162 dev_info(&pdev
->dev
, "%s set to %i\n", opt
->name
,
169 struct atl1_opt_list
*ent
;
171 for (i
= 0; i
< opt
->arg
.l
.nr
; i
++) {
172 ent
= &opt
->arg
.l
.p
[i
];
173 if (*value
== ent
->i
) {
174 if (ent
->str
[0] != '\0')
175 dev_info(&pdev
->dev
, "%s\n",
187 dev_info(&pdev
->dev
, "invalid %s specified (%i) %s\n",
188 opt
->name
, *value
, opt
->err
);
194 * atl1_check_options - Range Checking for Command Line Parameters
195 * @adapter: board private structure
197 * This routine checks all command line parameters for valid user
198 * input. If an invalid value is given, or if no user specified
199 * value exists, a default value is used. The final value is stored
200 * in a variable in the adapter structure.
202 void __devinit
atl1_check_options(struct atl1_adapter
*adapter
)
204 struct pci_dev
*pdev
= adapter
->pdev
;
205 int bd
= adapter
->bd_number
;
206 if (bd
>= ATL1_MAX_NIC
) {
207 dev_notice(&pdev
->dev
, "no configuration for board#%i\n", bd
);
208 dev_notice(&pdev
->dev
, "using defaults for all values\n");
210 { /* Interrupt Moderate Timer */
211 struct atl1_option opt
= {
212 .type
= range_option
,
213 .name
= "Interrupt Moderator Timer",
214 .err
= "using default of "
215 __MODULE_STRING(DEFAULT_INT_MOD_CNT
),
216 .def
= DEFAULT_INT_MOD_CNT
,
217 .arg
= {.r
= {.min
= MIN_INT_MOD_CNT
,
218 .max
= MAX_INT_MOD_CNT
} }
221 if (num_int_mod_timer
> bd
) {
222 val
= int_mod_timer
[bd
];
223 atl1_validate_option(&val
, &opt
, pdev
);
224 adapter
->imt
= (u16
) val
;
226 adapter
->imt
= (u16
) (opt
.def
);
231 * atl1_pci_tbl - PCI Device ID Table
233 static const struct pci_device_id atl1_pci_tbl
[] = {
234 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC
, PCI_DEVICE_ID_ATTANSIC_L1
)},
235 /* required last entry */
238 MODULE_DEVICE_TABLE(pci
, atl1_pci_tbl
);
240 static const u32 atl1_default_msg
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
|
241 NETIF_MSG_LINK
| NETIF_MSG_TIMER
| NETIF_MSG_IFDOWN
| NETIF_MSG_IFUP
;
243 static int debug
= -1;
244 module_param(debug
, int, 0);
245 MODULE_PARM_DESC(debug
, "Message level (0=none,...,16=all)");
248 * Reset the transmit and receive units; mask and clear all interrupts.
249 * hw - Struct containing variables accessed by shared code
250 * return : 0 or idle status (if error)
252 static s32
atl1_reset_hw(struct atl1_hw
*hw
)
254 struct pci_dev
*pdev
= hw
->back
->pdev
;
255 struct atl1_adapter
*adapter
= hw
->back
;
260 * Clear Interrupt mask to stop board from generating
261 * interrupts & Clear any pending interrupt events
264 * iowrite32(0, hw->hw_addr + REG_IMR);
265 * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
269 * Issue Soft Reset to the MAC. This will reset the chip's
270 * transmit, receive, DMA. It will not effect
271 * the current PCI configuration. The global reset bit is self-
272 * clearing, and should clear within a microsecond.
274 iowrite32(MASTER_CTRL_SOFT_RST
, hw
->hw_addr
+ REG_MASTER_CTRL
);
275 ioread32(hw
->hw_addr
+ REG_MASTER_CTRL
);
277 iowrite16(1, hw
->hw_addr
+ REG_PHY_ENABLE
);
278 ioread16(hw
->hw_addr
+ REG_PHY_ENABLE
);
280 /* delay about 1ms */
283 /* Wait at least 10ms for All module to be Idle */
284 for (i
= 0; i
< 10; i
++) {
285 icr
= ioread32(hw
->hw_addr
+ REG_IDLE_STATUS
);
290 /* FIXME: still the right way to do this? */
295 if (netif_msg_hw(adapter
))
296 dev_dbg(&pdev
->dev
, "ICR = 0x%x\n", icr
);
303 /* function about EEPROM
306 * return 0 if eeprom exist
308 static int atl1_check_eeprom_exist(struct atl1_hw
*hw
)
311 value
= ioread32(hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
312 if (value
& SPI_FLASH_CTRL_EN_VPD
) {
313 value
&= ~SPI_FLASH_CTRL_EN_VPD
;
314 iowrite32(value
, hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
317 value
= ioread16(hw
->hw_addr
+ REG_PCIE_CAP_LIST
);
318 return ((value
& 0xFF00) == 0x6C00) ? 0 : 1;
321 static bool atl1_read_eeprom(struct atl1_hw
*hw
, u32 offset
, u32
*p_value
)
327 /* address do not align */
330 iowrite32(0, hw
->hw_addr
+ REG_VPD_DATA
);
331 control
= (offset
& VPD_CAP_VPD_ADDR_MASK
) << VPD_CAP_VPD_ADDR_SHIFT
;
332 iowrite32(control
, hw
->hw_addr
+ REG_VPD_CAP
);
333 ioread32(hw
->hw_addr
+ REG_VPD_CAP
);
335 for (i
= 0; i
< 10; i
++) {
337 control
= ioread32(hw
->hw_addr
+ REG_VPD_CAP
);
338 if (control
& VPD_CAP_VPD_FLAG
)
341 if (control
& VPD_CAP_VPD_FLAG
) {
342 *p_value
= ioread32(hw
->hw_addr
+ REG_VPD_DATA
);
350 * Reads the value from a PHY register
351 * hw - Struct containing variables accessed by shared code
352 * reg_addr - address of the PHY register to read
354 s32
atl1_read_phy_reg(struct atl1_hw
*hw
, u16 reg_addr
, u16
*phy_data
)
359 val
= ((u32
) (reg_addr
& MDIO_REG_ADDR_MASK
)) << MDIO_REG_ADDR_SHIFT
|
360 MDIO_START
| MDIO_SUP_PREAMBLE
| MDIO_RW
| MDIO_CLK_25_4
<<
362 iowrite32(val
, hw
->hw_addr
+ REG_MDIO_CTRL
);
363 ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
365 for (i
= 0; i
< MDIO_WAIT_TIMES
; i
++) {
367 val
= ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
368 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
371 if (!(val
& (MDIO_START
| MDIO_BUSY
))) {
372 *phy_data
= (u16
) val
;
378 #define CUSTOM_SPI_CS_SETUP 2
379 #define CUSTOM_SPI_CLK_HI 2
380 #define CUSTOM_SPI_CLK_LO 2
381 #define CUSTOM_SPI_CS_HOLD 2
382 #define CUSTOM_SPI_CS_HI 3
384 static bool atl1_spi_read(struct atl1_hw
*hw
, u32 addr
, u32
*buf
)
389 iowrite32(0, hw
->hw_addr
+ REG_SPI_DATA
);
390 iowrite32(addr
, hw
->hw_addr
+ REG_SPI_ADDR
);
392 value
= SPI_FLASH_CTRL_WAIT_READY
|
393 (CUSTOM_SPI_CS_SETUP
& SPI_FLASH_CTRL_CS_SETUP_MASK
) <<
394 SPI_FLASH_CTRL_CS_SETUP_SHIFT
| (CUSTOM_SPI_CLK_HI
&
395 SPI_FLASH_CTRL_CLK_HI_MASK
) <<
396 SPI_FLASH_CTRL_CLK_HI_SHIFT
| (CUSTOM_SPI_CLK_LO
&
397 SPI_FLASH_CTRL_CLK_LO_MASK
) <<
398 SPI_FLASH_CTRL_CLK_LO_SHIFT
| (CUSTOM_SPI_CS_HOLD
&
399 SPI_FLASH_CTRL_CS_HOLD_MASK
) <<
400 SPI_FLASH_CTRL_CS_HOLD_SHIFT
| (CUSTOM_SPI_CS_HI
&
401 SPI_FLASH_CTRL_CS_HI_MASK
) <<
402 SPI_FLASH_CTRL_CS_HI_SHIFT
| (1 & SPI_FLASH_CTRL_INS_MASK
) <<
403 SPI_FLASH_CTRL_INS_SHIFT
;
405 iowrite32(value
, hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
407 value
|= SPI_FLASH_CTRL_START
;
408 iowrite32(value
, hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
409 ioread32(hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
411 for (i
= 0; i
< 10; i
++) {
413 value
= ioread32(hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
414 if (!(value
& SPI_FLASH_CTRL_START
))
418 if (value
& SPI_FLASH_CTRL_START
)
421 *buf
= ioread32(hw
->hw_addr
+ REG_SPI_DATA
);
427 * get_permanent_address
428 * return 0 if get valid mac address,
430 static int atl1_get_permanent_address(struct atl1_hw
*hw
)
435 u8 eth_addr
[ETH_ALEN
];
438 if (is_valid_ether_addr(hw
->perm_mac_addr
))
442 addr
[0] = addr
[1] = 0;
444 if (!atl1_check_eeprom_exist(hw
)) {
447 /* Read out all EEPROM content */
450 if (atl1_read_eeprom(hw
, i
+ 0x100, &control
)) {
452 if (reg
== REG_MAC_STA_ADDR
)
454 else if (reg
== (REG_MAC_STA_ADDR
+ 4))
457 } else if ((control
& 0xff) == 0x5A) {
459 reg
= (u16
) (control
>> 16);
468 *(u32
*) ð_addr
[2] = swab32(addr
[0]);
469 *(u16
*) ð_addr
[0] = swab16(*(u16
*) &addr
[1]);
470 if (is_valid_ether_addr(eth_addr
)) {
471 memcpy(hw
->perm_mac_addr
, eth_addr
, ETH_ALEN
);
476 /* see if SPI FLAGS exist ? */
477 addr
[0] = addr
[1] = 0;
482 if (atl1_spi_read(hw
, i
+ 0x1f000, &control
)) {
484 if (reg
== REG_MAC_STA_ADDR
)
486 else if (reg
== (REG_MAC_STA_ADDR
+ 4))
489 } else if ((control
& 0xff) == 0x5A) {
491 reg
= (u16
) (control
>> 16);
501 *(u32
*) ð_addr
[2] = swab32(addr
[0]);
502 *(u16
*) ð_addr
[0] = swab16(*(u16
*) &addr
[1]);
503 if (is_valid_ether_addr(eth_addr
)) {
504 memcpy(hw
->perm_mac_addr
, eth_addr
, ETH_ALEN
);
509 * On some motherboards, the MAC address is written by the
510 * BIOS directly to the MAC register during POST, and is
511 * not stored in eeprom. If all else thus far has failed
512 * to fetch the permanent MAC address, try reading it directly.
514 addr
[0] = ioread32(hw
->hw_addr
+ REG_MAC_STA_ADDR
);
515 addr
[1] = ioread16(hw
->hw_addr
+ (REG_MAC_STA_ADDR
+ 4));
516 *(u32
*) ð_addr
[2] = swab32(addr
[0]);
517 *(u16
*) ð_addr
[0] = swab16(*(u16
*) &addr
[1]);
518 if (is_valid_ether_addr(eth_addr
)) {
519 memcpy(hw
->perm_mac_addr
, eth_addr
, ETH_ALEN
);
527 * Reads the adapter's MAC address from the EEPROM
528 * hw - Struct containing variables accessed by shared code
530 s32
atl1_read_mac_addr(struct atl1_hw
*hw
)
534 if (atl1_get_permanent_address(hw
))
535 random_ether_addr(hw
->perm_mac_addr
);
537 for (i
= 0; i
< ETH_ALEN
; i
++)
538 hw
->mac_addr
[i
] = hw
->perm_mac_addr
[i
];
543 * Hashes an address to determine its location in the multicast table
544 * hw - Struct containing variables accessed by shared code
545 * mc_addr - the multicast address to hash
549 * set hash value for a multicast address
550 * hash calcu processing :
551 * 1. calcu 32bit CRC for multicast address
552 * 2. reverse crc with MSB to LSB
554 u32
atl1_hash_mc_addr(struct atl1_hw
*hw
, u8
*mc_addr
)
556 u32 crc32
, value
= 0;
559 crc32
= ether_crc_le(6, mc_addr
);
560 for (i
= 0; i
< 32; i
++)
561 value
|= (((crc32
>> i
) & 1) << (31 - i
));
567 * Sets the bit in the multicast table corresponding to the hash value.
568 * hw - Struct containing variables accessed by shared code
569 * hash_value - Multicast address hash value
571 void atl1_hash_set(struct atl1_hw
*hw
, u32 hash_value
)
573 u32 hash_bit
, hash_reg
;
577 * The HASH Table is a register array of 2 32-bit registers.
578 * It is treated like an array of 64 bits. We want to set
579 * bit BitArray[hash_value]. So we figure out what register
580 * the bit is in, read it, OR in the new bit, then write
581 * back the new value. The register is determined by the
582 * upper 7 bits of the hash value and the bit within that
583 * register are determined by the lower 5 bits of the value.
585 hash_reg
= (hash_value
>> 31) & 0x1;
586 hash_bit
= (hash_value
>> 26) & 0x1F;
587 mta
= ioread32((hw
->hw_addr
+ REG_RX_HASH_TABLE
) + (hash_reg
<< 2));
588 mta
|= (1 << hash_bit
);
589 iowrite32(mta
, (hw
->hw_addr
+ REG_RX_HASH_TABLE
) + (hash_reg
<< 2));
593 * Writes a value to a PHY register
594 * hw - Struct containing variables accessed by shared code
595 * reg_addr - address of the PHY register to write
596 * data - data to write to the PHY
598 static s32
atl1_write_phy_reg(struct atl1_hw
*hw
, u32 reg_addr
, u16 phy_data
)
603 val
= ((u32
) (phy_data
& MDIO_DATA_MASK
)) << MDIO_DATA_SHIFT
|
604 (reg_addr
& MDIO_REG_ADDR_MASK
) << MDIO_REG_ADDR_SHIFT
|
606 MDIO_START
| MDIO_CLK_25_4
<< MDIO_CLK_SEL_SHIFT
;
607 iowrite32(val
, hw
->hw_addr
+ REG_MDIO_CTRL
);
608 ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
610 for (i
= 0; i
< MDIO_WAIT_TIMES
; i
++) {
612 val
= ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
613 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
617 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
624 * Make L001's PHY out of Power Saving State (bug)
625 * hw - Struct containing variables accessed by shared code
626 * when power on, L001's PHY always on Power saving State
627 * (Gigabit Link forbidden)
629 static s32
atl1_phy_leave_power_saving(struct atl1_hw
*hw
)
632 ret
= atl1_write_phy_reg(hw
, 29, 0x0029);
635 return atl1_write_phy_reg(hw
, 30, 0);
639 * Resets the PHY and make all config validate
640 * hw - Struct containing variables accessed by shared code
642 * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
644 static s32
atl1_phy_reset(struct atl1_hw
*hw
)
646 struct pci_dev
*pdev
= hw
->back
->pdev
;
647 struct atl1_adapter
*adapter
= hw
->back
;
651 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
652 hw
->media_type
== MEDIA_TYPE_1000M_FULL
)
653 phy_data
= MII_CR_RESET
| MII_CR_AUTO_NEG_EN
;
655 switch (hw
->media_type
) {
656 case MEDIA_TYPE_100M_FULL
:
658 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_100
|
661 case MEDIA_TYPE_100M_HALF
:
662 phy_data
= MII_CR_SPEED_100
| MII_CR_RESET
;
664 case MEDIA_TYPE_10M_FULL
:
666 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_10
| MII_CR_RESET
;
669 /* MEDIA_TYPE_10M_HALF: */
670 phy_data
= MII_CR_SPEED_10
| MII_CR_RESET
;
675 ret_val
= atl1_write_phy_reg(hw
, MII_BMCR
, phy_data
);
679 /* pcie serdes link may be down! */
680 if (netif_msg_hw(adapter
))
681 dev_dbg(&pdev
->dev
, "pcie phy link down\n");
683 for (i
= 0; i
< 25; i
++) {
685 val
= ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
686 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
690 if ((val
& (MDIO_START
| MDIO_BUSY
)) != 0) {
691 if (netif_msg_hw(adapter
))
693 "pcie link down at least 25ms\n");
701 * Configures PHY autoneg and flow control advertisement settings
702 * hw - Struct containing variables accessed by shared code
704 static s32
atl1_phy_setup_autoneg_adv(struct atl1_hw
*hw
)
707 s16 mii_autoneg_adv_reg
;
708 s16 mii_1000t_ctrl_reg
;
710 /* Read the MII Auto-Neg Advertisement Register (Address 4). */
711 mii_autoneg_adv_reg
= MII_AR_DEFAULT_CAP_MASK
;
713 /* Read the MII 1000Base-T Control Register (Address 9). */
714 mii_1000t_ctrl_reg
= MII_ATLX_CR_1000T_DEFAULT_CAP_MASK
;
717 * First we clear all the 10/100 mb speed bits in the Auto-Neg
718 * Advertisement Register (Address 4) and the 1000 mb speed bits in
719 * the 1000Base-T Control Register (Address 9).
721 mii_autoneg_adv_reg
&= ~MII_AR_SPEED_MASK
;
722 mii_1000t_ctrl_reg
&= ~MII_ATLX_CR_1000T_SPEED_MASK
;
725 * Need to parse media_type and set up
726 * the appropriate PHY registers.
728 switch (hw
->media_type
) {
729 case MEDIA_TYPE_AUTO_SENSOR
:
730 mii_autoneg_adv_reg
|= (MII_AR_10T_HD_CAPS
|
732 MII_AR_100TX_HD_CAPS
|
733 MII_AR_100TX_FD_CAPS
);
734 mii_1000t_ctrl_reg
|= MII_ATLX_CR_1000T_FD_CAPS
;
737 case MEDIA_TYPE_1000M_FULL
:
738 mii_1000t_ctrl_reg
|= MII_ATLX_CR_1000T_FD_CAPS
;
741 case MEDIA_TYPE_100M_FULL
:
742 mii_autoneg_adv_reg
|= MII_AR_100TX_FD_CAPS
;
745 case MEDIA_TYPE_100M_HALF
:
746 mii_autoneg_adv_reg
|= MII_AR_100TX_HD_CAPS
;
749 case MEDIA_TYPE_10M_FULL
:
750 mii_autoneg_adv_reg
|= MII_AR_10T_FD_CAPS
;
754 mii_autoneg_adv_reg
|= MII_AR_10T_HD_CAPS
;
758 /* flow control fixed to enable all */
759 mii_autoneg_adv_reg
|= (MII_AR_ASM_DIR
| MII_AR_PAUSE
);
761 hw
->mii_autoneg_adv_reg
= mii_autoneg_adv_reg
;
762 hw
->mii_1000t_ctrl_reg
= mii_1000t_ctrl_reg
;
764 ret_val
= atl1_write_phy_reg(hw
, MII_ADVERTISE
, mii_autoneg_adv_reg
);
768 ret_val
= atl1_write_phy_reg(hw
, MII_ATLX_CR
, mii_1000t_ctrl_reg
);
776 * Configures link settings.
777 * hw - Struct containing variables accessed by shared code
778 * Assumes the hardware has previously been reset and the
779 * transmitter and receiver are not enabled.
781 static s32
atl1_setup_link(struct atl1_hw
*hw
)
783 struct pci_dev
*pdev
= hw
->back
->pdev
;
784 struct atl1_adapter
*adapter
= hw
->back
;
789 * PHY will advertise value(s) parsed from
790 * autoneg_advertised and fc
791 * no matter what autoneg is , We will not wait link result.
793 ret_val
= atl1_phy_setup_autoneg_adv(hw
);
795 if (netif_msg_link(adapter
))
797 "error setting up autonegotiation\n");
800 /* SW.Reset , En-Auto-Neg if needed */
801 ret_val
= atl1_phy_reset(hw
);
803 if (netif_msg_link(adapter
))
804 dev_dbg(&pdev
->dev
, "error resetting phy\n");
807 hw
->phy_configured
= true;
811 static void atl1_init_flash_opcode(struct atl1_hw
*hw
)
813 if (hw
->flash_vendor
>= ARRAY_SIZE(flash_table
))
815 hw
->flash_vendor
= 0;
818 iowrite8(flash_table
[hw
->flash_vendor
].cmd_program
,
819 hw
->hw_addr
+ REG_SPI_FLASH_OP_PROGRAM
);
820 iowrite8(flash_table
[hw
->flash_vendor
].cmd_sector_erase
,
821 hw
->hw_addr
+ REG_SPI_FLASH_OP_SC_ERASE
);
822 iowrite8(flash_table
[hw
->flash_vendor
].cmd_chip_erase
,
823 hw
->hw_addr
+ REG_SPI_FLASH_OP_CHIP_ERASE
);
824 iowrite8(flash_table
[hw
->flash_vendor
].cmd_rdid
,
825 hw
->hw_addr
+ REG_SPI_FLASH_OP_RDID
);
826 iowrite8(flash_table
[hw
->flash_vendor
].cmd_wren
,
827 hw
->hw_addr
+ REG_SPI_FLASH_OP_WREN
);
828 iowrite8(flash_table
[hw
->flash_vendor
].cmd_rdsr
,
829 hw
->hw_addr
+ REG_SPI_FLASH_OP_RDSR
);
830 iowrite8(flash_table
[hw
->flash_vendor
].cmd_wrsr
,
831 hw
->hw_addr
+ REG_SPI_FLASH_OP_WRSR
);
832 iowrite8(flash_table
[hw
->flash_vendor
].cmd_read
,
833 hw
->hw_addr
+ REG_SPI_FLASH_OP_READ
);
837 * Performs basic configuration of the adapter.
838 * hw - Struct containing variables accessed by shared code
839 * Assumes that the controller has previously been reset and is in a
840 * post-reset uninitialized state. Initializes multicast table,
841 * and Calls routines to setup link
842 * Leaves the transmit and receive units disabled and uninitialized.
844 static s32
atl1_init_hw(struct atl1_hw
*hw
)
848 /* Zero out the Multicast HASH table */
849 iowrite32(0, hw
->hw_addr
+ REG_RX_HASH_TABLE
);
850 /* clear the old settings from the multicast hash table */
851 iowrite32(0, (hw
->hw_addr
+ REG_RX_HASH_TABLE
) + (1 << 2));
853 atl1_init_flash_opcode(hw
);
855 if (!hw
->phy_configured
) {
856 /* enable GPHY LinkChange Interrrupt */
857 ret_val
= atl1_write_phy_reg(hw
, 18, 0xC00);
860 /* make PHY out of power-saving state */
861 ret_val
= atl1_phy_leave_power_saving(hw
);
864 /* Call a subroutine to configure the link */
865 ret_val
= atl1_setup_link(hw
);
871 * Detects the current speed and duplex settings of the hardware.
872 * hw - Struct containing variables accessed by shared code
873 * speed - Speed of the connection
874 * duplex - Duplex setting of the connection
876 static s32
atl1_get_speed_and_duplex(struct atl1_hw
*hw
, u16
*speed
, u16
*duplex
)
878 struct pci_dev
*pdev
= hw
->back
->pdev
;
879 struct atl1_adapter
*adapter
= hw
->back
;
883 /* ; --- Read PHY Specific Status Register (17) */
884 ret_val
= atl1_read_phy_reg(hw
, MII_ATLX_PSSR
, &phy_data
);
888 if (!(phy_data
& MII_ATLX_PSSR_SPD_DPLX_RESOLVED
))
889 return ATLX_ERR_PHY_RES
;
891 switch (phy_data
& MII_ATLX_PSSR_SPEED
) {
892 case MII_ATLX_PSSR_1000MBS
:
895 case MII_ATLX_PSSR_100MBS
:
898 case MII_ATLX_PSSR_10MBS
:
902 if (netif_msg_hw(adapter
))
903 dev_dbg(&pdev
->dev
, "error getting speed\n");
904 return ATLX_ERR_PHY_SPEED
;
907 if (phy_data
& MII_ATLX_PSSR_DPLX
)
908 *duplex
= FULL_DUPLEX
;
910 *duplex
= HALF_DUPLEX
;
915 void atl1_set_mac_addr(struct atl1_hw
*hw
)
920 * 0: 6AF600DC 1: 000B
923 value
= (((u32
) hw
->mac_addr
[2]) << 24) |
924 (((u32
) hw
->mac_addr
[3]) << 16) |
925 (((u32
) hw
->mac_addr
[4]) << 8) | (((u32
) hw
->mac_addr
[5]));
926 iowrite32(value
, hw
->hw_addr
+ REG_MAC_STA_ADDR
);
928 value
= (((u32
) hw
->mac_addr
[0]) << 8) | (((u32
) hw
->mac_addr
[1]));
929 iowrite32(value
, (hw
->hw_addr
+ REG_MAC_STA_ADDR
) + (1 << 2));
933 * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
934 * @adapter: board private structure to initialize
936 * atl1_sw_init initializes the Adapter private data structure.
937 * Fields are initialized based on PCI device information and
938 * OS network device settings (MTU size).
940 static int __devinit
atl1_sw_init(struct atl1_adapter
*adapter
)
942 struct atl1_hw
*hw
= &adapter
->hw
;
943 struct net_device
*netdev
= adapter
->netdev
;
945 hw
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
946 hw
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
949 adapter
->rx_buffer_len
= (hw
->max_frame_size
+ 7) & ~7;
950 adapter
->ict
= 50000; /* 100ms */
951 adapter
->link_speed
= SPEED_0
; /* hardware init */
952 adapter
->link_duplex
= FULL_DUPLEX
;
954 hw
->phy_configured
= false;
955 hw
->preamble_len
= 7;
965 hw
->rfd_fetch_gap
= 1;
966 hw
->rx_jumbo_th
= adapter
->rx_buffer_len
/ 8;
967 hw
->rx_jumbo_lkah
= 1;
968 hw
->rrd_ret_timer
= 16;
970 hw
->tpd_fetch_th
= 16;
971 hw
->txf_burst
= 0x100;
972 hw
->tx_jumbo_task_th
= (hw
->max_frame_size
+ 7) >> 3;
973 hw
->tpd_fetch_gap
= 1;
974 hw
->rcb_value
= atl1_rcb_64
;
975 hw
->dma_ord
= atl1_dma_ord_enh
;
976 hw
->dmar_block
= atl1_dma_req_256
;
977 hw
->dmaw_block
= atl1_dma_req_256
;
980 hw
->cmb_rx_timer
= 1; /* about 2us */
981 hw
->cmb_tx_timer
= 1; /* about 2us */
982 hw
->smb_timer
= 100000; /* about 200ms */
984 spin_lock_init(&adapter
->lock
);
985 spin_lock_init(&adapter
->mb_lock
);
990 static int mdio_read(struct net_device
*netdev
, int phy_id
, int reg_num
)
992 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
995 atl1_read_phy_reg(&adapter
->hw
, reg_num
& 0x1f, &result
);
1000 static void mdio_write(struct net_device
*netdev
, int phy_id
, int reg_num
,
1003 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
1005 atl1_write_phy_reg(&adapter
->hw
, reg_num
, val
);
1014 static int atl1_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
1016 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
1017 unsigned long flags
;
1020 if (!netif_running(netdev
))
1023 spin_lock_irqsave(&adapter
->lock
, flags
);
1024 retval
= generic_mii_ioctl(&adapter
->mii
, if_mii(ifr
), cmd
, NULL
);
1025 spin_unlock_irqrestore(&adapter
->lock
, flags
);
1031 * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
1032 * @adapter: board private structure
1034 * Return 0 on success, negative on failure
1036 static s32
atl1_setup_ring_resources(struct atl1_adapter
*adapter
)
1038 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
1039 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1040 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1041 struct atl1_ring_header
*ring_header
= &adapter
->ring_header
;
1042 struct pci_dev
*pdev
= adapter
->pdev
;
1046 size
= sizeof(struct atl1_buffer
) * (tpd_ring
->count
+ rfd_ring
->count
);
1047 tpd_ring
->buffer_info
= kzalloc(size
, GFP_KERNEL
);
1048 if (unlikely(!tpd_ring
->buffer_info
)) {
1049 if (netif_msg_drv(adapter
))
1050 dev_err(&pdev
->dev
, "kzalloc failed , size = D%d\n",
1054 rfd_ring
->buffer_info
=
1055 (struct atl1_buffer
*)(tpd_ring
->buffer_info
+ tpd_ring
->count
);
1058 * real ring DMA buffer
1059 * each ring/block may need up to 8 bytes for alignment, hence the
1060 * additional 40 bytes tacked onto the end.
1062 ring_header
->size
= size
=
1063 sizeof(struct tx_packet_desc
) * tpd_ring
->count
1064 + sizeof(struct rx_free_desc
) * rfd_ring
->count
1065 + sizeof(struct rx_return_desc
) * rrd_ring
->count
1066 + sizeof(struct coals_msg_block
)
1067 + sizeof(struct stats_msg_block
)
1070 ring_header
->desc
= pci_alloc_consistent(pdev
, ring_header
->size
,
1072 if (unlikely(!ring_header
->desc
)) {
1073 if (netif_msg_drv(adapter
))
1074 dev_err(&pdev
->dev
, "pci_alloc_consistent failed\n");
1078 memset(ring_header
->desc
, 0, ring_header
->size
);
1081 tpd_ring
->dma
= ring_header
->dma
;
1082 offset
= (tpd_ring
->dma
& 0x7) ? (8 - (ring_header
->dma
& 0x7)) : 0;
1083 tpd_ring
->dma
+= offset
;
1084 tpd_ring
->desc
= (u8
*) ring_header
->desc
+ offset
;
1085 tpd_ring
->size
= sizeof(struct tx_packet_desc
) * tpd_ring
->count
;
1088 rfd_ring
->dma
= tpd_ring
->dma
+ tpd_ring
->size
;
1089 offset
= (rfd_ring
->dma
& 0x7) ? (8 - (rfd_ring
->dma
& 0x7)) : 0;
1090 rfd_ring
->dma
+= offset
;
1091 rfd_ring
->desc
= (u8
*) tpd_ring
->desc
+ (tpd_ring
->size
+ offset
);
1092 rfd_ring
->size
= sizeof(struct rx_free_desc
) * rfd_ring
->count
;
1096 rrd_ring
->dma
= rfd_ring
->dma
+ rfd_ring
->size
;
1097 offset
= (rrd_ring
->dma
& 0x7) ? (8 - (rrd_ring
->dma
& 0x7)) : 0;
1098 rrd_ring
->dma
+= offset
;
1099 rrd_ring
->desc
= (u8
*) rfd_ring
->desc
+ (rfd_ring
->size
+ offset
);
1100 rrd_ring
->size
= sizeof(struct rx_return_desc
) * rrd_ring
->count
;
1104 adapter
->cmb
.dma
= rrd_ring
->dma
+ rrd_ring
->size
;
1105 offset
= (adapter
->cmb
.dma
& 0x7) ? (8 - (adapter
->cmb
.dma
& 0x7)) : 0;
1106 adapter
->cmb
.dma
+= offset
;
1107 adapter
->cmb
.cmb
= (struct coals_msg_block
*)
1108 ((u8
*) rrd_ring
->desc
+ (rrd_ring
->size
+ offset
));
1111 adapter
->smb
.dma
= adapter
->cmb
.dma
+ sizeof(struct coals_msg_block
);
1112 offset
= (adapter
->smb
.dma
& 0x7) ? (8 - (adapter
->smb
.dma
& 0x7)) : 0;
1113 adapter
->smb
.dma
+= offset
;
1114 adapter
->smb
.smb
= (struct stats_msg_block
*)
1115 ((u8
*) adapter
->cmb
.cmb
+
1116 (sizeof(struct coals_msg_block
) + offset
));
1121 kfree(tpd_ring
->buffer_info
);
1125 static void atl1_init_ring_ptrs(struct atl1_adapter
*adapter
)
1127 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
1128 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1129 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1131 atomic_set(&tpd_ring
->next_to_use
, 0);
1132 atomic_set(&tpd_ring
->next_to_clean
, 0);
1134 rfd_ring
->next_to_clean
= 0;
1135 atomic_set(&rfd_ring
->next_to_use
, 0);
1137 rrd_ring
->next_to_use
= 0;
1138 atomic_set(&rrd_ring
->next_to_clean
, 0);
1142 * atl1_clean_rx_ring - Free RFD Buffers
1143 * @adapter: board private structure
1145 static void atl1_clean_rx_ring(struct atl1_adapter
*adapter
)
1147 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1148 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1149 struct atl1_buffer
*buffer_info
;
1150 struct pci_dev
*pdev
= adapter
->pdev
;
1154 /* Free all the Rx ring sk_buffs */
1155 for (i
= 0; i
< rfd_ring
->count
; i
++) {
1156 buffer_info
= &rfd_ring
->buffer_info
[i
];
1157 if (buffer_info
->dma
) {
1158 pci_unmap_page(pdev
, buffer_info
->dma
,
1159 buffer_info
->length
, PCI_DMA_FROMDEVICE
);
1160 buffer_info
->dma
= 0;
1162 if (buffer_info
->skb
) {
1163 dev_kfree_skb(buffer_info
->skb
);
1164 buffer_info
->skb
= NULL
;
1168 size
= sizeof(struct atl1_buffer
) * rfd_ring
->count
;
1169 memset(rfd_ring
->buffer_info
, 0, size
);
1171 /* Zero out the descriptor ring */
1172 memset(rfd_ring
->desc
, 0, rfd_ring
->size
);
1174 rfd_ring
->next_to_clean
= 0;
1175 atomic_set(&rfd_ring
->next_to_use
, 0);
1177 rrd_ring
->next_to_use
= 0;
1178 atomic_set(&rrd_ring
->next_to_clean
, 0);
1182 * atl1_clean_tx_ring - Free Tx Buffers
1183 * @adapter: board private structure
1185 static void atl1_clean_tx_ring(struct atl1_adapter
*adapter
)
1187 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
1188 struct atl1_buffer
*buffer_info
;
1189 struct pci_dev
*pdev
= adapter
->pdev
;
1193 /* Free all the Tx ring sk_buffs */
1194 for (i
= 0; i
< tpd_ring
->count
; i
++) {
1195 buffer_info
= &tpd_ring
->buffer_info
[i
];
1196 if (buffer_info
->dma
) {
1197 pci_unmap_page(pdev
, buffer_info
->dma
,
1198 buffer_info
->length
, PCI_DMA_TODEVICE
);
1199 buffer_info
->dma
= 0;
1203 for (i
= 0; i
< tpd_ring
->count
; i
++) {
1204 buffer_info
= &tpd_ring
->buffer_info
[i
];
1205 if (buffer_info
->skb
) {
1206 dev_kfree_skb_any(buffer_info
->skb
);
1207 buffer_info
->skb
= NULL
;
1211 size
= sizeof(struct atl1_buffer
) * tpd_ring
->count
;
1212 memset(tpd_ring
->buffer_info
, 0, size
);
1214 /* Zero out the descriptor ring */
1215 memset(tpd_ring
->desc
, 0, tpd_ring
->size
);
1217 atomic_set(&tpd_ring
->next_to_use
, 0);
1218 atomic_set(&tpd_ring
->next_to_clean
, 0);
1222 * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1223 * @adapter: board private structure
1225 * Free all transmit software resources
1227 static void atl1_free_ring_resources(struct atl1_adapter
*adapter
)
1229 struct pci_dev
*pdev
= adapter
->pdev
;
1230 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
1231 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1232 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1233 struct atl1_ring_header
*ring_header
= &adapter
->ring_header
;
1235 atl1_clean_tx_ring(adapter
);
1236 atl1_clean_rx_ring(adapter
);
1238 kfree(tpd_ring
->buffer_info
);
1239 pci_free_consistent(pdev
, ring_header
->size
, ring_header
->desc
,
1242 tpd_ring
->buffer_info
= NULL
;
1243 tpd_ring
->desc
= NULL
;
1246 rfd_ring
->buffer_info
= NULL
;
1247 rfd_ring
->desc
= NULL
;
1250 rrd_ring
->desc
= NULL
;
1254 static void atl1_setup_mac_ctrl(struct atl1_adapter
*adapter
)
1257 struct atl1_hw
*hw
= &adapter
->hw
;
1258 struct net_device
*netdev
= adapter
->netdev
;
1259 /* Config MAC CTRL Register */
1260 value
= MAC_CTRL_TX_EN
| MAC_CTRL_RX_EN
;
1262 if (FULL_DUPLEX
== adapter
->link_duplex
)
1263 value
|= MAC_CTRL_DUPLX
;
1265 value
|= ((u32
) ((SPEED_1000
== adapter
->link_speed
) ?
1266 MAC_CTRL_SPEED_1000
: MAC_CTRL_SPEED_10_100
) <<
1267 MAC_CTRL_SPEED_SHIFT
);
1269 value
|= (MAC_CTRL_TX_FLOW
| MAC_CTRL_RX_FLOW
);
1271 value
|= (MAC_CTRL_ADD_CRC
| MAC_CTRL_PAD
);
1272 /* preamble length */
1273 value
|= (((u32
) adapter
->hw
.preamble_len
1274 & MAC_CTRL_PRMLEN_MASK
) << MAC_CTRL_PRMLEN_SHIFT
);
1277 value
|= MAC_CTRL_RMV_VLAN
;
1279 if (adapter->rx_csum)
1280 value |= MAC_CTRL_RX_CHKSUM_EN;
1283 value
|= MAC_CTRL_BC_EN
;
1284 if (netdev
->flags
& IFF_PROMISC
)
1285 value
|= MAC_CTRL_PROMIS_EN
;
1286 else if (netdev
->flags
& IFF_ALLMULTI
)
1287 value
|= MAC_CTRL_MC_ALL_EN
;
1288 /* value |= MAC_CTRL_LOOPBACK; */
1289 iowrite32(value
, hw
->hw_addr
+ REG_MAC_CTRL
);
1292 static u32
atl1_check_link(struct atl1_adapter
*adapter
)
1294 struct atl1_hw
*hw
= &adapter
->hw
;
1295 struct net_device
*netdev
= adapter
->netdev
;
1297 u16 speed
, duplex
, phy_data
;
1300 /* MII_BMSR must read twice */
1301 atl1_read_phy_reg(hw
, MII_BMSR
, &phy_data
);
1302 atl1_read_phy_reg(hw
, MII_BMSR
, &phy_data
);
1303 if (!(phy_data
& BMSR_LSTATUS
)) {
1305 if (netif_carrier_ok(netdev
)) {
1306 /* old link state: Up */
1307 if (netif_msg_link(adapter
))
1308 dev_info(&adapter
->pdev
->dev
, "link is down\n");
1309 adapter
->link_speed
= SPEED_0
;
1310 netif_carrier_off(netdev
);
1316 ret_val
= atl1_get_speed_and_duplex(hw
, &speed
, &duplex
);
1320 switch (hw
->media_type
) {
1321 case MEDIA_TYPE_1000M_FULL
:
1322 if (speed
!= SPEED_1000
|| duplex
!= FULL_DUPLEX
)
1325 case MEDIA_TYPE_100M_FULL
:
1326 if (speed
!= SPEED_100
|| duplex
!= FULL_DUPLEX
)
1329 case MEDIA_TYPE_100M_HALF
:
1330 if (speed
!= SPEED_100
|| duplex
!= HALF_DUPLEX
)
1333 case MEDIA_TYPE_10M_FULL
:
1334 if (speed
!= SPEED_10
|| duplex
!= FULL_DUPLEX
)
1337 case MEDIA_TYPE_10M_HALF
:
1338 if (speed
!= SPEED_10
|| duplex
!= HALF_DUPLEX
)
1343 /* link result is our setting */
1345 if (adapter
->link_speed
!= speed
1346 || adapter
->link_duplex
!= duplex
) {
1347 adapter
->link_speed
= speed
;
1348 adapter
->link_duplex
= duplex
;
1349 atl1_setup_mac_ctrl(adapter
);
1350 if (netif_msg_link(adapter
))
1351 dev_info(&adapter
->pdev
->dev
,
1352 "%s link is up %d Mbps %s\n",
1353 netdev
->name
, adapter
->link_speed
,
1354 adapter
->link_duplex
== FULL_DUPLEX
?
1355 "full duplex" : "half duplex");
1357 if (!netif_carrier_ok(netdev
)) {
1358 /* Link down -> Up */
1359 netif_carrier_on(netdev
);
1364 /* change original link status */
1365 if (netif_carrier_ok(netdev
)) {
1366 adapter
->link_speed
= SPEED_0
;
1367 netif_carrier_off(netdev
);
1368 netif_stop_queue(netdev
);
1371 if (hw
->media_type
!= MEDIA_TYPE_AUTO_SENSOR
&&
1372 hw
->media_type
!= MEDIA_TYPE_1000M_FULL
) {
1373 switch (hw
->media_type
) {
1374 case MEDIA_TYPE_100M_FULL
:
1375 phy_data
= MII_CR_FULL_DUPLEX
| MII_CR_SPEED_100
|
1378 case MEDIA_TYPE_100M_HALF
:
1379 phy_data
= MII_CR_SPEED_100
| MII_CR_RESET
;
1381 case MEDIA_TYPE_10M_FULL
:
1383 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_10
| MII_CR_RESET
;
1386 /* MEDIA_TYPE_10M_HALF: */
1387 phy_data
= MII_CR_SPEED_10
| MII_CR_RESET
;
1390 atl1_write_phy_reg(hw
, MII_BMCR
, phy_data
);
1394 /* auto-neg, insert timer to re-config phy */
1395 if (!adapter
->phy_timer_pending
) {
1396 adapter
->phy_timer_pending
= true;
1397 mod_timer(&adapter
->phy_config_timer
, jiffies
+ 3 * HZ
);
1403 static void set_flow_ctrl_old(struct atl1_adapter
*adapter
)
1407 /* RFD Flow Control */
1408 value
= adapter
->rfd_ring
.count
;
1414 value
= ((hi
& RXQ_RXF_PAUSE_TH_HI_MASK
) << RXQ_RXF_PAUSE_TH_HI_SHIFT
) |
1415 ((lo
& RXQ_RXF_PAUSE_TH_LO_MASK
) << RXQ_RXF_PAUSE_TH_LO_SHIFT
);
1416 iowrite32(value
, adapter
->hw
.hw_addr
+ REG_RXQ_RXF_PAUSE_THRESH
);
1418 /* RRD Flow Control */
1419 value
= adapter
->rrd_ring
.count
;
1424 value
= ((hi
& RXQ_RRD_PAUSE_TH_HI_MASK
) << RXQ_RRD_PAUSE_TH_HI_SHIFT
) |
1425 ((lo
& RXQ_RRD_PAUSE_TH_LO_MASK
) << RXQ_RRD_PAUSE_TH_LO_SHIFT
);
1426 iowrite32(value
, adapter
->hw
.hw_addr
+ REG_RXQ_RRD_PAUSE_THRESH
);
1429 static void set_flow_ctrl_new(struct atl1_hw
*hw
)
1433 /* RXF Flow Control */
1434 value
= ioread32(hw
->hw_addr
+ REG_SRAM_RXF_LEN
);
1441 value
= ((hi
& RXQ_RXF_PAUSE_TH_HI_MASK
) << RXQ_RXF_PAUSE_TH_HI_SHIFT
) |
1442 ((lo
& RXQ_RXF_PAUSE_TH_LO_MASK
) << RXQ_RXF_PAUSE_TH_LO_SHIFT
);
1443 iowrite32(value
, hw
->hw_addr
+ REG_RXQ_RXF_PAUSE_THRESH
);
1445 /* RRD Flow Control */
1446 value
= ioread32(hw
->hw_addr
+ REG_SRAM_RRD_LEN
);
1453 value
= ((hi
& RXQ_RRD_PAUSE_TH_HI_MASK
) << RXQ_RRD_PAUSE_TH_HI_SHIFT
) |
1454 ((lo
& RXQ_RRD_PAUSE_TH_LO_MASK
) << RXQ_RRD_PAUSE_TH_LO_SHIFT
);
1455 iowrite32(value
, hw
->hw_addr
+ REG_RXQ_RRD_PAUSE_THRESH
);
1459 * atl1_configure - Configure Transmit&Receive Unit after Reset
1460 * @adapter: board private structure
1462 * Configure the Tx /Rx unit of the MAC after a reset.
1464 static u32
atl1_configure(struct atl1_adapter
*adapter
)
1466 struct atl1_hw
*hw
= &adapter
->hw
;
1469 /* clear interrupt status */
1470 iowrite32(0xffffffff, adapter
->hw
.hw_addr
+ REG_ISR
);
1472 /* set MAC Address */
1473 value
= (((u32
) hw
->mac_addr
[2]) << 24) |
1474 (((u32
) hw
->mac_addr
[3]) << 16) |
1475 (((u32
) hw
->mac_addr
[4]) << 8) |
1476 (((u32
) hw
->mac_addr
[5]));
1477 iowrite32(value
, hw
->hw_addr
+ REG_MAC_STA_ADDR
);
1478 value
= (((u32
) hw
->mac_addr
[0]) << 8) | (((u32
) hw
->mac_addr
[1]));
1479 iowrite32(value
, hw
->hw_addr
+ (REG_MAC_STA_ADDR
+ 4));
1483 /* HI base address */
1484 iowrite32((u32
) ((adapter
->tpd_ring
.dma
& 0xffffffff00000000ULL
) >> 32),
1485 hw
->hw_addr
+ REG_DESC_BASE_ADDR_HI
);
1486 /* LO base address */
1487 iowrite32((u32
) (adapter
->rfd_ring
.dma
& 0x00000000ffffffffULL
),
1488 hw
->hw_addr
+ REG_DESC_RFD_ADDR_LO
);
1489 iowrite32((u32
) (adapter
->rrd_ring
.dma
& 0x00000000ffffffffULL
),
1490 hw
->hw_addr
+ REG_DESC_RRD_ADDR_LO
);
1491 iowrite32((u32
) (adapter
->tpd_ring
.dma
& 0x00000000ffffffffULL
),
1492 hw
->hw_addr
+ REG_DESC_TPD_ADDR_LO
);
1493 iowrite32((u32
) (adapter
->cmb
.dma
& 0x00000000ffffffffULL
),
1494 hw
->hw_addr
+ REG_DESC_CMB_ADDR_LO
);
1495 iowrite32((u32
) (adapter
->smb
.dma
& 0x00000000ffffffffULL
),
1496 hw
->hw_addr
+ REG_DESC_SMB_ADDR_LO
);
1499 value
= adapter
->rrd_ring
.count
;
1501 value
+= adapter
->rfd_ring
.count
;
1502 iowrite32(value
, hw
->hw_addr
+ REG_DESC_RFD_RRD_RING_SIZE
);
1503 iowrite32(adapter
->tpd_ring
.count
, hw
->hw_addr
+
1504 REG_DESC_TPD_RING_SIZE
);
1507 iowrite32(1, hw
->hw_addr
+ REG_LOAD_PTR
);
1509 /* config Mailbox */
1510 value
= ((atomic_read(&adapter
->tpd_ring
.next_to_use
)
1511 & MB_TPD_PROD_INDX_MASK
) << MB_TPD_PROD_INDX_SHIFT
) |
1512 ((atomic_read(&adapter
->rrd_ring
.next_to_clean
)
1513 & MB_RRD_CONS_INDX_MASK
) << MB_RRD_CONS_INDX_SHIFT
) |
1514 ((atomic_read(&adapter
->rfd_ring
.next_to_use
)
1515 & MB_RFD_PROD_INDX_MASK
) << MB_RFD_PROD_INDX_SHIFT
);
1516 iowrite32(value
, hw
->hw_addr
+ REG_MAILBOX
);
1518 /* config IPG/IFG */
1519 value
= (((u32
) hw
->ipgt
& MAC_IPG_IFG_IPGT_MASK
)
1520 << MAC_IPG_IFG_IPGT_SHIFT
) |
1521 (((u32
) hw
->min_ifg
& MAC_IPG_IFG_MIFG_MASK
)
1522 << MAC_IPG_IFG_MIFG_SHIFT
) |
1523 (((u32
) hw
->ipgr1
& MAC_IPG_IFG_IPGR1_MASK
)
1524 << MAC_IPG_IFG_IPGR1_SHIFT
) |
1525 (((u32
) hw
->ipgr2
& MAC_IPG_IFG_IPGR2_MASK
)
1526 << MAC_IPG_IFG_IPGR2_SHIFT
);
1527 iowrite32(value
, hw
->hw_addr
+ REG_MAC_IPG_IFG
);
1529 /* config Half-Duplex Control */
1530 value
= ((u32
) hw
->lcol
& MAC_HALF_DUPLX_CTRL_LCOL_MASK
) |
1531 (((u32
) hw
->max_retry
& MAC_HALF_DUPLX_CTRL_RETRY_MASK
)
1532 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT
) |
1533 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN
|
1534 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT
) |
1535 (((u32
) hw
->jam_ipg
& MAC_HALF_DUPLX_CTRL_JAMIPG_MASK
)
1536 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT
);
1537 iowrite32(value
, hw
->hw_addr
+ REG_MAC_HALF_DUPLX_CTRL
);
1539 /* set Interrupt Moderator Timer */
1540 iowrite16(adapter
->imt
, hw
->hw_addr
+ REG_IRQ_MODU_TIMER_INIT
);
1541 iowrite32(MASTER_CTRL_ITIMER_EN
, hw
->hw_addr
+ REG_MASTER_CTRL
);
1543 /* set Interrupt Clear Timer */
1544 iowrite16(adapter
->ict
, hw
->hw_addr
+ REG_CMBDISDMA_TIMER
);
1546 /* set max frame size hw will accept */
1547 iowrite32(hw
->max_frame_size
, hw
->hw_addr
+ REG_MTU
);
1549 /* jumbo size & rrd retirement timer */
1550 value
= (((u32
) hw
->rx_jumbo_th
& RXQ_JMBOSZ_TH_MASK
)
1551 << RXQ_JMBOSZ_TH_SHIFT
) |
1552 (((u32
) hw
->rx_jumbo_lkah
& RXQ_JMBO_LKAH_MASK
)
1553 << RXQ_JMBO_LKAH_SHIFT
) |
1554 (((u32
) hw
->rrd_ret_timer
& RXQ_RRD_TIMER_MASK
)
1555 << RXQ_RRD_TIMER_SHIFT
);
1556 iowrite32(value
, hw
->hw_addr
+ REG_RXQ_JMBOSZ_RRDTIM
);
1559 switch (hw
->dev_rev
) {
1564 set_flow_ctrl_old(adapter
);
1567 set_flow_ctrl_new(hw
);
1572 value
= (((u32
) hw
->tpd_burst
& TXQ_CTRL_TPD_BURST_NUM_MASK
)
1573 << TXQ_CTRL_TPD_BURST_NUM_SHIFT
) |
1574 (((u32
) hw
->txf_burst
& TXQ_CTRL_TXF_BURST_NUM_MASK
)
1575 << TXQ_CTRL_TXF_BURST_NUM_SHIFT
) |
1576 (((u32
) hw
->tpd_fetch_th
& TXQ_CTRL_TPD_FETCH_TH_MASK
)
1577 << TXQ_CTRL_TPD_FETCH_TH_SHIFT
) | TXQ_CTRL_ENH_MODE
|
1579 iowrite32(value
, hw
->hw_addr
+ REG_TXQ_CTRL
);
1581 /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1582 value
= (((u32
) hw
->tx_jumbo_task_th
& TX_JUMBO_TASK_TH_MASK
)
1583 << TX_JUMBO_TASK_TH_SHIFT
) |
1584 (((u32
) hw
->tpd_fetch_gap
& TX_TPD_MIN_IPG_MASK
)
1585 << TX_TPD_MIN_IPG_SHIFT
);
1586 iowrite32(value
, hw
->hw_addr
+ REG_TX_JUMBO_TASK_TH_TPD_IPG
);
1589 value
= (((u32
) hw
->rfd_burst
& RXQ_CTRL_RFD_BURST_NUM_MASK
)
1590 << RXQ_CTRL_RFD_BURST_NUM_SHIFT
) |
1591 (((u32
) hw
->rrd_burst
& RXQ_CTRL_RRD_BURST_THRESH_MASK
)
1592 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT
) |
1593 (((u32
) hw
->rfd_fetch_gap
& RXQ_CTRL_RFD_PREF_MIN_IPG_MASK
)
1594 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT
) | RXQ_CTRL_CUT_THRU_EN
|
1596 iowrite32(value
, hw
->hw_addr
+ REG_RXQ_CTRL
);
1598 /* config DMA Engine */
1599 value
= ((((u32
) hw
->dmar_block
) & DMA_CTRL_DMAR_BURST_LEN_MASK
)
1600 << DMA_CTRL_DMAR_BURST_LEN_SHIFT
) |
1601 ((((u32
) hw
->dmaw_block
) & DMA_CTRL_DMAW_BURST_LEN_MASK
)
1602 << DMA_CTRL_DMAW_BURST_LEN_SHIFT
) | DMA_CTRL_DMAR_EN
|
1604 value
|= (u32
) hw
->dma_ord
;
1605 if (atl1_rcb_128
== hw
->rcb_value
)
1606 value
|= DMA_CTRL_RCB_VALUE
;
1607 iowrite32(value
, hw
->hw_addr
+ REG_DMA_CTRL
);
1609 /* config CMB / SMB */
1610 value
= (hw
->cmb_tpd
> adapter
->tpd_ring
.count
) ?
1611 hw
->cmb_tpd
: adapter
->tpd_ring
.count
;
1613 value
|= hw
->cmb_rrd
;
1614 iowrite32(value
, hw
->hw_addr
+ REG_CMB_WRITE_TH
);
1615 value
= hw
->cmb_rx_timer
| ((u32
) hw
->cmb_tx_timer
<< 16);
1616 iowrite32(value
, hw
->hw_addr
+ REG_CMB_WRITE_TIMER
);
1617 iowrite32(hw
->smb_timer
, hw
->hw_addr
+ REG_SMB_TIMER
);
1619 /* --- enable CMB / SMB */
1620 value
= CSMB_CTRL_CMB_EN
| CSMB_CTRL_SMB_EN
;
1621 iowrite32(value
, hw
->hw_addr
+ REG_CSMB_CTRL
);
1623 value
= ioread32(adapter
->hw
.hw_addr
+ REG_ISR
);
1624 if (unlikely((value
& ISR_PHY_LINKDOWN
) != 0))
1625 value
= 1; /* config failed */
1629 /* clear all interrupt status */
1630 iowrite32(0x3fffffff, adapter
->hw
.hw_addr
+ REG_ISR
);
1631 iowrite32(0, adapter
->hw
.hw_addr
+ REG_ISR
);
1636 * atl1_pcie_patch - Patch for PCIE module
1638 static void atl1_pcie_patch(struct atl1_adapter
*adapter
)
1642 /* much vendor magic here */
1644 iowrite32(value
, adapter
->hw
.hw_addr
+ 0x12FC);
1645 /* pcie flow control mode change */
1646 value
= ioread32(adapter
->hw
.hw_addr
+ 0x1008);
1648 iowrite32(value
, adapter
->hw
.hw_addr
+ 0x1008);
1652 * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
1653 * on PCI Command register is disable.
1654 * The function enable this bit.
1655 * Brackett, 2006/03/15
1657 static void atl1_via_workaround(struct atl1_adapter
*adapter
)
1659 unsigned long value
;
1661 value
= ioread16(adapter
->hw
.hw_addr
+ PCI_COMMAND
);
1662 if (value
& PCI_COMMAND_INTX_DISABLE
)
1663 value
&= ~PCI_COMMAND_INTX_DISABLE
;
1664 iowrite32(value
, adapter
->hw
.hw_addr
+ PCI_COMMAND
);
1667 static void atl1_inc_smb(struct atl1_adapter
*adapter
)
1669 struct stats_msg_block
*smb
= adapter
->smb
.smb
;
1671 /* Fill out the OS statistics structure */
1672 adapter
->soft_stats
.rx_packets
+= smb
->rx_ok
;
1673 adapter
->soft_stats
.tx_packets
+= smb
->tx_ok
;
1674 adapter
->soft_stats
.rx_bytes
+= smb
->rx_byte_cnt
;
1675 adapter
->soft_stats
.tx_bytes
+= smb
->tx_byte_cnt
;
1676 adapter
->soft_stats
.multicast
+= smb
->rx_mcast
;
1677 adapter
->soft_stats
.collisions
+= (smb
->tx_1_col
+ smb
->tx_2_col
* 2 +
1678 smb
->tx_late_col
+ smb
->tx_abort_col
* adapter
->hw
.max_retry
);
1681 adapter
->soft_stats
.rx_errors
+= (smb
->rx_frag
+ smb
->rx_fcs_err
+
1682 smb
->rx_len_err
+ smb
->rx_sz_ov
+ smb
->rx_rxf_ov
+
1683 smb
->rx_rrd_ov
+ smb
->rx_align_err
);
1684 adapter
->soft_stats
.rx_fifo_errors
+= smb
->rx_rxf_ov
;
1685 adapter
->soft_stats
.rx_length_errors
+= smb
->rx_len_err
;
1686 adapter
->soft_stats
.rx_crc_errors
+= smb
->rx_fcs_err
;
1687 adapter
->soft_stats
.rx_frame_errors
+= smb
->rx_align_err
;
1688 adapter
->soft_stats
.rx_missed_errors
+= (smb
->rx_rrd_ov
+
1691 adapter
->soft_stats
.rx_pause
+= smb
->rx_pause
;
1692 adapter
->soft_stats
.rx_rrd_ov
+= smb
->rx_rrd_ov
;
1693 adapter
->soft_stats
.rx_trunc
+= smb
->rx_sz_ov
;
1696 adapter
->soft_stats
.tx_errors
+= (smb
->tx_late_col
+
1697 smb
->tx_abort_col
+ smb
->tx_underrun
+ smb
->tx_trunc
);
1698 adapter
->soft_stats
.tx_fifo_errors
+= smb
->tx_underrun
;
1699 adapter
->soft_stats
.tx_aborted_errors
+= smb
->tx_abort_col
;
1700 adapter
->soft_stats
.tx_window_errors
+= smb
->tx_late_col
;
1702 adapter
->soft_stats
.excecol
+= smb
->tx_abort_col
;
1703 adapter
->soft_stats
.deffer
+= smb
->tx_defer
;
1704 adapter
->soft_stats
.scc
+= smb
->tx_1_col
;
1705 adapter
->soft_stats
.mcc
+= smb
->tx_2_col
;
1706 adapter
->soft_stats
.latecol
+= smb
->tx_late_col
;
1707 adapter
->soft_stats
.tx_underun
+= smb
->tx_underrun
;
1708 adapter
->soft_stats
.tx_trunc
+= smb
->tx_trunc
;
1709 adapter
->soft_stats
.tx_pause
+= smb
->tx_pause
;
1711 adapter
->net_stats
.rx_packets
= adapter
->soft_stats
.rx_packets
;
1712 adapter
->net_stats
.tx_packets
= adapter
->soft_stats
.tx_packets
;
1713 adapter
->net_stats
.rx_bytes
= adapter
->soft_stats
.rx_bytes
;
1714 adapter
->net_stats
.tx_bytes
= adapter
->soft_stats
.tx_bytes
;
1715 adapter
->net_stats
.multicast
= adapter
->soft_stats
.multicast
;
1716 adapter
->net_stats
.collisions
= adapter
->soft_stats
.collisions
;
1717 adapter
->net_stats
.rx_errors
= adapter
->soft_stats
.rx_errors
;
1718 adapter
->net_stats
.rx_over_errors
=
1719 adapter
->soft_stats
.rx_missed_errors
;
1720 adapter
->net_stats
.rx_length_errors
=
1721 adapter
->soft_stats
.rx_length_errors
;
1722 adapter
->net_stats
.rx_crc_errors
= adapter
->soft_stats
.rx_crc_errors
;
1723 adapter
->net_stats
.rx_frame_errors
=
1724 adapter
->soft_stats
.rx_frame_errors
;
1725 adapter
->net_stats
.rx_fifo_errors
= adapter
->soft_stats
.rx_fifo_errors
;
1726 adapter
->net_stats
.rx_missed_errors
=
1727 adapter
->soft_stats
.rx_missed_errors
;
1728 adapter
->net_stats
.tx_errors
= adapter
->soft_stats
.tx_errors
;
1729 adapter
->net_stats
.tx_fifo_errors
= adapter
->soft_stats
.tx_fifo_errors
;
1730 adapter
->net_stats
.tx_aborted_errors
=
1731 adapter
->soft_stats
.tx_aborted_errors
;
1732 adapter
->net_stats
.tx_window_errors
=
1733 adapter
->soft_stats
.tx_window_errors
;
1734 adapter
->net_stats
.tx_carrier_errors
=
1735 adapter
->soft_stats
.tx_carrier_errors
;
1738 static void atl1_update_mailbox(struct atl1_adapter
*adapter
)
1740 unsigned long flags
;
1741 u32 tpd_next_to_use
;
1742 u32 rfd_next_to_use
;
1743 u32 rrd_next_to_clean
;
1746 spin_lock_irqsave(&adapter
->mb_lock
, flags
);
1748 tpd_next_to_use
= atomic_read(&adapter
->tpd_ring
.next_to_use
);
1749 rfd_next_to_use
= atomic_read(&adapter
->rfd_ring
.next_to_use
);
1750 rrd_next_to_clean
= atomic_read(&adapter
->rrd_ring
.next_to_clean
);
1752 value
= ((rfd_next_to_use
& MB_RFD_PROD_INDX_MASK
) <<
1753 MB_RFD_PROD_INDX_SHIFT
) |
1754 ((rrd_next_to_clean
& MB_RRD_CONS_INDX_MASK
) <<
1755 MB_RRD_CONS_INDX_SHIFT
) |
1756 ((tpd_next_to_use
& MB_TPD_PROD_INDX_MASK
) <<
1757 MB_TPD_PROD_INDX_SHIFT
);
1758 iowrite32(value
, adapter
->hw
.hw_addr
+ REG_MAILBOX
);
1760 spin_unlock_irqrestore(&adapter
->mb_lock
, flags
);
1763 static void atl1_clean_alloc_flag(struct atl1_adapter
*adapter
,
1764 struct rx_return_desc
*rrd
, u16 offset
)
1766 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1768 while (rfd_ring
->next_to_clean
!= (rrd
->buf_indx
+ offset
)) {
1769 rfd_ring
->buffer_info
[rfd_ring
->next_to_clean
].alloced
= 0;
1770 if (++rfd_ring
->next_to_clean
== rfd_ring
->count
) {
1771 rfd_ring
->next_to_clean
= 0;
1776 static void atl1_update_rfd_index(struct atl1_adapter
*adapter
,
1777 struct rx_return_desc
*rrd
)
1781 num_buf
= (rrd
->xsz
.xsum_sz
.pkt_size
+ adapter
->rx_buffer_len
- 1) /
1782 adapter
->rx_buffer_len
;
1783 if (rrd
->num_buf
== num_buf
)
1784 /* clean alloc flag for bad rrd */
1785 atl1_clean_alloc_flag(adapter
, rrd
, num_buf
);
1788 static void atl1_rx_checksum(struct atl1_adapter
*adapter
,
1789 struct rx_return_desc
*rrd
, struct sk_buff
*skb
)
1791 struct pci_dev
*pdev
= adapter
->pdev
;
1793 skb
->ip_summed
= CHECKSUM_NONE
;
1795 if (unlikely(rrd
->pkt_flg
& PACKET_FLAG_ERR
)) {
1796 if (rrd
->err_flg
& (ERR_FLAG_CRC
| ERR_FLAG_TRUNC
|
1797 ERR_FLAG_CODE
| ERR_FLAG_OV
)) {
1798 adapter
->hw_csum_err
++;
1799 if (netif_msg_rx_err(adapter
))
1800 dev_printk(KERN_DEBUG
, &pdev
->dev
,
1801 "rx checksum error\n");
1807 if (!(rrd
->pkt_flg
& PACKET_FLAG_IPV4
))
1808 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1812 if (likely(!(rrd
->err_flg
&
1813 (ERR_FLAG_IP_CHKSUM
| ERR_FLAG_L4_CHKSUM
)))) {
1814 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1815 adapter
->hw_csum_good
++;
1819 /* IPv4, but hardware thinks its checksum is wrong */
1820 if (netif_msg_rx_err(adapter
))
1821 dev_printk(KERN_DEBUG
, &pdev
->dev
,
1822 "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
1823 rrd
->pkt_flg
, rrd
->err_flg
);
1824 skb
->ip_summed
= CHECKSUM_COMPLETE
;
1825 skb
->csum
= htons(rrd
->xsz
.xsum_sz
.rx_chksum
);
1826 adapter
->hw_csum_err
++;
1831 * atl1_alloc_rx_buffers - Replace used receive buffers
1832 * @adapter: address of board private structure
1834 static u16
atl1_alloc_rx_buffers(struct atl1_adapter
*adapter
)
1836 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1837 struct pci_dev
*pdev
= adapter
->pdev
;
1839 unsigned long offset
;
1840 struct atl1_buffer
*buffer_info
, *next_info
;
1841 struct sk_buff
*skb
;
1843 u16 rfd_next_to_use
, next_next
;
1844 struct rx_free_desc
*rfd_desc
;
1846 next_next
= rfd_next_to_use
= atomic_read(&rfd_ring
->next_to_use
);
1847 if (++next_next
== rfd_ring
->count
)
1849 buffer_info
= &rfd_ring
->buffer_info
[rfd_next_to_use
];
1850 next_info
= &rfd_ring
->buffer_info
[next_next
];
1852 while (!buffer_info
->alloced
&& !next_info
->alloced
) {
1853 if (buffer_info
->skb
) {
1854 buffer_info
->alloced
= 1;
1858 rfd_desc
= ATL1_RFD_DESC(rfd_ring
, rfd_next_to_use
);
1860 skb
= netdev_alloc_skb(adapter
->netdev
,
1861 adapter
->rx_buffer_len
+ NET_IP_ALIGN
);
1862 if (unlikely(!skb
)) {
1863 /* Better luck next round */
1864 adapter
->net_stats
.rx_dropped
++;
1869 * Make buffer alignment 2 beyond a 16 byte boundary
1870 * this will result in a 16 byte aligned IP header after
1871 * the 14 byte MAC header is removed
1873 skb_reserve(skb
, NET_IP_ALIGN
);
1875 buffer_info
->alloced
= 1;
1876 buffer_info
->skb
= skb
;
1877 buffer_info
->length
= (u16
) adapter
->rx_buffer_len
;
1878 page
= virt_to_page(skb
->data
);
1879 offset
= (unsigned long)skb
->data
& ~PAGE_MASK
;
1880 buffer_info
->dma
= pci_map_page(pdev
, page
, offset
,
1881 adapter
->rx_buffer_len
,
1882 PCI_DMA_FROMDEVICE
);
1883 rfd_desc
->buffer_addr
= cpu_to_le64(buffer_info
->dma
);
1884 rfd_desc
->buf_len
= cpu_to_le16(adapter
->rx_buffer_len
);
1885 rfd_desc
->coalese
= 0;
1888 rfd_next_to_use
= next_next
;
1889 if (unlikely(++next_next
== rfd_ring
->count
))
1892 buffer_info
= &rfd_ring
->buffer_info
[rfd_next_to_use
];
1893 next_info
= &rfd_ring
->buffer_info
[next_next
];
1899 * Force memory writes to complete before letting h/w
1900 * know there are new descriptors to fetch. (Only
1901 * applicable for weak-ordered memory model archs,
1905 atomic_set(&rfd_ring
->next_to_use
, (int)rfd_next_to_use
);
1910 static void atl1_intr_rx(struct atl1_adapter
*adapter
)
1914 u16 rrd_next_to_clean
;
1916 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1917 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1918 struct atl1_buffer
*buffer_info
;
1919 struct rx_return_desc
*rrd
;
1920 struct sk_buff
*skb
;
1924 rrd_next_to_clean
= atomic_read(&rrd_ring
->next_to_clean
);
1927 rrd
= ATL1_RRD_DESC(rrd_ring
, rrd_next_to_clean
);
1929 if (likely(rrd
->xsz
.valid
)) { /* packet valid */
1931 /* check rrd status */
1932 if (likely(rrd
->num_buf
== 1))
1934 else if (netif_msg_rx_err(adapter
)) {
1935 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1936 "unexpected RRD buffer count\n");
1937 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1938 "rx_buf_len = %d\n",
1939 adapter
->rx_buffer_len
);
1940 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1941 "RRD num_buf = %d\n",
1943 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1944 "RRD pkt_len = %d\n",
1945 rrd
->xsz
.xsum_sz
.pkt_size
);
1946 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1947 "RRD pkt_flg = 0x%08X\n",
1949 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1950 "RRD err_flg = 0x%08X\n",
1952 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1953 "RRD vlan_tag = 0x%08X\n",
1957 /* rrd seems to be bad */
1958 if (unlikely(i
-- > 0)) {
1959 /* rrd may not be DMAed completely */
1964 if (netif_msg_rx_err(adapter
))
1965 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1967 /* see if update RFD index */
1968 if (rrd
->num_buf
> 1)
1969 atl1_update_rfd_index(adapter
, rrd
);
1973 if (++rrd_next_to_clean
== rrd_ring
->count
)
1974 rrd_next_to_clean
= 0;
1977 } else { /* current rrd still not be updated */
1982 /* clean alloc flag for bad rrd */
1983 atl1_clean_alloc_flag(adapter
, rrd
, 0);
1985 buffer_info
= &rfd_ring
->buffer_info
[rrd
->buf_indx
];
1986 if (++rfd_ring
->next_to_clean
== rfd_ring
->count
)
1987 rfd_ring
->next_to_clean
= 0;
1989 /* update rrd next to clean */
1990 if (++rrd_next_to_clean
== rrd_ring
->count
)
1991 rrd_next_to_clean
= 0;
1994 if (unlikely(rrd
->pkt_flg
& PACKET_FLAG_ERR
)) {
1995 if (!(rrd
->err_flg
&
1996 (ERR_FLAG_IP_CHKSUM
| ERR_FLAG_L4_CHKSUM
1998 /* packet error, don't need upstream */
1999 buffer_info
->alloced
= 0;
2006 pci_unmap_page(adapter
->pdev
, buffer_info
->dma
,
2007 buffer_info
->length
, PCI_DMA_FROMDEVICE
);
2008 buffer_info
->dma
= 0;
2009 skb
= buffer_info
->skb
;
2010 length
= le16_to_cpu(rrd
->xsz
.xsum_sz
.pkt_size
);
2012 skb_put(skb
, length
- ETH_FCS_LEN
);
2014 /* Receive Checksum Offload */
2015 atl1_rx_checksum(adapter
, rrd
, skb
);
2016 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
2018 if (adapter
->vlgrp
&& (rrd
->pkt_flg
& PACKET_FLAG_VLAN_INS
)) {
2019 u16 vlan_tag
= (rrd
->vlan_tag
>> 4) |
2020 ((rrd
->vlan_tag
& 7) << 13) |
2021 ((rrd
->vlan_tag
& 8) << 9);
2022 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, vlan_tag
);
2026 /* let protocol layer free skb */
2027 buffer_info
->skb
= NULL
;
2028 buffer_info
->alloced
= 0;
2031 adapter
->netdev
->last_rx
= jiffies
;
2034 atomic_set(&rrd_ring
->next_to_clean
, rrd_next_to_clean
);
2036 atl1_alloc_rx_buffers(adapter
);
2038 /* update mailbox ? */
2040 u32 tpd_next_to_use
;
2041 u32 rfd_next_to_use
;
2043 spin_lock(&adapter
->mb_lock
);
2045 tpd_next_to_use
= atomic_read(&adapter
->tpd_ring
.next_to_use
);
2047 atomic_read(&adapter
->rfd_ring
.next_to_use
);
2049 atomic_read(&adapter
->rrd_ring
.next_to_clean
);
2050 value
= ((rfd_next_to_use
& MB_RFD_PROD_INDX_MASK
) <<
2051 MB_RFD_PROD_INDX_SHIFT
) |
2052 ((rrd_next_to_clean
& MB_RRD_CONS_INDX_MASK
) <<
2053 MB_RRD_CONS_INDX_SHIFT
) |
2054 ((tpd_next_to_use
& MB_TPD_PROD_INDX_MASK
) <<
2055 MB_TPD_PROD_INDX_SHIFT
);
2056 iowrite32(value
, adapter
->hw
.hw_addr
+ REG_MAILBOX
);
2057 spin_unlock(&adapter
->mb_lock
);
2061 static void atl1_intr_tx(struct atl1_adapter
*adapter
)
2063 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
2064 struct atl1_buffer
*buffer_info
;
2065 u16 sw_tpd_next_to_clean
;
2066 u16 cmb_tpd_next_to_clean
;
2068 sw_tpd_next_to_clean
= atomic_read(&tpd_ring
->next_to_clean
);
2069 cmb_tpd_next_to_clean
= le16_to_cpu(adapter
->cmb
.cmb
->tpd_cons_idx
);
2071 while (cmb_tpd_next_to_clean
!= sw_tpd_next_to_clean
) {
2072 struct tx_packet_desc
*tpd
;
2074 tpd
= ATL1_TPD_DESC(tpd_ring
, sw_tpd_next_to_clean
);
2075 buffer_info
= &tpd_ring
->buffer_info
[sw_tpd_next_to_clean
];
2076 if (buffer_info
->dma
) {
2077 pci_unmap_page(adapter
->pdev
, buffer_info
->dma
,
2078 buffer_info
->length
, PCI_DMA_TODEVICE
);
2079 buffer_info
->dma
= 0;
2082 if (buffer_info
->skb
) {
2083 dev_kfree_skb_irq(buffer_info
->skb
);
2084 buffer_info
->skb
= NULL
;
2087 if (++sw_tpd_next_to_clean
== tpd_ring
->count
)
2088 sw_tpd_next_to_clean
= 0;
2090 atomic_set(&tpd_ring
->next_to_clean
, sw_tpd_next_to_clean
);
2092 if (netif_queue_stopped(adapter
->netdev
)
2093 && netif_carrier_ok(adapter
->netdev
))
2094 netif_wake_queue(adapter
->netdev
);
2097 static u16
atl1_tpd_avail(struct atl1_tpd_ring
*tpd_ring
)
2099 u16 next_to_clean
= atomic_read(&tpd_ring
->next_to_clean
);
2100 u16 next_to_use
= atomic_read(&tpd_ring
->next_to_use
);
2101 return ((next_to_clean
> next_to_use
) ?
2102 next_to_clean
- next_to_use
- 1 :
2103 tpd_ring
->count
+ next_to_clean
- next_to_use
- 1);
2106 static int atl1_tso(struct atl1_adapter
*adapter
, struct sk_buff
*skb
,
2107 struct tx_packet_desc
*ptpd
)
2114 if (skb_shinfo(skb
)->gso_size
) {
2115 if (skb_header_cloned(skb
)) {
2116 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2121 if (skb
->protocol
== htons(ETH_P_IP
)) {
2122 struct iphdr
*iph
= ip_hdr(skb
);
2124 real_len
= (((unsigned char *)iph
- skb
->data
) +
2125 ntohs(iph
->tot_len
));
2126 if (real_len
< skb
->len
)
2127 pskb_trim(skb
, real_len
);
2128 hdr_len
= (skb_transport_offset(skb
) + tcp_hdrlen(skb
));
2129 if (skb
->len
== hdr_len
) {
2131 tcp_hdr(skb
)->check
=
2132 ~csum_tcpudp_magic(iph
->saddr
,
2133 iph
->daddr
, tcp_hdrlen(skb
),
2135 ptpd
->word3
|= (iph
->ihl
& TPD_IPHL_MASK
) <<
2137 ptpd
->word3
|= ((tcp_hdrlen(skb
) >> 2) &
2138 TPD_TCPHDRLEN_MASK
) <<
2139 TPD_TCPHDRLEN_SHIFT
;
2140 ptpd
->word3
|= 1 << TPD_IP_CSUM_SHIFT
;
2141 ptpd
->word3
|= 1 << TPD_TCP_CSUM_SHIFT
;
2146 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2147 iph
->daddr
, 0, IPPROTO_TCP
, 0);
2148 ip_off
= (unsigned char *)iph
-
2149 (unsigned char *) skb_network_header(skb
);
2150 if (ip_off
== 8) /* 802.3-SNAP frame */
2151 ptpd
->word3
|= 1 << TPD_ETHTYPE_SHIFT
;
2152 else if (ip_off
!= 0)
2155 ptpd
->word3
|= (iph
->ihl
& TPD_IPHL_MASK
) <<
2157 ptpd
->word3
|= ((tcp_hdrlen(skb
) >> 2) &
2158 TPD_TCPHDRLEN_MASK
) << TPD_TCPHDRLEN_SHIFT
;
2159 ptpd
->word3
|= (skb_shinfo(skb
)->gso_size
&
2160 TPD_MSS_MASK
) << TPD_MSS_SHIFT
;
2161 ptpd
->word3
|= 1 << TPD_SEGMENT_EN_SHIFT
;
2168 static int atl1_tx_csum(struct atl1_adapter
*adapter
, struct sk_buff
*skb
,
2169 struct tx_packet_desc
*ptpd
)
2173 if (likely(skb
->ip_summed
== CHECKSUM_PARTIAL
)) {
2174 css
= (u8
) (skb
->csum_start
- skb_headroom(skb
));
2175 cso
= css
+ (u8
) skb
->csum_offset
;
2176 if (unlikely(css
& 0x1)) {
2177 /* L1 hardware requires an even number here */
2178 if (netif_msg_tx_err(adapter
))
2179 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2180 "payload offset not an even number\n");
2183 ptpd
->word3
|= (css
& TPD_PLOADOFFSET_MASK
) <<
2184 TPD_PLOADOFFSET_SHIFT
;
2185 ptpd
->word3
|= (cso
& TPD_CCSUMOFFSET_MASK
) <<
2186 TPD_CCSUMOFFSET_SHIFT
;
2187 ptpd
->word3
|= 1 << TPD_CUST_CSUM_EN_SHIFT
;
2193 static void atl1_tx_map(struct atl1_adapter
*adapter
, struct sk_buff
*skb
,
2194 struct tx_packet_desc
*ptpd
)
2197 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
2198 struct atl1_buffer
*buffer_info
;
2199 u16 buf_len
= skb
->len
;
2201 unsigned long offset
;
2202 unsigned int nr_frags
;
2209 buf_len
-= skb
->data_len
;
2210 nr_frags
= skb_shinfo(skb
)->nr_frags
;
2211 next_to_use
= atomic_read(&tpd_ring
->next_to_use
);
2212 buffer_info
= &tpd_ring
->buffer_info
[next_to_use
];
2213 if (unlikely(buffer_info
->skb
))
2215 /* put skb in last TPD */
2216 buffer_info
->skb
= NULL
;
2218 retval
= (ptpd
->word3
>> TPD_SEGMENT_EN_SHIFT
) & TPD_SEGMENT_EN_MASK
;
2221 hdr_len
= skb_transport_offset(skb
) + tcp_hdrlen(skb
);
2222 buffer_info
->length
= hdr_len
;
2223 page
= virt_to_page(skb
->data
);
2224 offset
= (unsigned long)skb
->data
& ~PAGE_MASK
;
2225 buffer_info
->dma
= pci_map_page(adapter
->pdev
, page
,
2229 if (++next_to_use
== tpd_ring
->count
)
2232 if (buf_len
> hdr_len
) {
2235 data_len
= buf_len
- hdr_len
;
2236 nseg
= (data_len
+ ATL1_MAX_TX_BUF_LEN
- 1) /
2237 ATL1_MAX_TX_BUF_LEN
;
2238 for (i
= 0; i
< nseg
; i
++) {
2240 &tpd_ring
->buffer_info
[next_to_use
];
2241 buffer_info
->skb
= NULL
;
2242 buffer_info
->length
=
2243 (ATL1_MAX_TX_BUF_LEN
>=
2244 data_len
) ? ATL1_MAX_TX_BUF_LEN
: data_len
;
2245 data_len
-= buffer_info
->length
;
2246 page
= virt_to_page(skb
->data
+
2247 (hdr_len
+ i
* ATL1_MAX_TX_BUF_LEN
));
2248 offset
= (unsigned long)(skb
->data
+
2249 (hdr_len
+ i
* ATL1_MAX_TX_BUF_LEN
)) &
2251 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
2252 page
, offset
, buffer_info
->length
,
2254 if (++next_to_use
== tpd_ring
->count
)
2260 buffer_info
->length
= buf_len
;
2261 page
= virt_to_page(skb
->data
);
2262 offset
= (unsigned long)skb
->data
& ~PAGE_MASK
;
2263 buffer_info
->dma
= pci_map_page(adapter
->pdev
, page
,
2264 offset
, buf_len
, PCI_DMA_TODEVICE
);
2265 if (++next_to_use
== tpd_ring
->count
)
2269 for (f
= 0; f
< nr_frags
; f
++) {
2270 struct skb_frag_struct
*frag
;
2273 frag
= &skb_shinfo(skb
)->frags
[f
];
2274 buf_len
= frag
->size
;
2276 nseg
= (buf_len
+ ATL1_MAX_TX_BUF_LEN
- 1) /
2277 ATL1_MAX_TX_BUF_LEN
;
2278 for (i
= 0; i
< nseg
; i
++) {
2279 buffer_info
= &tpd_ring
->buffer_info
[next_to_use
];
2280 if (unlikely(buffer_info
->skb
))
2282 buffer_info
->skb
= NULL
;
2283 buffer_info
->length
= (buf_len
> ATL1_MAX_TX_BUF_LEN
) ?
2284 ATL1_MAX_TX_BUF_LEN
: buf_len
;
2285 buf_len
-= buffer_info
->length
;
2286 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
2288 frag
->page_offset
+ (i
* ATL1_MAX_TX_BUF_LEN
),
2289 buffer_info
->length
, PCI_DMA_TODEVICE
);
2291 if (++next_to_use
== tpd_ring
->count
)
2296 /* last tpd's buffer-info */
2297 buffer_info
->skb
= skb
;
2300 static void atl1_tx_queue(struct atl1_adapter
*adapter
, u16 count
,
2301 struct tx_packet_desc
*ptpd
)
2304 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
2305 struct atl1_buffer
*buffer_info
;
2306 struct tx_packet_desc
*tpd
;
2309 u16 next_to_use
= (u16
) atomic_read(&tpd_ring
->next_to_use
);
2311 for (j
= 0; j
< count
; j
++) {
2312 buffer_info
= &tpd_ring
->buffer_info
[next_to_use
];
2313 tpd
= ATL1_TPD_DESC(&adapter
->tpd_ring
, next_to_use
);
2315 memcpy(tpd
, ptpd
, sizeof(struct tx_packet_desc
));
2316 tpd
->buffer_addr
= cpu_to_le64(buffer_info
->dma
);
2317 tpd
->word2
= (cpu_to_le16(buffer_info
->length
) &
2318 TPD_BUFLEN_MASK
) << TPD_BUFLEN_SHIFT
;
2321 * if this is the first packet in a TSO chain, set
2322 * TPD_HDRFLAG, otherwise, clear it.
2324 val
= (tpd
->word3
>> TPD_SEGMENT_EN_SHIFT
) &
2325 TPD_SEGMENT_EN_MASK
;
2328 tpd
->word3
|= 1 << TPD_HDRFLAG_SHIFT
;
2330 tpd
->word3
&= ~(1 << TPD_HDRFLAG_SHIFT
);
2333 if (j
== (count
- 1))
2334 tpd
->word3
|= 1 << TPD_EOP_SHIFT
;
2336 if (++next_to_use
== tpd_ring
->count
)
2340 * Force memory writes to complete before letting h/w
2341 * know there are new descriptors to fetch. (Only
2342 * applicable for weak-ordered memory model archs,
2347 atomic_set(&tpd_ring
->next_to_use
, next_to_use
);
2350 static int atl1_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
2352 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2353 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
2358 struct tx_packet_desc
*ptpd
;
2361 unsigned long flags
;
2362 unsigned int nr_frags
= 0;
2363 unsigned int mss
= 0;
2365 unsigned int proto_hdr_len
;
2367 len
-= skb
->data_len
;
2369 if (unlikely(skb
->len
<= 0)) {
2370 dev_kfree_skb_any(skb
);
2371 return NETDEV_TX_OK
;
2374 nr_frags
= skb_shinfo(skb
)->nr_frags
;
2375 for (f
= 0; f
< nr_frags
; f
++) {
2376 frag_size
= skb_shinfo(skb
)->frags
[f
].size
;
2378 count
+= (frag_size
+ ATL1_MAX_TX_BUF_LEN
- 1) /
2379 ATL1_MAX_TX_BUF_LEN
;
2382 mss
= skb_shinfo(skb
)->gso_size
;
2384 if (skb
->protocol
== ntohs(ETH_P_IP
)) {
2385 proto_hdr_len
= (skb_transport_offset(skb
) +
2387 if (unlikely(proto_hdr_len
> len
)) {
2388 dev_kfree_skb_any(skb
);
2389 return NETDEV_TX_OK
;
2391 /* need additional TPD ? */
2392 if (proto_hdr_len
!= len
)
2393 count
+= (len
- proto_hdr_len
+
2394 ATL1_MAX_TX_BUF_LEN
- 1) /
2395 ATL1_MAX_TX_BUF_LEN
;
2399 if (!spin_trylock_irqsave(&adapter
->lock
, flags
)) {
2400 /* Can't get lock - tell upper layer to requeue */
2401 if (netif_msg_tx_queued(adapter
))
2402 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2404 return NETDEV_TX_LOCKED
;
2407 if (atl1_tpd_avail(&adapter
->tpd_ring
) < count
) {
2408 /* not enough descriptors */
2409 netif_stop_queue(netdev
);
2410 spin_unlock_irqrestore(&adapter
->lock
, flags
);
2411 if (netif_msg_tx_queued(adapter
))
2412 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2414 return NETDEV_TX_BUSY
;
2417 ptpd
= ATL1_TPD_DESC(tpd_ring
,
2418 (u16
) atomic_read(&tpd_ring
->next_to_use
));
2419 memset(ptpd
, 0, sizeof(struct tx_packet_desc
));
2421 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
2422 vlan_tag
= vlan_tx_tag_get(skb
);
2423 vlan_tag
= (vlan_tag
<< 4) | (vlan_tag
>> 13) |
2424 ((vlan_tag
>> 9) & 0x8);
2425 ptpd
->word3
|= 1 << TPD_INS_VL_TAG_SHIFT
;
2426 ptpd
->word3
|= (vlan_tag
& TPD_VL_TAGGED_MASK
) <<
2427 TPD_VL_TAGGED_SHIFT
;
2430 tso
= atl1_tso(adapter
, skb
, ptpd
);
2432 spin_unlock_irqrestore(&adapter
->lock
, flags
);
2433 dev_kfree_skb_any(skb
);
2434 return NETDEV_TX_OK
;
2438 ret_val
= atl1_tx_csum(adapter
, skb
, ptpd
);
2440 spin_unlock_irqrestore(&adapter
->lock
, flags
);
2441 dev_kfree_skb_any(skb
);
2442 return NETDEV_TX_OK
;
2446 atl1_tx_map(adapter
, skb
, ptpd
);
2447 atl1_tx_queue(adapter
, count
, ptpd
);
2448 atl1_update_mailbox(adapter
);
2449 spin_unlock_irqrestore(&adapter
->lock
, flags
);
2450 netdev
->trans_start
= jiffies
;
2451 return NETDEV_TX_OK
;
2455 * atl1_intr - Interrupt Handler
2456 * @irq: interrupt number
2457 * @data: pointer to a network interface device structure
2458 * @pt_regs: CPU registers structure
2460 static irqreturn_t
atl1_intr(int irq
, void *data
)
2462 struct atl1_adapter
*adapter
= netdev_priv(data
);
2466 status
= adapter
->cmb
.cmb
->int_stats
;
2471 /* clear CMB interrupt status at once */
2472 adapter
->cmb
.cmb
->int_stats
= 0;
2474 if (status
& ISR_GPHY
) /* clear phy status */
2475 atlx_clear_phy_int(adapter
);
2477 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
2478 iowrite32(status
| ISR_DIS_INT
, adapter
->hw
.hw_addr
+ REG_ISR
);
2480 /* check if SMB intr */
2481 if (status
& ISR_SMB
)
2482 atl1_inc_smb(adapter
);
2484 /* check if PCIE PHY Link down */
2485 if (status
& ISR_PHY_LINKDOWN
) {
2486 if (netif_msg_intr(adapter
))
2487 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2488 "pcie phy link down %x\n", status
);
2489 if (netif_running(adapter
->netdev
)) { /* reset MAC */
2490 iowrite32(0, adapter
->hw
.hw_addr
+ REG_IMR
);
2491 schedule_work(&adapter
->pcie_dma_to_rst_task
);
2496 /* check if DMA read/write error ? */
2497 if (status
& (ISR_DMAR_TO_RST
| ISR_DMAW_TO_RST
)) {
2498 if (netif_msg_intr(adapter
))
2499 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2500 "pcie DMA r/w error (status = 0x%x)\n",
2502 iowrite32(0, adapter
->hw
.hw_addr
+ REG_IMR
);
2503 schedule_work(&adapter
->pcie_dma_to_rst_task
);
2508 if (status
& ISR_GPHY
) {
2509 adapter
->soft_stats
.tx_carrier_errors
++;
2510 atl1_check_for_link(adapter
);
2513 /* transmit event */
2514 if (status
& ISR_CMB_TX
)
2515 atl1_intr_tx(adapter
);
2518 if (unlikely(status
& (ISR_RXF_OV
| ISR_RFD_UNRUN
|
2519 ISR_RRD_OV
| ISR_HOST_RFD_UNRUN
|
2520 ISR_HOST_RRD_OV
| ISR_CMB_RX
))) {
2521 if (status
& (ISR_RXF_OV
| ISR_RFD_UNRUN
|
2522 ISR_RRD_OV
| ISR_HOST_RFD_UNRUN
|
2524 if (netif_msg_intr(adapter
))
2525 dev_printk(KERN_DEBUG
,
2526 &adapter
->pdev
->dev
,
2527 "rx exception, ISR = 0x%x\n",
2529 atl1_intr_rx(adapter
);
2535 } while ((status
= adapter
->cmb
.cmb
->int_stats
));
2537 /* re-enable Interrupt */
2538 iowrite32(ISR_DIS_SMB
| ISR_DIS_DMA
, adapter
->hw
.hw_addr
+ REG_ISR
);
2543 * atl1_watchdog - Timer Call-back
2544 * @data: pointer to netdev cast into an unsigned long
2546 static void atl1_watchdog(unsigned long data
)
2548 struct atl1_adapter
*adapter
= (struct atl1_adapter
*)data
;
2550 /* Reset the timer */
2551 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 2 * HZ
);
2555 * atl1_phy_config - Timer Call-back
2556 * @data: pointer to netdev cast into an unsigned long
2558 static void atl1_phy_config(unsigned long data
)
2560 struct atl1_adapter
*adapter
= (struct atl1_adapter
*)data
;
2561 struct atl1_hw
*hw
= &adapter
->hw
;
2562 unsigned long flags
;
2564 spin_lock_irqsave(&adapter
->lock
, flags
);
2565 adapter
->phy_timer_pending
= false;
2566 atl1_write_phy_reg(hw
, MII_ADVERTISE
, hw
->mii_autoneg_adv_reg
);
2567 atl1_write_phy_reg(hw
, MII_ATLX_CR
, hw
->mii_1000t_ctrl_reg
);
2568 atl1_write_phy_reg(hw
, MII_BMCR
, MII_CR_RESET
| MII_CR_AUTO_NEG_EN
);
2569 spin_unlock_irqrestore(&adapter
->lock
, flags
);
2573 * Orphaned vendor comment left intact here:
2575 * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2576 * will assert. We do soft reset <0x1400=1> according
2577 * with the SPEC. BUT, it seemes that PCIE or DMA
2578 * state-machine will not be reset. DMAR_TO_INT will
2579 * assert again and again.
2583 static int atl1_reset(struct atl1_adapter
*adapter
)
2586 ret
= atl1_reset_hw(&adapter
->hw
);
2589 return atl1_init_hw(&adapter
->hw
);
2592 static s32
atl1_up(struct atl1_adapter
*adapter
)
2594 struct net_device
*netdev
= adapter
->netdev
;
2596 int irq_flags
= IRQF_SAMPLE_RANDOM
;
2598 /* hardware has been reset, we need to reload some things */
2599 atlx_set_multi(netdev
);
2600 atl1_init_ring_ptrs(adapter
);
2601 atlx_restore_vlan(adapter
);
2602 err
= atl1_alloc_rx_buffers(adapter
);
2604 /* no RX BUFFER allocated */
2607 if (unlikely(atl1_configure(adapter
))) {
2612 err
= pci_enable_msi(adapter
->pdev
);
2614 if (netif_msg_ifup(adapter
))
2615 dev_info(&adapter
->pdev
->dev
,
2616 "Unable to enable MSI: %d\n", err
);
2617 irq_flags
|= IRQF_SHARED
;
2620 err
= request_irq(adapter
->pdev
->irq
, &atl1_intr
, irq_flags
,
2621 netdev
->name
, netdev
);
2625 mod_timer(&adapter
->watchdog_timer
, jiffies
);
2626 atlx_irq_enable(adapter
);
2627 atl1_check_link(adapter
);
2628 netif_start_queue(netdev
);
2632 pci_disable_msi(adapter
->pdev
);
2633 /* free rx_buffers */
2634 atl1_clean_rx_ring(adapter
);
2638 static void atl1_down(struct atl1_adapter
*adapter
)
2640 struct net_device
*netdev
= adapter
->netdev
;
2642 del_timer_sync(&adapter
->watchdog_timer
);
2643 del_timer_sync(&adapter
->phy_config_timer
);
2644 adapter
->phy_timer_pending
= false;
2646 atlx_irq_disable(adapter
);
2647 free_irq(adapter
->pdev
->irq
, netdev
);
2648 pci_disable_msi(adapter
->pdev
);
2649 atl1_reset_hw(&adapter
->hw
);
2650 adapter
->cmb
.cmb
->int_stats
= 0;
2652 adapter
->link_speed
= SPEED_0
;
2653 adapter
->link_duplex
= -1;
2654 netif_carrier_off(netdev
);
2655 netif_stop_queue(netdev
);
2657 atl1_clean_tx_ring(adapter
);
2658 atl1_clean_rx_ring(adapter
);
2661 static void atl1_tx_timeout_task(struct work_struct
*work
)
2663 struct atl1_adapter
*adapter
=
2664 container_of(work
, struct atl1_adapter
, tx_timeout_task
);
2665 struct net_device
*netdev
= adapter
->netdev
;
2667 netif_device_detach(netdev
);
2670 netif_device_attach(netdev
);
2674 * atl1_change_mtu - Change the Maximum Transfer Unit
2675 * @netdev: network interface device structure
2676 * @new_mtu: new value for maximum frame size
2678 * Returns 0 on success, negative on failure
2680 static int atl1_change_mtu(struct net_device
*netdev
, int new_mtu
)
2682 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2683 int old_mtu
= netdev
->mtu
;
2684 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
2686 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
2687 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
2688 if (netif_msg_link(adapter
))
2689 dev_warn(&adapter
->pdev
->dev
, "invalid MTU setting\n");
2693 adapter
->hw
.max_frame_size
= max_frame
;
2694 adapter
->hw
.tx_jumbo_task_th
= (max_frame
+ 7) >> 3;
2695 adapter
->rx_buffer_len
= (max_frame
+ 7) & ~7;
2696 adapter
->hw
.rx_jumbo_th
= adapter
->rx_buffer_len
/ 8;
2698 netdev
->mtu
= new_mtu
;
2699 if ((old_mtu
!= new_mtu
) && netif_running(netdev
)) {
2708 * atl1_open - Called when a network interface is made active
2709 * @netdev: network interface device structure
2711 * Returns 0 on success, negative value on failure
2713 * The open entry point is called when a network interface is made
2714 * active by the system (IFF_UP). At this point all resources needed
2715 * for transmit and receive operations are allocated, the interrupt
2716 * handler is registered with the OS, the watchdog timer is started,
2717 * and the stack is notified that the interface is ready.
2719 static int atl1_open(struct net_device
*netdev
)
2721 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2724 /* allocate transmit descriptors */
2725 err
= atl1_setup_ring_resources(adapter
);
2729 err
= atl1_up(adapter
);
2736 atl1_reset(adapter
);
2741 * atl1_close - Disables a network interface
2742 * @netdev: network interface device structure
2744 * Returns 0, this is not allowed to fail
2746 * The close entry point is called when an interface is de-activated
2747 * by the OS. The hardware is still under the drivers control, but
2748 * needs to be disabled. A global MAC reset is issued to stop the
2749 * hardware, and all transmit and receive resources are freed.
2751 static int atl1_close(struct net_device
*netdev
)
2753 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2755 atl1_free_ring_resources(adapter
);
2760 static int atl1_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2762 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2763 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2764 struct atl1_hw
*hw
= &adapter
->hw
;
2766 u32 wufc
= adapter
->wol
;
2772 netif_device_detach(netdev
);
2773 if (netif_running(netdev
))
2776 retval
= pci_save_state(pdev
);
2780 atl1_read_phy_reg(hw
, MII_BMSR
, (u16
*) & ctrl
);
2781 atl1_read_phy_reg(hw
, MII_BMSR
, (u16
*) & ctrl
);
2782 val
= ctrl
& BMSR_LSTATUS
;
2784 wufc
&= ~ATLX_WUFC_LNKC
;
2787 val
= atl1_get_speed_and_duplex(hw
, &speed
, &duplex
);
2789 if (netif_msg_ifdown(adapter
))
2790 dev_printk(KERN_DEBUG
, &pdev
->dev
,
2791 "error getting speed/duplex\n");
2797 /* enable magic packet WOL */
2798 if (wufc
& ATLX_WUFC_MAG
)
2799 ctrl
|= (WOL_MAGIC_EN
| WOL_MAGIC_PME_EN
);
2800 iowrite32(ctrl
, hw
->hw_addr
+ REG_WOL_CTRL
);
2801 ioread32(hw
->hw_addr
+ REG_WOL_CTRL
);
2803 /* configure the mac */
2804 ctrl
= MAC_CTRL_RX_EN
;
2805 ctrl
|= ((u32
)((speed
== SPEED_1000
) ? MAC_CTRL_SPEED_1000
:
2806 MAC_CTRL_SPEED_10_100
) << MAC_CTRL_SPEED_SHIFT
);
2807 if (duplex
== FULL_DUPLEX
)
2808 ctrl
|= MAC_CTRL_DUPLX
;
2809 ctrl
|= (((u32
)adapter
->hw
.preamble_len
&
2810 MAC_CTRL_PRMLEN_MASK
) << MAC_CTRL_PRMLEN_SHIFT
);
2812 ctrl
|= MAC_CTRL_RMV_VLAN
;
2813 if (wufc
& ATLX_WUFC_MAG
)
2814 ctrl
|= MAC_CTRL_BC_EN
;
2815 iowrite32(ctrl
, hw
->hw_addr
+ REG_MAC_CTRL
);
2816 ioread32(hw
->hw_addr
+ REG_MAC_CTRL
);
2819 ctrl
= ioread32(hw
->hw_addr
+ REG_PCIE_PHYMISC
);
2820 ctrl
|= PCIE_PHYMISC_FORCE_RCV_DET
;
2821 iowrite32(ctrl
, hw
->hw_addr
+ REG_PCIE_PHYMISC
);
2822 ioread32(hw
->hw_addr
+ REG_PCIE_PHYMISC
);
2824 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 1);
2829 ctrl
|= (WOL_LINK_CHG_EN
| WOL_LINK_CHG_PME_EN
);
2830 iowrite32(ctrl
, hw
->hw_addr
+ REG_WOL_CTRL
);
2831 ioread32(hw
->hw_addr
+ REG_WOL_CTRL
);
2832 iowrite32(0, hw
->hw_addr
+ REG_MAC_CTRL
);
2833 ioread32(hw
->hw_addr
+ REG_MAC_CTRL
);
2834 hw
->phy_configured
= false;
2835 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 1);
2840 iowrite32(0, hw
->hw_addr
+ REG_WOL_CTRL
);
2841 ioread32(hw
->hw_addr
+ REG_WOL_CTRL
);
2842 ctrl
= ioread32(hw
->hw_addr
+ REG_PCIE_PHYMISC
);
2843 ctrl
|= PCIE_PHYMISC_FORCE_RCV_DET
;
2844 iowrite32(ctrl
, hw
->hw_addr
+ REG_PCIE_PHYMISC
);
2845 ioread32(hw
->hw_addr
+ REG_PCIE_PHYMISC
);
2846 hw
->phy_configured
= false;
2847 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 0);
2849 if (netif_running(netdev
))
2850 pci_disable_msi(adapter
->pdev
);
2851 pci_disable_device(pdev
);
2852 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2857 static int atl1_resume(struct pci_dev
*pdev
)
2859 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2860 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2863 pci_set_power_state(pdev
, PCI_D0
);
2864 pci_restore_state(pdev
);
2866 err
= pci_enable_device(pdev
);
2868 if (netif_msg_ifup(adapter
))
2869 dev_printk(KERN_DEBUG
, &pdev
->dev
,
2870 "error enabling pci device\n");
2874 pci_set_master(pdev
);
2875 iowrite32(0, adapter
->hw
.hw_addr
+ REG_WOL_CTRL
);
2876 pci_enable_wake(pdev
, PCI_D3hot
, 0);
2877 pci_enable_wake(pdev
, PCI_D3cold
, 0);
2879 atl1_reset_hw(&adapter
->hw
);
2880 adapter
->cmb
.cmb
->int_stats
= 0;
2882 if (netif_running(netdev
))
2884 netif_device_attach(netdev
);
2889 #define atl1_suspend NULL
2890 #define atl1_resume NULL
2893 static void atl1_shutdown(struct pci_dev
*pdev
)
2896 atl1_suspend(pdev
, PMSG_SUSPEND
);
2900 #ifdef CONFIG_NET_POLL_CONTROLLER
2901 static void atl1_poll_controller(struct net_device
*netdev
)
2903 disable_irq(netdev
->irq
);
2904 atl1_intr(netdev
->irq
, netdev
);
2905 enable_irq(netdev
->irq
);
2910 * atl1_probe - Device Initialization Routine
2911 * @pdev: PCI device information struct
2912 * @ent: entry in atl1_pci_tbl
2914 * Returns 0 on success, negative on failure
2916 * atl1_probe initializes an adapter identified by a pci_dev structure.
2917 * The OS initialization, configuring of the adapter private structure,
2918 * and a hardware reset occur.
2920 static int __devinit
atl1_probe(struct pci_dev
*pdev
,
2921 const struct pci_device_id
*ent
)
2923 struct net_device
*netdev
;
2924 struct atl1_adapter
*adapter
;
2925 static int cards_found
= 0;
2928 err
= pci_enable_device(pdev
);
2933 * The atl1 chip can DMA to 64-bit addresses, but it uses a single
2934 * shared register for the high 32 bits, so only a single, aligned,
2935 * 4 GB physical address range can be used at a time.
2937 * Supporting 64-bit DMA on this hardware is more trouble than it's
2938 * worth. It is far easier to limit to 32-bit DMA than update
2939 * various kernel subsystems to support the mechanics required by a
2940 * fixed-high-32-bit system.
2942 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
2944 dev_err(&pdev
->dev
, "no usable DMA configuration\n");
2948 * Mark all PCI regions associated with PCI device
2949 * pdev as being reserved by owner atl1_driver_name
2951 err
= pci_request_regions(pdev
, ATLX_DRIVER_NAME
);
2953 goto err_request_regions
;
2956 * Enables bus-mastering on the device and calls
2957 * pcibios_set_master to do the needed arch specific settings
2959 pci_set_master(pdev
);
2961 netdev
= alloc_etherdev(sizeof(struct atl1_adapter
));
2964 goto err_alloc_etherdev
;
2966 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2968 pci_set_drvdata(pdev
, netdev
);
2969 adapter
= netdev_priv(netdev
);
2970 adapter
->netdev
= netdev
;
2971 adapter
->pdev
= pdev
;
2972 adapter
->hw
.back
= adapter
;
2973 adapter
->msg_enable
= netif_msg_init(debug
, atl1_default_msg
);
2975 adapter
->hw
.hw_addr
= pci_iomap(pdev
, 0, 0);
2976 if (!adapter
->hw
.hw_addr
) {
2980 /* get device revision number */
2981 adapter
->hw
.dev_rev
= ioread16(adapter
->hw
.hw_addr
+
2982 (REG_MASTER_CTRL
+ 2));
2983 if (netif_msg_probe(adapter
))
2984 dev_info(&pdev
->dev
, "version %s\n", ATLX_DRIVER_VERSION
);
2986 /* set default ring resource counts */
2987 adapter
->rfd_ring
.count
= adapter
->rrd_ring
.count
= ATL1_DEFAULT_RFD
;
2988 adapter
->tpd_ring
.count
= ATL1_DEFAULT_TPD
;
2990 adapter
->mii
.dev
= netdev
;
2991 adapter
->mii
.mdio_read
= mdio_read
;
2992 adapter
->mii
.mdio_write
= mdio_write
;
2993 adapter
->mii
.phy_id_mask
= 0x1f;
2994 adapter
->mii
.reg_num_mask
= 0x1f;
2996 netdev
->open
= &atl1_open
;
2997 netdev
->stop
= &atl1_close
;
2998 netdev
->hard_start_xmit
= &atl1_xmit_frame
;
2999 netdev
->get_stats
= &atlx_get_stats
;
3000 netdev
->set_multicast_list
= &atlx_set_multi
;
3001 netdev
->set_mac_address
= &atl1_set_mac
;
3002 netdev
->change_mtu
= &atl1_change_mtu
;
3003 netdev
->do_ioctl
= &atlx_ioctl
;
3004 netdev
->tx_timeout
= &atlx_tx_timeout
;
3005 netdev
->watchdog_timeo
= 5 * HZ
;
3006 #ifdef CONFIG_NET_POLL_CONTROLLER
3007 netdev
->poll_controller
= atl1_poll_controller
;
3009 netdev
->vlan_rx_register
= atlx_vlan_rx_register
;
3011 netdev
->ethtool_ops
= &atl1_ethtool_ops
;
3012 adapter
->bd_number
= cards_found
;
3014 /* setup the private structure */
3015 err
= atl1_sw_init(adapter
);
3019 netdev
->features
= NETIF_F_HW_CSUM
;
3020 netdev
->features
|= NETIF_F_SG
;
3021 netdev
->features
|= (NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX
);
3022 netdev
->features
|= NETIF_F_TSO
;
3023 netdev
->features
|= NETIF_F_LLTX
;
3026 * patch for some L1 of old version,
3027 * the final version of L1 may not need these
3030 /* atl1_pcie_patch(adapter); */
3032 /* really reset GPHY core */
3033 iowrite16(0, adapter
->hw
.hw_addr
+ REG_PHY_ENABLE
);
3036 * reset the controller to
3037 * put the device in a known good starting state
3039 if (atl1_reset_hw(&adapter
->hw
)) {
3044 /* copy the MAC address out of the EEPROM */
3045 atl1_read_mac_addr(&adapter
->hw
);
3046 memcpy(netdev
->dev_addr
, adapter
->hw
.mac_addr
, netdev
->addr_len
);
3048 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
3053 atl1_check_options(adapter
);
3055 /* pre-init the MAC, and setup link */
3056 err
= atl1_init_hw(&adapter
->hw
);
3062 atl1_pcie_patch(adapter
);
3063 /* assume we have no link for now */
3064 netif_carrier_off(netdev
);
3065 netif_stop_queue(netdev
);
3067 init_timer(&adapter
->watchdog_timer
);
3068 adapter
->watchdog_timer
.function
= &atl1_watchdog
;
3069 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
3071 init_timer(&adapter
->phy_config_timer
);
3072 adapter
->phy_config_timer
.function
= &atl1_phy_config
;
3073 adapter
->phy_config_timer
.data
= (unsigned long)adapter
;
3074 adapter
->phy_timer_pending
= false;
3076 INIT_WORK(&adapter
->tx_timeout_task
, atl1_tx_timeout_task
);
3078 INIT_WORK(&adapter
->link_chg_task
, atlx_link_chg_task
);
3080 INIT_WORK(&adapter
->pcie_dma_to_rst_task
, atl1_tx_timeout_task
);
3082 err
= register_netdev(netdev
);
3087 atl1_via_workaround(adapter
);
3091 pci_iounmap(pdev
, adapter
->hw
.hw_addr
);
3093 free_netdev(netdev
);
3095 pci_release_regions(pdev
);
3097 err_request_regions
:
3098 pci_disable_device(pdev
);
3103 * atl1_remove - Device Removal Routine
3104 * @pdev: PCI device information struct
3106 * atl1_remove is called by the PCI subsystem to alert the driver
3107 * that it should release a PCI device. The could be caused by a
3108 * Hot-Plug event, or because the driver is going to be removed from
3111 static void __devexit
atl1_remove(struct pci_dev
*pdev
)
3113 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3114 struct atl1_adapter
*adapter
;
3115 /* Device not available. Return. */
3119 adapter
= netdev_priv(netdev
);
3122 * Some atl1 boards lack persistent storage for their MAC, and get it
3123 * from the BIOS during POST. If we've been messing with the MAC
3124 * address, we need to save the permanent one.
3126 if (memcmp(adapter
->hw
.mac_addr
, adapter
->hw
.perm_mac_addr
, ETH_ALEN
)) {
3127 memcpy(adapter
->hw
.mac_addr
, adapter
->hw
.perm_mac_addr
,
3129 atl1_set_mac_addr(&adapter
->hw
);
3132 iowrite16(0, adapter
->hw
.hw_addr
+ REG_PHY_ENABLE
);
3133 unregister_netdev(netdev
);
3134 pci_iounmap(pdev
, adapter
->hw
.hw_addr
);
3135 pci_release_regions(pdev
);
3136 free_netdev(netdev
);
3137 pci_disable_device(pdev
);
3140 static struct pci_driver atl1_driver
= {
3141 .name
= ATLX_DRIVER_NAME
,
3142 .id_table
= atl1_pci_tbl
,
3143 .probe
= atl1_probe
,
3144 .remove
= __devexit_p(atl1_remove
),
3145 .suspend
= atl1_suspend
,
3146 .resume
= atl1_resume
,
3147 .shutdown
= atl1_shutdown
3151 * atl1_exit_module - Driver Exit Cleanup Routine
3153 * atl1_exit_module is called just before the driver is removed
3156 static void __exit
atl1_exit_module(void)
3158 pci_unregister_driver(&atl1_driver
);
3162 * atl1_init_module - Driver Registration Routine
3164 * atl1_init_module is the first routine called when the driver is
3165 * loaded. All it does is register with the PCI subsystem.
3167 static int __init
atl1_init_module(void)
3169 return pci_register_driver(&atl1_driver
);
3172 module_init(atl1_init_module
);
3173 module_exit(atl1_exit_module
);
3176 char stat_string
[ETH_GSTRING_LEN
];
3181 #define ATL1_STAT(m) \
3182 sizeof(((struct atl1_adapter *)0)->m), offsetof(struct atl1_adapter, m)
3184 static struct atl1_stats atl1_gstrings_stats
[] = {
3185 {"rx_packets", ATL1_STAT(soft_stats
.rx_packets
)},
3186 {"tx_packets", ATL1_STAT(soft_stats
.tx_packets
)},
3187 {"rx_bytes", ATL1_STAT(soft_stats
.rx_bytes
)},
3188 {"tx_bytes", ATL1_STAT(soft_stats
.tx_bytes
)},
3189 {"rx_errors", ATL1_STAT(soft_stats
.rx_errors
)},
3190 {"tx_errors", ATL1_STAT(soft_stats
.tx_errors
)},
3191 {"rx_dropped", ATL1_STAT(net_stats
.rx_dropped
)},
3192 {"tx_dropped", ATL1_STAT(net_stats
.tx_dropped
)},
3193 {"multicast", ATL1_STAT(soft_stats
.multicast
)},
3194 {"collisions", ATL1_STAT(soft_stats
.collisions
)},
3195 {"rx_length_errors", ATL1_STAT(soft_stats
.rx_length_errors
)},
3196 {"rx_over_errors", ATL1_STAT(soft_stats
.rx_missed_errors
)},
3197 {"rx_crc_errors", ATL1_STAT(soft_stats
.rx_crc_errors
)},
3198 {"rx_frame_errors", ATL1_STAT(soft_stats
.rx_frame_errors
)},
3199 {"rx_fifo_errors", ATL1_STAT(soft_stats
.rx_fifo_errors
)},
3200 {"rx_missed_errors", ATL1_STAT(soft_stats
.rx_missed_errors
)},
3201 {"tx_aborted_errors", ATL1_STAT(soft_stats
.tx_aborted_errors
)},
3202 {"tx_carrier_errors", ATL1_STAT(soft_stats
.tx_carrier_errors
)},
3203 {"tx_fifo_errors", ATL1_STAT(soft_stats
.tx_fifo_errors
)},
3204 {"tx_window_errors", ATL1_STAT(soft_stats
.tx_window_errors
)},
3205 {"tx_abort_exce_coll", ATL1_STAT(soft_stats
.excecol
)},
3206 {"tx_abort_late_coll", ATL1_STAT(soft_stats
.latecol
)},
3207 {"tx_deferred_ok", ATL1_STAT(soft_stats
.deffer
)},
3208 {"tx_single_coll_ok", ATL1_STAT(soft_stats
.scc
)},
3209 {"tx_multi_coll_ok", ATL1_STAT(soft_stats
.mcc
)},
3210 {"tx_underun", ATL1_STAT(soft_stats
.tx_underun
)},
3211 {"tx_trunc", ATL1_STAT(soft_stats
.tx_trunc
)},
3212 {"tx_pause", ATL1_STAT(soft_stats
.tx_pause
)},
3213 {"rx_pause", ATL1_STAT(soft_stats
.rx_pause
)},
3214 {"rx_rrd_ov", ATL1_STAT(soft_stats
.rx_rrd_ov
)},
3215 {"rx_trunc", ATL1_STAT(soft_stats
.rx_trunc
)}
3218 static void atl1_get_ethtool_stats(struct net_device
*netdev
,
3219 struct ethtool_stats
*stats
, u64
*data
)
3221 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3225 for (i
= 0; i
< ARRAY_SIZE(atl1_gstrings_stats
); i
++) {
3226 p
= (char *)adapter
+atl1_gstrings_stats
[i
].stat_offset
;
3227 data
[i
] = (atl1_gstrings_stats
[i
].sizeof_stat
==
3228 sizeof(u64
)) ? *(u64
*)p
: *(u32
*)p
;
3233 static int atl1_get_sset_count(struct net_device
*netdev
, int sset
)
3237 return ARRAY_SIZE(atl1_gstrings_stats
);
3243 static int atl1_get_settings(struct net_device
*netdev
,
3244 struct ethtool_cmd
*ecmd
)
3246 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3247 struct atl1_hw
*hw
= &adapter
->hw
;
3249 ecmd
->supported
= (SUPPORTED_10baseT_Half
|
3250 SUPPORTED_10baseT_Full
|
3251 SUPPORTED_100baseT_Half
|
3252 SUPPORTED_100baseT_Full
|
3253 SUPPORTED_1000baseT_Full
|
3254 SUPPORTED_Autoneg
| SUPPORTED_TP
);
3255 ecmd
->advertising
= ADVERTISED_TP
;
3256 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3257 hw
->media_type
== MEDIA_TYPE_1000M_FULL
) {
3258 ecmd
->advertising
|= ADVERTISED_Autoneg
;
3259 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
) {
3260 ecmd
->advertising
|= ADVERTISED_Autoneg
;
3261 ecmd
->advertising
|=
3262 (ADVERTISED_10baseT_Half
|
3263 ADVERTISED_10baseT_Full
|
3264 ADVERTISED_100baseT_Half
|
3265 ADVERTISED_100baseT_Full
|
3266 ADVERTISED_1000baseT_Full
);
3268 ecmd
->advertising
|= (ADVERTISED_1000baseT_Full
);
3270 ecmd
->port
= PORT_TP
;
3271 ecmd
->phy_address
= 0;
3272 ecmd
->transceiver
= XCVR_INTERNAL
;
3274 if (netif_carrier_ok(adapter
->netdev
)) {
3275 u16 link_speed
, link_duplex
;
3276 atl1_get_speed_and_duplex(hw
, &link_speed
, &link_duplex
);
3277 ecmd
->speed
= link_speed
;
3278 if (link_duplex
== FULL_DUPLEX
)
3279 ecmd
->duplex
= DUPLEX_FULL
;
3281 ecmd
->duplex
= DUPLEX_HALF
;
3286 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3287 hw
->media_type
== MEDIA_TYPE_1000M_FULL
)
3288 ecmd
->autoneg
= AUTONEG_ENABLE
;
3290 ecmd
->autoneg
= AUTONEG_DISABLE
;
3295 static int atl1_set_settings(struct net_device
*netdev
,
3296 struct ethtool_cmd
*ecmd
)
3298 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3299 struct atl1_hw
*hw
= &adapter
->hw
;
3302 u16 old_media_type
= hw
->media_type
;
3304 if (netif_running(adapter
->netdev
)) {
3305 if (netif_msg_link(adapter
))
3306 dev_dbg(&adapter
->pdev
->dev
,
3307 "ethtool shutting down adapter\n");
3311 if (ecmd
->autoneg
== AUTONEG_ENABLE
)
3312 hw
->media_type
= MEDIA_TYPE_AUTO_SENSOR
;
3314 if (ecmd
->speed
== SPEED_1000
) {
3315 if (ecmd
->duplex
!= DUPLEX_FULL
) {
3316 if (netif_msg_link(adapter
))
3317 dev_warn(&adapter
->pdev
->dev
,
3318 "1000M half is invalid\n");
3322 hw
->media_type
= MEDIA_TYPE_1000M_FULL
;
3323 } else if (ecmd
->speed
== SPEED_100
) {
3324 if (ecmd
->duplex
== DUPLEX_FULL
)
3325 hw
->media_type
= MEDIA_TYPE_100M_FULL
;
3327 hw
->media_type
= MEDIA_TYPE_100M_HALF
;
3329 if (ecmd
->duplex
== DUPLEX_FULL
)
3330 hw
->media_type
= MEDIA_TYPE_10M_FULL
;
3332 hw
->media_type
= MEDIA_TYPE_10M_HALF
;
3335 switch (hw
->media_type
) {
3336 case MEDIA_TYPE_AUTO_SENSOR
:
3338 ADVERTISED_10baseT_Half
|
3339 ADVERTISED_10baseT_Full
|
3340 ADVERTISED_100baseT_Half
|
3341 ADVERTISED_100baseT_Full
|
3342 ADVERTISED_1000baseT_Full
|
3343 ADVERTISED_Autoneg
| ADVERTISED_TP
;
3345 case MEDIA_TYPE_1000M_FULL
:
3347 ADVERTISED_1000baseT_Full
|
3348 ADVERTISED_Autoneg
| ADVERTISED_TP
;
3351 ecmd
->advertising
= 0;
3354 if (atl1_phy_setup_autoneg_adv(hw
)) {
3356 if (netif_msg_link(adapter
))
3357 dev_warn(&adapter
->pdev
->dev
,
3358 "invalid ethtool speed/duplex setting\n");
3361 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3362 hw
->media_type
== MEDIA_TYPE_1000M_FULL
)
3363 phy_data
= MII_CR_RESET
| MII_CR_AUTO_NEG_EN
;
3365 switch (hw
->media_type
) {
3366 case MEDIA_TYPE_100M_FULL
:
3368 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_100
|
3371 case MEDIA_TYPE_100M_HALF
:
3372 phy_data
= MII_CR_SPEED_100
| MII_CR_RESET
;
3374 case MEDIA_TYPE_10M_FULL
:
3376 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_10
| MII_CR_RESET
;
3379 /* MEDIA_TYPE_10M_HALF: */
3380 phy_data
= MII_CR_SPEED_10
| MII_CR_RESET
;
3384 atl1_write_phy_reg(hw
, MII_BMCR
, phy_data
);
3387 hw
->media_type
= old_media_type
;
3389 if (netif_running(adapter
->netdev
)) {
3390 if (netif_msg_link(adapter
))
3391 dev_dbg(&adapter
->pdev
->dev
,
3392 "ethtool starting adapter\n");
3394 } else if (!ret_val
) {
3395 if (netif_msg_link(adapter
))
3396 dev_dbg(&adapter
->pdev
->dev
,
3397 "ethtool resetting adapter\n");
3398 atl1_reset(adapter
);
3403 static void atl1_get_drvinfo(struct net_device
*netdev
,
3404 struct ethtool_drvinfo
*drvinfo
)
3406 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3408 strncpy(drvinfo
->driver
, ATLX_DRIVER_NAME
, sizeof(drvinfo
->driver
));
3409 strncpy(drvinfo
->version
, ATLX_DRIVER_VERSION
,
3410 sizeof(drvinfo
->version
));
3411 strncpy(drvinfo
->fw_version
, "N/A", sizeof(drvinfo
->fw_version
));
3412 strncpy(drvinfo
->bus_info
, pci_name(adapter
->pdev
),
3413 sizeof(drvinfo
->bus_info
));
3414 drvinfo
->eedump_len
= ATL1_EEDUMP_LEN
;
3417 static void atl1_get_wol(struct net_device
*netdev
,
3418 struct ethtool_wolinfo
*wol
)
3420 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3422 wol
->supported
= WAKE_UCAST
| WAKE_MCAST
| WAKE_BCAST
| WAKE_MAGIC
;
3424 if (adapter
->wol
& ATLX_WUFC_EX
)
3425 wol
->wolopts
|= WAKE_UCAST
;
3426 if (adapter
->wol
& ATLX_WUFC_MC
)
3427 wol
->wolopts
|= WAKE_MCAST
;
3428 if (adapter
->wol
& ATLX_WUFC_BC
)
3429 wol
->wolopts
|= WAKE_BCAST
;
3430 if (adapter
->wol
& ATLX_WUFC_MAG
)
3431 wol
->wolopts
|= WAKE_MAGIC
;
3435 static int atl1_set_wol(struct net_device
*netdev
,
3436 struct ethtool_wolinfo
*wol
)
3438 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3440 if (wol
->wolopts
& (WAKE_PHY
| WAKE_ARP
| WAKE_MAGICSECURE
))
3443 if (wol
->wolopts
& WAKE_UCAST
)
3444 adapter
->wol
|= ATLX_WUFC_EX
;
3445 if (wol
->wolopts
& WAKE_MCAST
)
3446 adapter
->wol
|= ATLX_WUFC_MC
;
3447 if (wol
->wolopts
& WAKE_BCAST
)
3448 adapter
->wol
|= ATLX_WUFC_BC
;
3449 if (wol
->wolopts
& WAKE_MAGIC
)
3450 adapter
->wol
|= ATLX_WUFC_MAG
;
3454 static u32
atl1_get_msglevel(struct net_device
*netdev
)
3456 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3457 return adapter
->msg_enable
;
3460 static void atl1_set_msglevel(struct net_device
*netdev
, u32 value
)
3462 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3463 adapter
->msg_enable
= value
;
3466 static int atl1_get_regs_len(struct net_device
*netdev
)
3468 return ATL1_REG_COUNT
* sizeof(u32
);
3471 static void atl1_get_regs(struct net_device
*netdev
, struct ethtool_regs
*regs
,
3474 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3475 struct atl1_hw
*hw
= &adapter
->hw
;
3479 for (i
= 0; i
< ATL1_REG_COUNT
; i
++) {
3481 * This switch statement avoids reserved regions
3482 * of register space.
3507 /* reserved region; don't read it */
3511 /* unreserved region */
3512 regbuf
[i
] = ioread32(hw
->hw_addr
+ (i
* sizeof(u32
)));
3517 static void atl1_get_ringparam(struct net_device
*netdev
,
3518 struct ethtool_ringparam
*ring
)
3520 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3521 struct atl1_tpd_ring
*txdr
= &adapter
->tpd_ring
;
3522 struct atl1_rfd_ring
*rxdr
= &adapter
->rfd_ring
;
3524 ring
->rx_max_pending
= ATL1_MAX_RFD
;
3525 ring
->tx_max_pending
= ATL1_MAX_TPD
;
3526 ring
->rx_mini_max_pending
= 0;
3527 ring
->rx_jumbo_max_pending
= 0;
3528 ring
->rx_pending
= rxdr
->count
;
3529 ring
->tx_pending
= txdr
->count
;
3530 ring
->rx_mini_pending
= 0;
3531 ring
->rx_jumbo_pending
= 0;
3534 static int atl1_set_ringparam(struct net_device
*netdev
,
3535 struct ethtool_ringparam
*ring
)
3537 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3538 struct atl1_tpd_ring
*tpdr
= &adapter
->tpd_ring
;
3539 struct atl1_rrd_ring
*rrdr
= &adapter
->rrd_ring
;
3540 struct atl1_rfd_ring
*rfdr
= &adapter
->rfd_ring
;
3542 struct atl1_tpd_ring tpd_old
, tpd_new
;
3543 struct atl1_rfd_ring rfd_old
, rfd_new
;
3544 struct atl1_rrd_ring rrd_old
, rrd_new
;
3545 struct atl1_ring_header rhdr_old
, rhdr_new
;
3548 tpd_old
= adapter
->tpd_ring
;
3549 rfd_old
= adapter
->rfd_ring
;
3550 rrd_old
= adapter
->rrd_ring
;
3551 rhdr_old
= adapter
->ring_header
;
3553 if (netif_running(adapter
->netdev
))
3556 rfdr
->count
= (u16
) max(ring
->rx_pending
, (u32
) ATL1_MIN_RFD
);
3557 rfdr
->count
= rfdr
->count
> ATL1_MAX_RFD
? ATL1_MAX_RFD
:
3559 rfdr
->count
= (rfdr
->count
+ 3) & ~3;
3560 rrdr
->count
= rfdr
->count
;
3562 tpdr
->count
= (u16
) max(ring
->tx_pending
, (u32
) ATL1_MIN_TPD
);
3563 tpdr
->count
= tpdr
->count
> ATL1_MAX_TPD
? ATL1_MAX_TPD
:
3565 tpdr
->count
= (tpdr
->count
+ 3) & ~3;
3567 if (netif_running(adapter
->netdev
)) {
3568 /* try to get new resources before deleting old */
3569 err
= atl1_setup_ring_resources(adapter
);
3571 goto err_setup_ring
;
3574 * save the new, restore the old in order to free it,
3575 * then restore the new back again
3578 rfd_new
= adapter
->rfd_ring
;
3579 rrd_new
= adapter
->rrd_ring
;
3580 tpd_new
= adapter
->tpd_ring
;
3581 rhdr_new
= adapter
->ring_header
;
3582 adapter
->rfd_ring
= rfd_old
;
3583 adapter
->rrd_ring
= rrd_old
;
3584 adapter
->tpd_ring
= tpd_old
;
3585 adapter
->ring_header
= rhdr_old
;
3586 atl1_free_ring_resources(adapter
);
3587 adapter
->rfd_ring
= rfd_new
;
3588 adapter
->rrd_ring
= rrd_new
;
3589 adapter
->tpd_ring
= tpd_new
;
3590 adapter
->ring_header
= rhdr_new
;
3592 err
= atl1_up(adapter
);
3599 adapter
->rfd_ring
= rfd_old
;
3600 adapter
->rrd_ring
= rrd_old
;
3601 adapter
->tpd_ring
= tpd_old
;
3602 adapter
->ring_header
= rhdr_old
;
3607 static void atl1_get_pauseparam(struct net_device
*netdev
,
3608 struct ethtool_pauseparam
*epause
)
3610 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3611 struct atl1_hw
*hw
= &adapter
->hw
;
3613 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3614 hw
->media_type
== MEDIA_TYPE_1000M_FULL
) {
3615 epause
->autoneg
= AUTONEG_ENABLE
;
3617 epause
->autoneg
= AUTONEG_DISABLE
;
3619 epause
->rx_pause
= 1;
3620 epause
->tx_pause
= 1;
3623 static int atl1_set_pauseparam(struct net_device
*netdev
,
3624 struct ethtool_pauseparam
*epause
)
3626 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3627 struct atl1_hw
*hw
= &adapter
->hw
;
3629 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3630 hw
->media_type
== MEDIA_TYPE_1000M_FULL
) {
3631 epause
->autoneg
= AUTONEG_ENABLE
;
3633 epause
->autoneg
= AUTONEG_DISABLE
;
3636 epause
->rx_pause
= 1;
3637 epause
->tx_pause
= 1;
3642 /* FIXME: is this right? -- CHS */
3643 static u32
atl1_get_rx_csum(struct net_device
*netdev
)
3648 static void atl1_get_strings(struct net_device
*netdev
, u32 stringset
,
3654 switch (stringset
) {
3656 for (i
= 0; i
< ARRAY_SIZE(atl1_gstrings_stats
); i
++) {
3657 memcpy(p
, atl1_gstrings_stats
[i
].stat_string
,
3659 p
+= ETH_GSTRING_LEN
;
3665 static int atl1_nway_reset(struct net_device
*netdev
)
3667 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3668 struct atl1_hw
*hw
= &adapter
->hw
;
3670 if (netif_running(netdev
)) {
3674 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3675 hw
->media_type
== MEDIA_TYPE_1000M_FULL
) {
3676 phy_data
= MII_CR_RESET
| MII_CR_AUTO_NEG_EN
;
3678 switch (hw
->media_type
) {
3679 case MEDIA_TYPE_100M_FULL
:
3680 phy_data
= MII_CR_FULL_DUPLEX
|
3681 MII_CR_SPEED_100
| MII_CR_RESET
;
3683 case MEDIA_TYPE_100M_HALF
:
3684 phy_data
= MII_CR_SPEED_100
| MII_CR_RESET
;
3686 case MEDIA_TYPE_10M_FULL
:
3687 phy_data
= MII_CR_FULL_DUPLEX
|
3688 MII_CR_SPEED_10
| MII_CR_RESET
;
3691 /* MEDIA_TYPE_10M_HALF */
3692 phy_data
= MII_CR_SPEED_10
| MII_CR_RESET
;
3695 atl1_write_phy_reg(hw
, MII_BMCR
, phy_data
);
3701 const struct ethtool_ops atl1_ethtool_ops
= {
3702 .get_settings
= atl1_get_settings
,
3703 .set_settings
= atl1_set_settings
,
3704 .get_drvinfo
= atl1_get_drvinfo
,
3705 .get_wol
= atl1_get_wol
,
3706 .set_wol
= atl1_set_wol
,
3707 .get_msglevel
= atl1_get_msglevel
,
3708 .set_msglevel
= atl1_set_msglevel
,
3709 .get_regs_len
= atl1_get_regs_len
,
3710 .get_regs
= atl1_get_regs
,
3711 .get_ringparam
= atl1_get_ringparam
,
3712 .set_ringparam
= atl1_set_ringparam
,
3713 .get_pauseparam
= atl1_get_pauseparam
,
3714 .set_pauseparam
= atl1_set_pauseparam
,
3715 .get_rx_csum
= atl1_get_rx_csum
,
3716 .set_tx_csum
= ethtool_op_set_tx_hw_csum
,
3717 .get_link
= ethtool_op_get_link
,
3718 .set_sg
= ethtool_op_set_sg
,
3719 .get_strings
= atl1_get_strings
,
3720 .nway_reset
= atl1_nway_reset
,
3721 .get_ethtool_stats
= atl1_get_ethtool_stats
,
3722 .get_sset_count
= atl1_get_sset_count
,
3723 .set_tso
= ethtool_op_set_tso
,