1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
31 #define EFX_MAX_MTU (9 * 1024)
33 /* RX slow fill workqueue. If memory allocation fails in the fast path,
34 * a work item is pushed onto this work queue to retry the allocation later,
35 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
36 * workqueue, there is nothing to be gained in making it per NIC
38 static struct workqueue_struct
*refill_workqueue
;
40 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
41 * queued onto this work queue. This is not a per-nic work queue, because
42 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
44 static struct workqueue_struct
*reset_workqueue
;
46 /**************************************************************************
50 *************************************************************************/
53 * Enable large receive offload (LRO) aka soft segment reassembly (SSR)
55 * This sets the default for new devices. It can be controlled later
58 static int lro
= true;
59 module_param(lro
, int, 0644);
60 MODULE_PARM_DESC(lro
, "Large receive offload acceleration");
63 * Use separate channels for TX and RX events
65 * Set this to 1 to use separate channels for TX and RX. It allows us
66 * to control interrupt affinity separately for TX and RX.
68 * This is only used in MSI-X interrupt mode
70 static unsigned int separate_tx_channels
;
71 module_param(separate_tx_channels
, uint
, 0644);
72 MODULE_PARM_DESC(separate_tx_channels
,
73 "Use separate channels for TX and RX");
75 /* This is the weight assigned to each of the (per-channel) virtual
78 static int napi_weight
= 64;
80 /* This is the time (in jiffies) between invocations of the hardware
81 * monitor, which checks for known hardware bugs and resets the
82 * hardware and driver as necessary.
84 unsigned int efx_monitor_interval
= 1 * HZ
;
86 /* This controls whether or not the driver will initialise devices
87 * with invalid MAC addresses stored in the EEPROM or flash. If true,
88 * such devices will be initialised with a random locally-generated
89 * MAC address. This allows for loading the sfc_mtd driver to
90 * reprogram the flash, even if the flash contents (including the MAC
91 * address) have previously been erased.
93 static unsigned int allow_bad_hwaddr
;
95 /* Initial interrupt moderation settings. They can be modified after
96 * module load with ethtool.
98 * The default for RX should strike a balance between increasing the
99 * round-trip latency and reducing overhead.
101 static unsigned int rx_irq_mod_usec
= 60;
103 /* Initial interrupt moderation settings. They can be modified after
104 * module load with ethtool.
106 * This default is chosen to ensure that a 10G link does not go idle
107 * while a TX queue is stopped after it has become full. A queue is
108 * restarted when it drops below half full. The time this takes (assuming
109 * worst case 3 descriptors per packet and 1024 descriptors) is
110 * 512 / 3 * 1.2 = 205 usec.
112 static unsigned int tx_irq_mod_usec
= 150;
114 /* This is the first interrupt mode to try out of:
119 static unsigned int interrupt_mode
;
121 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
122 * i.e. the number of CPUs among which we may distribute simultaneous
123 * interrupt handling.
125 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
126 * The default (0) means to assign an interrupt to each package (level II cache)
128 static unsigned int rss_cpus
;
129 module_param(rss_cpus
, uint
, 0444);
130 MODULE_PARM_DESC(rss_cpus
, "Number of CPUs to use for Receive-Side Scaling");
132 static int phy_flash_cfg
;
133 module_param(phy_flash_cfg
, int, 0644);
134 MODULE_PARM_DESC(phy_flash_cfg
, "Set PHYs into reflash mode initially");
136 /**************************************************************************
138 * Utility functions and prototypes
140 *************************************************************************/
141 static void efx_remove_channel(struct efx_channel
*channel
);
142 static void efx_remove_port(struct efx_nic
*efx
);
143 static void efx_fini_napi(struct efx_nic
*efx
);
144 static void efx_fini_channels(struct efx_nic
*efx
);
146 #define EFX_ASSERT_RESET_SERIALISED(efx) \
148 if (efx->state == STATE_RUNNING) \
152 /**************************************************************************
154 * Event queue processing
156 *************************************************************************/
158 /* Process channel's event queue
160 * This function is responsible for processing the event queue of a
161 * single channel. The caller must guarantee that this function will
162 * never be concurrently called more than once on the same channel,
163 * though different channels may be being processed concurrently.
165 static int efx_process_channel(struct efx_channel
*channel
, int rx_quota
)
167 struct efx_nic
*efx
= channel
->efx
;
170 if (unlikely(efx
->reset_pending
!= RESET_TYPE_NONE
||
174 rx_packets
= falcon_process_eventq(channel
, rx_quota
);
178 /* Deliver last RX packet. */
179 if (channel
->rx_pkt
) {
180 __efx_rx_packet(channel
, channel
->rx_pkt
,
181 channel
->rx_pkt_csummed
);
182 channel
->rx_pkt
= NULL
;
185 efx_flush_lro(channel
);
186 efx_rx_strategy(channel
);
188 efx_fast_push_rx_descriptors(&efx
->rx_queue
[channel
->channel
]);
193 /* Mark channel as finished processing
195 * Note that since we will not receive further interrupts for this
196 * channel before we finish processing and call the eventq_read_ack()
197 * method, there is no need to use the interrupt hold-off timers.
199 static inline void efx_channel_processed(struct efx_channel
*channel
)
201 /* The interrupt handler for this channel may set work_pending
202 * as soon as we acknowledge the events we've seen. Make sure
203 * it's cleared before then. */
204 channel
->work_pending
= false;
207 falcon_eventq_read_ack(channel
);
212 * NAPI guarantees serialisation of polls of the same device, which
213 * provides the guarantee required by efx_process_channel().
215 static int efx_poll(struct napi_struct
*napi
, int budget
)
217 struct efx_channel
*channel
=
218 container_of(napi
, struct efx_channel
, napi_str
);
219 struct net_device
*napi_dev
= channel
->napi_dev
;
222 EFX_TRACE(channel
->efx
, "channel %d NAPI poll executing on CPU %d\n",
223 channel
->channel
, raw_smp_processor_id());
225 rx_packets
= efx_process_channel(channel
, budget
);
227 if (rx_packets
< budget
) {
228 /* There is no race here; although napi_disable() will
229 * only wait for netif_rx_complete(), this isn't a problem
230 * since efx_channel_processed() will have no effect if
231 * interrupts have already been disabled.
233 netif_rx_complete(napi_dev
, napi
);
234 efx_channel_processed(channel
);
240 /* Process the eventq of the specified channel immediately on this CPU
242 * Disable hardware generated interrupts, wait for any existing
243 * processing to finish, then directly poll (and ack ) the eventq.
244 * Finally reenable NAPI and interrupts.
246 * Since we are touching interrupts the caller should hold the suspend lock
248 void efx_process_channel_now(struct efx_channel
*channel
)
250 struct efx_nic
*efx
= channel
->efx
;
252 BUG_ON(!channel
->used_flags
);
253 BUG_ON(!channel
->enabled
);
255 /* Disable interrupts and wait for ISRs to complete */
256 falcon_disable_interrupts(efx
);
258 synchronize_irq(efx
->legacy_irq
);
260 synchronize_irq(channel
->irq
);
262 /* Wait for any NAPI processing to complete */
263 napi_disable(&channel
->napi_str
);
265 /* Poll the channel */
266 efx_process_channel(channel
, efx
->type
->evq_size
);
268 /* Ack the eventq. This may cause an interrupt to be generated
269 * when they are reenabled */
270 efx_channel_processed(channel
);
272 napi_enable(&channel
->napi_str
);
273 falcon_enable_interrupts(efx
);
276 /* Create event queue
277 * Event queue memory allocations are done only once. If the channel
278 * is reset, the memory buffer will be reused; this guards against
279 * errors during channel reset and also simplifies interrupt handling.
281 static int efx_probe_eventq(struct efx_channel
*channel
)
283 EFX_LOG(channel
->efx
, "chan %d create event queue\n", channel
->channel
);
285 return falcon_probe_eventq(channel
);
288 /* Prepare channel's event queue */
289 static void efx_init_eventq(struct efx_channel
*channel
)
291 EFX_LOG(channel
->efx
, "chan %d init event queue\n", channel
->channel
);
293 channel
->eventq_read_ptr
= 0;
295 falcon_init_eventq(channel
);
298 static void efx_fini_eventq(struct efx_channel
*channel
)
300 EFX_LOG(channel
->efx
, "chan %d fini event queue\n", channel
->channel
);
302 falcon_fini_eventq(channel
);
305 static void efx_remove_eventq(struct efx_channel
*channel
)
307 EFX_LOG(channel
->efx
, "chan %d remove event queue\n", channel
->channel
);
309 falcon_remove_eventq(channel
);
312 /**************************************************************************
316 *************************************************************************/
318 static int efx_probe_channel(struct efx_channel
*channel
)
320 struct efx_tx_queue
*tx_queue
;
321 struct efx_rx_queue
*rx_queue
;
324 EFX_LOG(channel
->efx
, "creating channel %d\n", channel
->channel
);
326 rc
= efx_probe_eventq(channel
);
330 efx_for_each_channel_tx_queue(tx_queue
, channel
) {
331 rc
= efx_probe_tx_queue(tx_queue
);
336 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
337 rc
= efx_probe_rx_queue(rx_queue
);
342 channel
->n_rx_frm_trunc
= 0;
347 efx_for_each_channel_rx_queue(rx_queue
, channel
)
348 efx_remove_rx_queue(rx_queue
);
350 efx_for_each_channel_tx_queue(tx_queue
, channel
)
351 efx_remove_tx_queue(tx_queue
);
357 static void efx_set_channel_names(struct efx_nic
*efx
)
359 struct efx_channel
*channel
;
360 const char *type
= "";
363 efx_for_each_channel(channel
, efx
) {
364 number
= channel
->channel
;
365 if (efx
->n_channels
> efx
->n_rx_queues
) {
366 if (channel
->channel
< efx
->n_rx_queues
) {
370 number
-= efx
->n_rx_queues
;
373 snprintf(channel
->name
, sizeof(channel
->name
),
374 "%s%s-%d", efx
->name
, type
, number
);
378 /* Channels are shutdown and reinitialised whilst the NIC is running
379 * to propagate configuration changes (mtu, checksum offload), or
380 * to clear hardware error conditions
382 static void efx_init_channels(struct efx_nic
*efx
)
384 struct efx_tx_queue
*tx_queue
;
385 struct efx_rx_queue
*rx_queue
;
386 struct efx_channel
*channel
;
388 /* Calculate the rx buffer allocation parameters required to
389 * support the current MTU, including padding for header
390 * alignment and overruns.
392 efx
->rx_buffer_len
= (max(EFX_PAGE_IP_ALIGN
, NET_IP_ALIGN
) +
393 EFX_MAX_FRAME_LEN(efx
->net_dev
->mtu
) +
394 efx
->type
->rx_buffer_padding
);
395 efx
->rx_buffer_order
= get_order(efx
->rx_buffer_len
);
397 /* Initialise the channels */
398 efx_for_each_channel(channel
, efx
) {
399 EFX_LOG(channel
->efx
, "init chan %d\n", channel
->channel
);
401 efx_init_eventq(channel
);
403 efx_for_each_channel_tx_queue(tx_queue
, channel
)
404 efx_init_tx_queue(tx_queue
);
406 /* The rx buffer allocation strategy is MTU dependent */
407 efx_rx_strategy(channel
);
409 efx_for_each_channel_rx_queue(rx_queue
, channel
)
410 efx_init_rx_queue(rx_queue
);
412 WARN_ON(channel
->rx_pkt
!= NULL
);
413 efx_rx_strategy(channel
);
417 /* This enables event queue processing and packet transmission.
419 * Note that this function is not allowed to fail, since that would
420 * introduce too much complexity into the suspend/resume path.
422 static void efx_start_channel(struct efx_channel
*channel
)
424 struct efx_rx_queue
*rx_queue
;
426 EFX_LOG(channel
->efx
, "starting chan %d\n", channel
->channel
);
428 if (!(channel
->efx
->net_dev
->flags
& IFF_UP
))
429 netif_napi_add(channel
->napi_dev
, &channel
->napi_str
,
430 efx_poll
, napi_weight
);
432 /* The interrupt handler for this channel may set work_pending
433 * as soon as we enable it. Make sure it's cleared before
434 * then. Similarly, make sure it sees the enabled flag set. */
435 channel
->work_pending
= false;
436 channel
->enabled
= true;
439 napi_enable(&channel
->napi_str
);
441 /* Load up RX descriptors */
442 efx_for_each_channel_rx_queue(rx_queue
, channel
)
443 efx_fast_push_rx_descriptors(rx_queue
);
446 /* This disables event queue processing and packet transmission.
447 * This function does not guarantee that all queue processing
448 * (e.g. RX refill) is complete.
450 static void efx_stop_channel(struct efx_channel
*channel
)
452 struct efx_rx_queue
*rx_queue
;
454 if (!channel
->enabled
)
457 EFX_LOG(channel
->efx
, "stop chan %d\n", channel
->channel
);
459 channel
->enabled
= false;
460 napi_disable(&channel
->napi_str
);
462 /* Ensure that any worker threads have exited or will be no-ops */
463 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
464 spin_lock_bh(&rx_queue
->add_lock
);
465 spin_unlock_bh(&rx_queue
->add_lock
);
469 static void efx_fini_channels(struct efx_nic
*efx
)
471 struct efx_channel
*channel
;
472 struct efx_tx_queue
*tx_queue
;
473 struct efx_rx_queue
*rx_queue
;
476 EFX_ASSERT_RESET_SERIALISED(efx
);
477 BUG_ON(efx
->port_enabled
);
479 rc
= falcon_flush_queues(efx
);
481 EFX_ERR(efx
, "failed to flush queues\n");
483 EFX_LOG(efx
, "successfully flushed all queues\n");
485 efx_for_each_channel(channel
, efx
) {
486 EFX_LOG(channel
->efx
, "shut down chan %d\n", channel
->channel
);
488 efx_for_each_channel_rx_queue(rx_queue
, channel
)
489 efx_fini_rx_queue(rx_queue
);
490 efx_for_each_channel_tx_queue(tx_queue
, channel
)
491 efx_fini_tx_queue(tx_queue
);
492 efx_fini_eventq(channel
);
496 static void efx_remove_channel(struct efx_channel
*channel
)
498 struct efx_tx_queue
*tx_queue
;
499 struct efx_rx_queue
*rx_queue
;
501 EFX_LOG(channel
->efx
, "destroy chan %d\n", channel
->channel
);
503 efx_for_each_channel_rx_queue(rx_queue
, channel
)
504 efx_remove_rx_queue(rx_queue
);
505 efx_for_each_channel_tx_queue(tx_queue
, channel
)
506 efx_remove_tx_queue(tx_queue
);
507 efx_remove_eventq(channel
);
509 channel
->used_flags
= 0;
512 void efx_schedule_slow_fill(struct efx_rx_queue
*rx_queue
, int delay
)
514 queue_delayed_work(refill_workqueue
, &rx_queue
->work
, delay
);
517 /**************************************************************************
521 **************************************************************************/
523 /* This ensures that the kernel is kept informed (via
524 * netif_carrier_on/off) of the link status, and also maintains the
525 * link status's stop on the port's TX queue.
527 static void efx_link_status_changed(struct efx_nic
*efx
)
529 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
530 * that no events are triggered between unregister_netdev() and the
531 * driver unloading. A more general condition is that NETDEV_CHANGE
532 * can only be generated between NETDEV_UP and NETDEV_DOWN */
533 if (!netif_running(efx
->net_dev
))
536 if (efx
->port_inhibited
) {
537 netif_carrier_off(efx
->net_dev
);
541 if (efx
->link_up
!= netif_carrier_ok(efx
->net_dev
)) {
542 efx
->n_link_state_changes
++;
545 netif_carrier_on(efx
->net_dev
);
547 netif_carrier_off(efx
->net_dev
);
550 /* Status message for kernel log */
552 EFX_INFO(efx
, "link up at %uMbps %s-duplex (MTU %d)%s\n",
553 efx
->link_speed
, efx
->link_fd
? "full" : "half",
555 (efx
->promiscuous
? " [PROMISC]" : ""));
557 EFX_INFO(efx
, "link down\n");
562 /* This call reinitialises the MAC to pick up new PHY settings. The
563 * caller must hold the mac_lock */
564 void __efx_reconfigure_port(struct efx_nic
*efx
)
566 WARN_ON(!mutex_is_locked(&efx
->mac_lock
));
568 EFX_LOG(efx
, "reconfiguring MAC from PHY settings on CPU %d\n",
569 raw_smp_processor_id());
571 /* Serialise the promiscuous flag with efx_set_multicast_list. */
572 if (efx_dev_registered(efx
)) {
573 netif_addr_lock_bh(efx
->net_dev
);
574 netif_addr_unlock_bh(efx
->net_dev
);
577 falcon_deconfigure_mac_wrapper(efx
);
579 /* Reconfigure the PHY, disabling transmit in mac level loopback. */
580 if (LOOPBACK_INTERNAL(efx
))
581 efx
->phy_mode
|= PHY_MODE_TX_DISABLED
;
583 efx
->phy_mode
&= ~PHY_MODE_TX_DISABLED
;
584 efx
->phy_op
->reconfigure(efx
);
586 if (falcon_switch_mac(efx
))
589 efx
->mac_op
->reconfigure(efx
);
591 /* Inform kernel of loss/gain of carrier */
592 efx_link_status_changed(efx
);
596 EFX_ERR(efx
, "failed to reconfigure MAC\n");
597 efx
->phy_op
->fini(efx
);
598 efx
->port_initialized
= false;
601 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
603 void efx_reconfigure_port(struct efx_nic
*efx
)
605 EFX_ASSERT_RESET_SERIALISED(efx
);
607 mutex_lock(&efx
->mac_lock
);
608 __efx_reconfigure_port(efx
);
609 mutex_unlock(&efx
->mac_lock
);
612 /* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
613 * we don't efx_reconfigure_port() if the port is disabled. Care is taken
614 * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
615 static void efx_reconfigure_work(struct work_struct
*data
)
617 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
620 mutex_lock(&efx
->mac_lock
);
621 if (efx
->port_enabled
)
622 __efx_reconfigure_port(efx
);
623 mutex_unlock(&efx
->mac_lock
);
626 static int efx_probe_port(struct efx_nic
*efx
)
630 EFX_LOG(efx
, "create port\n");
632 /* Connect up MAC/PHY operations table and read MAC address */
633 rc
= falcon_probe_port(efx
);
638 efx
->phy_mode
= PHY_MODE_SPECIAL
;
640 /* Sanity check MAC address */
641 if (is_valid_ether_addr(efx
->mac_address
)) {
642 memcpy(efx
->net_dev
->dev_addr
, efx
->mac_address
, ETH_ALEN
);
644 EFX_ERR(efx
, "invalid MAC address %pM\n",
646 if (!allow_bad_hwaddr
) {
650 random_ether_addr(efx
->net_dev
->dev_addr
);
651 EFX_INFO(efx
, "using locally-generated MAC %pM\n",
652 efx
->net_dev
->dev_addr
);
658 efx_remove_port(efx
);
662 static int efx_init_port(struct efx_nic
*efx
)
666 EFX_LOG(efx
, "init port\n");
668 rc
= efx
->phy_op
->init(efx
);
671 efx
->phy_op
->reconfigure(efx
);
673 mutex_lock(&efx
->mac_lock
);
674 rc
= falcon_switch_mac(efx
);
675 mutex_unlock(&efx
->mac_lock
);
678 efx
->mac_op
->reconfigure(efx
);
680 efx
->port_initialized
= true;
681 efx
->stats_enabled
= true;
685 efx
->phy_op
->fini(efx
);
689 /* Allow efx_reconfigure_port() to be scheduled, and close the window
690 * between efx_stop_port and efx_flush_all whereby a previously scheduled
691 * efx_reconfigure_port() may have been cancelled */
692 static void efx_start_port(struct efx_nic
*efx
)
694 EFX_LOG(efx
, "start port\n");
695 BUG_ON(efx
->port_enabled
);
697 mutex_lock(&efx
->mac_lock
);
698 efx
->port_enabled
= true;
699 __efx_reconfigure_port(efx
);
700 mutex_unlock(&efx
->mac_lock
);
703 /* Prevent efx_reconfigure_work and efx_monitor() from executing, and
704 * efx_set_multicast_list() from scheduling efx_reconfigure_work.
705 * efx_reconfigure_work can still be scheduled via NAPI processing
706 * until efx_flush_all() is called */
707 static void efx_stop_port(struct efx_nic
*efx
)
709 EFX_LOG(efx
, "stop port\n");
711 mutex_lock(&efx
->mac_lock
);
712 efx
->port_enabled
= false;
713 mutex_unlock(&efx
->mac_lock
);
715 /* Serialise against efx_set_multicast_list() */
716 if (efx_dev_registered(efx
)) {
717 netif_addr_lock_bh(efx
->net_dev
);
718 netif_addr_unlock_bh(efx
->net_dev
);
722 static void efx_fini_port(struct efx_nic
*efx
)
724 EFX_LOG(efx
, "shut down port\n");
726 if (!efx
->port_initialized
)
729 efx
->phy_op
->fini(efx
);
730 efx
->port_initialized
= false;
732 efx
->link_up
= false;
733 efx_link_status_changed(efx
);
736 static void efx_remove_port(struct efx_nic
*efx
)
738 EFX_LOG(efx
, "destroying port\n");
740 falcon_remove_port(efx
);
743 /**************************************************************************
747 **************************************************************************/
749 /* This configures the PCI device to enable I/O and DMA. */
750 static int efx_init_io(struct efx_nic
*efx
)
752 struct pci_dev
*pci_dev
= efx
->pci_dev
;
753 dma_addr_t dma_mask
= efx
->type
->max_dma_mask
;
756 EFX_LOG(efx
, "initialising I/O\n");
758 rc
= pci_enable_device(pci_dev
);
760 EFX_ERR(efx
, "failed to enable PCI device\n");
764 pci_set_master(pci_dev
);
766 /* Set the PCI DMA mask. Try all possibilities from our
767 * genuine mask down to 32 bits, because some architectures
768 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
769 * masks event though they reject 46 bit masks.
771 while (dma_mask
> 0x7fffffffUL
) {
772 if (pci_dma_supported(pci_dev
, dma_mask
) &&
773 ((rc
= pci_set_dma_mask(pci_dev
, dma_mask
)) == 0))
778 EFX_ERR(efx
, "could not find a suitable DMA mask\n");
781 EFX_LOG(efx
, "using DMA mask %llx\n", (unsigned long long) dma_mask
);
782 rc
= pci_set_consistent_dma_mask(pci_dev
, dma_mask
);
784 /* pci_set_consistent_dma_mask() is not *allowed* to
785 * fail with a mask that pci_set_dma_mask() accepted,
786 * but just in case...
788 EFX_ERR(efx
, "failed to set consistent DMA mask\n");
792 efx
->membase_phys
= pci_resource_start(efx
->pci_dev
,
794 rc
= pci_request_region(pci_dev
, efx
->type
->mem_bar
, "sfc");
796 EFX_ERR(efx
, "request for memory BAR failed\n");
800 efx
->membase
= ioremap_nocache(efx
->membase_phys
,
801 efx
->type
->mem_map_size
);
803 EFX_ERR(efx
, "could not map memory BAR %d at %llx+%x\n",
805 (unsigned long long)efx
->membase_phys
,
806 efx
->type
->mem_map_size
);
810 EFX_LOG(efx
, "memory BAR %u at %llx+%x (virtual %p)\n",
811 efx
->type
->mem_bar
, (unsigned long long)efx
->membase_phys
,
812 efx
->type
->mem_map_size
, efx
->membase
);
817 pci_release_region(efx
->pci_dev
, efx
->type
->mem_bar
);
819 efx
->membase_phys
= 0;
821 pci_disable_device(efx
->pci_dev
);
826 static void efx_fini_io(struct efx_nic
*efx
)
828 EFX_LOG(efx
, "shutting down I/O\n");
831 iounmap(efx
->membase
);
835 if (efx
->membase_phys
) {
836 pci_release_region(efx
->pci_dev
, efx
->type
->mem_bar
);
837 efx
->membase_phys
= 0;
840 pci_disable_device(efx
->pci_dev
);
843 /* Get number of RX queues wanted. Return number of online CPU
844 * packages in the expectation that an IRQ balancer will spread
845 * interrupts across them. */
846 static int efx_wanted_rx_queues(void)
852 cpus_clear(core_mask
);
854 for_each_online_cpu(cpu
) {
855 if (!cpu_isset(cpu
, core_mask
)) {
857 cpus_or(core_mask
, core_mask
,
858 topology_core_siblings(cpu
));
865 /* Probe the number and type of interrupts we are able to obtain, and
866 * the resulting numbers of channels and RX queues.
868 static void efx_probe_interrupts(struct efx_nic
*efx
)
871 min_t(int, efx
->type
->phys_addr_channels
, EFX_MAX_CHANNELS
);
874 if (efx
->interrupt_mode
== EFX_INT_MODE_MSIX
) {
875 struct msix_entry xentries
[EFX_MAX_CHANNELS
];
879 /* We want one RX queue and interrupt per CPU package
880 * (or as specified by the rss_cpus module parameter).
881 * We will need one channel per interrupt.
883 rx_queues
= rss_cpus
? rss_cpus
: efx_wanted_rx_queues();
884 wanted_ints
= rx_queues
+ (separate_tx_channels
? 1 : 0);
885 wanted_ints
= min(wanted_ints
, max_channels
);
887 for (i
= 0; i
< wanted_ints
; i
++)
888 xentries
[i
].entry
= i
;
889 rc
= pci_enable_msix(efx
->pci_dev
, xentries
, wanted_ints
);
891 EFX_ERR(efx
, "WARNING: Insufficient MSI-X vectors"
892 " available (%d < %d).\n", rc
, wanted_ints
);
893 EFX_ERR(efx
, "WARNING: Performance may be reduced.\n");
894 EFX_BUG_ON_PARANOID(rc
>= wanted_ints
);
896 rc
= pci_enable_msix(efx
->pci_dev
, xentries
,
901 efx
->n_rx_queues
= min(rx_queues
, wanted_ints
);
902 efx
->n_channels
= wanted_ints
;
903 for (i
= 0; i
< wanted_ints
; i
++)
904 efx
->channel
[i
].irq
= xentries
[i
].vector
;
906 /* Fall back to single channel MSI */
907 efx
->interrupt_mode
= EFX_INT_MODE_MSI
;
908 EFX_ERR(efx
, "could not enable MSI-X\n");
912 /* Try single interrupt MSI */
913 if (efx
->interrupt_mode
== EFX_INT_MODE_MSI
) {
914 efx
->n_rx_queues
= 1;
916 rc
= pci_enable_msi(efx
->pci_dev
);
918 efx
->channel
[0].irq
= efx
->pci_dev
->irq
;
920 EFX_ERR(efx
, "could not enable MSI\n");
921 efx
->interrupt_mode
= EFX_INT_MODE_LEGACY
;
925 /* Assume legacy interrupts */
926 if (efx
->interrupt_mode
== EFX_INT_MODE_LEGACY
) {
927 efx
->n_rx_queues
= 1;
928 efx
->n_channels
= 1 + (separate_tx_channels
? 1 : 0);
929 efx
->legacy_irq
= efx
->pci_dev
->irq
;
933 static void efx_remove_interrupts(struct efx_nic
*efx
)
935 struct efx_channel
*channel
;
937 /* Remove MSI/MSI-X interrupts */
938 efx_for_each_channel(channel
, efx
)
940 pci_disable_msi(efx
->pci_dev
);
941 pci_disable_msix(efx
->pci_dev
);
943 /* Remove legacy interrupt */
947 static void efx_set_channels(struct efx_nic
*efx
)
949 struct efx_tx_queue
*tx_queue
;
950 struct efx_rx_queue
*rx_queue
;
952 efx_for_each_tx_queue(tx_queue
, efx
) {
953 if (separate_tx_channels
)
954 tx_queue
->channel
= &efx
->channel
[efx
->n_channels
-1];
956 tx_queue
->channel
= &efx
->channel
[0];
957 tx_queue
->channel
->used_flags
|= EFX_USED_BY_TX
;
960 efx_for_each_rx_queue(rx_queue
, efx
) {
961 rx_queue
->channel
= &efx
->channel
[rx_queue
->queue
];
962 rx_queue
->channel
->used_flags
|= EFX_USED_BY_RX
;
966 static int efx_probe_nic(struct efx_nic
*efx
)
970 EFX_LOG(efx
, "creating NIC\n");
972 /* Carry out hardware-type specific initialisation */
973 rc
= falcon_probe_nic(efx
);
977 /* Determine the number of channels and RX queues by trying to hook
978 * in MSI-X interrupts. */
979 efx_probe_interrupts(efx
);
981 efx_set_channels(efx
);
983 /* Initialise the interrupt moderation settings */
984 efx_init_irq_moderation(efx
, tx_irq_mod_usec
, rx_irq_mod_usec
);
989 static void efx_remove_nic(struct efx_nic
*efx
)
991 EFX_LOG(efx
, "destroying NIC\n");
993 efx_remove_interrupts(efx
);
994 falcon_remove_nic(efx
);
997 /**************************************************************************
999 * NIC startup/shutdown
1001 *************************************************************************/
1003 static int efx_probe_all(struct efx_nic
*efx
)
1005 struct efx_channel
*channel
;
1009 rc
= efx_probe_nic(efx
);
1011 EFX_ERR(efx
, "failed to create NIC\n");
1016 rc
= efx_probe_port(efx
);
1018 EFX_ERR(efx
, "failed to create port\n");
1022 /* Create channels */
1023 efx_for_each_channel(channel
, efx
) {
1024 rc
= efx_probe_channel(channel
);
1026 EFX_ERR(efx
, "failed to create channel %d\n",
1031 efx_set_channel_names(efx
);
1036 efx_for_each_channel(channel
, efx
)
1037 efx_remove_channel(channel
);
1038 efx_remove_port(efx
);
1040 efx_remove_nic(efx
);
1045 /* Called after previous invocation(s) of efx_stop_all, restarts the
1046 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1047 * and ensures that the port is scheduled to be reconfigured.
1048 * This function is safe to call multiple times when the NIC is in any
1050 static void efx_start_all(struct efx_nic
*efx
)
1052 struct efx_channel
*channel
;
1054 EFX_ASSERT_RESET_SERIALISED(efx
);
1056 /* Check that it is appropriate to restart the interface. All
1057 * of these flags are safe to read under just the rtnl lock */
1058 if (efx
->port_enabled
)
1060 if ((efx
->state
!= STATE_RUNNING
) && (efx
->state
!= STATE_INIT
))
1062 if (efx_dev_registered(efx
) && !netif_running(efx
->net_dev
))
1065 /* Mark the port as enabled so port reconfigurations can start, then
1066 * restart the transmit interface early so the watchdog timer stops */
1067 efx_start_port(efx
);
1068 if (efx_dev_registered(efx
))
1069 efx_wake_queue(efx
);
1071 efx_for_each_channel(channel
, efx
)
1072 efx_start_channel(channel
);
1074 falcon_enable_interrupts(efx
);
1076 /* Start hardware monitor if we're in RUNNING */
1077 if (efx
->state
== STATE_RUNNING
)
1078 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1079 efx_monitor_interval
);
1082 /* Flush all delayed work. Should only be called when no more delayed work
1083 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1084 * since we're holding the rtnl_lock at this point. */
1085 static void efx_flush_all(struct efx_nic
*efx
)
1087 struct efx_rx_queue
*rx_queue
;
1089 /* Make sure the hardware monitor is stopped */
1090 cancel_delayed_work_sync(&efx
->monitor_work
);
1092 /* Ensure that all RX slow refills are complete. */
1093 efx_for_each_rx_queue(rx_queue
, efx
)
1094 cancel_delayed_work_sync(&rx_queue
->work
);
1096 /* Stop scheduled port reconfigurations */
1097 cancel_work_sync(&efx
->reconfigure_work
);
1101 /* Quiesce hardware and software without bringing the link down.
1102 * Safe to call multiple times, when the nic and interface is in any
1103 * state. The caller is guaranteed to subsequently be in a position
1104 * to modify any hardware and software state they see fit without
1106 static void efx_stop_all(struct efx_nic
*efx
)
1108 struct efx_channel
*channel
;
1110 EFX_ASSERT_RESET_SERIALISED(efx
);
1112 /* port_enabled can be read safely under the rtnl lock */
1113 if (!efx
->port_enabled
)
1116 /* Disable interrupts and wait for ISR to complete */
1117 falcon_disable_interrupts(efx
);
1118 if (efx
->legacy_irq
)
1119 synchronize_irq(efx
->legacy_irq
);
1120 efx_for_each_channel(channel
, efx
) {
1122 synchronize_irq(channel
->irq
);
1125 /* Stop all NAPI processing and synchronous rx refills */
1126 efx_for_each_channel(channel
, efx
)
1127 efx_stop_channel(channel
);
1129 /* Stop all asynchronous port reconfigurations. Since all
1130 * event processing has already been stopped, there is no
1131 * window to loose phy events */
1134 /* Flush reconfigure_work, refill_workqueue, monitor_work */
1137 /* Isolate the MAC from the TX and RX engines, so that queue
1138 * flushes will complete in a timely fashion. */
1139 falcon_drain_tx_fifo(efx
);
1141 /* Stop the kernel transmit interface late, so the watchdog
1142 * timer isn't ticking over the flush */
1143 if (efx_dev_registered(efx
)) {
1144 efx_stop_queue(efx
);
1145 netif_tx_lock_bh(efx
->net_dev
);
1146 netif_tx_unlock_bh(efx
->net_dev
);
1150 static void efx_remove_all(struct efx_nic
*efx
)
1152 struct efx_channel
*channel
;
1154 efx_for_each_channel(channel
, efx
)
1155 efx_remove_channel(channel
);
1156 efx_remove_port(efx
);
1157 efx_remove_nic(efx
);
1160 /* A convinience function to safely flush all the queues */
1161 void efx_flush_queues(struct efx_nic
*efx
)
1163 EFX_ASSERT_RESET_SERIALISED(efx
);
1167 efx_fini_channels(efx
);
1168 efx_init_channels(efx
);
1173 /**************************************************************************
1175 * Interrupt moderation
1177 **************************************************************************/
1179 /* Set interrupt moderation parameters */
1180 void efx_init_irq_moderation(struct efx_nic
*efx
, int tx_usecs
, int rx_usecs
)
1182 struct efx_tx_queue
*tx_queue
;
1183 struct efx_rx_queue
*rx_queue
;
1185 EFX_ASSERT_RESET_SERIALISED(efx
);
1187 efx_for_each_tx_queue(tx_queue
, efx
)
1188 tx_queue
->channel
->irq_moderation
= tx_usecs
;
1190 efx_for_each_rx_queue(rx_queue
, efx
)
1191 rx_queue
->channel
->irq_moderation
= rx_usecs
;
1194 /**************************************************************************
1198 **************************************************************************/
1200 /* Run periodically off the general workqueue. Serialised against
1201 * efx_reconfigure_port via the mac_lock */
1202 static void efx_monitor(struct work_struct
*data
)
1204 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
1207 EFX_TRACE(efx
, "hardware monitor executing on CPU %d\n",
1208 raw_smp_processor_id());
1211 /* If the mac_lock is already held then it is likely a port
1212 * reconfiguration is already in place, which will likely do
1213 * most of the work of check_hw() anyway. */
1214 if (!mutex_trylock(&efx
->mac_lock
)) {
1215 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1216 efx_monitor_interval
);
1220 if (efx
->port_enabled
)
1221 efx
->mac_op
->check_hw(efx
);
1222 mutex_unlock(&efx
->mac_lock
);
1224 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1225 efx_monitor_interval
);
1228 /**************************************************************************
1232 *************************************************************************/
1235 * Context: process, rtnl_lock() held.
1237 static int efx_ioctl(struct net_device
*net_dev
, struct ifreq
*ifr
, int cmd
)
1239 struct efx_nic
*efx
= netdev_priv(net_dev
);
1241 EFX_ASSERT_RESET_SERIALISED(efx
);
1243 return generic_mii_ioctl(&efx
->mii
, if_mii(ifr
), cmd
, NULL
);
1246 /**************************************************************************
1250 **************************************************************************/
1252 static int efx_init_napi(struct efx_nic
*efx
)
1254 struct efx_channel
*channel
;
1257 efx_for_each_channel(channel
, efx
) {
1258 channel
->napi_dev
= efx
->net_dev
;
1259 rc
= efx_lro_init(&channel
->lro_mgr
, efx
);
1269 static void efx_fini_napi(struct efx_nic
*efx
)
1271 struct efx_channel
*channel
;
1273 efx_for_each_channel(channel
, efx
) {
1274 efx_lro_fini(&channel
->lro_mgr
);
1275 channel
->napi_dev
= NULL
;
1279 /**************************************************************************
1281 * Kernel netpoll interface
1283 *************************************************************************/
1285 #ifdef CONFIG_NET_POLL_CONTROLLER
1287 /* Although in the common case interrupts will be disabled, this is not
1288 * guaranteed. However, all our work happens inside the NAPI callback,
1289 * so no locking is required.
1291 static void efx_netpoll(struct net_device
*net_dev
)
1293 struct efx_nic
*efx
= netdev_priv(net_dev
);
1294 struct efx_channel
*channel
;
1296 efx_for_each_channel(channel
, efx
)
1297 efx_schedule_channel(channel
);
1302 /**************************************************************************
1304 * Kernel net device interface
1306 *************************************************************************/
1308 /* Context: process, rtnl_lock() held. */
1309 static int efx_net_open(struct net_device
*net_dev
)
1311 struct efx_nic
*efx
= netdev_priv(net_dev
);
1312 EFX_ASSERT_RESET_SERIALISED(efx
);
1314 EFX_LOG(efx
, "opening device %s on CPU %d\n", net_dev
->name
,
1315 raw_smp_processor_id());
1317 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
1324 /* Context: process, rtnl_lock() held.
1325 * Note that the kernel will ignore our return code; this method
1326 * should really be a void.
1328 static int efx_net_stop(struct net_device
*net_dev
)
1330 struct efx_nic
*efx
= netdev_priv(net_dev
);
1332 EFX_LOG(efx
, "closing %s on CPU %d\n", net_dev
->name
,
1333 raw_smp_processor_id());
1335 /* Stop the device and flush all the channels */
1337 efx_fini_channels(efx
);
1338 efx_init_channels(efx
);
1343 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1344 static struct net_device_stats
*efx_net_stats(struct net_device
*net_dev
)
1346 struct efx_nic
*efx
= netdev_priv(net_dev
);
1347 struct efx_mac_stats
*mac_stats
= &efx
->mac_stats
;
1348 struct net_device_stats
*stats
= &net_dev
->stats
;
1350 /* Update stats if possible, but do not wait if another thread
1351 * is updating them (or resetting the NIC); slightly stale
1352 * stats are acceptable.
1354 if (!spin_trylock(&efx
->stats_lock
))
1356 if (efx
->stats_enabled
) {
1357 efx
->mac_op
->update_stats(efx
);
1358 falcon_update_nic_stats(efx
);
1360 spin_unlock(&efx
->stats_lock
);
1362 stats
->rx_packets
= mac_stats
->rx_packets
;
1363 stats
->tx_packets
= mac_stats
->tx_packets
;
1364 stats
->rx_bytes
= mac_stats
->rx_bytes
;
1365 stats
->tx_bytes
= mac_stats
->tx_bytes
;
1366 stats
->multicast
= mac_stats
->rx_multicast
;
1367 stats
->collisions
= mac_stats
->tx_collision
;
1368 stats
->rx_length_errors
= (mac_stats
->rx_gtjumbo
+
1369 mac_stats
->rx_length_error
);
1370 stats
->rx_over_errors
= efx
->n_rx_nodesc_drop_cnt
;
1371 stats
->rx_crc_errors
= mac_stats
->rx_bad
;
1372 stats
->rx_frame_errors
= mac_stats
->rx_align_error
;
1373 stats
->rx_fifo_errors
= mac_stats
->rx_overflow
;
1374 stats
->rx_missed_errors
= mac_stats
->rx_missed
;
1375 stats
->tx_window_errors
= mac_stats
->tx_late_collision
;
1377 stats
->rx_errors
= (stats
->rx_length_errors
+
1378 stats
->rx_over_errors
+
1379 stats
->rx_crc_errors
+
1380 stats
->rx_frame_errors
+
1381 stats
->rx_fifo_errors
+
1382 stats
->rx_missed_errors
+
1383 mac_stats
->rx_symbol_error
);
1384 stats
->tx_errors
= (stats
->tx_window_errors
+
1390 /* Context: netif_tx_lock held, BHs disabled. */
1391 static void efx_watchdog(struct net_device
*net_dev
)
1393 struct efx_nic
*efx
= netdev_priv(net_dev
);
1395 EFX_ERR(efx
, "TX stuck with stop_count=%d port_enabled=%d:"
1396 " resetting channels\n",
1397 atomic_read(&efx
->netif_stop_count
), efx
->port_enabled
);
1399 efx_schedule_reset(efx
, RESET_TYPE_TX_WATCHDOG
);
1403 /* Context: process, rtnl_lock() held. */
1404 static int efx_change_mtu(struct net_device
*net_dev
, int new_mtu
)
1406 struct efx_nic
*efx
= netdev_priv(net_dev
);
1409 EFX_ASSERT_RESET_SERIALISED(efx
);
1411 if (new_mtu
> EFX_MAX_MTU
)
1416 EFX_LOG(efx
, "changing MTU to %d\n", new_mtu
);
1418 efx_fini_channels(efx
);
1419 net_dev
->mtu
= new_mtu
;
1420 efx_init_channels(efx
);
1426 static int efx_set_mac_address(struct net_device
*net_dev
, void *data
)
1428 struct efx_nic
*efx
= netdev_priv(net_dev
);
1429 struct sockaddr
*addr
= data
;
1430 char *new_addr
= addr
->sa_data
;
1432 EFX_ASSERT_RESET_SERIALISED(efx
);
1434 if (!is_valid_ether_addr(new_addr
)) {
1435 EFX_ERR(efx
, "invalid ethernet MAC address requested: %pM\n",
1440 memcpy(net_dev
->dev_addr
, new_addr
, net_dev
->addr_len
);
1442 /* Reconfigure the MAC */
1443 efx_reconfigure_port(efx
);
1448 /* Context: netif_addr_lock held, BHs disabled. */
1449 static void efx_set_multicast_list(struct net_device
*net_dev
)
1451 struct efx_nic
*efx
= netdev_priv(net_dev
);
1452 struct dev_mc_list
*mc_list
= net_dev
->mc_list
;
1453 union efx_multicast_hash
*mc_hash
= &efx
->multicast_hash
;
1454 bool promiscuous
= !!(net_dev
->flags
& IFF_PROMISC
);
1455 bool changed
= (efx
->promiscuous
!= promiscuous
);
1460 efx
->promiscuous
= promiscuous
;
1462 /* Build multicast hash table */
1463 if (promiscuous
|| (net_dev
->flags
& IFF_ALLMULTI
)) {
1464 memset(mc_hash
, 0xff, sizeof(*mc_hash
));
1466 memset(mc_hash
, 0x00, sizeof(*mc_hash
));
1467 for (i
= 0; i
< net_dev
->mc_count
; i
++) {
1468 crc
= ether_crc_le(ETH_ALEN
, mc_list
->dmi_addr
);
1469 bit
= crc
& (EFX_MCAST_HASH_ENTRIES
- 1);
1470 set_bit_le(bit
, mc_hash
->byte
);
1471 mc_list
= mc_list
->next
;
1475 if (!efx
->port_enabled
)
1476 /* Delay pushing settings until efx_start_port() */
1480 queue_work(efx
->workqueue
, &efx
->reconfigure_work
);
1482 /* Create and activate new global multicast hash table */
1483 falcon_set_multicast_hash(efx
);
1486 static const struct net_device_ops efx_netdev_ops
= {
1487 .ndo_open
= efx_net_open
,
1488 .ndo_stop
= efx_net_stop
,
1489 .ndo_get_stats
= efx_net_stats
,
1490 .ndo_tx_timeout
= efx_watchdog
,
1491 .ndo_start_xmit
= efx_hard_start_xmit
,
1492 .ndo_validate_addr
= eth_validate_addr
,
1493 .ndo_do_ioctl
= efx_ioctl
,
1494 .ndo_change_mtu
= efx_change_mtu
,
1495 .ndo_set_mac_address
= efx_set_mac_address
,
1496 .ndo_set_multicast_list
= efx_set_multicast_list
,
1497 #ifdef CONFIG_NET_POLL_CONTROLLER
1498 .ndo_poll_controller
= efx_netpoll
,
1502 static int efx_netdev_event(struct notifier_block
*this,
1503 unsigned long event
, void *ptr
)
1505 struct net_device
*net_dev
= ptr
;
1507 if (net_dev
->netdev_ops
== &efx_netdev_ops
&& event
== NETDEV_CHANGENAME
) {
1508 struct efx_nic
*efx
= netdev_priv(net_dev
);
1510 strcpy(efx
->name
, net_dev
->name
);
1511 efx_mtd_rename(efx
);
1512 efx_set_channel_names(efx
);
1518 static struct notifier_block efx_netdev_notifier
= {
1519 .notifier_call
= efx_netdev_event
,
1523 show_phy_type(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1525 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
1526 return sprintf(buf
, "%d\n", efx
->phy_type
);
1528 static DEVICE_ATTR(phy_type
, 0644, show_phy_type
, NULL
);
1530 static int efx_register_netdev(struct efx_nic
*efx
)
1532 struct net_device
*net_dev
= efx
->net_dev
;
1535 net_dev
->watchdog_timeo
= 5 * HZ
;
1536 net_dev
->irq
= efx
->pci_dev
->irq
;
1537 net_dev
->netdev_ops
= &efx_netdev_ops
;
1538 SET_NETDEV_DEV(net_dev
, &efx
->pci_dev
->dev
);
1539 SET_ETHTOOL_OPS(net_dev
, &efx_ethtool_ops
);
1541 /* Always start with carrier off; PHY events will detect the link */
1542 netif_carrier_off(efx
->net_dev
);
1544 /* Clear MAC statistics */
1545 efx
->mac_op
->update_stats(efx
);
1546 memset(&efx
->mac_stats
, 0, sizeof(efx
->mac_stats
));
1548 rc
= register_netdev(net_dev
);
1550 EFX_ERR(efx
, "could not register net dev\n");
1553 strcpy(efx
->name
, net_dev
->name
);
1554 efx_set_channel_names(efx
);
1556 rc
= device_create_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1558 EFX_ERR(efx
, "failed to init net dev attributes\n");
1559 goto fail_registered
;
1565 unregister_netdev(net_dev
);
1569 static void efx_unregister_netdev(struct efx_nic
*efx
)
1571 struct efx_tx_queue
*tx_queue
;
1576 BUG_ON(netdev_priv(efx
->net_dev
) != efx
);
1578 /* Free up any skbs still remaining. This has to happen before
1579 * we try to unregister the netdev as running their destructors
1580 * may be needed to get the device ref. count to 0. */
1581 efx_for_each_tx_queue(tx_queue
, efx
)
1582 efx_release_tx_buffers(tx_queue
);
1584 if (efx_dev_registered(efx
)) {
1585 strlcpy(efx
->name
, pci_name(efx
->pci_dev
), sizeof(efx
->name
));
1586 device_remove_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1587 unregister_netdev(efx
->net_dev
);
1591 /**************************************************************************
1593 * Device reset and suspend
1595 **************************************************************************/
1597 /* Tears down the entire software state and most of the hardware state
1599 void efx_reset_down(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
)
1601 EFX_ASSERT_RESET_SERIALISED(efx
);
1603 /* The net_dev->get_stats handler is quite slow, and will fail
1604 * if a fetch is pending over reset. Serialise against it. */
1605 spin_lock(&efx
->stats_lock
);
1606 efx
->stats_enabled
= false;
1607 spin_unlock(&efx
->stats_lock
);
1610 mutex_lock(&efx
->mac_lock
);
1611 mutex_lock(&efx
->spi_lock
);
1613 efx
->phy_op
->get_settings(efx
, ecmd
);
1615 efx_fini_channels(efx
);
1618 /* This function will always ensure that the locks acquired in
1619 * efx_reset_down() are released. A failure return code indicates
1620 * that we were unable to reinitialise the hardware, and the
1621 * driver should be disabled. If ok is false, then the rx and tx
1622 * engines are not restarted, pending a RESET_DISABLE. */
1623 int efx_reset_up(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
, bool ok
)
1627 EFX_ASSERT_RESET_SERIALISED(efx
);
1629 rc
= falcon_init_nic(efx
);
1631 EFX_ERR(efx
, "failed to initialise NIC\n");
1636 efx_init_channels(efx
);
1638 if (efx
->phy_op
->set_settings(efx
, ecmd
))
1639 EFX_ERR(efx
, "could not restore PHY settings\n");
1642 mutex_unlock(&efx
->spi_lock
);
1643 mutex_unlock(&efx
->mac_lock
);
1647 efx
->stats_enabled
= true;
1652 /* Reset the NIC as transparently as possible. Do not reset the PHY
1653 * Note that the reset may fail, in which case the card will be left
1654 * in a most-probably-unusable state.
1656 * This function will sleep. You cannot reset from within an atomic
1657 * state; use efx_schedule_reset() instead.
1659 * Grabs the rtnl_lock.
1661 static int efx_reset(struct efx_nic
*efx
)
1663 struct ethtool_cmd ecmd
;
1664 enum reset_type method
= efx
->reset_pending
;
1667 /* Serialise with kernel interfaces */
1670 /* If we're not RUNNING then don't reset. Leave the reset_pending
1671 * flag set so that efx_pci_probe_main will be retried */
1672 if (efx
->state
!= STATE_RUNNING
) {
1673 EFX_INFO(efx
, "scheduled reset quenched. NIC not RUNNING\n");
1677 EFX_INFO(efx
, "resetting (%d)\n", method
);
1679 efx_reset_down(efx
, &ecmd
);
1681 rc
= falcon_reset_hw(efx
, method
);
1683 EFX_ERR(efx
, "failed to reset hardware\n");
1687 /* Allow resets to be rescheduled. */
1688 efx
->reset_pending
= RESET_TYPE_NONE
;
1690 /* Reinitialise bus-mastering, which may have been turned off before
1691 * the reset was scheduled. This is still appropriate, even in the
1692 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1693 * can respond to requests. */
1694 pci_set_master(efx
->pci_dev
);
1696 /* Leave device stopped if necessary */
1697 if (method
== RESET_TYPE_DISABLE
) {
1702 rc
= efx_reset_up(efx
, &ecmd
, true);
1706 EFX_LOG(efx
, "reset complete\n");
1712 efx_reset_up(efx
, &ecmd
, false);
1714 EFX_ERR(efx
, "has been disabled\n");
1715 efx
->state
= STATE_DISABLED
;
1718 efx_unregister_netdev(efx
);
1723 /* The worker thread exists so that code that cannot sleep can
1724 * schedule a reset for later.
1726 static void efx_reset_work(struct work_struct
*data
)
1728 struct efx_nic
*nic
= container_of(data
, struct efx_nic
, reset_work
);
1733 void efx_schedule_reset(struct efx_nic
*efx
, enum reset_type type
)
1735 enum reset_type method
;
1737 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
1738 EFX_INFO(efx
, "quenching already scheduled reset\n");
1743 case RESET_TYPE_INVISIBLE
:
1744 case RESET_TYPE_ALL
:
1745 case RESET_TYPE_WORLD
:
1746 case RESET_TYPE_DISABLE
:
1749 case RESET_TYPE_RX_RECOVERY
:
1750 case RESET_TYPE_RX_DESC_FETCH
:
1751 case RESET_TYPE_TX_DESC_FETCH
:
1752 case RESET_TYPE_TX_SKIP
:
1753 method
= RESET_TYPE_INVISIBLE
;
1756 method
= RESET_TYPE_ALL
;
1761 EFX_LOG(efx
, "scheduling reset (%d:%d)\n", type
, method
);
1763 EFX_LOG(efx
, "scheduling reset (%d)\n", method
);
1765 efx
->reset_pending
= method
;
1767 queue_work(reset_workqueue
, &efx
->reset_work
);
1770 /**************************************************************************
1772 * List of NICs we support
1774 **************************************************************************/
1776 /* PCI device ID table */
1777 static struct pci_device_id efx_pci_table
[] __devinitdata
= {
1778 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_A_P_DEVID
),
1779 .driver_data
= (unsigned long) &falcon_a_nic_type
},
1780 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_B_P_DEVID
),
1781 .driver_data
= (unsigned long) &falcon_b_nic_type
},
1782 {0} /* end of list */
1785 /**************************************************************************
1787 * Dummy PHY/MAC/Board operations
1789 * Can be used for some unimplemented operations
1790 * Needed so all function pointers are valid and do not have to be tested
1793 **************************************************************************/
1794 int efx_port_dummy_op_int(struct efx_nic
*efx
)
1798 void efx_port_dummy_op_void(struct efx_nic
*efx
) {}
1799 void efx_port_dummy_op_blink(struct efx_nic
*efx
, bool blink
) {}
1801 static struct efx_mac_operations efx_dummy_mac_operations
= {
1802 .reconfigure
= efx_port_dummy_op_void
,
1805 static struct efx_phy_operations efx_dummy_phy_operations
= {
1806 .init
= efx_port_dummy_op_int
,
1807 .reconfigure
= efx_port_dummy_op_void
,
1808 .check_hw
= efx_port_dummy_op_int
,
1809 .fini
= efx_port_dummy_op_void
,
1810 .clear_interrupt
= efx_port_dummy_op_void
,
1813 static struct efx_board efx_dummy_board_info
= {
1814 .init
= efx_port_dummy_op_int
,
1815 .init_leds
= efx_port_dummy_op_int
,
1816 .set_fault_led
= efx_port_dummy_op_blink
,
1817 .monitor
= efx_port_dummy_op_int
,
1818 .blink
= efx_port_dummy_op_blink
,
1819 .fini
= efx_port_dummy_op_void
,
1822 /**************************************************************************
1826 **************************************************************************/
1828 /* This zeroes out and then fills in the invariants in a struct
1829 * efx_nic (including all sub-structures).
1831 static int efx_init_struct(struct efx_nic
*efx
, struct efx_nic_type
*type
,
1832 struct pci_dev
*pci_dev
, struct net_device
*net_dev
)
1834 struct efx_channel
*channel
;
1835 struct efx_tx_queue
*tx_queue
;
1836 struct efx_rx_queue
*rx_queue
;
1839 /* Initialise common structures */
1840 memset(efx
, 0, sizeof(*efx
));
1841 spin_lock_init(&efx
->biu_lock
);
1842 spin_lock_init(&efx
->phy_lock
);
1843 mutex_init(&efx
->spi_lock
);
1844 INIT_WORK(&efx
->reset_work
, efx_reset_work
);
1845 INIT_DELAYED_WORK(&efx
->monitor_work
, efx_monitor
);
1846 efx
->pci_dev
= pci_dev
;
1847 efx
->state
= STATE_INIT
;
1848 efx
->reset_pending
= RESET_TYPE_NONE
;
1849 strlcpy(efx
->name
, pci_name(pci_dev
), sizeof(efx
->name
));
1850 efx
->board_info
= efx_dummy_board_info
;
1852 efx
->net_dev
= net_dev
;
1853 efx
->rx_checksum_enabled
= true;
1854 spin_lock_init(&efx
->netif_stop_lock
);
1855 spin_lock_init(&efx
->stats_lock
);
1856 mutex_init(&efx
->mac_lock
);
1857 efx
->mac_op
= &efx_dummy_mac_operations
;
1858 efx
->phy_op
= &efx_dummy_phy_operations
;
1859 efx
->mii
.dev
= net_dev
;
1860 INIT_WORK(&efx
->reconfigure_work
, efx_reconfigure_work
);
1861 atomic_set(&efx
->netif_stop_count
, 1);
1863 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++) {
1864 channel
= &efx
->channel
[i
];
1866 channel
->channel
= i
;
1867 channel
->work_pending
= false;
1869 for (i
= 0; i
< EFX_TX_QUEUE_COUNT
; i
++) {
1870 tx_queue
= &efx
->tx_queue
[i
];
1871 tx_queue
->efx
= efx
;
1872 tx_queue
->queue
= i
;
1873 tx_queue
->buffer
= NULL
;
1874 tx_queue
->channel
= &efx
->channel
[0]; /* for safety */
1875 tx_queue
->tso_headers_free
= NULL
;
1877 for (i
= 0; i
< EFX_MAX_RX_QUEUES
; i
++) {
1878 rx_queue
= &efx
->rx_queue
[i
];
1879 rx_queue
->efx
= efx
;
1880 rx_queue
->queue
= i
;
1881 rx_queue
->channel
= &efx
->channel
[0]; /* for safety */
1882 rx_queue
->buffer
= NULL
;
1883 spin_lock_init(&rx_queue
->add_lock
);
1884 INIT_DELAYED_WORK(&rx_queue
->work
, efx_rx_work
);
1889 /* Sanity-check NIC type */
1890 EFX_BUG_ON_PARANOID(efx
->type
->txd_ring_mask
&
1891 (efx
->type
->txd_ring_mask
+ 1));
1892 EFX_BUG_ON_PARANOID(efx
->type
->rxd_ring_mask
&
1893 (efx
->type
->rxd_ring_mask
+ 1));
1894 EFX_BUG_ON_PARANOID(efx
->type
->evq_size
&
1895 (efx
->type
->evq_size
- 1));
1896 /* As close as we can get to guaranteeing that we don't overflow */
1897 EFX_BUG_ON_PARANOID(efx
->type
->evq_size
<
1898 (efx
->type
->txd_ring_mask
+ 1 +
1899 efx
->type
->rxd_ring_mask
+ 1));
1900 EFX_BUG_ON_PARANOID(efx
->type
->phys_addr_channels
> EFX_MAX_CHANNELS
);
1902 /* Higher numbered interrupt modes are less capable! */
1903 efx
->interrupt_mode
= max(efx
->type
->max_interrupt_mode
,
1906 efx
->workqueue
= create_singlethread_workqueue("sfc_work");
1907 if (!efx
->workqueue
)
1913 static void efx_fini_struct(struct efx_nic
*efx
)
1915 if (efx
->workqueue
) {
1916 destroy_workqueue(efx
->workqueue
);
1917 efx
->workqueue
= NULL
;
1921 /**************************************************************************
1925 **************************************************************************/
1927 /* Main body of final NIC shutdown code
1928 * This is called only at module unload (or hotplug removal).
1930 static void efx_pci_remove_main(struct efx_nic
*efx
)
1932 EFX_ASSERT_RESET_SERIALISED(efx
);
1934 /* Skip everything if we never obtained a valid membase */
1938 efx_fini_channels(efx
);
1941 /* Shutdown the board, then the NIC and board state */
1942 efx
->board_info
.fini(efx
);
1943 falcon_fini_interrupt(efx
);
1946 efx_remove_all(efx
);
1949 /* Final NIC shutdown
1950 * This is called only at module unload (or hotplug removal).
1952 static void efx_pci_remove(struct pci_dev
*pci_dev
)
1954 struct efx_nic
*efx
;
1956 efx
= pci_get_drvdata(pci_dev
);
1960 efx_mtd_remove(efx
);
1962 /* Mark the NIC as fini, then stop the interface */
1964 efx
->state
= STATE_FINI
;
1965 dev_close(efx
->net_dev
);
1967 /* Allow any queued efx_resets() to complete */
1970 if (efx
->membase
== NULL
)
1973 efx_unregister_netdev(efx
);
1975 /* Wait for any scheduled resets to complete. No more will be
1976 * scheduled from this point because efx_stop_all() has been
1977 * called, we are no longer registered with driverlink, and
1978 * the net_device's have been removed. */
1979 cancel_work_sync(&efx
->reset_work
);
1981 efx_pci_remove_main(efx
);
1985 EFX_LOG(efx
, "shutdown successful\n");
1987 pci_set_drvdata(pci_dev
, NULL
);
1988 efx_fini_struct(efx
);
1989 free_netdev(efx
->net_dev
);
1992 /* Main body of NIC initialisation
1993 * This is called at module load (or hotplug insertion, theoretically).
1995 static int efx_pci_probe_main(struct efx_nic
*efx
)
1999 /* Do start-of-day initialisation */
2000 rc
= efx_probe_all(efx
);
2004 rc
= efx_init_napi(efx
);
2008 /* Initialise the board */
2009 rc
= efx
->board_info
.init(efx
);
2011 EFX_ERR(efx
, "failed to initialise board\n");
2015 rc
= falcon_init_nic(efx
);
2017 EFX_ERR(efx
, "failed to initialise NIC\n");
2021 rc
= efx_init_port(efx
);
2023 EFX_ERR(efx
, "failed to initialise port\n");
2027 efx_init_channels(efx
);
2029 rc
= falcon_init_interrupt(efx
);
2036 efx_fini_channels(efx
);
2040 efx
->board_info
.fini(efx
);
2044 efx_remove_all(efx
);
2049 /* NIC initialisation
2051 * This is called at module load (or hotplug insertion,
2052 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2053 * sets up and registers the network devices with the kernel and hooks
2054 * the interrupt service routine. It does not prepare the device for
2055 * transmission; this is left to the first time one of the network
2056 * interfaces is brought up (i.e. efx_net_open).
2058 static int __devinit
efx_pci_probe(struct pci_dev
*pci_dev
,
2059 const struct pci_device_id
*entry
)
2061 struct efx_nic_type
*type
= (struct efx_nic_type
*) entry
->driver_data
;
2062 struct net_device
*net_dev
;
2063 struct efx_nic
*efx
;
2066 /* Allocate and initialise a struct net_device and struct efx_nic */
2067 net_dev
= alloc_etherdev(sizeof(*efx
));
2070 net_dev
->features
|= (NETIF_F_IP_CSUM
| NETIF_F_SG
|
2071 NETIF_F_HIGHDMA
| NETIF_F_TSO
);
2073 net_dev
->features
|= NETIF_F_LRO
;
2074 /* Mask for features that also apply to VLAN devices */
2075 net_dev
->vlan_features
|= (NETIF_F_ALL_CSUM
| NETIF_F_SG
|
2076 NETIF_F_HIGHDMA
| NETIF_F_TSO
);
2077 efx
= netdev_priv(net_dev
);
2078 pci_set_drvdata(pci_dev
, efx
);
2079 rc
= efx_init_struct(efx
, type
, pci_dev
, net_dev
);
2083 EFX_INFO(efx
, "Solarflare Communications NIC detected\n");
2085 /* Set up basic I/O (BAR mappings etc) */
2086 rc
= efx_init_io(efx
);
2090 /* No serialisation is required with the reset path because
2091 * we're in STATE_INIT. */
2092 for (i
= 0; i
< 5; i
++) {
2093 rc
= efx_pci_probe_main(efx
);
2097 /* Serialise against efx_reset(). No more resets will be
2098 * scheduled since efx_stop_all() has been called, and we
2099 * have not and never have been registered with either
2100 * the rtnetlink or driverlink layers. */
2101 cancel_work_sync(&efx
->reset_work
);
2103 /* Retry if a recoverably reset event has been scheduled */
2104 if ((efx
->reset_pending
!= RESET_TYPE_INVISIBLE
) &&
2105 (efx
->reset_pending
!= RESET_TYPE_ALL
))
2108 efx
->reset_pending
= RESET_TYPE_NONE
;
2112 EFX_ERR(efx
, "Could not reset NIC\n");
2116 /* Switch to the running state before we expose the device to
2117 * the OS. This is to ensure that the initial gathering of
2118 * MAC stats succeeds. */
2120 efx
->state
= STATE_RUNNING
;
2123 rc
= efx_register_netdev(efx
);
2127 EFX_LOG(efx
, "initialisation successful\n");
2129 efx_mtd_probe(efx
); /* allowed to fail */
2133 efx_pci_remove_main(efx
);
2138 efx_fini_struct(efx
);
2140 EFX_LOG(efx
, "initialisation failed. rc=%d\n", rc
);
2141 free_netdev(net_dev
);
2145 static struct pci_driver efx_pci_driver
= {
2146 .name
= EFX_DRIVER_NAME
,
2147 .id_table
= efx_pci_table
,
2148 .probe
= efx_pci_probe
,
2149 .remove
= efx_pci_remove
,
2152 /**************************************************************************
2154 * Kernel module interface
2156 *************************************************************************/
2158 module_param(interrupt_mode
, uint
, 0444);
2159 MODULE_PARM_DESC(interrupt_mode
,
2160 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2162 static int __init
efx_init_module(void)
2166 printk(KERN_INFO
"Solarflare NET driver v" EFX_DRIVER_VERSION
"\n");
2168 rc
= register_netdevice_notifier(&efx_netdev_notifier
);
2172 refill_workqueue
= create_workqueue("sfc_refill");
2173 if (!refill_workqueue
) {
2177 reset_workqueue
= create_singlethread_workqueue("sfc_reset");
2178 if (!reset_workqueue
) {
2183 rc
= pci_register_driver(&efx_pci_driver
);
2190 destroy_workqueue(reset_workqueue
);
2192 destroy_workqueue(refill_workqueue
);
2194 unregister_netdevice_notifier(&efx_netdev_notifier
);
2199 static void __exit
efx_exit_module(void)
2201 printk(KERN_INFO
"Solarflare NET driver unloading\n");
2203 pci_unregister_driver(&efx_pci_driver
);
2204 destroy_workqueue(reset_workqueue
);
2205 destroy_workqueue(refill_workqueue
);
2206 unregister_netdevice_notifier(&efx_netdev_notifier
);
2210 module_init(efx_init_module
);
2211 module_exit(efx_exit_module
);
2213 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2214 "Solarflare Communications");
2215 MODULE_DESCRIPTION("Solarflare Communications network driver");
2216 MODULE_LICENSE("GPL");
2217 MODULE_DEVICE_TABLE(pci
, efx_pci_table
);