Linux 2.6.31.6
[linux-2.6/verdex.git] / drivers / usb / host / ehci-q.c
blob7673554fa64df28317e4edb9e97eecedd3272fc8
1 /*
2 * Copyright (C) 2001-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
41 /*-------------------------------------------------------------------------*/
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
45 static int
46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47 size_t len, int token, int maxpacket)
49 int i, count;
50 u64 addr = buf;
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54 qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
55 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
56 if (likely (len < count)) /* ... iff needed */
57 count = len;
58 else {
59 buf += 0x1000;
60 buf &= ~0x0fff;
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i = 1; count < len && i < 5; i++) {
64 addr = buf;
65 qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66 qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
67 (u32)(addr >> 32));
68 buf += 0x1000;
69 if ((count + 0x1000) < len)
70 count += 0x1000;
71 else
72 count = len;
75 /* short packets may only terminate transfers */
76 if (count != len)
77 count -= (count % maxpacket);
79 qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
80 qtd->length = count;
82 return count;
85 /*-------------------------------------------------------------------------*/
87 static inline void
88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
90 /* writes to an active overlay are unsafe */
91 BUG_ON(qh->qh_state != QH_STATE_IDLE);
93 qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
94 qh->hw_alt_next = EHCI_LIST_END(ehci);
96 /* Except for control endpoints, we make hardware maintain data
97 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
98 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
99 * ever clear it.
101 if (!(qh->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
102 unsigned is_out, epnum;
104 is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
105 epnum = (hc32_to_cpup(ehci, &qh->hw_info1) >> 8) & 0x0f;
106 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
107 qh->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
108 usb_settoggle (qh->dev, epnum, is_out, 1);
112 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
113 wmb ();
114 qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
117 /* if it weren't for a common silicon quirk (writing the dummy into the qh
118 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
119 * recovery (including urb dequeue) would need software changes to a QH...
121 static void
122 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
124 struct ehci_qtd *qtd;
126 if (list_empty (&qh->qtd_list))
127 qtd = qh->dummy;
128 else {
129 qtd = list_entry (qh->qtd_list.next,
130 struct ehci_qtd, qtd_list);
131 /* first qtd may already be partially processed */
132 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw_current)
133 qtd = NULL;
136 if (qtd)
137 qh_update (ehci, qh, qtd);
140 /*-------------------------------------------------------------------------*/
142 static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
144 static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
145 struct usb_host_endpoint *ep)
147 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
148 struct ehci_qh *qh = ep->hcpriv;
149 unsigned long flags;
151 spin_lock_irqsave(&ehci->lock, flags);
152 qh->clearing_tt = 0;
153 if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
154 && HC_IS_RUNNING(hcd->state))
155 qh_link_async(ehci, qh);
156 spin_unlock_irqrestore(&ehci->lock, flags);
159 static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
160 struct urb *urb, u32 token)
163 /* If an async split transaction gets an error or is unlinked,
164 * the TT buffer may be left in an indeterminate state. We
165 * have to clear the TT buffer.
167 * Note: this routine is never called for Isochronous transfers.
169 if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
170 #ifdef DEBUG
171 struct usb_device *tt = urb->dev->tt->hub;
172 dev_dbg(&tt->dev,
173 "clear tt buffer port %d, a%d ep%d t%08x\n",
174 urb->dev->ttport, urb->dev->devnum,
175 usb_pipeendpoint(urb->pipe), token);
176 #endif /* DEBUG */
177 if (!ehci_is_TDI(ehci)
178 || urb->dev->tt->hub !=
179 ehci_to_hcd(ehci)->self.root_hub) {
180 if (usb_hub_clear_tt_buffer(urb) == 0)
181 qh->clearing_tt = 1;
182 } else {
184 /* REVISIT ARC-derived cores don't clear the root
185 * hub TT buffer in this way...
191 static int qtd_copy_status (
192 struct ehci_hcd *ehci,
193 struct urb *urb,
194 size_t length,
195 u32 token
198 int status = -EINPROGRESS;
200 /* count IN/OUT bytes, not SETUP (even short packets) */
201 if (likely (QTD_PID (token) != 2))
202 urb->actual_length += length - QTD_LENGTH (token);
204 /* don't modify error codes */
205 if (unlikely(urb->unlinked))
206 return status;
208 /* force cleanup after short read; not always an error */
209 if (unlikely (IS_SHORT_READ (token)))
210 status = -EREMOTEIO;
212 /* serious "can't proceed" faults reported by the hardware */
213 if (token & QTD_STS_HALT) {
214 if (token & QTD_STS_BABBLE) {
215 /* FIXME "must" disable babbling device's port too */
216 status = -EOVERFLOW;
217 /* CERR nonzero + halt --> stall */
218 } else if (QTD_CERR(token)) {
219 status = -EPIPE;
221 /* In theory, more than one of the following bits can be set
222 * since they are sticky and the transaction is retried.
223 * Which to test first is rather arbitrary.
225 } else if (token & QTD_STS_MMF) {
226 /* fs/ls interrupt xfer missed the complete-split */
227 status = -EPROTO;
228 } else if (token & QTD_STS_DBE) {
229 status = (QTD_PID (token) == 1) /* IN ? */
230 ? -ENOSR /* hc couldn't read data */
231 : -ECOMM; /* hc couldn't write data */
232 } else if (token & QTD_STS_XACT) {
233 /* timeout, bad CRC, wrong PID, etc */
234 ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
235 urb->dev->devpath,
236 usb_pipeendpoint(urb->pipe),
237 usb_pipein(urb->pipe) ? "in" : "out");
238 status = -EPROTO;
239 } else { /* unknown */
240 status = -EPROTO;
243 ehci_vdbg (ehci,
244 "dev%d ep%d%s qtd token %08x --> status %d\n",
245 usb_pipedevice (urb->pipe),
246 usb_pipeendpoint (urb->pipe),
247 usb_pipein (urb->pipe) ? "in" : "out",
248 token, status);
251 return status;
254 static void
255 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
256 __releases(ehci->lock)
257 __acquires(ehci->lock)
259 if (likely (urb->hcpriv != NULL)) {
260 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
262 /* S-mask in a QH means it's an interrupt urb */
263 if ((qh->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
265 /* ... update hc-wide periodic stats (for usbfs) */
266 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
268 qh_put (qh);
271 if (unlikely(urb->unlinked)) {
272 COUNT(ehci->stats.unlink);
273 } else {
274 /* report non-error and short read status as zero */
275 if (status == -EINPROGRESS || status == -EREMOTEIO)
276 status = 0;
277 COUNT(ehci->stats.complete);
280 #ifdef EHCI_URB_TRACE
281 ehci_dbg (ehci,
282 "%s %s urb %p ep%d%s status %d len %d/%d\n",
283 __func__, urb->dev->devpath, urb,
284 usb_pipeendpoint (urb->pipe),
285 usb_pipein (urb->pipe) ? "in" : "out",
286 status,
287 urb->actual_length, urb->transfer_buffer_length);
288 #endif
290 /* complete() can reenter this HCD */
291 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
292 spin_unlock (&ehci->lock);
293 usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
294 spin_lock (&ehci->lock);
297 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
298 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
300 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
301 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
304 * Process and free completed qtds for a qh, returning URBs to drivers.
305 * Chases up to qh->hw_current. Returns number of completions called,
306 * indicating how much "real" work we did.
308 static unsigned
309 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
311 struct ehci_qtd *last = NULL, *end = qh->dummy;
312 struct list_head *entry, *tmp;
313 int last_status = -EINPROGRESS;
314 int stopped;
315 unsigned count = 0;
316 u8 state;
317 __le32 halt = HALT_BIT(ehci);
319 if (unlikely (list_empty (&qh->qtd_list)))
320 return count;
322 /* completions (or tasks on other cpus) must never clobber HALT
323 * till we've gone through and cleaned everything up, even when
324 * they add urbs to this qh's queue or mark them for unlinking.
326 * NOTE: unlinking expects to be done in queue order.
328 state = qh->qh_state;
329 qh->qh_state = QH_STATE_COMPLETING;
330 stopped = (state == QH_STATE_IDLE);
332 /* remove de-activated QTDs from front of queue.
333 * after faults (including short reads), cleanup this urb
334 * then let the queue advance.
335 * if queue is stopped, handles unlinks.
337 list_for_each_safe (entry, tmp, &qh->qtd_list) {
338 struct ehci_qtd *qtd;
339 struct urb *urb;
340 u32 token = 0;
342 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
343 urb = qtd->urb;
345 /* clean up any state from previous QTD ...*/
346 if (last) {
347 if (likely (last->urb != urb)) {
348 ehci_urb_done(ehci, last->urb, last_status);
349 count++;
350 last_status = -EINPROGRESS;
352 ehci_qtd_free (ehci, last);
353 last = NULL;
356 /* ignore urbs submitted during completions we reported */
357 if (qtd == end)
358 break;
360 /* hardware copies qtd out of qh overlay */
361 rmb ();
362 token = hc32_to_cpu(ehci, qtd->hw_token);
364 /* always clean up qtds the hc de-activated */
365 retry_xacterr:
366 if ((token & QTD_STS_ACTIVE) == 0) {
368 /* on STALL, error, and short reads this urb must
369 * complete and all its qtds must be recycled.
371 if ((token & QTD_STS_HALT) != 0) {
373 /* retry transaction errors until we
374 * reach the software xacterr limit
376 if ((token & QTD_STS_XACT) &&
377 QTD_CERR(token) == 0 &&
378 ++qh->xacterrs < QH_XACTERR_MAX &&
379 !urb->unlinked) {
380 ehci_dbg(ehci,
381 "detected XactErr len %zu/%zu retry %d\n",
382 qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
384 /* reset the token in the qtd and the
385 * qh overlay (which still contains
386 * the qtd) so that we pick up from
387 * where we left off
389 token &= ~QTD_STS_HALT;
390 token |= QTD_STS_ACTIVE |
391 (EHCI_TUNE_CERR << 10);
392 qtd->hw_token = cpu_to_hc32(ehci,
393 token);
394 wmb();
395 qh->hw_token = cpu_to_hc32(ehci, token);
396 goto retry_xacterr;
398 stopped = 1;
400 /* magic dummy for some short reads; qh won't advance.
401 * that silicon quirk can kick in with this dummy too.
403 * other short reads won't stop the queue, including
404 * control transfers (status stage handles that) or
405 * most other single-qtd reads ... the queue stops if
406 * URB_SHORT_NOT_OK was set so the driver submitting
407 * the urbs could clean it up.
409 } else if (IS_SHORT_READ (token)
410 && !(qtd->hw_alt_next
411 & EHCI_LIST_END(ehci))) {
412 stopped = 1;
413 goto halt;
416 /* stop scanning when we reach qtds the hc is using */
417 } else if (likely (!stopped
418 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
419 break;
421 /* scan the whole queue for unlinks whenever it stops */
422 } else {
423 stopped = 1;
425 /* cancel everything if we halt, suspend, etc */
426 if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))
427 last_status = -ESHUTDOWN;
429 /* this qtd is active; skip it unless a previous qtd
430 * for its urb faulted, or its urb was canceled.
432 else if (last_status == -EINPROGRESS && !urb->unlinked)
433 continue;
435 /* qh unlinked; token in overlay may be most current */
436 if (state == QH_STATE_IDLE
437 && cpu_to_hc32(ehci, qtd->qtd_dma)
438 == qh->hw_current) {
439 token = hc32_to_cpu(ehci, qh->hw_token);
441 /* An unlink may leave an incomplete
442 * async transaction in the TT buffer.
443 * We have to clear it.
445 ehci_clear_tt_buffer(ehci, qh, urb, token);
448 /* force halt for unlinked or blocked qh, so we'll
449 * patch the qh later and so that completions can't
450 * activate it while we "know" it's stopped.
452 if ((halt & qh->hw_token) == 0) {
453 halt:
454 qh->hw_token |= halt;
455 wmb ();
459 /* unless we already know the urb's status, collect qtd status
460 * and update count of bytes transferred. in common short read
461 * cases with only one data qtd (including control transfers),
462 * queue processing won't halt. but with two or more qtds (for
463 * example, with a 32 KB transfer), when the first qtd gets a
464 * short read the second must be removed by hand.
466 if (last_status == -EINPROGRESS) {
467 last_status = qtd_copy_status(ehci, urb,
468 qtd->length, token);
469 if (last_status == -EREMOTEIO
470 && (qtd->hw_alt_next
471 & EHCI_LIST_END(ehci)))
472 last_status = -EINPROGRESS;
474 /* As part of low/full-speed endpoint-halt processing
475 * we must clear the TT buffer (11.17.5).
477 if (unlikely(last_status != -EINPROGRESS &&
478 last_status != -EREMOTEIO))
479 ehci_clear_tt_buffer(ehci, qh, urb, token);
482 /* if we're removing something not at the queue head,
483 * patch the hardware queue pointer.
485 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
486 last = list_entry (qtd->qtd_list.prev,
487 struct ehci_qtd, qtd_list);
488 last->hw_next = qtd->hw_next;
491 /* remove qtd; it's recycled after possible urb completion */
492 list_del (&qtd->qtd_list);
493 last = qtd;
495 /* reinit the xacterr counter for the next qtd */
496 qh->xacterrs = 0;
499 /* last urb's completion might still need calling */
500 if (likely (last != NULL)) {
501 ehci_urb_done(ehci, last->urb, last_status);
502 count++;
503 ehci_qtd_free (ehci, last);
506 /* restore original state; caller must unlink or relink */
507 qh->qh_state = state;
509 /* be sure the hardware's done with the qh before refreshing
510 * it after fault cleanup, or recovering from silicon wrongly
511 * overlaying the dummy qtd (which reduces DMA chatter).
513 if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END(ehci)) {
514 switch (state) {
515 case QH_STATE_IDLE:
516 qh_refresh(ehci, qh);
517 break;
518 case QH_STATE_LINKED:
519 /* We won't refresh a QH that's linked (after the HC
520 * stopped the queue). That avoids a race:
521 * - HC reads first part of QH;
522 * - CPU updates that first part and the token;
523 * - HC reads rest of that QH, including token
524 * Result: HC gets an inconsistent image, and then
525 * DMAs to/from the wrong memory (corrupting it).
527 * That should be rare for interrupt transfers,
528 * except maybe high bandwidth ...
530 if ((cpu_to_hc32(ehci, QH_SMASK)
531 & qh->hw_info2) != 0) {
532 intr_deschedule (ehci, qh);
533 (void) qh_schedule (ehci, qh);
534 } else
535 unlink_async (ehci, qh);
536 break;
537 /* otherwise, unlink already started */
541 return count;
544 /*-------------------------------------------------------------------------*/
546 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
547 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
548 // ... and packet size, for any kind of endpoint descriptor
549 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
552 * reverse of qh_urb_transaction: free a list of TDs.
553 * used for cleanup after errors, before HC sees an URB's TDs.
555 static void qtd_list_free (
556 struct ehci_hcd *ehci,
557 struct urb *urb,
558 struct list_head *qtd_list
560 struct list_head *entry, *temp;
562 list_for_each_safe (entry, temp, qtd_list) {
563 struct ehci_qtd *qtd;
565 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
566 list_del (&qtd->qtd_list);
567 ehci_qtd_free (ehci, qtd);
572 * create a list of filled qtds for this URB; won't link into qh.
574 static struct list_head *
575 qh_urb_transaction (
576 struct ehci_hcd *ehci,
577 struct urb *urb,
578 struct list_head *head,
579 gfp_t flags
581 struct ehci_qtd *qtd, *qtd_prev;
582 dma_addr_t buf;
583 int len, maxpacket;
584 int is_input;
585 u32 token;
588 * URBs map to sequences of QTDs: one logical transaction
590 qtd = ehci_qtd_alloc (ehci, flags);
591 if (unlikely (!qtd))
592 return NULL;
593 list_add_tail (&qtd->qtd_list, head);
594 qtd->urb = urb;
596 token = QTD_STS_ACTIVE;
597 token |= (EHCI_TUNE_CERR << 10);
598 /* for split transactions, SplitXState initialized to zero */
600 len = urb->transfer_buffer_length;
601 is_input = usb_pipein (urb->pipe);
602 if (usb_pipecontrol (urb->pipe)) {
603 /* SETUP pid */
604 qtd_fill(ehci, qtd, urb->setup_dma,
605 sizeof (struct usb_ctrlrequest),
606 token | (2 /* "setup" */ << 8), 8);
608 /* ... and always at least one more pid */
609 token ^= QTD_TOGGLE;
610 qtd_prev = qtd;
611 qtd = ehci_qtd_alloc (ehci, flags);
612 if (unlikely (!qtd))
613 goto cleanup;
614 qtd->urb = urb;
615 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
616 list_add_tail (&qtd->qtd_list, head);
618 /* for zero length DATA stages, STATUS is always IN */
619 if (len == 0)
620 token |= (1 /* "in" */ << 8);
624 * data transfer stage: buffer setup
626 buf = urb->transfer_dma;
628 if (is_input)
629 token |= (1 /* "in" */ << 8);
630 /* else it's already initted to "out" pid (0 << 8) */
632 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
635 * buffer gets wrapped in one or more qtds;
636 * last one may be "short" (including zero len)
637 * and may serve as a control status ack
639 for (;;) {
640 int this_qtd_len;
642 this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket);
643 len -= this_qtd_len;
644 buf += this_qtd_len;
647 * short reads advance to a "magic" dummy instead of the next
648 * qtd ... that forces the queue to stop, for manual cleanup.
649 * (this will usually be overridden later.)
651 if (is_input)
652 qtd->hw_alt_next = ehci->async->hw_alt_next;
654 /* qh makes control packets use qtd toggle; maybe switch it */
655 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
656 token ^= QTD_TOGGLE;
658 if (likely (len <= 0))
659 break;
661 qtd_prev = qtd;
662 qtd = ehci_qtd_alloc (ehci, flags);
663 if (unlikely (!qtd))
664 goto cleanup;
665 qtd->urb = urb;
666 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
667 list_add_tail (&qtd->qtd_list, head);
671 * unless the caller requires manual cleanup after short reads,
672 * have the alt_next mechanism keep the queue running after the
673 * last data qtd (the only one, for control and most other cases).
675 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
676 || usb_pipecontrol (urb->pipe)))
677 qtd->hw_alt_next = EHCI_LIST_END(ehci);
680 * control requests may need a terminating data "status" ack;
681 * bulk ones may need a terminating short packet (zero length).
683 if (likely (urb->transfer_buffer_length != 0)) {
684 int one_more = 0;
686 if (usb_pipecontrol (urb->pipe)) {
687 one_more = 1;
688 token ^= 0x0100; /* "in" <--> "out" */
689 token |= QTD_TOGGLE; /* force DATA1 */
690 } else if (usb_pipebulk (urb->pipe)
691 && (urb->transfer_flags & URB_ZERO_PACKET)
692 && !(urb->transfer_buffer_length % maxpacket)) {
693 one_more = 1;
695 if (one_more) {
696 qtd_prev = qtd;
697 qtd = ehci_qtd_alloc (ehci, flags);
698 if (unlikely (!qtd))
699 goto cleanup;
700 qtd->urb = urb;
701 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
702 list_add_tail (&qtd->qtd_list, head);
704 /* never any data in such packets */
705 qtd_fill(ehci, qtd, 0, 0, token, 0);
709 /* by default, enable interrupt on urb completion */
710 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
711 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
712 return head;
714 cleanup:
715 qtd_list_free (ehci, urb, head);
716 return NULL;
719 /*-------------------------------------------------------------------------*/
721 // Would be best to create all qh's from config descriptors,
722 // when each interface/altsetting is established. Unlink
723 // any previous qh and cancel its urbs first; endpoints are
724 // implicitly reset then (data toggle too).
725 // That'd mean updating how usbcore talks to HCDs. (2.7?)
729 * Each QH holds a qtd list; a QH is used for everything except iso.
731 * For interrupt urbs, the scheduler must set the microframe scheduling
732 * mask(s) each time the QH gets scheduled. For highspeed, that's
733 * just one microframe in the s-mask. For split interrupt transactions
734 * there are additional complications: c-mask, maybe FSTNs.
736 static struct ehci_qh *
737 qh_make (
738 struct ehci_hcd *ehci,
739 struct urb *urb,
740 gfp_t flags
742 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
743 u32 info1 = 0, info2 = 0;
744 int is_input, type;
745 int maxp = 0;
746 struct usb_tt *tt = urb->dev->tt;
748 if (!qh)
749 return qh;
752 * init endpoint/device data for this QH
754 info1 |= usb_pipeendpoint (urb->pipe) << 8;
755 info1 |= usb_pipedevice (urb->pipe) << 0;
757 is_input = usb_pipein (urb->pipe);
758 type = usb_pipetype (urb->pipe);
759 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
761 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
762 * acts like up to 3KB, but is built from smaller packets.
764 if (max_packet(maxp) > 1024) {
765 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
766 goto done;
769 /* Compute interrupt scheduling parameters just once, and save.
770 * - allowing for high bandwidth, how many nsec/uframe are used?
771 * - split transactions need a second CSPLIT uframe; same question
772 * - splits also need a schedule gap (for full/low speed I/O)
773 * - qh has a polling interval
775 * For control/bulk requests, the HC or TT handles these.
777 if (type == PIPE_INTERRUPT) {
778 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
779 is_input, 0,
780 hb_mult(maxp) * max_packet(maxp)));
781 qh->start = NO_FRAME;
783 if (urb->dev->speed == USB_SPEED_HIGH) {
784 qh->c_usecs = 0;
785 qh->gap_uf = 0;
787 qh->period = urb->interval >> 3;
788 if (qh->period == 0 && urb->interval != 1) {
789 /* NOTE interval 2 or 4 uframes could work.
790 * But interval 1 scheduling is simpler, and
791 * includes high bandwidth.
793 dbg ("intr period %d uframes, NYET!",
794 urb->interval);
795 goto done;
797 } else {
798 int think_time;
800 /* gap is f(FS/LS transfer times) */
801 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
802 is_input, 0, maxp) / (125 * 1000);
804 /* FIXME this just approximates SPLIT/CSPLIT times */
805 if (is_input) { // SPLIT, gap, CSPLIT+DATA
806 qh->c_usecs = qh->usecs + HS_USECS (0);
807 qh->usecs = HS_USECS (1);
808 } else { // SPLIT+DATA, gap, CSPLIT
809 qh->usecs += HS_USECS (1);
810 qh->c_usecs = HS_USECS (0);
813 think_time = tt ? tt->think_time : 0;
814 qh->tt_usecs = NS_TO_US (think_time +
815 usb_calc_bus_time (urb->dev->speed,
816 is_input, 0, max_packet (maxp)));
817 qh->period = urb->interval;
821 /* support for tt scheduling, and access to toggles */
822 qh->dev = urb->dev;
824 /* using TT? */
825 switch (urb->dev->speed) {
826 case USB_SPEED_LOW:
827 info1 |= (1 << 12); /* EPS "low" */
828 /* FALL THROUGH */
830 case USB_SPEED_FULL:
831 /* EPS 0 means "full" */
832 if (type != PIPE_INTERRUPT)
833 info1 |= (EHCI_TUNE_RL_TT << 28);
834 if (type == PIPE_CONTROL) {
835 info1 |= (1 << 27); /* for TT */
836 info1 |= 1 << 14; /* toggle from qtd */
838 info1 |= maxp << 16;
840 info2 |= (EHCI_TUNE_MULT_TT << 30);
842 /* Some Freescale processors have an erratum in which the
843 * port number in the queue head was 0..N-1 instead of 1..N.
845 if (ehci_has_fsl_portno_bug(ehci))
846 info2 |= (urb->dev->ttport-1) << 23;
847 else
848 info2 |= urb->dev->ttport << 23;
850 /* set the address of the TT; for TDI's integrated
851 * root hub tt, leave it zeroed.
853 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
854 info2 |= tt->hub->devnum << 16;
856 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
858 break;
860 case USB_SPEED_HIGH: /* no TT involved */
861 info1 |= (2 << 12); /* EPS "high" */
862 if (type == PIPE_CONTROL) {
863 info1 |= (EHCI_TUNE_RL_HS << 28);
864 info1 |= 64 << 16; /* usb2 fixed maxpacket */
865 info1 |= 1 << 14; /* toggle from qtd */
866 info2 |= (EHCI_TUNE_MULT_HS << 30);
867 } else if (type == PIPE_BULK) {
868 info1 |= (EHCI_TUNE_RL_HS << 28);
869 /* The USB spec says that high speed bulk endpoints
870 * always use 512 byte maxpacket. But some device
871 * vendors decided to ignore that, and MSFT is happy
872 * to help them do so. So now people expect to use
873 * such nonconformant devices with Linux too; sigh.
875 info1 |= max_packet(maxp) << 16;
876 info2 |= (EHCI_TUNE_MULT_HS << 30);
877 } else { /* PIPE_INTERRUPT */
878 info1 |= max_packet (maxp) << 16;
879 info2 |= hb_mult (maxp) << 30;
881 break;
882 default:
883 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
884 done:
885 qh_put (qh);
886 return NULL;
889 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
891 /* init as live, toggle clear, advance to dummy */
892 qh->qh_state = QH_STATE_IDLE;
893 qh->hw_info1 = cpu_to_hc32(ehci, info1);
894 qh->hw_info2 = cpu_to_hc32(ehci, info2);
895 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
896 qh_refresh (ehci, qh);
897 return qh;
900 /*-------------------------------------------------------------------------*/
902 /* move qh (and its qtds) onto async queue; maybe enable queue. */
904 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
906 __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
907 struct ehci_qh *head;
909 /* Don't link a QH if there's a Clear-TT-Buffer pending */
910 if (unlikely(qh->clearing_tt))
911 return;
913 /* (re)start the async schedule? */
914 head = ehci->async;
915 timer_action_done (ehci, TIMER_ASYNC_OFF);
916 if (!head->qh_next.qh) {
917 u32 cmd = ehci_readl(ehci, &ehci->regs->command);
919 if (!(cmd & CMD_ASE)) {
920 /* in case a clear of CMD_ASE didn't take yet */
921 (void)handshake(ehci, &ehci->regs->status,
922 STS_ASS, 0, 150);
923 cmd |= CMD_ASE | CMD_RUN;
924 ehci_writel(ehci, cmd, &ehci->regs->command);
925 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
926 /* posted write need not be known to HC yet ... */
930 /* clear halt and/or toggle; and maybe recover from silicon quirk */
931 if (qh->qh_state == QH_STATE_IDLE)
932 qh_refresh (ehci, qh);
934 /* splice right after start */
935 qh->qh_next = head->qh_next;
936 qh->hw_next = head->hw_next;
937 wmb ();
939 head->qh_next.qh = qh;
940 head->hw_next = dma;
942 qh_get(qh);
943 qh->xacterrs = 0;
944 qh->qh_state = QH_STATE_LINKED;
945 /* qtd completions reported later by interrupt */
948 /*-------------------------------------------------------------------------*/
951 * For control/bulk/interrupt, return QH with these TDs appended.
952 * Allocates and initializes the QH if necessary.
953 * Returns null if it can't allocate a QH it needs to.
954 * If the QH has TDs (urbs) already, that's great.
956 static struct ehci_qh *qh_append_tds (
957 struct ehci_hcd *ehci,
958 struct urb *urb,
959 struct list_head *qtd_list,
960 int epnum,
961 void **ptr
964 struct ehci_qh *qh = NULL;
965 __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
967 qh = (struct ehci_qh *) *ptr;
968 if (unlikely (qh == NULL)) {
969 /* can't sleep here, we have ehci->lock... */
970 qh = qh_make (ehci, urb, GFP_ATOMIC);
971 *ptr = qh;
973 if (likely (qh != NULL)) {
974 struct ehci_qtd *qtd;
976 if (unlikely (list_empty (qtd_list)))
977 qtd = NULL;
978 else
979 qtd = list_entry (qtd_list->next, struct ehci_qtd,
980 qtd_list);
982 /* control qh may need patching ... */
983 if (unlikely (epnum == 0)) {
985 /* usb_reset_device() briefly reverts to address 0 */
986 if (usb_pipedevice (urb->pipe) == 0)
987 qh->hw_info1 &= ~qh_addr_mask;
990 /* just one way to queue requests: swap with the dummy qtd.
991 * only hc or qh_refresh() ever modify the overlay.
993 if (likely (qtd != NULL)) {
994 struct ehci_qtd *dummy;
995 dma_addr_t dma;
996 __hc32 token;
998 /* to avoid racing the HC, use the dummy td instead of
999 * the first td of our list (becomes new dummy). both
1000 * tds stay deactivated until we're done, when the
1001 * HC is allowed to fetch the old dummy (4.10.2).
1003 token = qtd->hw_token;
1004 qtd->hw_token = HALT_BIT(ehci);
1005 wmb ();
1006 dummy = qh->dummy;
1008 dma = dummy->qtd_dma;
1009 *dummy = *qtd;
1010 dummy->qtd_dma = dma;
1012 list_del (&qtd->qtd_list);
1013 list_add (&dummy->qtd_list, qtd_list);
1014 list_splice_tail(qtd_list, &qh->qtd_list);
1016 ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1017 qh->dummy = qtd;
1019 /* hc must see the new dummy at list end */
1020 dma = qtd->qtd_dma;
1021 qtd = list_entry (qh->qtd_list.prev,
1022 struct ehci_qtd, qtd_list);
1023 qtd->hw_next = QTD_NEXT(ehci, dma);
1025 /* let the hc process these next qtds */
1026 wmb ();
1027 dummy->hw_token = token;
1029 urb->hcpriv = qh_get (qh);
1032 return qh;
1035 /*-------------------------------------------------------------------------*/
1037 static int
1038 submit_async (
1039 struct ehci_hcd *ehci,
1040 struct urb *urb,
1041 struct list_head *qtd_list,
1042 gfp_t mem_flags
1044 struct ehci_qtd *qtd;
1045 int epnum;
1046 unsigned long flags;
1047 struct ehci_qh *qh = NULL;
1048 int rc;
1050 qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
1051 epnum = urb->ep->desc.bEndpointAddress;
1053 #ifdef EHCI_URB_TRACE
1054 ehci_dbg (ehci,
1055 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1056 __func__, urb->dev->devpath, urb,
1057 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1058 urb->transfer_buffer_length,
1059 qtd, urb->ep->hcpriv);
1060 #endif
1062 spin_lock_irqsave (&ehci->lock, flags);
1063 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1064 &ehci_to_hcd(ehci)->flags))) {
1065 rc = -ESHUTDOWN;
1066 goto done;
1068 rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1069 if (unlikely(rc))
1070 goto done;
1072 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1073 if (unlikely(qh == NULL)) {
1074 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1075 rc = -ENOMEM;
1076 goto done;
1079 /* Control/bulk operations through TTs don't need scheduling,
1080 * the HC and TT handle it when the TT has a buffer ready.
1082 if (likely (qh->qh_state == QH_STATE_IDLE))
1083 qh_link_async(ehci, qh);
1084 done:
1085 spin_unlock_irqrestore (&ehci->lock, flags);
1086 if (unlikely (qh == NULL))
1087 qtd_list_free (ehci, urb, qtd_list);
1088 return rc;
1091 /*-------------------------------------------------------------------------*/
1093 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
1095 static void end_unlink_async (struct ehci_hcd *ehci)
1097 struct ehci_qh *qh = ehci->reclaim;
1098 struct ehci_qh *next;
1100 iaa_watchdog_done(ehci);
1102 // qh->hw_next = cpu_to_hc32(qh->qh_dma);
1103 qh->qh_state = QH_STATE_IDLE;
1104 qh->qh_next.qh = NULL;
1105 qh_put (qh); // refcount from reclaim
1107 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1108 next = qh->reclaim;
1109 ehci->reclaim = next;
1110 qh->reclaim = NULL;
1112 qh_completions (ehci, qh);
1114 if (!list_empty (&qh->qtd_list)
1115 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
1116 qh_link_async (ehci, qh);
1117 else {
1118 /* it's not free to turn the async schedule on/off; leave it
1119 * active but idle for a while once it empties.
1121 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
1122 && ehci->async->qh_next.qh == NULL)
1123 timer_action (ehci, TIMER_ASYNC_OFF);
1125 qh_put(qh); /* refcount from async list */
1127 if (next) {
1128 ehci->reclaim = NULL;
1129 start_unlink_async (ehci, next);
1133 /* makes sure the async qh will become idle */
1134 /* caller must own ehci->lock */
1136 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1138 int cmd = ehci_readl(ehci, &ehci->regs->command);
1139 struct ehci_qh *prev;
1141 #ifdef DEBUG
1142 assert_spin_locked(&ehci->lock);
1143 if (ehci->reclaim
1144 || (qh->qh_state != QH_STATE_LINKED
1145 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1147 BUG ();
1148 #endif
1150 /* stop async schedule right now? */
1151 if (unlikely (qh == ehci->async)) {
1152 /* can't get here without STS_ASS set */
1153 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1154 && !ehci->reclaim) {
1155 /* ... and CMD_IAAD clear */
1156 ehci_writel(ehci, cmd & ~CMD_ASE,
1157 &ehci->regs->command);
1158 wmb ();
1159 // handshake later, if we need to
1160 timer_action_done (ehci, TIMER_ASYNC_OFF);
1162 return;
1165 qh->qh_state = QH_STATE_UNLINK;
1166 ehci->reclaim = qh = qh_get (qh);
1168 prev = ehci->async;
1169 while (prev->qh_next.qh != qh)
1170 prev = prev->qh_next.qh;
1172 prev->hw_next = qh->hw_next;
1173 prev->qh_next = qh->qh_next;
1174 wmb ();
1176 /* If the controller isn't running, we don't have to wait for it */
1177 if (unlikely(!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))) {
1178 /* if (unlikely (qh->reclaim != 0))
1179 * this will recurse, probably not much
1181 end_unlink_async (ehci);
1182 return;
1185 cmd |= CMD_IAAD;
1186 ehci_writel(ehci, cmd, &ehci->regs->command);
1187 (void)ehci_readl(ehci, &ehci->regs->command);
1188 iaa_watchdog_start(ehci);
1191 /*-------------------------------------------------------------------------*/
1193 static void scan_async (struct ehci_hcd *ehci)
1195 struct ehci_qh *qh;
1196 enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1198 ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index);
1199 timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1200 rescan:
1201 qh = ehci->async->qh_next.qh;
1202 if (likely (qh != NULL)) {
1203 do {
1204 /* clean any finished work for this qh */
1205 if (!list_empty (&qh->qtd_list)
1206 && qh->stamp != ehci->stamp) {
1207 int temp;
1209 /* unlinks could happen here; completion
1210 * reporting drops the lock. rescan using
1211 * the latest schedule, but don't rescan
1212 * qhs we already finished (no looping).
1214 qh = qh_get (qh);
1215 qh->stamp = ehci->stamp;
1216 temp = qh_completions (ehci, qh);
1217 qh_put (qh);
1218 if (temp != 0) {
1219 goto rescan;
1223 /* unlink idle entries, reducing DMA usage as well
1224 * as HCD schedule-scanning costs. delay for any qh
1225 * we just scanned, there's a not-unusual case that it
1226 * doesn't stay idle for long.
1227 * (plus, avoids some kind of re-activation race.)
1229 if (list_empty(&qh->qtd_list)
1230 && qh->qh_state == QH_STATE_LINKED) {
1231 if (!ehci->reclaim
1232 && ((ehci->stamp - qh->stamp) & 0x1fff)
1233 >= (EHCI_SHRINK_FRAMES * 8))
1234 start_unlink_async(ehci, qh);
1235 else
1236 action = TIMER_ASYNC_SHRINK;
1239 qh = qh->qh_next.qh;
1240 } while (qh);
1242 if (action == TIMER_ASYNC_SHRINK)
1243 timer_action (ehci, TIMER_ASYNC_SHRINK);